On Tue, Apr 9, 2019 at 4:10 PM Maxime Ripard wrote:
>
> On Tue, Apr 09, 2019 at 12:13:58AM +0800, Frank Lee wrote:
> > On Fri, Apr 5, 2019 at 10:55 PM Maxime Ripard
> > wrote:
> > >
> > > Hi,
> > >
> > > On Fri, Apr 05, 2019 at 06:24:55AM -0400, Yangtao Li wrote:
> > > > Allwinner Process
On Tue, Apr 9, 2019 at 6:07 PM Viresh Kumar wrote:
>
> On 05-04-19, 06:24, Yangtao Li wrote:
> > +++ b/Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu0: cpu@0 {
On 05-04-19, 06:24, Yangtao Li wrote:
> +++ b/Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu0: cpu@0 {
> + compatible = "arm,cortex-a53";
> +
On Tue, Apr 09, 2019 at 12:13:58AM +0800, Frank Lee wrote:
> On Fri, Apr 5, 2019 at 10:55 PM Maxime Ripard
> wrote:
> >
> > Hi,
> >
> > On Fri, Apr 05, 2019 at 06:24:55AM -0400, Yangtao Li wrote:
> > > Allwinner Process Voltage Scaling Tables defines the voltage and
> > > frequency value based
On Fri, Apr 5, 2019 at 10:55 PM Maxime Ripard wrote:
>
> Hi,
>
> On Fri, Apr 05, 2019 at 06:24:55AM -0400, Yangtao Li wrote:
> > Allwinner Process Voltage Scaling Tables defines the voltage and
> > frequency value based on the speedbin blown in the efuse combination.
> > The sunxi-cpufreq-nvmem
On 4/5/19 9:55 AM, Maxime Ripard wrote:
> Hi,
>
> On Fri, Apr 05, 2019 at 06:24:55AM -0400, Yangtao Li wrote:
>> Allwinner Process Voltage Scaling Tables defines the voltage and
>> frequency value based on the speedbin blown in the efuse combination.
>> The sunxi-cpufreq-nvmem driver reads the
Hi,
On Fri, Apr 05, 2019 at 06:24:55AM -0400, Yangtao Li wrote:
> Allwinner Process Voltage Scaling Tables defines the voltage and
> frequency value based on the speedbin blown in the efuse combination.
> The sunxi-cpufreq-nvmem driver reads the efuse value from the SoC to
> provide the OPP
7 matches
Mail list logo
