From: Marek Szyprowski m.szyprow...@samsung.com
This leads to potential spinlock recursion in composite framework, other
udc drivers also don't call it directly from pullup method.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Signed-off-by: Robert Baldyga r.bald...@samsung.com
---
From: Marek Szyprowski m.szyprow...@samsung.com
This patch fixes possible freeze caused by infinite loop in interrupt
context.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Signed-off-by: Robert Baldyga r.bald...@samsung.com
---
drivers/usb/dwc2/gadget.c | 1 +
1 file changed, 1
From: Kamil Debski k.deb...@samsung.com
When the driver is removed s3c_hsotg_phy_disable is called three times
instead of once. This results in decreasing of the phy reference counter
below zero and thus consecutive inserts of the module fails.
This patch removes calls to s3c_hsotg_phy_disable
On Tue 09-09-14 02:27:12, Al Viro wrote:
On Mon, Sep 08, 2014 at 04:01:56PM +0400, Andrey Vagin wrote:
Currently watchers are removed in dentry_iput(), if n_link is zero.
But other detries can be linked with this inode. For example if we
create two hard links, open the first one and set a
On 09/04/2014 09:25 AM, Leo Yan wrote:
Below flow will have the redundant interrupts for broadcast timer:
1. Process A starts a hrtimer with 100ms timeout, then Process A will
wait on the waitqueue to sleep;
2. The CPU which Process A runs on will enter idle and call notify
This series adds support for the picoPHY usb phy which is used by the usb2
and usb3 host controllers when controlling usb2/1.1 devices. It is found on
stih407 family SoC's from the consumer electronics devision of
STMicroelectronics.
Changes since v1:
- Remove reference to stih410 in dt
This patch adds the new phy-stih407-usb.c usb phy driver found on
STMicroelectronics stih407 consumer electronics SoC's into the STI
arch section of the maintainers file.
Signed-off-by: Peter Griffin peter.grif...@linaro.org
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git
This patch enables the picoPHY usb phy which is used by
the usb2 and usb3 host controllers when controlling usb2/1.1
devices. It is found in stih407 family SoC's from STMicroelectronics.
Signed-off-by: Peter Griffin peter.grif...@linaro.org
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file
This is the generic phy driver for the picoPHY ports used by the
USB2 and USB3 Host controllers when controlling usb2/1.1 devices. It
is found on STiH407 SoC family from STMicroelectronics.
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
Signed-off-by: Peter Griffin
This patch adds the dt documentation for the usb picophy found on stih407 SoC
family
available from STMicroelectronics.
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
Signed-off-by: Peter Griffin peter.grif...@linaro.org
---
.../devicetree/bindings/phy/phy-stih407-usb.txt| 30
On Tue, 2014-09-09 at 01:50 +, Chen, Alvin wrote:
On Friday 05 September 2014 12:02:01 Shevchenko, Andriy wrote:
irq = irq_of_parse_and_map(node, 0); If (!irq) {
pp-irq = -1;
return;
} else {
pp-irq = irq;
}
Then the code looks strange.
How do you think?
On my Raspberry Pi, the driver doesn't work. Every read fails with -EIO.
Reading the data sheet and experimenting a bit made me finding out that
using the nohold mode works. The Raspberry Pi I²C chip seems to have
problems with slaves blocking the SCK line.
In any case, freeing the bus while
This patch adds missing space between interface and by
in bonding module parameter description.
Signed-off-by: Masanari Iida standby2...@gmail.com
---
drivers/net/bonding/bond_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/bonding/bond_main.c
On Wed, Aug 20, 2014 at 03:36:13PM +0300, Alexander Shishkin wrote:
Events that generate AUX data can also be created by the kernel. In this
case, some in-kernel infrastructure is needed to store and copy this data.
Oh, do tell.
You really need to work on these changelogs..
pgpnSzfKNV6H9.pgp
On Tuesday 09 September 2014 10:00:15 Peter Griffin wrote:
This is the generic phy driver for the picoPHY ports used by the
USB2 and USB3 Host controllers when controlling usb2/1.1 devices. It
is found on STiH407 SoC family from STMicroelectronics.
Signed-off-by: Giuseppe Cavallaro
On Wed, Aug 20, 2014 at 03:36:08PM +0300, Alexander Shishkin wrote:
For counters such as instruction tracing, it is useful for the decoder
to know which tasks are running when the event is first scheduled in,
before the first sched_switch.
To single out such instruction tracing pmus, this
On Wed, Aug 20, 2014 at 03:36:16PM +0300, Alexander Shishkin wrote:
AUX data can be used to annotate other perf events by including it in
sample records when PERF_SAMPLE_AUX flag is set. In this case, a kernel
counter is created for each such event and trace data is retrieved
from it and
On 09.09.14 10:00:42, Uwe Kleine-König wrote:
On Mon, Sep 08, 2014 at 04:11:19PM +0200, Robert Richter wrote:
@@ -479,7 +479,7 @@ static void gic_raise_softirq(const struct cpumask
*mask, unsigned int irq)
smp_wmb();
for_each_cpu_mask(cpu, *mask) {
- u64
On Wed, Aug 20, 2014 at 03:36:17PM +0300, Alexander Shishkin wrote:
When a new event is inherited from a per-task kernel event that has a
ring buffer, allocate a new buffer for this event so that data from the
child task is collected and can later be retrieved for sample annotation
or whatnot.
The new AIC driver is currently only selected when only DT board support
is enabled (and not when both DT and non-DT boards are supported), thus,
when booting a DT + non-DT kernel with a dtb, the irqchip is never
initialized/registered which then triggers a panic.
Signed-off-by: Boris BREZILLON
Hi All,
While working on making error handling in the uas driver more robust,
I noticed that all the commands being send to a sata ssd hooked up
over uas were untagged, where I would expect tcq to be used, as that
is the big advantage of uas over usb-storage / bot.
Taking the uas.c file from
Hi Kishon,
Thanks for reviewing.
BR
Gabriel
On 8 September 2014 17:12, Kishon Vijay Abraham I kis...@ti.com wrote:
Hi,
On Wednesday 03 September 2014 09:07 PM, Gabriel FERNANDEZ wrote:
The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe
or USB3 devices.
Signed-off-by:
On Tuesday 09 September 2014 01:02 AM, Nishanth Menon wrote:
A) There is no OFF mode on DRA7. in sleep state use mode 15 (gated).
B) when using this for wakeup - use pinctrl wakeup handling to do the
wakeup.
Will drop this patch and use mode 15 in sleep mode and submit v2 patch
series
Regards
On Tuesday 09 September 2014 09:46:21 Liviu Dudau wrote:
On Tue, Sep 09, 2014 at 06:54:21AM +0100, Yijing Wang wrote:
on new requests. This function gets called quite a lot and I'm trying
not to
make it too heavy weight.
Generally, nothing should be accessing the same DT value
Hi Bernhard,
This is a well-known issue on the Raspberry Pi whose i2c stretching timeout is
too short to allow proper HTU21 conversion.
See this discussion over here which provides a patch to allow hold master mode
on the Raspberry Pi: https://github.com/raspberrypi/linux/issues/211
We will
On Tue, Sep 09, 2014 at 11:12:01AM +0200, Robert Richter wrote:
On 09.09.14 10:00:42, Uwe Kleine-König wrote:
On Mon, Sep 08, 2014 at 04:11:19PM +0200, Robert Richter wrote:
@@ -479,7 +479,7 @@ static void gic_raise_softirq(const struct cpumask
*mask, unsigned int irq)
On Mon, Sep 08, 2014 at 11:52:35AM +0200, Arnd Bergmann wrote:
On Monday 08 September 2014 11:26:42 Maxime Ripard wrote:
On Fri, Sep 05, 2014 at 11:25:11PM +0200, Arnd Bergmann wrote:
On Friday 05 September 2014, Nicolas Ferre wrote:
Arnd, Olof, Kevin,
This pull-request is
Hi Kishon,
On 8 September 2014 17:15, Kishon Vijay Abraham I kis...@ti.com wrote:
On Wednesday 03 September 2014 09:07 PM, Gabriel FERNANDEZ wrote:
SSC is the technique of modulating the operating frequency of a signal
slightly to spread its radiated emissions over a range of frequencies.
On 03/09/2014 at 11:07:46 +0200, Boris Brezillon wrote :
Hello,
This patch series add a new fixup function for the RTT (Real Time Timer)
block and make use of it on SoCs integrating at least one RTT to prevent
spurious interrupts on the first interrupt line.
This fixup function was
Hi Kishon,
ok will be fix to v3
BR
Gabriel
On 8 September 2014 16:33, Kishon Vijay Abraham I kis...@ti.com wrote:
Hi,
On Wednesday 03 September 2014 09:07 PM, Gabriel FERNANDEZ wrote:
The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe
or USB3 devices.
Signed-off-by:
Em Mon, 08 Sep 2014 16:41:31 -0700
Greg Kroah-Hartman gre...@linuxfoundation.org escreveu:
On Mon, Sep 08, 2014 at 02:49:59PM -0700, Andy Lutomirski wrote:
On Mon, Sep 8, 2014 at 7:10 AM, Aristeu Rozanski a...@redhat.com wrote:
On Thu, Aug 14, 2014 at 02:45:41PM -0700, Andy Lutomirski
On Tuesday 09 September 2014 11:15:20 Maxime Ripard wrote:
One of the problems with the current interface is that it requires
statically declaring platform_device structures, which is something
that has been on Greg's list of device model antipatterns for a long
time.
I didn't find
On Tue, 2014-09-09 at 10:07 +0200, Uwe Kleine-König wrote:
On Mon, Sep 08, 2014 at 01:44:48PM +0200, Robert Richter wrote:
@@ -252,11 +252,11 @@ config SCHED_SMT
places. If unsure say N here.
config NR_CPUS
- int Maximum number of CPUs (2-32)
- range 2 32
+ int
This serial patch is for refining the ssi clock tree for imx6sl,
and update imx6qdl and imx6sl dts file.
Shengjiu Wang (3):
ARM: clk-imx6sl: refine clock tree for SSI
ARM: dts: imx6qdl: add baud clock and clock-names for ssi
ARM: dts: imx6sl: add baud clock and clock-names for ssi
Baud clock is used for bit clock generation in master mode. Ipg clock
is peripheral clock and peripheral access clock.
Signed-off-by: Shengjiu Wang shengjiu.w...@freescale.com
---
arch/arm/boot/dts/imx6sl.dtsi | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git
Each SSI has ssi, ssi_ipg clocks, and they share same gate bits.
Signed-off-by: Shengjiu Wang shengjiu.w...@freescale.com
---
arch/arm/mach-imx/clk-imx6sl.c | 13 ++---
include/dt-bindings/clock/imx6sl-clock.h |5 -
2 files changed, 14 insertions(+), 4 deletions(-)
Baud clock is used for bit clock generation in master mode. Ipg clock
is peripheral clock and peripheral access clock.
Signed-off-by: Shengjiu Wang shengjiu.w...@freescale.com
---
arch/arm/boot/dts/imx6qdl.dtsi | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git
First export the clk32k clk.
Then add clk_lookup entries for RTT devices so that rtc-at91sam9 driver
can retrieve and manipulate the slow clk.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
arch/arm/mach-at91/at91sam9260.c | 2 ++
arch/arm/mach-at91/at91sam9261.c | 2 ++
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
.../devicetree/bindings/rtc/atmel,at91sam9-rtc.txt | 20
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.txt
diff --git
The RTT block is using the slow clock which is accessible through the clk
API.
Use the clk API to retrieve, enable and get the slow clk rate instead of
the AT91_SLOW_CLOCK macro (which hardcodes the slow clk rate).
Doing this allows us to reference the clk thus preventing the CCF from
disabling it
Hello,
This patch series adds DT support to the atmel at91sam9 RTC driver.
It also removes any machine specific inclusions to prepare the migration
to multi platform kernel support, and retain the slow clock to prevent
the CCF from disabling it at the end of boot.
Best Regards,
Boris
Changes
Add of_match_table to the existing driver so that rtc nodes defined in at91
DTs can be attached to this driver.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
drivers/rtc/rtc-at91sam9.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/rtc/rtc-at91sam9.c
Documentation: dt-bindings: trickle charger dt binding document for ds1339
Some DS13XX devices have trickle chargers. Introduce a device tree binding
for the resistor and diode configuration for enabling trickle charger.
Signed-off-by: Matti Vaittinen matti.vaitti...@nsn.com
---
Delta to
In order to support multi platform kernel drivers should not include
machine specific headers.
Copy RTT macros in the driver code and remove any machine specific
headers.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
drivers/rtc/rtc-at91sam9.c | 22 ++
On 2014/9/9 16:46, Liviu Dudau wrote:
On Tue, Sep 09, 2014 at 06:54:21AM +0100, Yijing Wang wrote:
on new requests. This function gets called quite a lot and I'm trying not
to
make it too heavy weight.
Generally, nothing should be accessing the same DT value frequently.
It should get
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
drivers/rtc/rtc-at91sam9.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/rtc/rtc-at91sam9.c b/drivers/rtc/rtc-at91sam9.c
index 51f0038..74a9ca0 100644
--- a/drivers/rtc/rtc-at91sam9.c
+++
Peter Zijlstra pet...@infradead.org writes:
On Wed, Aug 20, 2014 at 03:36:08PM +0300, Alexander Shishkin wrote:
For counters such as instruction tracing, it is useful for the decoder
to know which tasks are running when the event is first scheduled in,
before the first sched_switch.
To
Move the ipg clock enable and disable operation to startup and shutdown,
that is only enable ipg clock when ssi is working. we don't need to enable
ipg clock in probe.
Another register accessing need the ipg clock, so use devm_regmap_init_mmio_clk
instead of devm_regmap_init_mmio.
Signed-off-by:
rtc: ds1307: add trickle charger device tree binding.
Some DS13XX devices have trickle chargers. Introduce a device tree
binding for specifying the trickle charger configuration for ds1339.
Only ds1339 dt binding is supported because this is the only chip I have.
I _assume_ the code would have
On Fri, Sep 05, 2014 at 07:04:51PM +0300, Octavian Purdila wrote:
On Fri, Sep 5, 2014 at 6:38 PM, Johan Hovold jo...@kernel.org wrote:
On Fri, Sep 05, 2014 at 06:17:59PM +0300, Octavian Purdila wrote:
In general, how well have these patches been tested with disconnect
events? At least
On 09/09/2014 at 11:30:29 +0200, Boris Brezillon wrote :
Hello,
This patch series adds DT support to the atmel at91sam9 RTC driver.
It also removes any machine specific inclusions to prepare the migration
to multi platform kernel support, and retain the slow clock to prevent
the CCF from
On 09/09/14 00:27, Greg Kroah-Hartman wrote:
On Wed, Sep 03, 2014 at 01:00:51PM +0100, Daniel Thompson wrote:
The architectures where this peripheral exists (ARM and SH) have expensive
implementations of writel(), reliant on spin locks and explicit L2 cache
management. These architectures
Peter Zijlstra pet...@infradead.org writes:
On Wed, Aug 20, 2014 at 03:36:06PM +0300, Alexander Shishkin wrote:
diff --git a/kernel/events/ring_buffer.c b/kernel/events/ring_buffer.c
index 925f369947..5006caba63 100644
--- a/kernel/events/ring_buffer.c
+++ b/kernel/events/ring_buffer.c
@@
On Fri, Aug 22, 2014 at 04:26:05PM +0300, Andreea-Cristina Bernat wrote:
The use of rcu_assign_pointer() is NULLing out the pointer.
According to RCU_INIT_POINTER()'s block comment:
1. This use of RCU_INIT_POINTER() is NULLing out the pointer
it is better to use it instead of
On Tue, Sep 09, 2014 at 11:26:53AM +0200, Robert Richter wrote:
On 09.09.14 11:19:12, Uwe Kleine-König wrote:
On Tue, Sep 09, 2014 at 11:12:01AM +0200, Robert Richter wrote:
On 09.09.14 10:00:42, Uwe Kleine-König wrote:
On Mon, Sep 08, 2014 at 04:11:19PM +0200, Robert Richter wrote:
On Tue, Sep 09, 2014 at 01:38:39PM +0300, Matti Vaittinen wrote:
rtc: ds1307: add trickle charger device tree binding.
Some DS13XX devices have trickle chargers. Introduce a device tree
binding for specifying the trickle charger configuration for ds1339.
Only ds1339 dt binding is supported
This facility is used in a few places so let's introduce
a helper function to improve code readability.
Signed-off-by: Aaron Tomlin atom...@redhat.com
---
arch/powerpc/mm/fault.c| 4 +---
arch/x86/mm/fault.c| 4 +---
include/linux/sched.h | 2 ++
kernel/trace/trace_stack.c | 2
Currently in the event of a stack overrun a call to schedule()
does not check for this type of corruption. This corruption is
often silent and can go unnoticed. However once the corrupted
region is examined at a later stage, the outcome is undefined
and often results in a sporadic page fault which
Tasks get their end of stack set to STACK_END_MAGIC with the
aim to catch stack overruns. Currently this feature does not
apply to init_task. This patch removes this restriction.
Note that a similar patch was posted by Prarit Bhargava [1]
some time ago but was never merged.
[1]:
Resending with v2 added to each subject line:
Currently in the event of a stack overrun a call to schedule()
does not check for this type of corruption. This corruption is
often silent and can go unnoticed. However once the corrupted
region is examined at a later stage, the outcome is undefined
On Tue, Sep 09, 2014 at 09:24:59AM +0200, Linus Walleij wrote:
On Mon, Sep 8, 2014 at 1:47 PM, Mika Westerberg
mika.westerb...@linux.intel.com wrote:
Some newer Intel SoCs like Braswell already have more than 256 GPIOs
available so the default limit is exceeded. In order to support these
Use of_get_child_by_name to obtain reference to charger node instead of
of_find_node_by_name which can walk outside of the parent node.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
drivers/power/max8925_power.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Check the return value of devm_kzalloc() to fix possible NULL pointer
dereference and properly exit the probe() on memory allocation failure.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
drivers/power/max8925_power.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
Hi,
On Tue, Sep 09, 2014 at 05:18:07PM +0800, Shengjiu Wang wrote:
Move the ipg clock enable and disable operation to startup and shutdown,
that is only enable ipg clock when ssi is working. we don't need to enable
ipg clock in probe.
Another register accessing need the ipg clock, so use
Peter Zijlstra pet...@infradead.org writes:
On Wed, Aug 20, 2014 at 03:36:03PM +0300, Alexander Shishkin wrote:
In order to collect AUX data from an inherited event, we can redirect its
output to parent's ring buffer if possible (they must be cpu affine). This
patch adds set_output() to the
Ack. Thanks.
On Fri, Sep 05, 2014 at 03:11:28AM +0300, Anssi Hannula wrote:
When a writeback or a promotion of a block is completed, the cell of
that block is removed from the prison, the block is marked as clean, and
the clear_dirty() callback of the cache policy is called.
Unfortunately,
Hi,
Subject: [PATCH V1] ASoC: fsl_ssi: refine ipg clock usage in this module
Move the ipg clock enable and disable operation to startup and shutdown,
that is only enable ipg clock when ssi is working. we don't need to enable
ipg clock in probe.
Another register accessing need the ipg
From: Luca Abeni luca.ab...@unitn.it
Several small changes regarding SCHED_DEADLINE documentation that fix
terminology and improve clarity and readability:
- current runtime becomes remaining runtime
- readablity of an equation is improved by introducing more spacing
- clarify when
Hello everyone,
This is version 4 of a small patchset that fixes and improves SCHED_DEADLINE
documentation.
Patch 1/5 fixes and clarifies terminology; patch 2/5 aligns Section 4 to
the current interface; patch 3/5 improves and clarifies what admission
control means on UP an SMP systems; patch
The Applied Micro X-Gene SOC has on-chip QMTM (Queue manager
and Traffic manager) which is hardware based Queue or Ring
manager. This QMTM devices can be used in conjuction with
other devices such as DMA Engine, Ethernet, Security Engine,
etc to assign work to based on Queues or Rings.
This patch
Add entry to maintainer list for APM Xgene QMTM UIO driver.
Signed-off-by: Ankit Jindal ankit.jin...@linaro.org
Signed-off-by: Tushar Jagad tushar.ja...@linaro.org
---
MAINTAINERS |7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 5e7866a..138663f
This patch update UIO documentation for new mem region
type UIO_MEM_PHYS_CACHE.
Signed-off-by: Ankit Jindal ankit.jin...@linaro.org
Signed-off-by: Tushar Jagad tushar.ja...@linaro.org
---
Documentation/DocBook/uio-howto.tmpl |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Currently, three types of mem regions are supported: UIO_MEM_PHYS,
UIO_MEM_LOGICAL and UIO_MEM_VIRTUAL. Among these UIO_MEM_PHYS helps
UIO driver export physcial memory to user space as non-cacheable
user memory. Typcially memory-mapped registers of a device are exported
to user space as
Add an appendix providing a simple self-contained code snippet showing
how SCHED_DEADLINE reservations can be created by application developers.
Signed-off-by: Juri Lelli juri.le...@arm.com
Cc: Randy Dunlap rdun...@infradead.org
Cc: Peter Zijlstra pet...@infradead.org
Cc: Ingo Molnar
This patchset enables user space access to APM X-Gene QMTM
using UIO framework.
The patchset also introduces new type UIO_MEM_PHYS_CACHE
for mem regions because APM X-Gene QMTM device supports
cache coherency with CPU caches.
Ankit Jindal (5):
uio: Add new UIO_MEM_PHYS_CACHE type for mem
This patch adds device tree binding documentation for
Xgene QMTM UIO driver.
Signed-off-by: Ankit Jindal ankit.jin...@linaro.org
Signed-off-by: Tushar Jagad tushar.ja...@linaro.org
---
.../devicetree/bindings/uio/uio_xgene_qmtm.txt | 45
1 file changed, 45
From: Luca Abeni luca.ab...@unitn.it
Admission control is of key importance for SCHED_DEADLINE, since it guarantees
system schedulability (or tells us something about the degree of guarantees
we can provide to the user).
This patch improves and clarifies bits and pieces regarding AC, both for UP
Add an appendix briefly describing tools that can be used to test SCHED_DEADLINE
(and the scheduler in general). Links to where source code of the tools is
hosted
are also provided.
Signed-off-by: Juri Lelli juri.le...@arm.com
Cc: Randy Dunlap rdun...@infradead.org
Cc: Peter Zijlstra
Section 4 intro was still describing the old interface. Rewrite it.
Signed-off-by: Juri Lelli juri.le...@arm.com
Signed-off-by: Luca Abeni luca.ab...@unitn.it
Cc: Randy Dunlap rdun...@infradead.org
Cc: Peter Zijlstra pet...@infradead.org
Cc: Ingo Molnar mi...@redhat.com
Cc: Henrik Austad
On Fri, 2014-09-05 at 06:47 AM, Wood Scott wrote:
Subject: Re: [PATCH v2] QE: move qe code from arch/powerpc to drivers/soc
On Thu, 2014-09-04 at 13:06 +0800, Zhao Qiang wrote:
LS1 is arm cpu and it has qe ip block.
move qe code from platform directory to public directory.
QE is an
On Mon, Sep 08, 2014 at 09:51:12AM +0200, Bojan Prtvar wrote:
The skb_find_text() accepts uninitialized textsearch state variable.
Applied, thanks.
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Hi,
(don't have netdev archived, thus answering here, sorry)
On 2014-09-07 16:41:09 -0700, David Miller wrote:
Alexander Y. Fomichev (1):
net: prevent of emerging cross-namespace symlinks
I'm seeing WARNINGs like:
[ 1005.269134] [ cut here ]
[ 1005.269148]
The architectures supported by this driver, arm and sh, have expensive
implementations of writel(), reliant on spin locks and explicit L2 cache
management. These architectures provide a cheaper writel_relaxed() which
is much better suited to peripherals that do not perform DMA. The
situation with
On Fri, Sep 05, 2014 at 09:30:11AM +0800, Wang YanQing wrote:
On Thu, Sep 04, 2014 at 06:44:31PM +0200, Benjamin Henrion wrote:
On Thu, Sep 4, 2014 at 6:14 PM, Benjamin Henrion zoo...@gmail.com wrote:
I have subscribed to the lkml.
Can you make me a favour, send me your email as you
Declare the SCKC (Slow Clock Configuration) block and its clks.
Make use of the clk32k clk instead of slow_osc where appropriate.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/at91sam9g45.dtsi | 30 --
1 file changed, 28
On Mon, Sep 08, 2014 at 07:35:47PM +0100, Mark Charlebois wrote:
When I compile
int main()
{
u64 foo, tmp;
// This fails for clang but not gcc
asm volatile(
mrs %0, mair_el1\n
bfi %0, %1, #%2, #8\n
msr
This patch replaces 'readlwritel' with 'dwapb_readdwapb_write'.
Reviewed-by: Shevchenko, Andriy andriy.shevche...@intel.com
Signed-off-by: Weike Chen alvin.c...@intel.com
---
drivers/gpio/gpio-dwapb.c | 37 +++--
1 file changed, 27 insertions(+), 10 deletions(-)
The Synopsys DesignWare APB GPIO driver only supports open firmware devices.
But, like Intel Quark X1000 SOC, which has a single PCI function exporting
a GPIO and an I2C controller, it is a Multifunction device. This patch is
to enable the current Synopsys DesignWare APB GPIO driver to support the
Hi,
These patches are for Intel Quark X1000 designware GPIO supporting. The first
patch enables the Synopsys DesignWare APB GPIO driver to support the MFD device.
And the Quark designware GPIO controller is registered as MFD device,
because Quark exports a single PCI device with both GPIO and I2C
This fixes the whole error handling in probe function by capturing and
returning error values on kernel function like clk_prepare,
clk_enable, gpiochip_add etc.
CC: Jean-Christophe Plagniol-Villard plagn...@jcrosoft.com
CC: Linus Walleij linus.wall...@linaro.org
Signed-off-by: Pramod Gurav
This patch removes a call to panic function when gpiochio_irqchip_add
fails and just returns the error to the calling function.
Same return value is used to handle the error case and adds a lable
to release resources on error.
The error message has been improved to indicate failure to add irqchip
This patch enables suspend and resume mode for the power management, and
it is based on Josef Ahmad's previous work.
Reviewed-by: Hock Leong Kweh hock.leong.k...@intel.com
Signed-off-by: Weike Chen alvin.c...@intel.com
---
drivers/gpio/gpio-dwapb.c | 109
This patch enables 'debounce' for the designware GPIO, and
it is based on Josef Ahmad's previous work.
Reviewed-by: Hock Leong Kweh hock.leong.k...@intel.com
Reviewed-by: Shevchenko, Andriy andriy.shevche...@intel.com
Signed-off-by: Weike Chen alvin.c...@intel.com
---
drivers/gpio/gpio-dwapb.c |
On Mon, Sep 08, 2014 at 06:45:24PM +0200, Jiri Olsa wrote:
I just noticed that we initialize the child state with base parent
state not the real (immediate) parent.. which is what we want IMO
I wonder attached patch could fix the issue mentioned in:
1f9a726 perf: Do not allow optimized
On Tue, Sep 09, 2014 at 05:36:36PM +0900, jiwang wrote:
Can anyone tell me what is the reasoning of the following two commits
commit: 5d16333 ASoC: SND_SOC_DAIFMT_NB_NF become 0 as default settings
commit: eef28e1 ASoC: SND_SOC_DAIFMT_GATED become 0 as default settings
with these two
[adding Lee Jones to cc list since I'm referring on a series he posted]
Hello Sjoerd,
On 09/09/2014 09:52 AM, Sjoerd Simons wrote:
For i2c devices in OF the modalias exposed to userspace is i2c:node
type, for the Maxtouch driver this is i2c:maxtouch.
Add maxtouch to the i2c id table such
On Tue, Sep 09, 2014 at 12:08:56PM +0200, Johan Hovold wrote:
On Fri, Sep 05, 2014 at 09:30:11AM +0800, Wang YanQing wrote:
On Thu, Sep 04, 2014 at 06:44:31PM +0200, Benjamin Henrion wrote:
On Thu, Sep 4, 2014 at 6:14 PM, Benjamin Henrion zoo...@gmail.com wrote:
I have subscribed to the
On Monday 08 September 2014 11:52:47 Murali Karicheri wrote:
On 09/05/2014 05:11 PM, Arnd Bergmann wrote:
But the driver can only do root complex mode, and we would probably
want a completely different driver if we were to start supporting
endpoint mode.
Good point! I will drop index#2
Kconfig never defines CONFIG_* as 'n'.
Now obj-n is only used in firmware/Makefile and it can be
replaced with obj-. No makefile uses lib-n.
Let's rip off obj-n and lib-n.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
firmware/Makefile | 2 +-
scripts/Makefile.build | 4
In these Makefiles, at least one of obj-y and obj- is non-empty,
hence built-in.o is always created without such a trick.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
arch/arm/plat-samsung/Makefile | 1 -
drivers/clk/shmobile/Makefile | 2 --
drivers/net/wimax/Makefile | 4
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