This patch adds support for DT "/revision" and convert ATAG_REVISION to DT.
Pali Rohár (2):
arm: devtree: Set system_rev from DT revision
arm: boot: convert ATAG_REVISION to DT revision field
arch/arm/boot/compressed/atags_to_fdt.c | 37 +++
With this patch "revision" DT string entry is used to set global system_rev
variable. DT "revision" is expected to be string with one hexadecimal number.
So "Revision" line in /proc/cpuinfo will be same as "revision" DT value.
Signed-off-by: Pali Rohár
Acked-by: Pavel Machek
---
On Tue, May 05, 2015 at 03:06:03PM -0400, Tejun Heo wrote:
> Hello, Peter.
>
> On Tue, May 05, 2015 at 09:00:57PM +0200, Peter Zijlstra wrote:
> > On Tue, May 05, 2015 at 12:31:12PM -0400, Tejun Heo wrote:
> > > What I don't want to happen is controllers failing migrations
> > > willy-nilly for
"Kirill A. Shutemov" writes:
> On Mon, May 04, 2015 at 10:59:16PM +0530, Aneesh Kumar K.V wrote:
>> Archs like ppc64 require pte_t * to remain stable in some code path.
>> They use local_irq_disable to prevent a parallel split. Generic code
>> clear pmd instead of marking it _PAGE_SPLITTING in
On 05/06/2015 03:39 PM, Stephen Boyd wrote:
drivers/clk/hisilicon/clk-hix5hd2.c:255:13: warning: symbol
'hix5hd2_clk_register_complex' was not declared. Should it be static?
Cc: Zhangfei Gao
Signed-off-by: Stephen Boyd
Acked-by: Zhangfei Gao
Thanks
---
On Tue, May 5, 2015 at 7:54 PM, Shawn Guo wrote:
> On Tue, Apr 07, 2015 at 12:34:30PM +0900, Masahiro Yamada wrote:
>> Hello experts,
>> I hope this is the correct ML to ask this question.
>>
>> I am struggling to port Linux-4.0-rc7 onto my SoC/board,
>> based on ARM cortex-A9 (single CPU), but
On 05/06/15 10:35, Daniel Vetter wrote:
> On Tue, May 05, 2015 at 05:54:05PM +0100, One Thousand Gnomes wrote:
>>> First what is Secure Data Path ? SDP is a set of hardware features to
>>> garanty
>>> that some memories regions could only be read and/or write by specific
>>> hardware
>>> IPs.
On 6 May 2015 at 10:02, Valentin Rothberg wrote:
> Hi Joachim,
>
> there are two of your commits [1, 2] in today's linux-next (i.e.,
> next-20150506). Both of them add Kconfig options that depend on
> ARCH_LPC18XX, which is not defined in Kconfig, see:
>
> + depends o
On 06/05/15 01:22, nick wrote:
Greetings All,
I am wondering if in the function,ni_stc_dma_channel_select_bitfield the line:
return 1 << channel;
is guaranteed to be below the threshold that guarantees us to not overflow on
a unsigned 32 integer due to bit wise shifting to the left.
Thanks Nick
The test was updated @
https://docs.google.com/spreadsheets/d/1voffS6dNglwAExSGh3UmG__UAO2qfZ829CkJLPo06aI/edit?usp=sharing.
Please check the tab "Dell-rbtnv2"
Notes:
1. The systems come and go and I can find some of original ones but I
tests some others
2. Test 3 was done by Test 2 + "rmmod
On Tue, 5 May 2015, Tejun Heo wrote:
> On Tue, May 05, 2015 at 08:29:28PM +0200, Thomas Gleixner wrote:
> > As Peter said several times: hard failure is good and desired. It's a
> > very clear information on which people can act on. If the failures
> > modes are nilly-willy today, as you wrote
Hi Bjorn,
On 6 May 2015 at 00:16, Bjorn Helgaas wrote:
> On Fri, Apr 10, 2015 at 11:12:46AM +0200, Gabriel FERNANDEZ wrote:
>> sti pcie is built around a Synopsis Designware PCIe IP.
>>
>> Signed-off-by: Fabrice Gasnier
>> Signed-off-by: Gabriel Fernandez
>
>> +/* ST PCIe driver does not allow
Applied. Thanks!
On Tue, May 5, 2015 at 6:30 AM, Guenter Roeck wrote:
> Fix
>
> include/asm-generic/io.h: In function 'readb':
> include/asm-generic/io.h:113:2: error:
> implicit declaration of function 'bfin_read8'
> include/asm-generic/io.h: In function 'readw':
>
On Wed, May 06, 2015 at 10:35:52AM +0200, Daniel Vetter wrote:
> On Tue, May 05, 2015 at 05:54:05PM +0100, One Thousand Gnomes wrote:
> > > First what is Secure Data Path ? SDP is a set of hardware features to
> > > garanty
> > > that some memories regions could only be read and/or write by
I agree that the best solution is to have a generic dmabuf allocator
but no only for secure use cases.
If we create a memory allocator dedicated to security it means that
userland will be responsible to use it or not depending of the context
which may change while the pipeline/graph is already
Hello Stephen,
On 05/06/2015 09:39 AM, Stephen Boyd wrote:
> drivers/clk/clk-max-gen.c:82:16: warning: symbol 'max_gen_clk_ops' was not
> declared. Should it be static?
> drivers/clk/clk-max-gen.c:109:5: warning: symbol 'max_gen_clk_probe' was not
> declared. Should it be static?
>
On 2015/5/6 16:20, Hillf Danton wrote:
>>
>> Hi all:
>>
>> I meet a kernel problem about the random segmentation fault(x86_64). In my
>> testcase, the size of local variables exceeds 20MB.
>> when run the testcase, it will cause segmentation fault(because the default
>> stack size limit is
On Tue, May 05, 2015 at 10:59:34PM +0100, Mark Brown wrote:
> On Tue, May 05, 2015 at 02:31:29PM +0100, Richard Fitzgerald wrote:
>
> > We can't really tell people what the selection does because that depends on
> > the external hardware. The A setting might be a headset mic, or a line in,
> > or
On Mon, May 4, 2015 at 11:11 PM, Lars-Peter Clausen wrote:
> On 05/04/2015 12:50 PM, Daniel Baluta wrote:
>>
>> A software trigger associates an IIO device trigger with a software
>> interrupt source (e.g: timer, sysfs). This patch adds the generic
>> infrastructure for handling software
On Wednesday 06 May 2015 11:14:25 Gabriel Fernandez wrote:
>
> >> +static int __init pcie_init(void)
> >> +{
> >> + return platform_driver_probe(_pcie_driver, st_pcie_probe);
> >> +}
> >> +device_initcall(pcie_init);
> >
> > Can you use module_platform_driver_probe() or module_init() here?
>
On Wed 2015-05-06 07:19:31, Dr. H. Nikolaus Schaller wrote:
> Hi Peter,
>
> Am 05.05.2015 um 21:54 schrieb Peter Hurley :
>
> > Hi Neil,
> >
> > On 03/18/2015 01:58 AM, NeilBrown wrote:
> >> here is version 3 of support for tty-slaves.
> >
> > Is there a v4 of this that I missed?
>
> We did
On 05/06/2015 12:09 AM, Nishanth Aravamudan wrote:
On 03.04.2015 [10:45:56 -0700], Nishanth Aravamudan wrote:
What I find somewhat worrying though is that we could potentially
break the pfmemalloc_watermark_ok() test in situations where
zone_reclaimable_pages(zone) == 0 is a transient situation
The Allwinner H3 is a quad-core Cortex-A7-based SoC. It is very similar
to other sun8i family SoCs like the A23.
Signed-off-by: Jens Kuske
---
Documentation/devicetree/bindings/arm/sunxi.txt | 1 +
arch/arm/mach-sunxi/Kconfig | 2 +-
arch/arm/mach-sunxi/sunxi.c
On Wednesday 06 May 2015 10:49:01 Pali Rohár wrote:
> With this patch "revision" DT string entry is used to set global system_rev
> variable. DT "revision" is expected to be string with one hexadecimal number.
> So "Revision" line in /proc/cpuinfo will be same as "revision" DT value.
>
>
Hi everyone,
This patch series introduces basic kernel support for Allwinner's H3 SoC,
mainly basic clocks and pinctrl. It also adds interrupts, timers,
watchdog, RTC, dmaengine, MMC and UARTs, which are mostly compatible to
those in earlier SoCs like A23 and A31, and can simply be reused.
These
The H3 SoC has the same dma engine as the A31 (sun6i), with a
reduced amount of endpoints and physical channels. Add the proper
config data and compatible string to support it.
Signed-off-by: Jens Kuske
---
Documentation/devicetree/bindings/dma/sun6i-dma.txt | 5 -
drivers/dma/sun6i-dma.c
The Orange Pi Plus is a SBC based on the Allwinner H3 SoC
with 8GB eMMC, multiple USB ports through a USB hub chip, SATA through
a USB-SATA bridge, one uSD slot, a 10/100/1000M ethernet port,
WiFi, HDMI, headphone jack, IR receiver, a microphone, a CSI connector
and a 40-pin GPIO header.
The Allwinner H3 is a home entertainment system oriented SoC with
four Cortex-A7 cores and a Mali-400MP2 GPU.
Signed-off-by: Jens Kuske
---
arch/arm/boot/dts/sun8i-h3.dtsi | 468
1 file changed, 468 insertions(+)
create mode 100644
The H3 uses the same pin controller as previous SoC's from Allwinner.
Add support for the pins controlled by the main PIO controller.
Signed-off-by: Jens Kuske
---
.../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 +
drivers/pinctrl/sunxi/Kconfig | 4 +
The H3 clock control unit is similar to the those of other sun8i family
members like the A23.
The AHB1 gates got split up into AHB1 and AHB2, with AHB2 clock source
being muxable between AHB1 and PLL6/2, but still sharing gate registers.
The documentation isn't totally clear about which devices
Since Windows 8 requirement asks below, I see a trend that OEM is
moving wireless to HW-control to SW-control. That's also why some new
systems never trigger hard-blocks. I was also told that there may be
no "HW-GPIO" (my translation -> no hard-block) to control wireless in
some of future
On Wed, May 06, 2015 at 08:11:35AM +0200, Johannes Thumshirn wrote:
> Signed-off-by: Johannes Thumshirn
> ---
> MAINTAINERS | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 781e099..2943c62 100644
> --- a/MAINTAINERS
> +++
On Saturday 02 May 2015 01:42:14 Alexandre Belloni wrote:
> Hi,
>
> On 14/12/2010 at 16:08:26 +0100, Hans Ulli Kroll wrote :
> > driver for the rtc device
> > on Cortina Systems CS3516 or StormlinkSemi SL3516 aka Gemini SoC
> >
> > Signed-off-by: Hans Ulli Kroll
>
> This driver has never been
Hello Krzysztof,
On 05/06/2015 02:59 AM, Krzysztof Kozlowski wrote:
> Dear Kukjin,
>
> I gathered various improvements for upcoming 4.2 merge window.
> Description along with a tag.
>
> Best regards,
> Krzysztof
>
>
> The
Move the code that put one idle sh(hot in cache, but happens to be
zero referenced) back to active stage to __find_stripe(). Because
that's what need to do every time you invoke __find_stripe().
Moving it there avoids duplicate code, as well as makes a bit more
sense, IMO, as it tells a whole
Remove the unnecessary "!atomic_read(>count)" check, as the previous
"atomic_inc_not_zero(>count)" check assures sh->count to be 0.
The only reason I can think of that we need such check is to consider
the lock race issue.
First of all, I doubt there is another process could modify an in-cache
Add 1588 timer node in files:
arch/powerpc/boot/dts/bsc9131rdb.dtsi
arch/powerpc/boot/dts/bsc9132qds.dtsi
arch/powerpc/boot/dts/p1010rdb.dtsi
arch/powerpc/boot/dts/p1020rdb-pd.dts
arch/powerpc/boot/dts/p1021rdb-pc.dtsi
arch/powerpc/boot/dts/p1022ds.dtsi
arch/powerpc/boot/dts/p1025twr.dtsi
Hi,
On Wed, May 6, 2015 at 5:31 PM, Jens Kuske wrote:
> The H3 clock control unit is similar to the those of other sun8i family
> members like the A23.
>
> The AHB1 gates got split up into AHB1 and AHB2, with AHB2 clock source
> being muxable between AHB1 and PLL6/2, but still sharing gate
On 05/05/2015 19:17, Radim Krčmář wrote:
> 2015-04-30 13:36+0200, Paolo Bonzini:
>> This adds an arch-specific memslot flag that hides slots unless the
>> VCPU is in system management mode.
>>
>> Some care is needed in order to limit the overhead of x86_gfn_to_memslot
>> when compared with
* Bryan O'Donoghue wrote:
> Quark X1000 SoC contains a 512 KiB embedded SRAM (eSRAM) memory that can
> be mapped onto an area of DRAM in block or on per-page overlay mode where a
> 4 KiB aligned region can be overlayed - allowing for broken up mappings
> with a 4 KiB individual granularity.
>
On 03/05/15 07:27, pang.xun...@zte.com.cn wrote:
> Hi Dietmar,
>
> Dietmar Eggemann wrote 2015-03-24 AM 03:19:41:
>>
>> Re: [RFCv3 PATCH 12/48] sched: Make usage tracking cpu scale-invariant
[...]
>> In the previous patch-set https://lkml.org/lkml/2014/12/2/332we
>> cpu-scaled both
On 06/05/2015 at 11:39:58 +0200, Arnd Bergmann wrote :
> On Saturday 02 May 2015 01:42:14 Alexandre Belloni wrote:
> > Hi,
> >
> > On 14/12/2010 at 16:08:26 +0100, Hans Ulli Kroll wrote :
> > > driver for the rtc device
> > > on Cortina Systems CS3516 or StormlinkSemi SL3516 aka Gemini SoC
> > >
* Bryan O'Donoghue wrote:
> +/**
> + * esram_page_overlay - Overlay a page with fast access eSRAM.
> + *
> + * This function takes a 4 KiB aligned physical address and programs an
> + * eSRAM page to overlay that 4 KiB region. We require and verify that the
> + * target memory is read-write -
On 05/05/2015 08:21 AM, Al Viro wrote:
> From: Al Viro
>
> Signed-off-by: Al Viro
ACK-by: Boaz Harrosh
Thanks Al so much nicer (And safer)
Boaz
> ---
> fs/exofs/Kbuild| 2 +-
> fs/exofs/exofs.h | 4
> fs/exofs/inode.c | 9 +
> fs/exofs/namei.c | 5 +++--
>
Before this patch, 'make install' installs libraries into bindir:
$ make install DESTDIR=./tree
INSTALL trace_plugins
INSTALL libtraceevent.a
INSTALL libtraceevent.so
$ find ./tree
./tree/
./tree/usr
./tree/usr/local
./tree/usr/local/bin
* Bryan O'Donoghue wrote:
> +/**
> + * esram_self_test_time
> + *
> + * This function is carefully constructed to measure and verify the
> + * performance boost provided by eSRAM. We invalidate the cache with a
> + * wbinvd() and then perform a series of reads - each of which will cause a
> + *
Hi,
On Wed, May 06, 2015 at 11:31:28AM +0200, Jens Kuske wrote:
> The Allwinner H3 is a quad-core Cortex-A7-based SoC. It is very similar
> to other sun8i family SoCs like the A23.
>
> Signed-off-by: Jens Kuske
> ---
> Documentation/devicetree/bindings/arm/sunxi.txt | 1 +
>
* Bryan O'Donoghue wrote:
> +config INTEL_ESRAM
> + bool "Intel Embedded SRAM (eSRAM) support"
> + default n
> + depends on X86_INTEL_QUARK && IOSF_MBI
> + select GENERIC_ALLOCATOR
> + ---help---
> + This options provides an API to allocate memory from Embedded SRAM
>
Hi Suravee,
On 05/05/15 16:12, Suravee Suthikulpanit wrote:
From http://www.uefi.org/sites/default/files/resources/ACPI_6.0.pdf,
section 6.2.17 _CCA states that ARM platforms require ACPI _CCA
object to be specified for DMA-cabpable devices. This patch introduces
ACPI_MUST_HAVE_CCA in arm64
Commit-ID: f5d6a52f511157c7476590532a23b5664b1ed877
Gitweb: http://git.kernel.org/tip/f5d6a52f511157c7476590532a23b5664b1ed877
Author: Jan H. Schönherr
AuthorDate: Mon, 4 May 2015 11:42:34 +0200
Committer: Ingo Molnar
CommitDate: Wed, 6 May 2015 10:24:51 +0200
x86/smpboot: Skip delays
Commit-ID: 1b4574292e9d2d37b3bb437c9e778fd2bba8e170
Gitweb: http://git.kernel.org/tip/1b4574292e9d2d37b3bb437c9e778fd2bba8e170
Author: Aravind Gopalakrishnan
AuthorDate: Tue, 7 Apr 2015 16:46:37 -0500
Committer: Ingo Molnar
CommitDate: Wed, 6 May 2015 11:15:53 +0200
x86/gart: Check
Commit-ID: b9d16a2a21aa9c264a29dd84d6f7b03581517a03
Gitweb: http://git.kernel.org/tip/b9d16a2a21aa9c264a29dd84d6f7b03581517a03
Author: Aravind Gopalakrishnan
AuthorDate: Mon, 27 Apr 2015 10:25:51 -0500
Committer: Ingo Molnar
CommitDate: Wed, 6 May 2015 11:16:53 +0200
x86/cpu/amd: Set
Commit-ID: c88d47480d300eaad80c213d50c9bf6077fc49bc
Gitweb: http://git.kernel.org/tip/c88d47480d300eaad80c213d50c9bf6077fc49bc
Author: Bobby Powers
AuthorDate: Mon, 27 Apr 2015 08:10:41 -0700
Committer: Ingo Molnar
CommitDate: Wed, 6 May 2015 11:22:03 +0200
x86/fpu: Always
On Wed, May 06, 2015 at 11:31:31AM +0200, Jens Kuske wrote:
> The H3 SoC has the same dma engine as the A31 (sun6i), with a
> reduced amount of endpoints and physical channels. Add the proper
> config data and compatible string to support it.
>
> Signed-off-by: Jens Kuske
Acked-by: Maxime
On Wed, May 06, 2015 at 11:31:30AM +0200, Jens Kuske wrote:
> The H3 uses the same pin controller as previous SoC's from Allwinner.
> Add support for the pins controlled by the main PIO controller.
>
> Signed-off-by: Jens Kuske
> ---
> .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 +
* Srinivas Pandruvada wrote:
> > > diff --git a/arch/x86/kernel/punit_atom_debug.c
> > > b/arch/x86/kernel/punit_atom_debug.c
> >
> > Please put this somewhere suitable in arch/x86/platform/.
>
> I moved this to arch/x86/platform/intel-mid, but punit is much more
> part of common core atom
modify i2c-parport driver to use the new parallel port device model.
Signed-off-by: Sudip Mukherjee
---
drivers/i2c/busses/i2c-parport.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/busses/i2c-parport.c b/drivers/i2c/busses/i2c-parport.c
converted to use the new device-model parallel port.
Signed-off-by: Sudip Mukherjee
---
drivers/staging/panel/panel.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/drivers/staging/panel/panel.c b/drivers/staging/panel/panel.c
index 1d8ed8b..772a82a
parport subsystem starts using the device-model. drivers using the
device-model has to define probe and should register the device with
parport with parport_register_dev_model()
Signed-off-by: Sudip Mukherjee
---
v5:
a) addition/removal of ports are now handled.
b) is_parport
modify paride driver to use the new parallel port device model.
Signed-off-by: Sudip Mukherjee
---
in v4 of i2c-parport patch Jean mentioned to use the full name while
in probe. That has been done in other drivers except this one.
The higher layer drivers (pcd , pd etc.) are appending the unit
as of now i2c-parport was connecting to all the available parallel
ports. Lets limit that to maximum of 4 instances and at the same time
define which instance connects to which parallel port
Signed-off-by: Sudip Mukherjee
---
drivers/i2c/busses/i2c-parport.c | 21 +
1 file
On 06/05/15 11:47, Chen-Yu Tsai wrote:
> Hi,
>
> On Wed, May 6, 2015 at 5:31 PM, Jens Kuske wrote:
>> The H3 clock control unit is similar to the those of other sun8i family
>> members like the A23.
>>
>> The AHB1 gates got split up into AHB1 and AHB2, with AHB2 clock source
>> being muxable
On Mon, May 4, 2015 at 3:00 PM, Adam Goode wrote:
> On Sat, Apr 25, 2015 at 11:00 PM, Adam Goode wrote:
>> Here's the problem:
>>
>> [0.126595] ACPI Error: No handler for Region [CMS0]
>> (8802658a0438) [SystemCMOS] (20150410/evregion-163)
>> [0.126597] ACPI Error: Region SystemCMOS
* Oleg Nesterov wrote:
> > --- a/kernel/signal.c
> > +++ b/kernel/signal.c
> > @@ -427,6 +427,10 @@ void flush_signals(struct task_struct *t)
> > {
> > unsigned long flags;
> >
> > + /* Only kthreads are allowed to destroy signals: */
> > + if (WARN_ON_ONCE(!(current->flags &
On Wed, 6 May 2015, Jiang Liu wrote:
> Hi Thomas,
> This is the simplified version, which removed the kernel parameter.
> Seems much simpler:)
But it can be made even simpler. :)
> +enum {
> + /* Allocate CPU vectors from CPUs on device local node */
> + X86_VECTOR_POL_NODE = 0x1,
On Wed, May 06, 2015 at 08:12:46AM +0100, Mel Gorman wrote:
> On Tue, May 05, 2015 at 03:25:49PM -0700, Andrew Morton wrote:
> > On Tue, 5 May 2015 23:13:29 +0100 Mel Gorman wrote:
> >
> > > > Alternatively, the page allocator can go off and synchronously
> > > > initialize some pageframes
On 06/05/15 12:04, Maxime Ripard wrote:
> Hi,
>
> On Wed, May 06, 2015 at 11:31:28AM +0200, Jens Kuske wrote:
>> The Allwinner H3 is a quad-core Cortex-A7-based SoC. It is very similar
>> to other sun8i family SoCs like the A23.
>>
>> Signed-off-by: Jens Kuske
>> ---
>>
Since clk_register_clkdev() is exported for modules the caller should get a
pointer to the allocated resources. Otherwise the memory leak is guaranteed on
the ->remove() stage.
The patch changes the prototype of the clk_register_clkdev() to return a
pointer to the allocated resources. The caller
Since clk_register_clkdev() is exported for modules the caller should get a
pointer to the allocated resources. Otherwise the memory leak is guaranteed on
the ->remove() stage.
Cc: Tomeu Vizoso
Reviewed-by: Mika Westerberg
Acked-by: Sylwester Nawrocki
Signed-off-by: Andy Shevchenko
---
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On Tue, May 05, 2015 at 02:16:39AM +0100, Ben Hutchings wrote:
> 3.2.69-rc1 review patch. If anyone has any objections, please let me know.
>
> --
>
> From: Andy Shevchenko
>
> commit c9dafb27c84412fe4b17c3b94cc4ffeef5df1833 upstream.
>
> When DMA descriptor allocation fails
This is the convention used in most parts of the kernel including DT
counterpart of I2C slave enumeration. To make things consistent do the same
for ACPI I2C slave enumeration path as well.
Signed-off-by: Mika Westerberg
---
drivers/i2c/i2c-core.c | 3 +--
1 file changed, 1 insertion(+), 2
Hi,
This is second iteration of the series. The previous version can be found
from [1].
Currently drivers for ACPI enumerated devices that have their interrupt
line connected to a GPIO controller instead of IO-APIC are required to do
complete gpiod_get()/gpiod_to_irq() etc. dance themselves.
Following what DT already does. If the device does not have ACPI Interrupt
resource but instead it has one or more GpioInt resources listed below it,
we take the first GpioInt resource, convert it to suitable Linux IRQ number
and pass it to the driver instead.
This makes drivers simpler because
ACPI specification knows two types of GPIOs: GpioIo and GpioInt. The latter
is used to describe that a given device interrupt line is connected to a
specific GPIO pin. Typical ACPI _CRS entry for such device looks like
below:
Name (_CRS, ResourceTemplate ()
{
I2cSerialBus (0x004A,
On Wed, 2015-05-06 at 08:39 +0100, Stephen Boyd wrote:
> drivers/clk/versatile/clk-sp810.c:159:29: error: incompatible types for
> operation (<=)
> drivers/clk/versatile/clk-sp810.c:159:29:left side has type char const
> *
> drivers/clk/versatile/clk-sp810.c:159:29:right side has type
2015-05-06 18:40 GMT+09:00 Javier Martinez Canillas
:
> Hello Krzysztof,
>
> On 05/06/2015 02:59 AM, Krzysztof Kozlowski wrote:
>> Dear Kukjin,
>>
>> I gathered various improvements for upcoming 4.2 merge window.
>> Description along with a tag.
>>
>> Best regards,
>> Krzysztof
>>
>>
On Sun, Apr 26, 2015 at 04:47:08PM +0800, Min-Hua Chen wrote:
> @@ -1384,6 +1351,15 @@ static void __init map_lowmem(void)
> create_mapping();
> }
> }
> +
> + /*
> + * Find the first section-aligned memblock
Hi,
On 06/05/15 12:11, Maxime Ripard wrote:
> On Wed, May 06, 2015 at 11:31:30AM +0200, Jens Kuske wrote:
>> The H3 uses the same pin controller as previous SoC's from Allwinner.
>> Add support for the pins controlled by the main PIO controller.
>>
>> Signed-off-by: Jens Kuske
>> ---
>>
Hi Rik,
we observe a tremendous regression between kernel version 3.16 and 3.17
(and up), and I've bisected it to this commit:
a43455a sched/numa: Ensure task_numa_migrate() checks the preferred node
On Mon, Apr 27, 2015 at 06:47:51PM -0400, Paul Gortmaker wrote:
> We removed __cpuinit support (leaving no-op stubs) quite some time
> ago. However two crept back in as of commit 5eb3da7246a5b2dfac9f38
> ("ARM: keystone: Switch over to coherent memory address space")
>
> Since we want to clobber
On Wed, 2015-05-06 at 13:35 +0300, Artem Bityutskiy wrote:
> If I take 4.1-rc1 and revert this patch, I observe 300% or more average
> response time improvement comparing to vanilla 3.17.
Sorry, I meant vanilla 4.1-rc1 here, not 3.17.
--
Best Regards,
Artem Bityutskiy
On Tue, May 05, 2015 at 03:52:29PM -0700, Kevin Cernekee wrote:
> of_match_device() checks if dev->of_node is NULL, so we don't need to do
> it again in the probe function.
Applied, thanks.
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On Wednesday 06 May 2015 11:31:15 Arnd Bergmann wrote:
> On Wednesday 06 May 2015 10:49:01 Pali Rohár wrote:
> > With this patch "revision" DT string entry is used to set global system_rev
> > variable. DT "revision" is expected to be string with one hexadecimal
> > number.
> > So "Revision" line
On Tue, Apr 28, 2015 at 04:15:11PM +0200, Valentin Rothberg wrote:
> CONFIG_ACORNSCSI_CONSTANTS is a file local CPP identifier and thereby
> violates the naming convention of Kconfig options in Make and CPP
> syntax; only Kconfig options should carry the 'CONFIG_' prefix.
>
> This patch removes
On 05/05/2015 22:44, Bandan Das wrote:
> Paolo Bonzini writes:
>
>> +static inline bool guest_cpuid_has_longmode(struct kvm_vcpu *vcpu)
>> +{
>> +struct kvm_cpuid_entry2 *best;
>> +
>> +best = kvm_find_cpuid_entry(vcpu, 0x8001, 0);
>> +return best && (best->edx &
On Tue, Apr 28, 2015 at 11:28:53AM -0400, Nicolas Pitre wrote:
> On Tue, 28 Apr 2015, Russell King - ARM Linux wrote:
>
> > On Fri, Apr 24, 2015 at 03:46:56PM +0200, Geert Uytterhoeven wrote:
> > > So please optimize ARM's _memcpy_fromio(), _memcpy_toio(), and
> > > _memset_io().
> > > That will
On Tue, Mar 24, 2015 at 04:08:37PM -0600, Toshi Kani wrote:
> __mtrr_type_lookup() checks MTRR fixed ranges when
> mtrr_state.have_fixed is set and start is less than
> 0x10. However, the 'else if (start < 0x100)'
> in the code checks with a wrong address as it has
> an extra-zero in the
Thank you Tyler for testing this patch set.
On 2015/5/6 7:46, Tyler Baker wrote:
On 5 May 2015 at 05:06, Bintian Wang wrote:
Hi6220 is one mobile solution of Hisilicon, this patchset contains
initial support for Hi6220 SoC and HiKey development board, which
supports octal ARM Cortex A53
On 06/05/15 09:39, Stephen Boyd wrote:
> drivers/clk/samsung/clk-exynos5260.c:138:40: warning: Using plain integer as
> NULL pointer
> Cc: Sylwester Nawrocki
> Signed-off-by: Stephen Boyd
> ---
> drivers/clk/samsung/clk-exynos5260.c | 26 +-
> 1 file changed, 13
On Wednesday 2015-05-06 05:46, long.wanglong wrote:
>
>int main(int argc, char** argv)
>{
>rlim.rlim_cur=20 MB;
>rlim.rlim_max=20 MB;
>ret = setrlimit(RLIMIT_AS, );
>[...]
>char tmp[20 MB];
>for (i = 0; i < 20 MB; i++)
>tmp[i]=1;
if tmp already takes 20 MB, where
On Thu, 2015-04-09 at 16:22 +0800, Ming Lei wrote:
> On Wed, Apr 1, 2015 at 6:09 PM, Andy Shevchenko
> wrote:
> > The patch adds mwidth and nwidth fields to the struct clk_fractional_divider
> > for further usage. While here, use clk_div_mask() instead of open coding
> > this
> > functionality.
Steal time accounts the time duration during which a guest vcpu was ready to
run, but was not scheduled to run by the hypervisor. This is particularly
relevant in cloud environment where customers would want to use this as an
indicator that their guests are being throttled. However, as it stands
Introduce a field in /proc//stat to expose guest steal time.
Signed-off-by: Naveen N. Rao
---
fs/proc/array.c | 6 ++
include/linux/sched.h | 7 +++
kernel/fork.c | 2 +-
3 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/fs/proc/array.c b/fs/proc/array.c
index
On powerpc, kvm tracks both the guest steal time as well as the time
when guest was idle and this gets sent in to the guest through DTL. The
guest accounts these entries as either steal time or idle time based on
the last running task. Since the true guest idle status is not visible
to the host,
Report guest steal time in host task statistics. On x86, this is just
the scheduler run_delay.
Signed-off-by: Naveen N. Rao
---
arch/x86/kvm/x86.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 0ee725f..737b0e4 100644
--- a/arch/x86/kvm/x86.c
Hi Joe,
2015-05-06 10:29 GMT+02:00 Matthias Brugger :
> 2015-05-06 9:59 GMT+02:00 Yingjoe Chen :
>> On Wed, 2015-05-06 at 15:19 +0800, Yingjoe Chen wrote:
>>> Hi Matthias,
>> <...>
>>> > I tried on the mt8135 eval board but it fails to bring up the CPU.
>>> >
>>> > When booting:
>>> > [
On Wednesday 06 May 2015 12:37:52 Pali Rohár wrote:
> On Wednesday 06 May 2015 11:31:15 Arnd Bergmann wrote:
> > On Wednesday 06 May 2015 10:49:01 Pali Rohár wrote:
> > > With this patch "revision" DT string entry is used to set global
> > > system_rev
> > > variable. DT "revision" is expected to
Adding Chandra, who's implemented skl scaler code.
-Daniel
On Sat, May 02, 2015 at 10:05:42AM +0900, Sergey Senozhatsky wrote:
> Hi,
>
> linux-next 20150501
>
> [1.968953] [drm:check_crtc_state [i915]] *ERROR* mismatch in
> scaler_state.scaler_id (expected 0, found -1)
> [1.968953]
On Wed, May 06, 2015 at 01:24:12PM +0300, Andy Shevchenko wrote:
> Since clk_register_clkdev() is exported for modules the caller should get a
> pointer to the allocated resources. Otherwise the memory leak is guaranteed on
> the ->remove() stage.
clk_register_clkdev() is there to assist mass
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