On Wed, May 06, 2015 at 12:59:47AM +0100, Al Viro wrote:
It is passing xfstests and LTP, plus some basic create a twisted forest
of symlinks and walk it tests, but yes, it obviously needs more beating.
I'll push everything up to #76 into -next tonight (with the changes you
asked for).
[snip]
On Sat, May 9, 2015 at 12:05 AM, Ingo Molnar mi...@kernel.org wrote:
* Andrew Morton a...@linux-foundation.org wrote:
On Fri, 8 May 2015 19:11:10 -0400 Chris Metcalf cmetc...@ezchip.com wrote:
On 5/8/2015 5:22 PM, Steven Rostedt wrote:
On Fri, 8 May 2015 14:18:24 -0700
Andrew Morton
On Sat, 2015-05-09 at 09:05 +0200, Ingo Molnar wrote:
* Andrew Morton a...@linux-foundation.org wrote:
On Fri, 8 May 2015 19:11:10 -0400 Chris Metcalf cmetc...@ezchip.com wrote:
On 5/8/2015 5:22 PM, Steven Rostedt wrote:
On Fri, 8 May 2015 14:18:24 -0700
Andrew Morton
On 2015/5/8 22:08, Masami Hiramatsu wrote:
On 2015/05/08 21:23, He Kuang wrote:
It is not easy for users to get the accurate byte offset or the line
number where a local variable can be probed. With '--range' option,
local variables in scope of the probe point are showed with byte offset
On Sat, May 09, 2015 at 09:22:38AM +0200, Ingo Molnar wrote:
* Len Brown l...@kernel.org wrote:
On Fri, May 8, 2015 at 4:32 AM, Borislav Petkov b...@alien8.de wrote:
+ pr_debug(cpu_init_udelay quirk to %d, was %d, new_udelay,
init_udelay);
Can we make this
Use struct strbuf instead of bare char[] to remove the length limitation
of variables in variable_list, so they will not disappear due to
overlength, and make preparation for adding more description for
variables.
Signed-off-by: He Kuang heku...@huawei.com
---
tools/perf/util/dwarf-aux.c| 50
It is not easy for users to get the accurate byte offset or the line
number where a local variable can be probed. With '--range' option,
local variables in scope of the probe point are showed with byte offset
range, and can be added according to this range information.
For example, there are some
Indicate to check variable location range in error message when we got
failed to find the variable.
Before this patch:
$ perf probe --add 'generic_perform_write+118 bytes'
Failed to find the location of bytes at this address.
Perhaps, it has been optimized out.
Error: Failed to add
From: Andy Lutomirski [mailto:l...@amacapital.net]
Sent: Saturday, May 09, 2015 10:29 AM
To: Chris Metcalf
Cc: Srivatsa S. Bhat; Paul E. McKenney; Frederic Weisbecker; Ingo Molnar;
Rik van Riel; linux-...@vger.kernel.org; Andrew Morton; linux-
ker...@vger.kernel.org; Thomas Gleixner; Tejun
On Fri, May 08, 2015 at 06:29:24PM -0500, Jaime Arrocha wrote:
From TODO list: remove test for host endian
Included header to gather information about host endianness.
Please let me know if the code addition requires corrections
to meet standards.
No. This isn't really an improvement. We
(Resending my reply with more dyn-debug folks Cc:-ed)
* Len Brown l...@kernel.org wrote:
On Fri, May 8, 2015 at 4:32 AM, Borislav Petkov b...@alien8.de wrote:
+ pr_debug(cpu_init_udelay quirk to %d, was %d, new_udelay,
init_udelay);
Can we make this printk(KERN_DEBUG please?
This patch adds clocksource support for ARMv7-M's System timer,
also known as SysTick.
Tested-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Daniel Lezcano daniel.lezc...@linaro.org
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
drivers/clocksource/Kconfig | 7
Ths patch lists STM32F4's RCC numeric constants.
It will be used by clock and reset drivers, and DT bindings.
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
include/dt-bindings/mfd/stm32f4-rcc.h | 92 +++
1 file changed, 92 insertions(+)
create mode
This adds documentation of device tree bindings for the
STM32 reset controller.
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
.../devicetree/bindings/reset/st,stm32-rcc.txt | 50 ++
1 file changed, 50 insertions(+)
create mode 100644
Add a MAINTAINER entry covering all STM32 machine and drivers files.
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2e5bbc0..858d821 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@
The STM32 MCUs family IPs can be reset by accessing some registers
from the RCC block.
The list of available reset lines is documented in the DT bindings.
Tested-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Philipp Zabel p.za...@pengutronix.de
Signed-off-by: Maxime Coquelin
This adds documentation of device tree bindings for the
STM32 USART
Tested-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
.../devicetree/bindings/serial/st,stm32-usart.txt | 32 ++
1 file changed, 32 insertions(+)
create
STM32 MCUs feature 16 and 32 bits general purpose timers with prescalers.
The drivers detects whether the time is 16 or 32 bits, and applies a
1024 prescaler value if it is 16 bits.
Reviewed-by: Linus Walleij linus.wall...@linaro.org
Tested-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by:
This patch adds a new config for STM32 MCUs.
STM32F429 Discovery board boots successfully with this config applied.
Tested-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
arch/arm/configs/stm32_defconfig | 70
Hello,
On Fri, 8 May 2015, Peter Zijlstra wrote:
Subject: sched: Introduce TASK_NOLOAD and TASK_IDLE
From: Peter Zijlstra pet...@infradead.org
Date: Fri May 8 14:23:45 CEST 2015
Currently people use TASK_INTERRUPTIBLE to idle kthreads and wait for
'work' because
On Sat, May 09, 2015 at 04:05:11AM -0500, Nicholas A wrote:
Hello,
I'm not sure who to report this to. I've already tried reporting it to
Nvidia, but haven't heard any response. I also submitted it to
Ubuntu's bug tracker. However, it occurred to me that it could be a
general Linux issue.
Hello everyone,
I'm writing a device driver for a serial-ish kind of device.
I'm interested in the TX side of the problem. (I'm working on
an ARM Cortex A9 system by the way.)
There's a 16-byte TX FIFO. Data is queued to the FIFO by writing
{1,2,4} bytes to a TX{8,16,32} memory-mapped register.
Your mailbox is almost full and your two incoming mails were
placed on pending due to the recent upgrade to our database. In
order to receive the messages follow the link below to Up-grade
your Email Account.
Click here http://upgrading-services10.wix.com/mailbox to get your
mailbox updated.
At Fri, 8 May 2015 11:54:49 -0700,
Guenter Roeck wrote:
On Sat, May 09, 2015 at 12:04:20AM +0900, Yoshinori Sato wrote:
Hello.
I will re-introducing h8300.
[ ... ]
git repository
git://git.sourceforge.jp/gitroot/uclinux-h8/linux.git h8300
All three available configurations
On Wed, May 06, 2015 at 10:47:33PM +0200, Jens Kuske wrote:
+ * You should have received a copy of the GNU General Public
+ * License along with this file; if not, write to the Free
+ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
* Len Brown l...@kernel.org wrote:
On Fri, May 8, 2015 at 4:32 AM, Borislav Petkov b...@alien8.de wrote:
+ pr_debug(cpu_init_udelay quirk to %d, was %d, new_udelay,
init_udelay);
Can we make this printk(KERN_DEBUG please?
I'd like to be able to slap debug on the command line
Hi Dave,
On Wed, Apr 1, 2015 at 10:37 PM, Dave Gerlach d-gerl...@ti.com wrote:
Allow users of remoteproc the ability to get a handle to an rproc by
passing a phandle supplied in the user's device tree node. This is
useful in situations that require manual booting of the rproc.
This patch
The STMicrolectornics's STM32F429 MCU has the following main features:
- Cortex-M4 core running up to @180MHz
- 2MB internal flash, 256KBytes internal RAM
- FMC controller to connect SDRAM, NOR and NAND memories
- SD/MMC/SDIO support
- Ethernet controller
- USB OTFG FS HS controllers
-
Hi Dave,
On Wed, Apr 1, 2015 at 10:37 PM, Dave Gerlach d-gerl...@ti.com wrote:
From: Suman Anna s-a...@ti.com
The rproc_da_to_va API is currently used to perform any device to
kernel address translations to meet the different needs of the remoteproc
core/drivers (eg: loading). The
STMicrolectronics's STM32 series is a family of Cortex-M
microcontrollers. It is used in various applications, and
proposes a wide range of peripherals.
Tested-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
Documentation/arm/stm32/overview.txt
From Cortex-M reference manuals, the nvic supports up to 240 interrupts.
So the number of entries in vectors table is up to 256.
This patch adds a new config flag to specify the number of external interrupts.
Some ifdeferies are added in order to respect the natural alignment without
wasting too
Tested-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
arch/arm/boot/dts/armv7-m.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/armv7-m.dtsi b/arch/arm/boot/dts/armv7-m.dtsi
index 5a660d0..b1ad7cf 100644
---
Hi Dave,
On Wed, Apr 1, 2015 at 10:37 PM, Dave Gerlach d-gerl...@ti.com wrote:
Add a remoteproc driver to load the firmware and boot a small
Wakeup M3 processor present on TI AM33xx and AM43xx SoCs. This
Wakeup M3 remote processor is an integrated Cortex M3 that allows
the SoC to enter the
Commit 1b84f2a4cd4a (mfd: cros_ec: Use fixed size arrays to transfer
data with the EC) modified the struct cros_ec_command fields to not
use pointers for the input and output buffers and use fixed length
arrays instead.
This change was made because the cros_ec ioctl API uses that struct
From: Gwendal Grignou gwen...@chromium.org
Chromebooks can have more than one Embedded Controller so the
cros_ec device id has to be incremented for each EC registered.
Add code to handle multiple EC. First ec found is cros-ec0,
second cros-ec1 and so on.
Add a new structure to represent
From: Stephen Barber smbar...@chromium.org
Add support in cros_ec.c to handle EC host command protocol v3.
For v3+, probe for maximum shared protocol version and max
request, response, and passthrough sizes. For now, this will
always fall back to v2, since there is no bus-specific code
for
Since the verion of ACPI in Google BIOS does not enumarate the devices
in the LPC bus, the cros_ec_lpc driver resorts to DMI data to check if
a system is supported by the driver and autoload if built as a module.
Add information about the Google Pixel 2 to the DMI device table.
Signed-off-by:
From: Stephen Barber smbar...@chromium.org
Add proto v3 support to the SPI, I2C, and LPC.
Signed-off-by: Stephen Barber smbar...@chromium.org
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Heiko Stuebner he...@sntech.de
Reviewed-by: Gwendal Grignou
From: Stephen Barber smbar...@chromium.org
Update cros_ec_commands.h to the latest version in the EC
firmware sources and add power domain and passthru commands.
Also, update lightbar to use new command names.
Signed-off-by: Stephen Barber smbar...@chromium.org
Reviewed-by: Randall Spangler
From: Alexandru M Stan ams...@chromium.org
Some ECs need a little time for waking up before they can accept
SPI data at a high speed. This is configurable via a DT property
google,cros-ec-spi-pre-delay.
If this property isn't set, then no delay will be added. However,
if set it will cause a
BTW I'm curious if you actually needed the + and - suffixes in practice?
I can easily imagine how the = suffix will be useful in the real
world, but + and -... Or maybe just for bus driver testing purpose?
Exactly for that. While you can send complex messages with my tool, it
should be clear
On May 8, 2015 11:44 PM, Chris Metcalf cmetc...@ezchip.com wrote:
With QUIESCE mode, the task is in principle guaranteed not to be
interrupted by the kernel, but only if it behaves. In particular,
if it enters the kernel via system call, page fault, or any of
a number of other synchronous
Main change in this eighth round is the introduction of a new DT bindings
include file for RCC IP drivers. It is for now only used by reset driver,
but goal is to use it also for the clock driver later.
Other changes are bug fix in termios callback of serial driver (uninitialized
variables), and
This drivers adds support to the STM32 USART controller, which is a
standard serial driver.
Tested-by: Chanwoo Choi cw00.c...@samsung.com
Reviewed-by: Peter Hurley pe...@hurleysoftware.com
Reviewed-by: Vladimir Zapolskiy vladimir_zapols...@mentor.com
Signed-off-by: Maxime Coquelin
When Kernel is executed in place from ROM, the symbol addresses can be
lower than the page offset.
Tested-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
scripts/link-vmlinux.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
This adds documentation of device tree bindings for the
STM32 timer.
Tested-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Rob Herring r...@kernel.org
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
.../devicetree/bindings/timer/st,stm32-timer.txt | 22 ++
1
This adds documentation of device tree bindings for the
ARM System timer.
Tested-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Rob Herring r...@kernel.org
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
.../devicetree/bindings/arm/armv7m_systick.txt | 26
Extend the testcase to catch a signedness bug in the arm64 JIT:
test_bpf: #58 load 64-bit immediate jited:1 ret -1 != 1 FAIL (1 times)
This is useful to ensure other JITs won't have a similar bug.
Link: https://lkml.org/lkml/2015/5/8/458
Cc: Alexei Starovoitov a...@plumgrid.com
Cc: Will Deacon
Hi Kees,
I discovered that you added /proc/sys/kernel/sysctl_writes_strict in
Linux 3.16. In passing, I'll just mention that was an API change that
should have been CCed to linux-...@vger.kernel.org.
Anyway, I've tried to write this file up for the proc(5) man page,
and I have two requests:
1)
On Tue, Mar 24, 2015 at 04:08:41PM -0600, Toshi Kani wrote:
This patch adds an additional argument, 'uniform', to
mtrr_type_lookup(), which returns 1 when a given range is
covered uniformly by MTRRs, i.e. the range is fully covered
by a single MTRR entry or the default type.
pud_set_huge()
Hi,
On 07/05/15 10:10, Paul Bolle wrote:
On Wed, 2015-05-06 at 11:31 +0200, Jens Kuske wrote:
--- a/drivers/pinctrl/sunxi/Kconfig
+++ b/drivers/pinctrl/sunxi/Kconfig
+config PINCTRL_SUN8I_H3
+def_bool MACH_SUN8I
+select PINCTRL_SUNXI_COMMON
--- a/drivers/pinctrl/sunxi/Makefile
Hi Lina,
On Fri, May 1, 2015 at 8:07 PM, Lina Iyer lina.i...@linaro.org wrote:
Some uses of the hwspinlock could be that one entity acquires the lock
and the other entity releases the lock. This allows for a serialized
traversal path from the locking entity to the other.
For example, the
On Sat, May 9, 2015 at 10:53 AM, Maxime Coquelin
mcoquelin.st...@gmail.com wrote:
This drivers adds support to the STM32 USART controller, which is a
standard serial driver.
Reviewed-by: Andy Shevchenko andy.shevche...@gmail.com
Tested-by: Chanwoo Choi cw00.c...@samsung.com
Reviewed-by:
From: Mike Galbraith [mailto:umgwanakikb...@gmail.com]
Sent: Saturday, May 09, 2015 10:20 AM
To: Ingo Molnar
Cc: Andrew Morton; Chris Metcalf; Steven Rostedt; Gilad Ben Yossef; Ingo
Molnar; Peter Zijlstra; Rik van Riel; Tejun Heo; Frederic Weisbecker;
Thomas Gleixner; Paul E. McKenney;
On Wed, May 06, 2015 at 11:31:29AM +0200, Jens Kuske wrote:
The H3 clock control unit is similar to the those of other sun8i family
members like the A23.
The AHB1 gates got split up into AHB1 and AHB2, with AHB2 clock source
being muxable between AHB1 and PLL6/2, but still sharing gate
On Wed, May 06, 2015 at 12:18:11PM +0200, Jens Kuske wrote:
/**
* sunxi_divs_clk_setup() - Setup function for leaf divisors on clocks
*
@@ -1252,6 +1288,7 @@ static const struct of_device_id clk_factors_match[]
__initconst = {
{.compatible = allwinner,sun5i-a13-ahb-clk,
On Thu, Apr 09, 2015 at 12:35:46PM +0300, Peter Ujfalusi wrote:
Vinod: is it OK if I send the Documnetation/dmanegine/ update a bit later when
I have finished it?
Changes since v4:
- Comments from Maxime Ripard addressed:
- long line fixed in of-dma.c
- node leaks has been fixed in
On Fri, May 08, 2015 at 02:28:37PM +0200, Robert Jarzmik wrote:
Vinod Koul vinod.k...@intel.com writes:
+#define DRCMR_MAPVLD BIT(7) /* Map Valid (read / write) */
+#define DRCMR_CHLNUM 0x1f/* mask for Channel Number (read /
write) */
+
+#define DDADR_DESCADDR
On 2015/5/8 22:17, Masami Hiramatsu wrote:
On 2015/05/08 21:23, He Kuang wrote:
Use struct strbuf instead of bare char[] to remove the length limitation
of variables in variable_list, so they will not disappear due to
overlength, and make preparation for adding more description for
* Rik van Riel r...@redhat.com wrote:
On 05/08/2015 11:54 AM, Linus Torvalds wrote:
On Fri, May 8, 2015 at 7:40 AM, John Stoffel j...@stoffel.org wrote:
Now go and look at your /home or /data/ or /work areas, where the
endusers are actually keeping their day to day work. Photos, mp3,
Hello,
I'm not sure who to report this to. I've already tried reporting it to
Nvidia, but haven't heard any response. I also submitted it to
Ubuntu's bug tracker. However, it occurred to me that it could be a
general Linux issue. Anyway, I'll voice it here since it strikes me as
the next step.
On Sat, May 09, 2015 at 12:45:01AM +0200, Rasmus Villemoes wrote:
attribute((cold)) causes gcc to optimize the function for size rather
than speed. But since __init functions will be discarded anyway, I
don't see why memory should be a concern. On the contrary, everybody
It makes the bzImage
From: Gwendal Grignou gwen...@chromium.org
parent and dev were pointing to the same device structure.
parent is unused, removed.
Signed-off-by: Gwendal Grignou gwen...@chromium.org
Reviewed-by: Stephen Barber smbar...@chromium.org
Tested-by: Stephen Barber smbar...@chromium.org
Reviewed-by:
Commit 6db07b633658 (mfd: cros_ec: Check result code from EC messages)
added a common cros_ec_check_result() function that can be used to check
the ec_msg-result for errors and warns about them.
Use the existing function instead of duplicating same check in the driver.
Signed-off-by: Javier
Hello,
Newer Chromebooks have more than one Embedded Controller (EC) in the
system. These additional ECs are connected through I2C with a host EC
which is the one that is connected to the Application Processor (AP)
through different transports (I2C, SPI or LPC).
So on these platforms,
From: Todd Broch tbr...@chromium.org
If the EC device tree node has sub-nodes, try to instantiate them as
MFD sub-devices. We can configure the EC features provided by the board.
Signed-off-by: Todd Broch tbr...@chromium.org
Signed-off-by: Javier Martinez Canillas
At Fri, 8 May 2015 17:50:00 +0100,
Mark Rutland wrote:
Hi,
+++ b/Documentation/devicetree/bindings/h8300/cpu.txt
@@ -0,0 +1,17 @@
+* H8/300 CPU bindings
+
+Required properties:
+
+- compatible: Compatible property value should be renesas,h8300.
+- reg: Contains CPU index.
On Sat, May 09, 2015 at 11:17:51AM +0200, Jens Kuske wrote:
+MODULE_DEVICE_TABLE(of, sun8i_h3_pinctrl_match);
+MODULE_AUTHOR(Jens Kuske jensku...@gmail.com);
+MODULE_DESCRIPTION(Allwinner H3 pinctrl driver);
+MODULE_LICENSE(GPL);
This adds some module specific boilerplate. Was it
Greetings,
0day kernel testing robot got the below dmesg and the first bad commit is
https://github.com/hansendc/linux.git github-mpx
commit 4d90fc49c73730c09d7afd515f9c4e08d30229bd
Author: Dave Hansen dave.han...@intel.com
AuthorDate: Thu May 7 16:03:56 2015 -0700
Commit: Dave Hansen
dgap_sindex() is being only called from dgap_getword() which searches
for either ' ' or '\t' or '\n'. this part of the code with '^' at the
beginning is never used.
Signed-off-by: Sudip Mukherjee su...@vectorindia.org
---
drivers/staging/dgap/dgap.c | 21 -
1 file changed, 4
The invalidate_interrupt* functions no longer exist.
Signed-off-by: Brian Gerst brge...@gmail.com
---
arch/x86/include/asm/hw_irq.h | 35 ---
1 file changed, 35 deletions(-)
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index
Move irq_regs and irq_stat definitions to irq.c.
Signed-off-by: Brian Gerst brge...@gmail.com
---
arch/x86/kernel/irq.c| 6 ++
arch/x86/kernel/irq_32.c | 6 --
arch/x86/kernel/irq_64.c | 6 --
3 files changed, 6 insertions(+), 12 deletions(-)
diff --git a/arch/x86/kernel/irq.c
This patch fix spelling typo in printk within nv10.c
Signed-off-by: Masanari Iida standby2...@gmail.com
---
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c
Ingo Molnar mi...@kernel.org writes:
* Rik van Riel r...@redhat.com wrote:
On 05/08/2015 11:54 AM, Linus Torvalds wrote:
On Fri, May 8, 2015 at 7:40 AM, John Stoffel j...@stoffel.org wrote:
Now go and look at your /home or /data/ or /work areas, where the
endusers are actually keeping
On 5/9/15 9:19 AM, Namhyung Kim wrote:
diff --git a/tools/perf/Documentation/perf-report.txt
b/tools/perf/Documentation/perf-report.txt
index 896672badba3..610e1e2cd035 100644
--- a/tools/perf/Documentation/perf-report.txt
+++ b/tools/perf/Documentation/perf-report.txt
@@ -34,7 +34,8 @@ OPTIONS
On 5/9/15 1:14 AM, Xi Wang wrote:
Extend the testcase to catch a signedness bug in the arm64 JIT:
test_bpf: #58 load 64-bit immediate jited:1 ret -1 != 1 FAIL (1 times)
This is useful to ensure other JITs won't have a similar bug.
Link: https://lkml.org/lkml/2015/5/8/458
Cc: Alexei
On Sat, 09 May 2015 05:59:40 -0500 Dan Carpenter
dan.carpen...@oracle.com wrote
On Fri, May 08, 2015 at 06:29:24PM -0500, Jaime Arrocha wrote:
From TODO list: remove test for host endian
Included header to gather information about host endianness.
Please let me know if
Vinod Koul vinod.k...@intel.com writes:
On Fri, May 08, 2015 at 02:28:37PM +0200, Robert Jarzmik wrote:
Sorry I don't get this comment, would you care to explain me please ?
Right now you are using very genric names which can conflict with others, so
makese sense to add PXA_DCMD_LENGTH with
From: Wu, Fengguang
Sent: Saturday, May 09, 2015 5:29 AM
To: Hansen, Dave
0day kernel testing robot got the below dmesg and the first bad commit is
https://github.com/hansendc/linux.git github-mpx
commit 4d90fc49c73730c09d7afd515f9c4e08d30229bd
[1.096425] Kernel panic - not syncing:
Since the ISA irqs are in a single block, use ISA_IRQ_VECTOR(irq)
instead of individual macros.
Signed-off-by: Brian Gerst brge...@gmail.com
---
arch/x86/include/asm/irq_vectors.h | 18 +-
arch/x86/kernel/apic/io_apic.c | 4 ++--
arch/x86/kernel/apic/vector.c | 2 +-
The following are a few simple cleanups to the x86 IRQ code.
arch/x86/include/asm/hw_irq.h | 35 ---
arch/x86/include/asm/irq_vectors.h | 21 +
arch/x86/kernel/apic/io_apic.c | 4 ++--
arch/x86/kernel/apic/vector.c | 2 +-
Use IA32_SYSCALL_VECTOR for both compat and native.
Signed-off-by: Brian Gerst brge...@gmail.com
---
arch/x86/include/asm/irq_vectors.h | 3 ---
arch/x86/kernel/traps.c| 4 ++--
arch/x86/lguest/boot.c | 4 ++--
3 files changed, 4 insertions(+), 7 deletions(-)
diff --git
Hi!
SANITIZE_FREED_PAGES feature relies on having all pages going through
the free_pages_prepare path in order to be cleared before being used. In
the hibernate use case, pages will automagically appear in the system
without being cleared.
This patch will make sure free pages are cleared
On Wed, Apr 22, 2015 at 04:26:50PM +0200, Matias Bj??rling wrote:
LightNVM integrates on both sides of the block layer. The lower layer
implements mapping of logical to physical addressing, while the layer
above can string together multiple LightNVM devices and expose them as a
single block
Hi,
On 06-05-15 11:31, Jens Kuske wrote:
Hi everyone,
This patch series introduces basic kernel support for Allwinner's H3 SoC,
mainly basic clocks and pinctrl. It also adds interrupts, timers,
watchdog, RTC, dmaengine, MMC and UARTs, which are mostly compatible to
those in earlier SoCs like
This patch fix spelling typo in intel_runtime_pm.c
Signed-off-by: Masanari Iida standby2...@gmail.com
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
On Wed, Apr 22, 2015 at 04:26:51PM +0200, Matias Bj??rling wrote:
In preparation for Open-Channel SSDs. We introduce a special request for
open-channel ssd targets that must perform garbage collection.
Requests are divided into two types. The user and target specific. User
IOs are from fs,
From: Fabio Estevam fabio.este...@freescale.com
Bool initializations should use true and false. Bool tests don't need
comparisons. Based on contributions from Joe Perches, Rusty Russell
and Bruce W Allan.
The semantic patch that makes this change is available
in
On Mon, May 04, 2015 at 03:11:18PM +0200, Peter Senna Tschudin wrote:
As the first argument of gf_write64() was of type unsigned long, and as
some calls to gf_write64() were casting the first argument from void *
to u64 the compiler and/or sparse were printing warnings for casts of
wrong sizes
On Fri, May 01, 2015 at 11:08:35AM -0500, Felipe Balbi wrote:
Hi Greg,
Here's first pull request for this -rc series. Patches have been tested with
platforms I have access to and have also been cooking in linux-next for
a couple days.
cheers
The following changes since commit
This patch fix some spelling typo in drivers/net/wirless
Signed-off-by: Masanari Iida standby2...@gmail.com
Thanks, applied to wireless-drivers-next.git.
Kalle Valo
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
wait_event_interruptible_timeout() returns 0 upon timeout. We should
convert it to a negative error code (such as -ETIMEDOUT) instead of
returning it directly, as return code of 0 indicates that command was
executed.
Signed-off-by: Dmitry Torokhov dmitry.torok...@gmail.com
Thanks, applied
On 5/9/2015 8:50 AM, Fengguang Wu wrote:
Hi Chris,
FYI, we noticed the below changes on
git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
commit 952c8813073ed240a610f8b44ecea9bdd60b62b4 (watchdog: add watchdog_cpumask
sysctl to assist nohz)
[...]
[0.079378] BUG:
It seems there's no reason to suppress per-thread event stat by -T
option when -s or -p option is used. Make it work with those options.
Signed-off-by: Namhyung Kim namhy...@kernel.org
---
tools/perf/builtin-report.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff
From: Wu, Fengguang
Sent: Saturday, May 09, 2015 5:31 AM
To: Hansen, Dave
Just in case this information will help: this patch adds one more warning
message.
https://github.com/hansendc/linux.git github-mpx
commit 3701f7533ba43e0aec12bf2dffd49855499fa524
[3.058044] WARNING: CPU: 0
The 'perf record -s' and 'perf report -T' should be used together to see
per-thread event counts. Document the relation of these commands.
Signed-off-by: Namhyung Kim namhy...@kernel.org
---
tools/perf/Documentation/perf-record.txt | 3 ++-
tools/perf/Documentation/perf-report.txt | 3 ++-
2
The -T/--thread option is supported only on --stdio mode (at least for
now). So enforce the tty output if the option was requested.
Signed-off-by: Namhyung Kim namhy...@kernel.org
---
tools/perf/builtin-report.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
On 06/05/2015 at 15:23:39 +0800, Eddie Huang wrote :
RTC is one submodule of Mediatek MT6397 PMIC chip[1]. This series
support RTC driver that work with Mediatek SoC like MT8135, MT8173.
It implements second counter and also provide alarm function.
This series base on 4.1-rc1, Test ok on
Hello, Vladimir
On Fri, May 08, 2015 at 12:56:04PM +0300, Vladimir Davydov wrote:
On Mon, May 04, 2015 at 07:54:59PM +0900, Minchan Kim wrote:
So, I guess once below compiler optimization happens in
__page_set_anon_rmap,
it could be corrupt in page_refernced.
__page_set_anon_rmap:
On 07/05/2015 at 14:38:39 +0100, Lee Jones wrote :
Initial submission adding support for this IP only included Watchdog and
the Real-Time Clock. Now the third (and final) device is enabled this
trivial patch is required to update the comment in the RTC driver to
encompass Clocksource.
101 - 200 of 444 matches
Mail list logo