Next update:
- switch to smp_store_mb() instead of WRITE_ONCE();smp_mb();
- introduce SEM_GLOBAL_LOCK instead of magic -1.
- do not use READ_ONCE() for the unlocked test:
READ_ONCE doesn't make sense for unlocked code.
- document why smp_mb() is required after spin_lock().
Commit 6d07b68ce16a
On Thu, Jul 21, 2016 at 1:42 PM, SF Markus Elfring
wrote:
> From: Markus Elfring
> Date: Thu, 21 Jul 2016 19:23:25 +0200
>
> The vunmap() function performs also input parameter validation.
> Thus the test around the call is not
On 07/21, Dan Williams wrote:
> On Wed, Jul 20, 2016 at 6:50 PM, Vishal Verma
> wrote:
> > Normally, an ARS (Address Range Scrub) only happens at
> > boot/initialization time. There can however arise situations where a
> > bus-wide rescan is needed - notably, in the
On Wed, Jul 13, 2016 at 6:00 AM, Nicolai Stange wrote:
> With NOHZ_FULL and one single well-isolated, CPU consumptive task, one
> would expect approximately one clockevent interrupt per second. However, on
> my Intel Haswell where the monotonic clock is the TSC monotonic
Current definition of map_inb() mport operations callback uses u32 type to
specify required inbound window (IBW) size. This is limiting factor
because existing hardware - tsi721 and fsl_rio, both support IBW size
up to 16GB.
Changing type of size parameter to u64 to allow IBW size configurations
Add RapidIO switch driver for IDT Gen3 switch devices: RXS1632 and RXS2448.
Signed-off-by: Alexandre Bounine
Tested-by: Barry Wood
Cc: Matt Porter
Cc: Andre van Herk
Cc: Barry
Triggered buffer support uses the HDC100X's dual acquisition mode
to read both humidity and temperature in one shot.
Signed-off-by: Alison Schofield
Cc: Daniel Baluta
---
drivers/iio/humidity/Kconfig | 2 +
drivers/iio/humidity/hdc100x.c | 144
Hi,
The cgroup "cpu" subsystem's weight calculation using "cpu shares" is
fairly clear when all tasks are attached to the leaf cgroups in "cpu"
subsystem.
For example in this cgroup hierarchy with tasks A.B,C and D and
associated cpu shares:
ROOT
|
+ -Group1(3072)
||
| +- A(2048)
||
|
> -Original Message-
> From: Guenter Roeck [mailto:li...@roeck-us.net]
> Sent: Thursday, July 21, 2016 4:42 PM
> To: Vadim Pasternak
> Cc: jdelv...@suse.com; linux-hw...@vger.kernel.org; linux-
> ker...@vger.kernel.org; j...@resnulli.us
> Subject: Re: [patch]
gcc-4.9 and higher warn about the newly added NSCI code:
net/ncsi/ncsi-manage.c: In function 'ncsi_process_next_channel':
net/ncsi/ncsi-manage.c:1003:2: error: 'old_state' may be used uninitialized in
this function [-Werror=maybe-uninitialized]
The warning is a false positive and therefore
On 07/19/2016, Alexandre Belloni wrote:
>
> Well like said in my previous mail, I don't think the rollover is the
> issue here but I'm interested in knowing what conditions are leading >
to endless interrupts.
Hi Alexandre,
Unfortunately I've switched employers so I no longer have access to the
On 13-07-16, 13:25, Steve Muckle wrote:
> Invoking the cpufreq driver to set a frequency can be expensive. On platforms
> with a cpufreq driver that does not support fast switching a thread must be
> woken to complete the operation. IPIs will also occur if and when support to
> process remote task
[Re: [PATCH] ARM: dont specify STACKPROTECTOR in defconfigs] On 22/07/2016 (Fri
01:40) Joel Stanley wrote:
> Hi Paul,
>
> On Fri, Jul 22, 2016 at 12:41 AM, Paul Gortmaker
> wrote:
> > Note the output from the following:
> >
> >$ git grep STACKPROTECTOR
> -Original Message-
> From: Andrew Morton [mailto:a...@linux-foundation.org]
> Sent: Thursday, July 21, 2016 2:37 PM
> To: Bounine, Alexandre
> Cc: Matt Porter; Andre van Herk; Wood, Barry; linux-
> ker...@vger.kernel.org
> Subject: Re: [PATCH 13/13] rapidio/switches: add driver for IDT
John Stultz writes:
> On Wed, Jul 13, 2016 at 6:00 AM, Nicolai Stange wrote:
>> With NOHZ_FULL and one single well-isolated, CPU consumptive task, one
>> would expect approximately one clockevent interrupt per second. However, on
>> my Intel Haswell
Paolo Bonzini writes:
> On 21/07/2016 00:25, Bandan Das wrote:
>> If L1 hypervisor decides to try out something weird, alert the
>> host but only less aggressively. Also, remove the comment
>> regarding nested vpid support since it is no longer valid.
>>
>> Signed-off-by:
Thanks to Ville for suggesting this as a potential solution to pipe
underruns on Skylake.
On Skylake all of the registers for configuring planes, including the
registers for configuring their watermarks, are double buffered. New
values written to them won't take effect until said registers are
To Sebastian Reichel:
I *think* I may have found the problem. Looked at
./scripts/get_maintainer.pl and apparently it's defaults aren't
actually expected to work well with `git send-email`. I've added
--norolestats and hopefully that should fix the issue. If the
From: Matt Roper
When we write watermark values to the hardware, those values are stored
in dev_priv->wm.skl_hw. However with recent watermark changes, the
results structure we're copying from only contains valid watermark and
DDB values for the pipes that are
On Thu, Jul 21, 2016 at 12:09 PM, Brian Norris
wrote:
> On Thu, Jul 21, 2016 at 05:58:48AM +, Yunhui Cui wrote:
>> Could you please help to review this patch set.
>> This patch set is very importmant for fsl-quadspi driver.
>
> I didn't want this to be my only
On Thu, Jul 21, 2016 at 12:40 PM, Linda Knippers wrote:
> On 07/20/2016 09:50 PM, Vishal Verma wrote:
>> Normally, an ARS (Address Range Scrub) only happens at
>> boot/initialization time. There can however arise situations where a
>> bus-wide rescan is needed - notably,
On 13-07-16, 13:25, Steve Muckle wrote:
> Cpufreq governors may need to know what a particular target frequency
> maps to in the driver without necessarily wanting to set the frequency.
> Support this operation via a new cpufreq API,
> cpufreq_driver_resolve_freq(). This API returns the lowest
On Thu, Jul 21, 2016 at 12:55 PM, Linda Knippers wrote:
>
>
> On 7/21/2016 3:46 PM, Dan Williams wrote:
>> On Thu, Jul 21, 2016 at 12:40 PM, Linda Knippers
>> wrote:
>>> On 07/20/2016 09:50 PM, Vishal Verma wrote:
Normally, an ARS (Address
On Thu, 21 Jul 2016 19:54:55 +0200 Manfred Spraul
wrote:
> Next update:
> - switch to smp_store_mb() instead of WRITE_ONCE();smp_mb();
> - introduce SEM_GLOBAL_LOCK instead of magic -1.
> - do not use READ_ONCE() for the unlocked test:
> READ_ONCE doesn't make sense
If neigh entry was CONNECTED and address is not changed, and if new state is
STALE, entry state will not change. Because DELAY is not in CONNECTED, it's
possible to change state from DELAY to STALE.
That is bad. Consider a host in IPv4 nerwork, a neigh entry in STALE state
is referenced to send
Implement changes made in RapidIO specification rev.3 to LP-Serial Physical
Layer register definitions:
- use per-port register offset calculations based on LP-Serial Extended
Features Block (EFB) Register Map type (I or II) with different per-port
offset step (0x20 vs. 0x40 respectfully).
-
On Thu, 21 Jul 2016 14:18:54 -0400 Alexandre Bounine
wrote:
> Add RapidIO switch driver for IDT Gen3 switch devices: RXS1632 and RXS2448.
>
> ...
>
> +static int
> +idtg3_em_handler(struct rio_dev *rdev, u8 pnum)
> +{
> + u32 err_status;
> + u32 rval;
> +
> +
Wan ZongShun,
On Fri, Jul 15, 2016 at 12:02:55PM +0200, Arnd Bergmann wrote:
> On Friday, July 15, 2016 5:44:50 PM CEST Wan ZongShun wrote:
> > 2016-07-15 15:00 GMT+08:00 Arnd Bergmann :
> > > On Friday, July 15, 2016 1:15:58 PM CEST Wan Zongshun wrote:
...
> > > That assumes that
This patch should cause no behavioral change. Even the (removal of)
the redundant bit mask should be a nop. So it seems like a bit of an
overkill to split them.
On 22 July 2016 at 02:45, Sergei Shtylyov
wrote:
> Hello.
>
> On 07/21/2016 09:41 PM,
On Thu, 21 Jul 2016 18:48:17 + "Bounine, Alexandre"
wrote:
> > > + udelay(10);
> > > + rio_write_config_32(rdev, RIO_PLM_SPx_IMP_SPEC_CTL(pnum),
> > rval);
> > > + mdelay(500);
> >
> > Yikes, that's a very long busywait. A half-second
Paolo Bonzini writes:
> On 21/07/2016 00:25, Bandan Das wrote:
>> That parameter isn't used in the function,
>> it's probably a historical artifact.
>
> Same for spte_clear_dirty and spte_set_dirty, please.
Sure! I will fix this in a follow-up.
Bandan
> Paolo
>
>>
Similar to how a vehicle will travel faster if you paint flames on it,
cleaning up this extra whitespace is guaranteed to provide additional
stability while updating watermark values.
Signed-off-by: Lyude
---
drivers/gpu/drm/i915/intel_pm.c | 1 -
1 file changed, 1 deletion(-)
Manual pipe flushes are only necessary in order to make sure that we prevent
pipes with changed ddb allocations from overlapping from one another at
any point in time. Additionally, forcing us to wait for the next vblank
every time we have to update the watermark values because the cursor was
John Stultz writes:
> On Wed, Jul 13, 2016 at 6:00 AM, Nicolai Stange wrote:
>> In order to avoid races between setting a struct clock_event_device's
>> ->mult_mono in clockevents_update_freq() and yet to be implemented updates
>> triggered from the
On Tue, Jul 12, 2016 at 02:36:40PM -0500, Alan Tull wrote:
> New bindings document for FPGA Region to support programming
> FPGA's under Device Tree control
>
> Signed-off-by: Alan Tull
> Signed-off-by: Moritz Fischer
> ---
> v9: initial
On Thu, 21 Jul 2016, Sebastian Andrzej Siewior wrote:
* Davidlohr Bueso | 2016-07-20 17:16:12 [-0700]:
Just as with expunge_all and the E2BIG case, could you remove that explicit
barrier (B) and just rely on wake_q_add?
Just did. So we have just a smp_rmb() on the reader side and the
1;4205;0c
On Thu, Jul 21, 2016 at 01:12:53PM +0100, Lee Jones wrote:
> On Wed, 20 Jul 2016, Jonathan Cameron wrote:
>
> > On 19/07/16 08:31, Lee Jones wrote:
> > > On Mon, 18 Jul 2016, Jonathan Cameron wrote:
> > >
> > >> On 15/07/16 10:59, Quentin Schulz wrote:
> > >>> The Allwinner SoCs all
From: Markus Elfring
Date: Thu, 21 Jul 2016 19:23:25 +0200
The vunmap() function performs also input parameter validation.
Thus the test around the call is not needed.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
On Wed, Jul 13, 2016 at 6:00 AM, Nicolai Stange wrote:
> In order to avoid races between setting a struct clock_event_device's
> ->mult_mono in clockevents_update_freq() and yet to be implemented updates
> triggered from the timekeeping core, the setting of ->mult and
On Thu, Jul 21, 2016 at 08:03:16PM +0200, Olliver Schinagl wrote:
> As i recall, some claimed it was needed as we have dma now, but i think this
> patch still scratches the same itch ...
Please don't top post, reply in line with needed context. This allows
readers to readily follow the flow of
On Thu, 2016-07-21 at 11:50 -0400, Tejun Heo wrote:
> Hello, James.
>
> On Thu, Jul 21, 2016 at 08:34:36AM -0700, James Bottomley wrote:
> > So if I as the cgroup ns owner am moving a task from A to A_subdir,
> > the admin scanning tasks in all of A may miss this task in motion
> > because all
On 21/07/2016 at 14:34, Benoît Thébaudeau wrote:
> On 21/07/2016 at 13:10, Alexandre Belloni wrote:
>> On 21/07/2016 at 12:41:30 +0200, Benoît Thébaudeau wrote :
>>> The I²C NACK issue of the RV-8803 may occur after any I²C START
>>> condition, depending on the timings. Consequently, the
>> https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/scripts/checkpatch.pl?id=92d21ac74a9e3c09b0b01c764e530657e4c85c49#n4326
>
> "#goto labels aren't indented, allow a single space however"
>
> Can't be clearer :-)
Should such information from a comment in this script be also
ceph_llseek does not correctly return NXIO errors because the 'out' path
always returns 'offset'.
Fixes: 06222e491e66 ("fs: handle SEEK_HOLE/SEEK_DATA properly in all fs's that
define their own llseek")
Signed-off-by: Phil Turnbull
---
fs/ceph/file.c | 12 +---
Add checking for error code returned by HW-specific mbox open routines.
Ensure that resources are properly release if failed.
This patch is applicable to kernel versions starting from v2.6.15.
Signed-off-by: Alexandre Bounine
Cc: Matt Porter
- Remove check for parallel PHY
- Set LP-Serial Register Map type
Signed-off-by: Alexandre Bounine
Cc: Matt Porter
Cc: Benjamin Herrenschmidt
Cc: Michael Ellerman
Cc: Andre van Herk
On Thu, Jul 21, 2016 at 07:27:12PM +0200, Michael Weiser wrote:
> On Thu, Jul 21, 2016 at 05:31:53PM +0100, Mark Brown wrote:
> > > What is keeping the patch from being merged (i.e. into mainline)?
> > Someone needs to address whatever review comments there were on the last
> > version and submit
Add module parameter to allow load time configuration of available RapidIO
messaging mailboxes (MBOX1 - MBOX4).
Having a messaging MBOX selector mask allows to define which MBOXes are
controlled by the mport device driver and reserve some of them for
direct use by other drivers.
Signed-off-by:
Fix lockdep warning during device probing: move sysfs initialization out
of code protected by a spin lock.
Signed-off-by: Alexandre Bounine
Cc: Matt Porter
Cc: Andre van Herk
Cc: Barry Wood
Hello.
On 07/21/2016 09:41 PM, tom.t...@gmail.com wrote:
From: Tom Yan
1. Removed a repeated bit masking in ata_mselect_control()
2. Moved `wce`/`d_sense` assignment below the page validity checks
3. Added/Removed empty lines where appropriate
Signed-off-by: Tom Yan
On Thu, Jul 21, 2016 at 12:40:18PM +0200, Miklos Szeredi wrote:
> And use it instead of opencoding in btrfs, f2fs and in fuse (coming up).
>
> Signed-off-by: Miklos Szeredi
> Cc: Chris Mason
> Cc: Jaegeuk Kim
> ---
> fs/btrfs/ctree.h|
On Mon, Jul 18, 2016 at 9:20 AM, David Gibson
wrote:
> Hi,
>
> Here's some of my thoughts on how a connector format for the DT could
> be done. Sorry it's taken longer than I hoped - I've been pretty
> swamped in my day job.
>
> This is pretty early thoughts, but
Hi Rob,
> On Jul 21, 2016, at 22:09 , Rob Herring wrote:
>
> On Thu, Jul 21, 2016 at 9:14 AM, Pantelis Antoniou
> wrote:
>> Hi David,
>>
>>> On Jul 21, 2016, at 16:42 , David Gibson
>>> wrote:
>>>
>>> On Wed,
On Fri, Apr 22, 2016 at 1:39 AM, Yunhui Cui wrote:
> From: Yunhui Cui
>
> With the physical sectors combination, S25FS-S family flash
> requires some special operations for read/write functions.
>
> Signed-off-by: Yunhui Cui
> ---
>
On 7/21/2016 3:46 PM, Dan Williams wrote:
> On Thu, Jul 21, 2016 at 12:40 PM, Linda Knippers
> wrote:
>> On 07/20/2016 09:50 PM, Vishal Verma wrote:
>>> Normally, an ARS (Address Range Scrub) only happens at
>>> boot/initialization time. There can however arise
Hi Cong,
Cong Wang writes:
> On Thu, Jul 21, 2016 at 9:42 AM, Vivien Didelot
> wrote:
>> Change the ageing_time type in br_set_ageing_time() from u32 to what it
>> is expected to be, i.e. a clock_t.
>
> You also need to change
On Wed, Jul 20, 2016 at 11:52 PM, Michael Ellerman wrote:
> Kees Cook writes:
>
>> diff --git a/mm/usercopy.c b/mm/usercopy.c
>> new file mode 100644
>> index ..e4bf4e7ccdf6
>> --- /dev/null
>> +++ b/mm/usercopy.c
>> @@ -0,0 +1,234 @@
> ...
On Thursday, July 21, 2016 11:45:26 AM CEST Scott Wood wrote:
>
> For the MMC issue I suggest using ifdef CONFIG_PPC and mfspr(SPRN_SVR) like
> the clock driver does[1] and we can revisit the issue if/when we need to do
> something similar on an ARM chip.
That sounds ok to me. having an mfspr
On Thu, Jul 07, 2016 at 09:32:00AM -0700, Andi Kleen wrote:
> On Thu, Jul 07, 2016 at 09:01:49AM -0700, Luis R. Rodriguez wrote:
> > The setup for LTO never made it upstream, and although this has
> > some users, this is now really old stuff for a gcc 4.7 LTO problem.
> > We know that at least
On Thu, Jul 21, 2016 at 2:15 PM, Pantelis Antoniou
wrote:
> Hi Rob,
>
>> On Jul 21, 2016, at 22:09 , Rob Herring wrote:
>>
>> On Thu, Jul 21, 2016 at 9:14 AM, Pantelis Antoniou
>> wrote:
>>> Hi David,
>>>
On Thu, Jul 21, 2016 at 12:24 PM, Nicolai Stange wrote:
> John Stultz writes:
>
>> On Wed, Jul 13, 2016 at 6:00 AM, Nicolai Stange wrote:
>>> In order to avoid races between setting a struct clock_event_device's
>>> ->mult_mono
On Wed, 13 Jul 2016, Thomas Gleixner wrote:
On Tue, 12 Jul 2016, Fenghua Yu wrote:
static int __init intel_rdt_late_init(void)
{
struct cpuinfo_x86 *c = _cpu_data;
@@ -261,9 +331,15 @@ static int __init intel_rdt_late_init(void)
goto out_err;
}
+
On Thu, 2016-07-21 at 15:53 +0200, Miklos Szeredi wrote:
> I've split out the writecount handling and changed it around so that
> underlying layers are consistent and yet leases work correctly on
> overlayfs.
>
> Also pushed to the tip of
>
>
Hi Mark,
On Thu, Jul 21, 2016 at 05:31:53PM +0100, Mark Brown wrote:
> > What is keeping the patch from being merged (i.e. into mainline)?
> Someone needs to address whatever review comments there were on the last
> version and submit it.
That's my point: There don't seem to be any.
v6 was
On Wed, Jul 20, 2016 at 11:03:36AM -0600, Jason Gunthorpe wrote:
> On Tue, Jul 19, 2016 at 05:24:11PM -0700, Andrey Pronin wrote:
>
> > The only two things that bother me with such approach are
> > (1) whatever names I pick for the new set of functions, they
> > will be similar to and thus
Add advancing transfer queue immediately from transfer submit call.
DMA performance improvement: This will start transfer without waiting for
'issue_pending' command if there is no DMA transfer in progress.
Signed-off-by: Alexandre Bounine
Cc: Matt Porter
Minor edits to correct parameter description.
This patch is applicable to kernel versions starting from v4.6.
Signed-off-by: Alexandre Bounine
Reported-by: Barry Wood
Cc: Matt Porter
Cc: Andre van Herk
From: Joe Perches
This is RapidIO part of the original patch submitted by Joe Perches.
(see: https://lkml.org/lkml/2016/3/5/19)
Since commit 3cab1e711297 ("lib/vsprintf: refactor duplicate code
to special_hex_number()") %pa uses have been output with a 0x prefix.
These 0x
Add PCIe Maximum Read Request Size (MRRS) adjustment parameter to allow
users to override configuration register value set during PCIe bus
initialization.
Performance of Tsi721 device as PCIe bus master can be improved if MRRS
is set to its maximum value (4096 bytes).
Some platforms have
Add module parameters to allow load time configuration of DMA channels.
Depending on application, performance of DMA data transfers can benefit
from adjusted sizes of buffer descriptor ring and/or transaction requests
queue.
Having HW DMA channel selector mask allows to define which channels
Update return value description for rio_dma_prep_... functions to include
error-valued pointer that can be returned by HW mport device drivers.
Return values from these functions must be checked using IS_ERR_OR_NULL
macro.
This patch is applicable to kernel versions starting from v4.6-rc1.
This set of patches contains RapidIO subsystem fixes and updates that have
been made since kernel v4.6. The most significant update brings changes
related to the latest revision of RapidIO specification (rev.3.x) and
introduction of next generation of RapidIO switches by IDT (RXS1632
and RXS2448).
From: Tom Yan
1. Removed a repeated bit masking in ata_mselect_control()
2. Moved `wce`/`d_sense` assignment below the page validity checks
3. Added/Removed empty lines where appropriate
Signed-off-by: Tom Yan
diff --git a/drivers/ata/libata-scsi.c
From: Tom Yan
Commit 7780081c1f04 ("libata-scsi: Set information sense field for
invalid parameter") changed how ata_mselect_*() make sure read-only
bits are not modified. The new implementation introduced a bug that
the read-only bits in the byte that has a changeable bit
From: Tom Yan
ata_mselect_*() would initialize a char array for storing a copy of
the current mode page. However, if char was actually signed char,
overflow could occur.
For example, `0xff` from def_control_mpage[] would be "truncated"
to `-1`. This prevented
On Thu, Jul 21, 2016 at 08:36:18AM +0200, Jiri Slaby wrote:
> On 07/14/2016, 10:15 AM, Jiri Slaby wrote:
> > From: Florian Westphal
> >
> > 3.12-stable review patch. If anyone has any objections, please let me know.
> >
> > ===
> >
> > commit
Hi Markus,
On Thu, 21 Jul 2016 17:37:52 +0200, SF Markus Elfring wrote:
> > That being said... checkpatch does not complain about leading space
> > before labels. Not even with --strict. So why are you mentioning it here?
>
> I remembered a warning like "INDENTED_LABEL" instead.
>
Paolo Bonzini writes:
> On 21/07/2016 00:25, Bandan Das wrote:
>> vmentry should check whether the vmcs provided by
>> the guest hypervisor is a shadow vmcs and fail.
>
> How can this happen, since vmptrld checks the revision_id as you said below?
This is more of a change
On 07/20/2016 09:50 PM, Vishal Verma wrote:
> Normally, an ARS (Address Range Scrub) only happens at
> boot/initialization time. There can however arise situations where a
> bus-wide rescan is needed - notably, in the case of discovering a latent
> media error, we should do a full rescan to figure
On Wed, Jul 20, 2016 at 1:58 AM, Andrew Jeffery wrote:
> From: Joel Stanley
>
> The Aspeed SoCs contain GPIOs grouped by letter, where each letter group
> contains 8 pins. The GPIO letter groups are then banked in sets of four
> in the register layout.
>
> The
On Thu, Jul 21, 2016 at 11:18 AM, Vivien Didelot
wrote:
> Hi Cong,
>
> Cong Wang writes:
>
>> On Thu, Jul 21, 2016 at 9:42 AM, Vivien Didelot
>> wrote:
>>> Change the ageing_time type in
On 07/21/2016 01:23 PM, Marc Zyngier wrote:
On 21/07/16 17:33, David Long wrote:
On 07/20/2016 12:09 PM, Marc Zyngier wrote:
On 08/07/16 17:35, David Long wrote:
From: Sandeepa Prabhu
Add support for basic kernel probes(kprobes) and jump probes
(jprobes) for
From: Tom Yan
The one-page-at-a-time check in ata_scsi_mode_select_xlat() should
be done before either of the ata_mselect_*() is called.
Also updated the comment. We have more than one mode page that has
changeable bit since commit 06dbde5f3a44 ("libata: Implement
control
From: Tom Yan
scsi_done() was called repeatedly and apparently because of that,
the kernel would call trace when we touch the Control mode page:
Call Trace:
[] dump_stack+0x63/0x81
[] __warn+0xcb/0xf0
[] warn_slowpath_null+0x1d/0x20
[] ata_eh_finish+0xe0/0xf0 [libata]
On July 22, 2016 12:18:48 AM GMT+08:00, John Stultz
wrote:
>On Wed, Jul 20, 2016 at 11:27 PM, Andy Green wrote:
>> On July 21, 2016 1:22:02 PM GMT+08:00, John Stultz
> wrote:
>>>On Wed, Jul 20, 2016 at 9:26 PM, zhangfei
How to reproduce:
Open xconfig tool with next command: "make xconfig"
Open "file" menu and select "Save as..." option.
Enter the file name and press "Save" button.
Quit from xconfig tool.
The file wouldn't be created.
Kernel version is 4.7-rc7.
Any ideas what I'm doing wrong?
--
Paltsev Eugeniy
On 07/21/2016, 08:56 PM, Greg KH wrote:
> On Thu, Jul 21, 2016 at 08:36:18AM +0200, Jiri Slaby wrote:
>> On 07/14/2016, 10:15 AM, Jiri Slaby wrote:
>>> From: Florian Westphal
>>>
>>> 3.12-stable review patch. If anyone has any objections, please let me know.
>>>
>>>
On Thu, Jul 21, 2016 at 9:14 AM, Pantelis Antoniou
wrote:
> Hi David,
>
>> On Jul 21, 2016, at 16:42 , David Gibson wrote:
>>
>> On Wed, Jul 20, 2016 at 11:59:44PM +0300, Pantelis Antoniou wrote:
>>> Hi David,
>>>
>>> Spent some time
On 07/21/16 11:54, Eugeniy Paltsev wrote:
> How to reproduce:
> Open xconfig tool with next command: "make xconfig"
> Open "file" menu and select "Save as..." option.
> Enter the file name and press "Save" button.
> Quit from xconfig tool.
> The file wouldn't be created.
>
> Kernel version is
On Thu, Jul 21, 2016 at 5:19 AM, wrote:
> From: Maxime Coquelin
>
> The STM32 MCUs family IPs can be reset by accessing some registers
> from the RCC block.
>
> The list of available reset lines is documented in the DT bindings.
>
>
On Thursday, July 21, 2016 3:48:09 PM CEST Paul Gortmaker wrote:
> > diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> > index 5d65a93..64ebb0c 100644
> > --- a/drivers/reset/Makefile
> > +++ b/drivers/reset/Makefile
> > @@ -4,6 +4,7 @@ obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
>
On Wed, Jul 20, 2016 at 12:49:12PM -0700, Andrey Pronin wrote:
> On Wed, Jul 20, 2016 at 02:03:03PM -0500, Rob Herring wrote:
> > On Tue, Jul 19, 2016 at 08:41:24PM -0700, Andrey Pronin wrote:
>
> Hi Rob,
>
> > As I mentioned, there may be common properties. It doesn't seem you
> > looked, so I
Thanks for applying it, I'll skip the reせend then.
On 13-07-16, 13:25, Steve Muckle wrote:
> +unsigned int cpufreq_driver_resolve_freq(struct cpufreq_policy *policy,
> + unsigned int target_freq)
> +{
> + target_freq = clamp_val(target_freq, policy->min, policy->max);
> + policy->cached_target_freq =
On Thu, Jul 21, 2016 at 11:52:36AM +0530, Sekhar Nori wrote:
> Nishanth,
>
> On Wednesday 20 July 2016 09:03 PM, Nishanth Menon wrote:
> > On 07/20/2016 09:56 AM, Mugunthan V N wrote:
> >> Add documention of ti,impedance-control which can be used to
> >> correct MAC impedance mismatch using phy
On Thursday, July 21, 2016 01:52:45 PM Viresh Kumar wrote:
> On 21-07-16, 22:52, Rafael J. Wysocki wrote:
> > That'd be fine by me.
> >
> > Please send a patch on top of the Steve's series and I can apply it too
> > (unless Steve sees some major problems in it, which seems unlikely to me).
>
>
On Fri, Jul 22, 2016 at 02:41:54AM +0800, tom.t...@gmail.com wrote:
> @@ -3854,6 +3852,8 @@ static unsigned int ata_scsi_mode_select_xlat(struct
> ata_queued_cmd *qc)
> if (ata_mselect_control(qc, p, pg_len, ) < 0) {
> fp += hdr_len + bd_len;
>
For reasons unknown, the x86_64 irq stack starts at an offset 64 bytes
from the end of the page. At least make that explicit.
FIXME: Can we just remove the 64 byte gap? If not, at least document
why.
Signed-off-by: Josh Poimboeuf
---
arch/x86/include/asm/page_64_types.h
in_exception_stack() does some bad, bad things just so the unwinder can
print different values for different areas of the debug exception stack.
There's no need to clarify where exactly on the stack it is. Just print
"#DB" and be done with it.
Signed-off-by: Josh Poimboeuf
valid_stack_ptr() is buggy: it assumes that all stacks are of size
THREAD_SIZE, which is not true for exception stacks. So the
walk_stack() callbacks will need to know the location of the beginning
of the stack as well as the end.
Another issue is that in general the various features of a stack
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