H3 SPI subsystem is almost same as A31 SPI except buffer size, so those
DT properties are reusable.
Cc: Maxime Ripard
Cc: Chen-Yu Tsai
Signed-off-by: Milo Kim
---
arch/arm/boot/dts/sun8i-h3.dtsi | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot
H3 has two SPI controllers. The size of the buffer is 64 * 8.
(8 bit transfer by 64 entry FIFO)
A31 has four controllers. The size of the buffer is 128 * 8.
(8 bit transfer by 128 entry FIFO)
Register maps are sharable, so sun6i SPI driver is reusable with
device configuration.
Use the variable,
H3 SPI has same architecture as A31 except FIFO capacity.
To configure the buffer size separately, compatible property should be
different. Optional DMA specifiers and example are added.
Acked-by: Maxime Ripard
Cc: Mark Brown
Cc: Rob Herring
Cc: Chen-Yu Tsai
Signed-off-by: Milo Kim
---
.../d
H3 supports two SPI controllers. Four pins (MOSI, MISO, SCLK, SS) are
configured through the pinctrl subsystem.
Cc: Maxime Ripard
Cc: Chen-Yu Tsai
Signed-off-by: Milo Kim
---
arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/s
Allwinner H3 SPI controller has same architecture as A31.
So most configuration is identical except one thing - FIFO capacity.
A31H3
Number of controllers 4 2
Number of FIFO depth 12864
Transfer bits 8
Commit-ID: 24d86f59093b0bcb3756cdf47f2db10ff4e90dbb
Gitweb: http://git.kernel.org/tip/24d86f59093b0bcb3756cdf47f2db10ff4e90dbb
Author: Josh Poimboeuf
AuthorDate: Thu, 27 Oct 2016 08:10:58 -0500
Committer: Ingo Molnar
CommitDate: Fri, 28 Oct 2016 08:16:45 +0200
x86/unwind: Ensure stack
Commit-ID: 67dece7d4c5841e84a3c795e79bf0dcd5be54f55
Gitweb: http://git.kernel.org/tip/67dece7d4c5841e84a3c795e79bf0dcd5be54f55
Author: Dmitry Safonov
AuthorDate: Thu, 27 Oct 2016 17:15:16 +0300
Committer: Ingo Molnar
CommitDate: Fri, 28 Oct 2016 08:15:55 +0200
x86/vdso: Set vDSO pointe
Commit-ID: a01aa6c9f40fe03c82032e7f8b3bcf1e6c93ac0e
Gitweb: http://git.kernel.org/tip/a01aa6c9f40fe03c82032e7f8b3bcf1e6c93ac0e
Author: Dmitry Safonov
AuthorDate: Thu, 27 Oct 2016 17:15:15 +0300
Committer: Ingo Molnar
CommitDate: Fri, 28 Oct 2016 08:15:55 +0200
x86/prctl/uapi: Remove #i
I'd say please fold this into the previous patch.
> Signed-off-by: Stephen Bates
FYI, that address has bounced throught the whole thread for me,
replacing it with a known good one for now.
> + * This driver is heavily based on drivers/block/pmem.c.
> + * Copyright (c) 2014, Intel Corporation.
> + * Copyright (C) 2007 Nick Piggin
> + * Copyrigh
[...]
>
>> Moreover, I am still trying to understand what's the big deal to why
>> you say no to BFQ as a legacy scheduler. Ideally it shouldn't cause
>> you any maintenance burden and it doesn't make the removal of the
>> legacy blk layer any more difficult, right?
>
>
> Not sure I can state it m
> -Original Message-
> From: Y.B. Lu
> Sent: Friday, October 28, 2016 2:00 PM
> To: 'Scott Wood'; linux-...@vger.kernel.org; ulf.hans...@linaro.org; Arnd
> Bergmann
> Cc: linuxppc-...@lists.ozlabs.org; devicet...@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org; linux-kernel@vger.ke
Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/
since it's used by not only PowerPC but also ARM. And add a specification
for 'little-endian' property.
Signed-off-by: Yangbo Lu
Acked-by: Rob Herring
Acked-by: Scott Wood
---
Changes for v4:
- Added this patch
Chang
On 10/27/2016 08:24 PM, Kirti Wankhede wrote:
>
>
> On 10/27/2016 5:41 PM, Jike Song wrote:
>> On 10/27/2016 05:29 AM, Kirti Wankhede wrote:
>>> Update arguments of vaddr_get_pfn() to take struct mm_struct *mm as input
>>> argument.
>>>
>>> Signed-off-by: Kirti Wankhede
>>> Signed-off-by: Neo Ji
Add maintainer entry for Freescale SoC drivers including
the QE library and the GUTS driver now. Also add maintainer
for QE library.
Signed-off-by: Yangbo Lu
Acked-by: Scott Wood
Acked-by: Qiang Zhao
---
Changes for v8:
- Added this patch
Changes for v9:
- Added linux-arm mail l
From: Arnd Bergmann
We keep running into cases where device drivers want to know the exact
version of the a SoC they are currently running on. In the past, this has
usually been done through a vendor specific API that can be called by a
driver, or by directly accessing some kind of version regist
Add the dts node for device configuration unit that provides
general purpose configuration and status for the device.
Signed-off-by: Yangbo Lu
Acked-by: Scott Wood
---
Changes for v5:
- Added this patch
Changes for v6:
- None
Changes for v7:
- None
Changes for v8:
The eSDHC of T4240-R1.0-R2.0 has incorrect vender version and spec version.
Acturally the right version numbers should be VVN=0x13 and SVN = 0x1.
This patch adds the GUTS driver support for eSDHC driver to match SoC.
And fix host version to avoid that incorrect version numbers break down
the ADMA d
Move mpc85xx.h to include/linux/fsl and rename it to svr.h as a common
header file. This SVR numberspace is used on some ARM chips as well as
PPC, and even to check for a PPC SVR multi-arch drivers would otherwise
need to ifdef the header inclusion and all references to the SVR symbols.
Signed-of
The global utilities block controls power management, I/O device
enabling, power-onreset(POR) configuration monitoring, alternate
function selection for multiplexed signals,and clock control.
This patch adds a driver to manage and access global utilities block.
Initially only reading SVR and regis
From: Huang Ying
This patch make it possible to charge or uncharge a set of continuous
swap entries in the swap cgroup. The number of swap entries is
specified via an added parameter.
This will be used for the THP (Transparent Huge Page) swap support.
Where a swap cluster backing a THP may be a
From: Huang Ying
__swapcache_free() is added to support to clear the SWAP_HAS_CACHE flag
for the huge page. This will free the specified swap cluster now.
Because now this function will be called only in the error path to free
the swap cluster just allocated. So the corresponding swap_map[i] ==
From: Huang Ying
The swap cluster allocation/free functions are added based on the
existing swap cluster management mechanism for SSD. These functions
don't work for the rotating hard disks because the existing swap cluster
management mechanism doesn't work for them. The hard disks support may
This patchset is used to fix a host version register bug in the T4240-R1.0-R2.0
eSDHC controller. To match the SoC version and revision, 10 previous version
patchsets had tried many methods but all of them were rejected by reviewers.
Such as
- dts compatible method
- syscon method
From: Huang Ying
This patch enhanced the split_huge_page_to_list() to work properly for
the THP (Transparent Huge Page) in the swap cache during swapping out.
This is used for delaying splitting the THP during swapping out. Where
for a THP to be swapped out, we will allocate a swap cluster, add
Update Freescale DCFG compatible with 'fsl,-dcfg' instead
of 'fsl,ls1021a-dcfg' to include more chips such as ls1021a,
ls1043a, and ls2080a.
Signed-off-by: Yangbo Lu
Acked-by: Rob Herring
Signed-off-by: Scott Wood
---
Changes for v8:
- Added this patch
Changes for v9:
- Added a
From: Huang Ying
With this patch, a THP (Transparent Huge Page) can be added/deleted
to/from the swap cache as a set of (HPAGE_PMD_NR) sub-pages.
This will be used for the THP (Transparent Huge Page) swap support.
Where one THP may be added/delted to/from the swap cache. This will
batch the swa
From: Huang Ying
In this patch, splitting huge page is delayed from almost the first step
of swapping out to after allocating the swap space for the
THP (Transparent Huge Page) and adding the THP into the swap cache.
This will reduce lock acquiring/releasing for the locks used for the
swap cache
From: Huang Ying
A variation of get_swap_page(), get_huge_swap_page(), is added to
allocate a swap cluster (HPAGE_PMD_NR swap slots) based on the swap
cluster allocation function. A fair simple algorithm is used, that is,
only the first swap device in priority list will be tried to allocate
the
From: Huang Ying
Separates checking whether we can split the huge page from
split_huge_page_to_list() into a function. This will help to check that
before splitting the THP (Transparent Huge Page) really.
This will be used for delaying splitting THP during swapping out. Where
for a THP, we wil
From: Huang Ying
In this patch, the size of the swap cluster is changed to that of the
THP (Transparent Huge Page) on x86_64 architecture (512). This is for
the THP swap support on x86_64. Where one swap cluster will be used to
hold the contents of each THP swapped out. And some information of
From: Huang Ying
This patchset is to optimize the performance of Transparent Huge Page
(THP) swap.
Hi, Andrew, could you help me to check whether the overall design is
reasonable?
Hi, Hugh, Shaohua, Minchan and Rik, could you help me to review the
swap part of the patchset? Especially [1/9], [
On 10/27/2016 08:35 PM, Jerome Glisse wrote:
> On Thu, Oct 27, 2016 at 12:33:05PM +0530, Anshuman Khandual wrote:
>> On 10/27/2016 10:08 AM, Anshuman Khandual wrote:
>>> On 10/26/2016 09:32 PM, Jerome Glisse wrote:
On Wed, Oct 26, 2016 at 04:43:10PM +0530, Anshuman Khandual wrote:
> On 10/
On Thu, Oct 27, 2016 at 04:37:53PM +0900, Magnus Damm wrote:
> Hi Simon,
>
> On Thu, Oct 27, 2016 at 4:15 PM, Simon Horman wrote:
> > On Thu, Oct 27, 2016 at 09:08:01AM +0200, Simon Horman wrote:
> >> On Wed, Oct 26, 2016 at 02:24:22PM +0900, Magnus Damm wrote:
> >> > From: Magnus Damm
> >> >
>
On Thu, Oct 27, 2016 at 05:06:16PM -0700, Andy Lutomirski wrote:
> It looks like there is at least one NVMe disk in existence (a
> different Samsung device) that sporadically dies when APST is on.
> This device appears to also sporadically die when APST is off, but it
> lasts considerably longer be
On Thu, Oct 27, 2016 at 04:49:18PM -0700, Dmitry Torokhov wrote:
> On Thu, Oct 27, 2016 at 03:02:30PM -0700, Brian Norris wrote:
> > In reading through a USB interface driver, I noticed that it called
> > usb_{get,put}_dev() in its probe() and disconnect() methods. This seemed
> > unnecessary, but
On 28-10-16, 12:07, Fengguang Wu wrote:
> On Fri, Oct 28, 2016 at 09:27:53AM +0530, Viresh Kumar wrote:
> >On 28-10-16, 07:22, kbuild test robot wrote:
> >>tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> >>master
> >>head: e3300ffef0653774f1099cab153d25d24bd773ce
> >
quite important mail for me in mail
>>> storm. Gonna test it and will write you the results. Overall looks
>>> great, but better be sure and run the tests.
>>>
>>> Reviewed-by: Cyrill Gorcunov
>>
>> Eric, on which kernel the patch is on top of?
On Thu, Oct 27, 2016 at 03:24:55PM -0700, Deepa Dinamani wrote:
> On Wed, Oct 26, 2016 at 7:56 PM, Peter Hutterer
> wrote:
> > On Mon, Oct 17, 2016 at 08:27:32PM -0700, Deepa Dinamani wrote:
> >> struct timeval is not y2038 safe.
> >> All usage of timeval in the kernel will be replaced by
> >> y20
On Fri, 2016-10-28 at 11:32 +0800, Yangbo Lu wrote:
> + guts->regs = of_iomap(np, 0);
> + if (!guts->regs)
> + return -ENOMEM;
> +
> + /* Register soc device */
> + machine = of_flat_dt_get_machine_name();
> + if (machine)
> + soc_dev_attr.machine = devm_
While merging mpt3sas & mpt2sas code, we posted below patch for WarpDrive
support,
mpt3sas: Ported WarpDrive product SSS6200 support
commit id is 7786ab6aff
In this patch and in the below hunk, we have added is_warpdrive
check condition on the wrong line
--
The eSDHC of T4240-R1.0-R2.0 has incorrect vender version and spec version.
Acturally the right version numbers should be VVN=0x13 and SVN = 0x1.
This patch adds the GUTS driver support for eSDHC driver to match SoC.
And fix host version to avoid that incorrect version numbers break down
the ADMA d
On Thu, Oct 27, 2016 at 01:39:30PM -0700, Deepa Dinamani wrote:
> > hmm, I'm a bit confused here. This is an in-kernel bit only (passing the
> > time through uinput events has no effect). So why do we need an ioctl here?
> > it's an in-kernel decision only anyway and the time in the events sent to
Move mpc85xx.h to include/linux/fsl and rename it to svr.h as a common
header file. This SVR numberspace is used on some ARM chips as well as
PPC, and even to check for a PPC SVR multi-arch drivers would otherwise
need to ifdef the header inclusion and all references to the SVR symbols.
Signed-of
From: Christian Borntraeger
this implements the s390 backend for commit
"kernel/sched: introduce vcpu preempted check interface"
by reworking the existing smp_vcpu_scheduled into
arch_vcpu_is_preempted. We can then also get rid of the
local cpu_is_preempted function by moving the
CIF_ENABLED_WAIT
It allows us to update some status or field of one struct partially.
We can also save one kvm_read_guest_cached if we just update one filed
of the struct regardless of its current value.
Signed-off-by: Pan Xinhui
---
include/linux/kvm_host.h | 2 ++
virt/kvm/kvm_main.c | 20 ++
An over-committed guest with more vCPUs than pCPUs has a heavy overload in
the two spin_on_owner. This blames on the lock holder preemption issue.
Kernel has an interface bool vcpu_is_preempted(int cpu) to see if a vCPU is
currently running or not. So break the spin loops on true condition.
test-
This is to fix some lock holder preemption issues. Some other locks
implementation do a spin loop before acquiring the lock itself.
Currently kernel has an interface of bool vcpu_is_preempted(int cpu). It
takes the cpu as parameter and return true if the cpu is preempted.
Then kernel can break the
From: Juergen Gross
Support the vcpu_is_preempted() functionality under Xen. This will
enhance lock performance on overcommitted hosts (more runnable vcpus
than physical cpus in the system) as doing busy waits for preempted
vcpus will hurt system performance far worse than early yielding.
A quic
Support the vcpu_is_preempted() functionality under KVM. This will
enhance lock performance on overcommitted hosts (more runnable vcpus
than physical cpus in the system) as doing busy waits for preempted
vcpus will hurt system performance far worse than early yielding.
Use one field of struct kvm_
This is to fix some lock holder preemption issues. Some other locks
implementation do a spin loop before acquiring the lock itself.
Currently kernel has an interface of bool vcpu_is_preempted(int cpu). It
takes the cpu as parameter and return true if the cpu is preempted. Then
kernel can break the
Commit ("x86, kvm: support vcpu preempted check") add one field "__u8
preempted" into struct kvm_steal_time. This field tells if one vcpu is
running or not.
It is zero if 1) some old KVM deos not support this filed. 2) the vcpu is
not preempted. Other values means the vcpu has been preempted.
Sig
An over-committed guest with more vCPUs than pCPUs has a heavy overload in
osq_lock().
This is because vCPU A hold the osq lock and yield out, vCPU B wait per_cpu
node->locked to be set. IOW, vCPU B wait vCPU A to run and unlock the osq
lock.
Kernel has an interface bool vcpu_is_preempted(int cpu
Support the vcpu_is_preempted() functionality under KVM. This will
enhance lock performance on overcommitted hosts (more runnable vcpus
than physical cpus in the system) as doing busy waits for preempted
vcpus will hurt system performance far worse than early yielding.
struct kvm_steal_time::preem
This patch support to fix lock holder preemption issue.
For kernel users, we could use bool vcpu_is_preempted(int cpu) to detech if
one vcpu is preempted or not.
The default implementation is a macro defined by false. So compiler can
wrap it out if arch dose not support such vcpu pteempted check.
change from v5:
spilt x86/kvm patch into guest/host part.
introduce kvm_write_guest_offset_cached.
fix some typos.
rebase patch onto 4.9.2
change from v4:
spilt x86 kvm vcpu preempted check into two patches.
add documentation patch.
add x86 vc
From: Arnd Bergmann
We keep running into cases where device drivers want to know the exact
version of the a SoC they are currently running on. In the past, this has
usually been done through a vendor specific API that can be called by a
driver, or by directly accessing some kind of version regist
Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/
since it's used by not only PowerPC but also ARM. And add a specification
for 'little-endian' property.
Signed-off-by: Yangbo Lu
Acked-by: Rob Herring
Acked-by: Scott Wood
---
Changes for v4:
- Added this patch
Chang
On (10/27/16 09:35), Joe Perches wrote:
[..]
> > - printk_nmi_flush_line(buf, (end - start) + 1);
> > + /* Handle continuous lines or missing new line. */
> > + if ((c + 1 < end) && printk_get_level(c)) {
> > + if (header) {
> > + c
On Fri, Oct 28, 2016 at 09:27:53AM +0530, Viresh Kumar wrote:
On 28-10-16, 07:22, kbuild test robot wrote:
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: e3300ffef0653774f1099cab153d25d24bd773ce
commit: f47b72a15a9679dd4dc1af681d4d2f1ca2815552 PM / OPP
Hello,
On (10/27/16 20:30), Linus Torvalds wrote:
> On Thu, Oct 27, 2016 at 8:49 AM, Sergey Senozhatsky
> wrote:
> >
> > RFC
> >
> > This patch set extends a lock-less NMI per-cpu buffers idea to
> > handle recursive printk() calls. The basic mechanism is pretty much the
> > same
On 10/26/2016 10:56 PM, Lee Jones wrote:
diff --git a/include/linux/mfd/tps65217.h b/include/linux/mfd/tps65217.h
> index 4ccda89..75a3a5f 100644
> --- a/include/linux/mfd/tps65217.h
> +++ b/include/linux/mfd/tps65217.h
> @@ -235,9 +235,9 @@ struct tps65217_bl_pdata {
> };
>
> enum tps65217_irq
Update Freescale DCFG compatible with 'fsl,-dcfg' instead
of 'fsl,ls1021a-dcfg' to include more chips such as ls1021a,
ls1043a, and ls2080a.
Signed-off-by: Yangbo Lu
Acked-by: Rob Herring
Signed-off-by: Scott Wood
---
Changes for v8:
- Added this patch
Changes for v9:
- Added a
On 10/22/2016 05:47 AM, Robert Nelson wrote:
+#include
^ this hasn't been posted nor pushed to mainline yet.. ;)
Oops! I've created this file but not captured not only in my git tree
but also in my head! Thanks for your review.
Best regards,
Milo
This patchset is used to fix a host version register bug in the T4240-R1.0-R2.0
eSDHC controller. To match the SoC version and revision, 10 previous version
patchsets had tried many methods but all of them were rejected by reviewers.
Such as
- dts compatible method
- syscon method
The global utilities block controls power management, I/O device
enabling, power-onreset(POR) configuration monitoring, alternate
function selection for multiplexed signals,and clock control.
This patch adds a driver to manage and access global utilities block.
Initially only reading SVR and regis
Add the dts node for device configuration unit that provides
general purpose configuration and status for the device.
Signed-off-by: Yangbo Lu
Acked-by: Scott Wood
---
Changes for v5:
- Added this patch
Changes for v6:
- None
Changes for v7:
- None
Changes for v8:
On 28-10-16, 07:22, kbuild test robot wrote:
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> master
> head: e3300ffef0653774f1099cab153d25d24bd773ce
> commit: f47b72a15a9679dd4dc1af681d4d2f1ca2815552 PM / OPP: Move CONFIG_OF
> dependent code in a separate file
> d
Add maintainer entry for Freescale SoC drivers including
the QE library and the GUTS driver now. Also add maintainer
for QE library.
Signed-off-by: Yangbo Lu
Acked-by: Scott Wood
Acked-by: Qiang Zhao
---
Changes for v8:
- Added this patch
Changes for v9:
- Added linux-arm mail l
Hi all,
There will probably be no linux-next releases next week while I attend
the Kernel Summit.
Changes since 20161027:
The akpm-current tree lost its build failures.
Non-merge commits (relative to Linus' tree): 3098
3842 files changed, 227213 insertions(+), 59787 dele
On Thu, Oct 27, 2016 at 8:49 AM, Sergey Senozhatsky
wrote:
>
> RFC
>
> This patch set extends a lock-less NMI per-cpu buffers idea to
> handle recursive printk() calls. The basic mechanism is pretty much the
> same -- at the beginning of a deadlock-prone section we switch to lock-l
Radim Krčmář writes:
> 2016-10-26 20:17-0400, Bandan Das:
>> Radim Krčmář writes:
>> ...
>>> +static int check_fxsr(struct x86_emulate_ctxt *ctxt)
>>> +{
>>> + u32 eax = 1, ebx, ecx = 0, edx;
>>> +
>>> + ctxt->ops->get_cpuid(ctxt, &eax, &ebx, &ecx, &edx);
>>> + if (!(edx & FFL(FXSR)))
>>>
On Fri, 28 Oct 2016, Paul Bolle wrote:
> On Tue, 2016-10-25 at 22:28 -0400, Nicolas Pitre wrote:
> > The "imply" keyword is a weak version of "select" where the target
> > config symbol can still be turned off, avoiding those pitfalls that come
> > with the "select" keyword.
> >
> > This is usefu
On Thu, Oct 27, 2016 at 05:33:57PM -0700, Andy Lutomirski wrote:
> Hi-
>
> I think this error on my laptop is new on 4.9 kernels:
>
> [ +0.014696] tpm_tis 00:09: 1.2 TPM (device-id 0xFE, rev-id 2)
> [ +0.012228] tpm tpm0: TPM self test failed
> [ +0.19] tpm_tis: probe of 00:09 failed with
On 2016/10/21 15:34, Thierry Reding wrote:
> On Fri, Oct 21, 2016 at 09:22:36AM +0200, Thierry Reding wrote:
>> On Mon, Oct 10, 2016 at 04:53:39PM -0500, Rob Herring wrote:
>>> On Mon, Oct 10, 2016 at 07:05:16PM +0800, Jian Yuan wrote:
From: yuanjian
Add PWM driver for the PWM con
On 10/26/2016 05:58 AM, Alexandre Bailon wrote:
When the phy is forced in host mode, only the first hot plug and
hot remove works. That is actually because the driver execute the
OTG workaround, whereas it is not applicable in host or device mode.
Indeed, to work correctly, the VBUS sense and ses
> From: netdev-ow...@vger.kernel.org [mailto:netdev-
> ow...@vger.kernel.org] On Behalf Of David Singleton
> Sent: Monday, October 17, 2016 9:51 AM
> To: Kirsher, Jeffrey T
> Cc: khalidm ; intel-wired-...@lists.osuosl.org;
> net...@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: [PATCH] e
On 2016/10/11 5:53, Rob Herring wrote:
> On Mon, Oct 10, 2016 at 07:05:16PM +0800, Jian Yuan wrote:
>> From: yuanjian
>>
>> Add PWM driver for the PWM controller found on HiSilicon BVT SOCs, like
>> Hi3519V100, Hi3516CV300, etc.
>> The PWM controller is primarily in charge of controlling P-Iris
On 27/10/16 23:31, Kirti Wankhede wrote:
>
>
> On 10/27/2016 12:50 PM, Alexey Kardashevskiy wrote:
>> On 18/10/16 08:22, Kirti Wankhede wrote:
>>> VFIO IOMMU drivers are designed for the devices which are IOMMU capable.
>>> Mediated device only uses IOMMU APIs, the underlying hardware can be
>>>
Boaz Harrosh wrote on 2016-10-26:
> On 10/26/2016 06:50 PM, Brian Boylston wrote:
>> Introduce memcpy_nocache() as a memcpy() that avoids the processor cache
>> if possible. Without arch-specific support, this defaults to just
>> memcpy(). For now, include arch-specific support for x86.
>>
>> Cc
gt; great, but better be sure and run the tests.
>>
>> Reviewed-by: Cyrill Gorcunov
>
> Eric, on which kernel the patch is on top of?
> It doesn't apply on linux-next for some reason.
>
> | Date: Thu Oct 27 14:21:59 2016 +1100
> |
> | Add linux-nex
FYI, we noticed the following commit:
https://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
wb-buf-throttle
commit b1fa1b67c176e41eeae2bfcc7df38117976cd92d ("block: hook up writeback
throttling")
in testcase: boot
on test machine: qemu-system-x86_64 -enable-kvm -m 320M
caused
Thomas Gleixner wrote on 2016-10-26:
> On Wed, 26 Oct 2016, Brian Boylston wrote:
>> --- a/arch/x86/include/asm/string_32.h
>> +++ b/arch/x86/include/asm/string_32.h
>> @@ -196,6 +196,9 @@ static inline void *__memcpy3d(void *to, const void
>> *from, size_t len)
>
>> +#define __HAVE_ARCH_MEMCPY_N
On Fri, Oct 28, 2016 at 01:03:55AM +0100, Al Viro wrote:
> On Thu, Oct 27, 2016 at 03:32:10PM -0400, Joe Korty wrote:
[oops in 4.1.35, bisected to 319fe1151940]
> > The following test program can be used to trigger the problem:
> >
> > /* gcc -m32 c.c -o c */
> > #define _GNU_SOURCE
> > #include
On 10/19, Georgi Djakov wrote:
> diff --git a/drivers/clk/qcom/clk-regmap-mux-div.c
> b/drivers/clk/qcom/clk-regmap-mux-div.c
> new file mode 100644
> index ..ec87f496606a
> --- /dev/null
> +++ b/drivers/clk/qcom/clk-regmap-mux-div.c
> @@ -0,0 +1,254 @@
> +/*
> + * Copyright (c) 2015,
Boaz Harrosh wrote on 2016-10-26:
> On 10/26/2016 06:50 PM, Brian Boylston wrote:
>> copy_from_iter_nocache() now uses nocache copies for all types of iovecs
>> on x86, so the flush in arch_copy_from_iter_pmem() is no longer needed.
>>
>> Cc: Ross Zwisler
>> Cc: Thomas Gleixner
>> Cc: Ingo Molna
On 10/19, Georgi Djakov wrote:
> Add a driver for the A53 Clock Controller. It is a hardware block that
> implements a combined mux and half integer divider functionality. It can
> choose between a fixed-rate clock or the dedicated A53 PLL. The source
> and the divider can be set both at the same t
On 2016/10/27 1:00, David Daney wrote:
> On 10/26/2016 06:43 AM, Robert Richter wrote:
>> On 25.10.16 14:31:00, David Daney wrote:
>>> From: David Daney
>>>
>>> On arm64 NUMA kernels we can pass "numa=off" on the command line to
>>> disable NUMA. A side effect of this is that kmalloc_node() cal
On 10/19, Georgi Djakov wrote:
> Add support for the PLL, which generates the higher range of CPU
> frequencies on MSM8916 platforms.
>
> Signed-off-by: Georgi Djakov
Please Cc dt reviewers.
> ---
> .../devicetree/bindings/clock/qcom,a53-pll.txt | 17
> drivers/clk/qcom/Kconfig
On 10/21, gabriel.fernan...@st.com wrote:
> From: Gabriel Fernandez
>
> This patch adds the QSPI clock for stm32f469 discovery board.
> The gate mapping is a little bit different from stm32f429 soc.
>
> Signed-off-by: Gabriel Fernandez
> ---
Applied to clk-next + added Rob's ack from v2.
--
On 10/21, gabriel.fernan...@st.com wrote:
> From: Gabriel Fernandez
>
> This patch introduces the support of the RTC clock.
> RTC clock can have 3 sources: lsi, lse and hse_rtc.
>
> Signed-off-by: Gabriel Fernandez
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of
On 10/21, gabriel.fernan...@st.com wrote:
> From: Gabriel Fernandez
>
> This patch introduces the support of the LSI & LSE clocks.
> The clock drivers needs to disable the power domain write protection
> using syscon/regmap to enable these clocks.
>
> Signed-off-by: Gabriel Fernandez
> ---
App
The mm-of-the-moment snapshot 2016-10-27-18-27 has been uploaded to
http://www.ozlabs.org/~akpm/mmotm/
mmotm-readme.txt says
README for mm-of-the-moment:
http://www.ozlabs.org/~akpm/mmotm/
This is a snapshot of my -mm patch queue. Uploaded at random hopefully
more than once a week.
You wi
From: Kuninori Morimoto
Current dw-hdmi is supporting sound via AHB bus, but it has
I2S audio feature too. This patch adds I2S audio support to dw-hdmi.
This HDMI I2S is supported by using ALSA SoC common HDMI encoder
driver.
Signed-off-by: Kuninori Morimoto
---
drivers/gpu/drm/bridge/Kconfig
在 2016/10/28 8:25, Stephen Boyd 写道:
> On 10/27, Rob Herring wrote:
>> On Fri, Oct 21, 2016 at 09:37:10AM +0800, Jiancheng Xue wrote:
>>> Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
>>> Generator) module generates clock and reset signals used
>>> by other module blocks on SoC.
>>>
>>>
On 10/21, Erin Lo wrote:
> diff --git a/drivers/clk/mediatek/clk-mt2701-bdp.c
> b/drivers/clk/mediatek/clk-mt2701-bdp.c
> new file mode 100644
> index 000..dbf6ab2
> --- /dev/null
> +++ b/drivers/clk/mediatek/clk-mt2701-bdp.c
> @@ -0,0 +1,148 @@
> +
> +static int mtk_bdpsys_init(struct platfor
da7219 output (for headset capture) should be set to high-impedance when
not in use, since it will otherwise interfere with output from other
codecs attached to the same DAI.
Signed-off-by: Stephen Barber
---
sound/soc/codecs/da7219.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
>From: Arnd Bergmann [mailto:a...@arndb.de]
>On Tuesday, October 25, 2016 4:26:28 PM CEST Sriram Dash wrote:
>> Do not use dma_coerce_mask_and_coherent for hcd.
>>
>> Signed-off-by: Arnd Bergmann
>
>The patch is good, but please follow the usual rules for submitting someone
>else's
>patch:
>
>- A
On Thu, 2016-10-27 at 17:23 -0700, Tushar Dave wrote:
> Add Hypervisor IOMMU v2 APIs pci_iotsb_map(), pci_iotsb_demap() and
> enable sun4v dma ops to use IOMMU v2 API for all PCIe devices with
> 64bit DMA mask.
trivia:
> diff --git a/arch/sparc/kernel/pci_sun4v.c b/arch/sparc/kernel/pci_sun4v.c
[
On 26 October 2016 at 16:53, Dave Airlie wrote:
> Hi Linus,
>
> This is a standalone pull request for the fix for a regression introduced
> in -rc1 by a change to vm_insert_mixed to start using the PAT range tracking
> to validate page protections. With this fix in place, all the VRAM mappings
> f
1 - 100 of 847 matches
Mail list logo
