On 01/11/16 22:10, Luca Abeni wrote:
> Hi Juri,
>
> On Tue, 1 Nov 2016 16:45:43 +
> Juri Lelli wrote:
>
> > Hi,
> >
> > a few nitpicks on subject and changelog and a couple of questions below.
> >
> > Subject should be changed to something like
> >
> > sched/deadline: track the active
On 11/08/2016 12:43 PM, Ross Zwisler wrote:
> On Tue, Nov 08, 2016 at 07:42:59AM -0500, Anna Schumaker wrote:
>> On 11/08/2016 07:09 AM, Jeff Layton wrote:
>>> On Tue, 2016-11-08 at 06:53 -0500, Jeff Layton wrote:
On Mon, 2016-11-07 at 22:42 -0700, Ross Zwisler wrote:
>
> I've got a
On Tue, Nov 08, 2016 at 03:27:23PM +0100, Auger Eric wrote:
> On 08/11/2016 03:45, Will Deacon wrote:
> > Rather than treat these as separate problems, a better interface is to
> > tell userspace about a set of reserved regions, and have this include
> > the MSI doorbell, irrespective of whether
From: Noam Camus
For CONFIG_SERIAL_EARLYCON we need 800MHz for NPS SoC
The early console driver uses BASE_BAUD and not using dtb.
The default of 50MHz is NOT good for NPS SoC.
Signed-off-by: Noam Camus
---
arch/arc/kernel/devtree.c |2 ++
1 files
On Tue, Nov 08, 2016 at 03:27:23PM +0100, Auger Eric wrote:
> On 08/11/2016 03:45, Will Deacon wrote:
> > Rather than treat these as separate problems, a better interface is to
> > tell userspace about a set of reserved regions, and have this include
> > the MSI doorbell, irrespective of whether
From: Noam Camus
For CONFIG_SERIAL_EARLYCON we need 800MHz for NPS SoC
The early console driver uses BASE_BAUD and not using dtb.
The default of 50MHz is NOT good for NPS SoC.
Signed-off-by: Noam Camus
---
arch/arc/kernel/devtree.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
Arnd Bergmann writes:
> The dummy_clk_set_parent function is marked as 'static' but is
> no longer referenced from the pxa25x clk driver after the last use
> of the RATE_RO_OPS() macro is gone from this file, causing a
> harmless build warning:
>
> In file included from
Arnd Bergmann writes:
> The dummy_clk_set_parent function is marked as 'static' but is
> no longer referenced from the pxa25x clk driver after the last use
> of the RATE_RO_OPS() macro is gone from this file, causing a
> harmless build warning:
>
> In file included from
On 11/03/2016 04:33 PM, Vineet Gupta wrote:
> Hi,
>
> This series addresses the long pending move of ARC timer code into
> drivers/clocksource/.
>
> Thx,
> -Vineet
>
> v2 -> v3
>
> - Fixed a bunch of typos in changelogs[Daniel]
>
> - aux.h: stubs for
On 11/03/2016 04:33 PM, Vineet Gupta wrote:
> Hi,
>
> This series addresses the long pending move of ARC timer code into
> drivers/clocksource/.
>
> Thx,
> -Vineet
>
> v2 -> v3
>
> - Fixed a bunch of typos in changelogs[Daniel]
>
> - aux.h: stubs for
On Tue, Nov 08, 2016 at 05:37:25PM +, Sudeep Holla wrote:
>
>
> On 08/11/16 16:06, Russell King - ARM Linux wrote:
> >On Tue, Nov 08, 2016 at 03:40:38PM +, Russell King - ARM Linux wrote:
> >>As it contains a zero sized Image and .dtb files, I tried copying my
> >>Image and .dtb over,
On Tue, 8 Nov 2016 21:56:29 +0530
Kirti Wankhede wrote:
> On 11/8/2016 5:15 AM, Alex Williamson wrote:
> > On Sat, 5 Nov 2016 02:40:45 +0530
> > Kirti Wankhede wrote:
> >
> ...
> >>
> >> +int vfio_register_notifier(struct device *dev, struct
On Tue, Nov 08, 2016 at 05:37:25PM +, Sudeep Holla wrote:
>
>
> On 08/11/16 16:06, Russell King - ARM Linux wrote:
> >On Tue, Nov 08, 2016 at 03:40:38PM +, Russell King - ARM Linux wrote:
> >>As it contains a zero sized Image and .dtb files, I tried copying my
> >>Image and .dtb over,
On Tue, 8 Nov 2016 21:56:29 +0530
Kirti Wankhede wrote:
> On 11/8/2016 5:15 AM, Alex Williamson wrote:
> > On Sat, 5 Nov 2016 02:40:45 +0530
> > Kirti Wankhede wrote:
> >
> ...
> >>
> >> +int vfio_register_notifier(struct device *dev, struct notifier_block *nb)
> >>
> >
> > Is the
On Tue, Nov 08, 2016 at 07:42:59AM -0500, Anna Schumaker wrote:
> On 11/08/2016 07:09 AM, Jeff Layton wrote:
> > On Tue, 2016-11-08 at 06:53 -0500, Jeff Layton wrote:
> >> On Mon, 2016-11-07 at 22:42 -0700, Ross Zwisler wrote:
> >>>
> >>> I've got a virtual machine that has some NFS mounts, and
On Tue, Nov 08, 2016 at 07:42:59AM -0500, Anna Schumaker wrote:
> On 11/08/2016 07:09 AM, Jeff Layton wrote:
> > On Tue, 2016-11-08 at 06:53 -0500, Jeff Layton wrote:
> >> On Mon, 2016-11-07 at 22:42 -0700, Ross Zwisler wrote:
> >>>
> >>> I've got a virtual machine that has some NFS mounts, and
On Mon, Nov 7, 2016 at 12:13 PM, David Matlack wrote:
> On Sun, Nov 6, 2016 at 12:57 PM, Kyle Huey wrote:
>> Hardware support for faulting on the cpuid instruction is not required to
>> emulate it, because cpuid triggers a VM exit anyways. KVM handles the
On Mon, Nov 7, 2016 at 12:13 PM, David Matlack wrote:
> On Sun, Nov 6, 2016 at 12:57 PM, Kyle Huey wrote:
>> Hardware support for faulting on the cpuid instruction is not required to
>> emulate it, because cpuid triggers a VM exit anyways. KVM handles the
>> relevant
>> MSRs (MSR_PLATFORM_INFO
On Mon, Nov 7, 2016 at 2:14 PM, Nicolas Pitre wrote:
> Some embedded systems have no use for them. This removes about
> 22KB from the kernel binary size when configured out.
>
> Corresponding syscalls are routed to a stub logging the attempt to
> use those syscalls
On Mon, Nov 7, 2016 at 2:14 PM, Nicolas Pitre wrote:
> Some embedded systems have no use for them. This removes about
> 22KB from the kernel binary size when configured out.
>
> Corresponding syscalls are routed to a stub logging the attempt to
> use those syscalls which should be enough of a
Hello Shawn,
On 16-10-22 15:43:04, Vladimir Zapolskiy wrote:
> Hi Shawn,
>
> On 10/22/2016 06:25 AM, Shawn Guo wrote:
> > On Mon, Sep 19, 2016 at 10:41:51AM +0530, Sanchayan Maity wrote:
> > > Remove the use of DDC I2C bus bitbang to support reading of EDID
> > > and rely on support from
Hello Shawn,
On 16-10-22 15:43:04, Vladimir Zapolskiy wrote:
> Hi Shawn,
>
> On 10/22/2016 06:25 AM, Shawn Guo wrote:
> > On Mon, Sep 19, 2016 at 10:41:51AM +0530, Sanchayan Maity wrote:
> > > Remove the use of DDC I2C bus bitbang to support reading of EDID
> > > and rely on support from
On Tue, Nov 08, 2016 at 05:20:50PM +, Chris Brandt wrote:
> Since I was CC-ed, I'll add in my opinion:
> While Geert already pointed out the spelling mistake (_in_or_our >>
> _in_or_out), since that function is only just for qspi versions, a better
> function name should have been
On Tue, Nov 08, 2016 at 05:20:50PM +, Chris Brandt wrote:
> Since I was CC-ed, I'll add in my opinion:
> While Geert already pointed out the spelling mistake (_in_or_our >>
> _in_or_out), since that function is only just for qspi versions, a better
> function name should have been
On 08/11/16 16:06, Russell King - ARM Linux wrote:
On Tue, Nov 08, 2016 at 03:40:38PM +, Russell King - ARM Linux wrote:
As it contains a zero sized Image and .dtb files, I tried copying my
Image and .dtb over, and also copied my original config.txt (only
change is AUTORUN: FALSE). It
On 08/11/16 16:06, Russell King - ARM Linux wrote:
On Tue, Nov 08, 2016 at 03:40:38PM +, Russell King - ARM Linux wrote:
As it contains a zero sized Image and .dtb files, I tried copying my
Image and .dtb over, and also copied my original config.txt (only
change is AUTORUN: FALSE). It
On 11/07/2016 06:09 PM, Christoph Hellwig wrote:
> On Mon, Nov 07, 2016 at 06:01:45PM +0300, Andrey Ryabinin wrote:
>>> So because in_atomic doesn't work for !CONFIG_PREEMPT kernels, can we
>>> always defer the work in these cases?
>>>
>>> So for non-preemptible kernels, we always defer:
>>>
>>>
On 11/07/2016 06:09 PM, Christoph Hellwig wrote:
> On Mon, Nov 07, 2016 at 06:01:45PM +0300, Andrey Ryabinin wrote:
>>> So because in_atomic doesn't work for !CONFIG_PREEMPT kernels, can we
>>> always defer the work in these cases?
>>>
>>> So for non-preemptible kernels, we always defer:
>>>
>>>
On the whole, I don't think the zero-length transfers are too
egregiously bad, and all the alternatives seem worse to me.
So why not turn the CS line into GPIO and just toggle the GPIO?
Does that work with *all* SPI controllers?
It does not - no. See my other email.
Arnd Bergmann writes:
> The fresh new serial driver for pxa produces warnings when
> CONFIG_PM_SLEEP is disabled:
>
> drivers/tty/serial/8250/8250_pxa.c:50:12: error: 'serial_pxa_resume' defined
> but not used [-Werror=unused-function]
> drivers/tty/serial/8250/8250_pxa.c:41:12:
On the whole, I don't think the zero-length transfers are too
egregiously bad, and all the alternatives seem worse to me.
So why not turn the CS line into GPIO and just toggle the GPIO?
Does that work with *all* SPI controllers?
It does not - no. See my other email.
Arnd Bergmann writes:
> The fresh new serial driver for pxa produces warnings when
> CONFIG_PM_SLEEP is disabled:
>
> drivers/tty/serial/8250/8250_pxa.c:50:12: error: 'serial_pxa_resume' defined
> but not used [-Werror=unused-function]
> drivers/tty/serial/8250/8250_pxa.c:41:12: error:
Now that we have a driver for the GR8, we can convert our DT to it.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/ntc-gr8.dtsi | 518 +++---
1 file changed, 55 insertions(+), 463 deletions(-)
diff --git
On Tue, 8 Nov 2016, Corinna Vinschen wrote:
On Nov 8 15:06, Cao jin wrote:
When running as guest, under certain condition, it will oops as following.
writel() in igb_configure_tx_ring() results in oops, because hw->hw_addr
is NULL. While other register access won't oops kernel because they
On Tue, Nov 08, 2016 at 08:52:39AM +0100, Martin Willi wrote:
>
>
> Not sure what the exact alignment rules for key/iv are, but maybe we
> want to replace the same function in chacha20_generic.c as well?
>
> Martin
chacha20-generic provides a blkcipher API and sets an alignmask of sizeof(u32)
Now that we have a driver for the GR8, we can convert our DT to it.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/ntc-gr8.dtsi | 518 +++---
1 file changed, 55 insertions(+), 463 deletions(-)
diff --git a/arch/arm/boot/dts/ntc-gr8.dtsi
On Tue, 8 Nov 2016, Corinna Vinschen wrote:
On Nov 8 15:06, Cao jin wrote:
When running as guest, under certain condition, it will oops as following.
writel() in igb_configure_tx_ring() results in oops, because hw->hw_addr
is NULL. While other register access won't oops kernel because they
On Tue, Nov 08, 2016 at 08:52:39AM +0100, Martin Willi wrote:
>
>
> Not sure what the exact alignment rules for key/iv are, but maybe we
> want to replace the same function in chacha20_generic.c as well?
>
> Martin
chacha20-generic provides a blkcipher API and sets an alignmask of sizeof(u32)
The multipliers we've seen so far all had an offset of one. However, on the
earlier Allwinner SoCs, the multipliers could have no offset at all.
Implement an additional field for the multipliers to specify that offset.
Signed-off-by: Maxime Ripard
---
The SoCs part of the sun5i family share the DTs, so we need consistant
indices in order to still share the DTs.
Signed-off-by: Maxime Ripard
---
include/dt-bindings/clock/sun5i-ccu.h | 126 +++-
include/dt-bindings/reset/sun5i-ccu.h |
The multipliers we've seen so far all had an offset of one. However, on the
earlier Allwinner SoCs, the multipliers could have no offset at all.
Implement an additional field for the multipliers to specify that offset.
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi-ng/ccu_div.h | 10
The SoCs part of the sun5i family share the DTs, so we need consistant
indices in order to still share the DTs.
Signed-off-by: Maxime Ripard
---
include/dt-bindings/clock/sun5i-ccu.h | 126 +++-
include/dt-bindings/reset/sun5i-ccu.h | 32 +++-
2 files changed, 158
> >
> > > >
> > > >
> > > > diff --git a/arch/x86/events/intel/uncore_snbep.c
> > > > b/arch/x86/events/intel/uncore_snbep.c
> > > > index 272427700d48..71bc348736bd 100644
> > > > --- a/arch/x86/events/intel/uncore_snbep.c
> > > > +++ b/arch/x86/events/intel/uncore_snbep.c
> > > > @@ -669,7
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi-ng/ccu_mult.h | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu_mult.h b/drivers/clk/sunxi-ng/ccu_mult.h
index 84839641dfdf..524acddfcb2e 100644
---
> From: Arnd Bergmann [mailto:a...@arndb.de]
> The newly introduced rdt_mount function returns an unintialized pointer if
> rdtgroup_create_info_dir() fails:
>
> arch/x86/kernel/cpu/intel_rdt_rdtgroup.c: In function ‘rdt_mount’:
> arch/x86/kernel/cpu/intel_rdt_rdtgroup.c:710:9: error: ‘dentry’
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi-ng/Kconfig | 10 +-
drivers/clk/sunxi-ng/Makefile| 1 +-
drivers/clk/sunxi-ng/ccu-sun5i-a13.c | 681 -
3 files changed, 692 insertions(+), 0 deletions(-)
create
> >
> > > >
> > > >
> > > > diff --git a/arch/x86/events/intel/uncore_snbep.c
> > > > b/arch/x86/events/intel/uncore_snbep.c
> > > > index 272427700d48..71bc348736bd 100644
> > > > --- a/arch/x86/events/intel/uncore_snbep.c
> > > > +++ b/arch/x86/events/intel/uncore_snbep.c
> > > > @@ -669,7
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi-ng/ccu_mult.h | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu_mult.h b/drivers/clk/sunxi-ng/ccu_mult.h
index 84839641dfdf..524acddfcb2e 100644
--- a/drivers/clk/sunxi-ng/ccu_mult.h
+++
> From: Arnd Bergmann [mailto:a...@arndb.de]
> The newly introduced rdt_mount function returns an unintialized pointer if
> rdtgroup_create_info_dir() fails:
>
> arch/x86/kernel/cpu/intel_rdt_rdtgroup.c: In function ‘rdt_mount’:
> arch/x86/kernel/cpu/intel_rdt_rdtgroup.c:710:9: error: ‘dentry’
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi-ng/Kconfig | 10 +-
drivers/clk/sunxi-ng/Makefile| 1 +-
drivers/clk/sunxi-ng/ccu-sun5i-a13.c | 681 -
3 files changed, 692 insertions(+), 0 deletions(-)
create mode 100644
Now that we have drivers for all of them, convert all the SoCs that share
the sun5i DTSI to the new CCU driver.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun5i-a10s.dtsi | 94 +---
arch/arm/boot/dts/sun5i-a13.dtsi | 140 +---
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi-ng/Kconfig | 10 +-
drivers/clk/sunxi-ng/Makefile| 1 +-
drivers/clk/sunxi-ng/ccu-sun5i-gr8.c | 684 -
3 files changed, 695 insertions(+), 0 deletions(-)
create
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi-ng/Kconfig | 10 +-
drivers/clk/sunxi-ng/Makefile| 1 +-
drivers/clk/sunxi-ng/ccu-sun5i-gr8.c | 684 -
3 files changed, 695 insertions(+), 0 deletions(-)
create mode 100644
Now that we have drivers for all of them, convert all the SoCs that share
the sun5i DTSI to the new CCU driver.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun5i-a10s.dtsi | 94 +---
arch/arm/boot/dts/sun5i-a13.dtsi | 140 +---
arch/arm/boot/dts/sun5i-r8.dtsi | 10 +-
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi-ng/Kconfig | 10 +-
drivers/clk/sunxi-ng/Makefile | 1 +-
drivers/clk/sunxi-ng/ccu-sun5i-a10s.c | 755 +++-
drivers/clk/sunxi-ng/ccu-sun5i.h | 129 +-
4 files
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi-ng/Kconfig | 10 +-
drivers/clk/sunxi-ng/Makefile | 1 +-
drivers/clk/sunxi-ng/ccu-sun5i-a10s.c | 755 +++-
drivers/clk/sunxi-ng/ccu-sun5i.h | 129 +-
4 files changed, 895 insertions(+), 0
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi-ng/ccu_nkm.c | 17 ++---
drivers/clk/sunxi-ng/ccu_nkm.h | 2 ++
2 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
index
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi-ng/ccu_nkm.c | 17 ++---
drivers/clk/sunxi-ng/ccu_nkm.h | 2 ++
2 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
index 9b840a47a94d..fd3c6a9d987c 100644
Thanks!
Reviewed-by: Sinclair Yeh
On Tue, Nov 08, 2016 at 05:30:31PM +0530, Ravikant Bijendra Sharma wrote:
> From: Ravikant B Sharma
>
> Replace direct comparisons to NULL i.e.
> 'x == NULL' with '!x'. As per coding standard.
>
> Signed-off-by:
Thanks!
Reviewed-by: Sinclair Yeh
On Tue, Nov 08, 2016 at 05:30:31PM +0530, Ravikant Bijendra Sharma wrote:
> From: Ravikant B Sharma
>
> Replace direct comparisons to NULL i.e.
> 'x == NULL' with '!x'. As per coding standard.
>
> Signed-off-by: Ravikant B Sharma
> ---
>
Hi,
This is yet another serie bringing more SoCs into the sunxi-ng world.
This is pretty common stuff. Dealing with more corner cases, and adding the
drivers for the SoCs. The A10 and A20 should be pretty close, and pretty
easy to support after that.
Let me know what you think,
Maxime
Maxime
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi-ng/ccu_mult.c | 8
drivers/clk/sunxi-ng/ccu_mult.h | 2 ++
2 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu_mult.c b/drivers/clk/sunxi-ng/ccu_mult.c
index
Hi,
This is yet another serie bringing more SoCs into the sunxi-ng world.
This is pretty common stuff. Dealing with more corner cases, and adding the
drivers for the SoCs. The A10 and A20 should be pretty close, and pretty
easy to support after that.
Let me know what you think,
Maxime
Maxime
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi-ng/ccu_mult.c | 8
drivers/clk/sunxi-ng/ccu_mult.h | 2 ++
2 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu_mult.c b/drivers/clk/sunxi-ng/ccu_mult.c
index 678b6cb49f01..826302464650 100644
---
Since I was CC-ed, I'll add in my opinion:
While Geert already pointed out the spelling mistake (_in_or_our >>
_in_or_out), since that function is only just for qspi versions, a better
function name should have been "qspi_pio_transfer_in_or_out"
However
On 11/8/2016, Arnd Bergmann
Since I was CC-ed, I'll add in my opinion:
While Geert already pointed out the spelling mistake (_in_or_our >>
_in_or_out), since that function is only just for qspi versions, a better
function name should have been "qspi_pio_transfer_in_or_out"
However
On 11/8/2016, Arnd Bergmann
The libhugetlbfs meets several failures since the following functions
do not use the correct address:
huge_ptep_get_and_clear()
huge_ptep_set_access_flags()
huge_ptep_set_wrprotect()
huge_ptep_clear_flush()
This patch fixes the wrong address for them.
Signed-off-by: Huang Shijie
The libhugetlbfs meets several failures since the following functions
do not use the correct address:
huge_ptep_get_and_clear()
huge_ptep_set_access_flags()
huge_ptep_set_wrprotect()
huge_ptep_clear_flush()
This patch fixes the wrong address for them.
Signed-off-by: Huang Shijie
---
(1) Backgroud
For the arm64, the hugetlb page size can be 32M (PMD + Contiguous bit).
In the 4K page environment, the max page order is 10 (max_order - 1),
so 32M page is the gigantic page.
The arm64 MMU supports a Contiguous bit which is a hint that the PTE
is one of a set of
(1) Backgroud
For the arm64, the hugetlb page size can be 32M (PMD + Contiguous bit).
In the 4K page environment, the max page order is 10 (max_order - 1),
so 32M page is the gigantic page.
The arm64 MMU supports a Contiguous bit which is a hint that the PTE
is one of a set of
[ +PeterZ who should've been cc'd but doesn't show up in get_maintainers ]
Punit Agrawal writes:
> Hi,
>
> This is the fourth posting of this series. The biggest change compared
> to previous vesion is the addition of support for ARM hosts. With the
> addition of ARM
[ +PeterZ who should've been cc'd but doesn't show up in get_maintainers ]
Punit Agrawal writes:
> Hi,
>
> This is the fourth posting of this series. The biggest change compared
> to previous vesion is the addition of support for ARM hosts. With the
> addition of ARM support, the patchset is
On Tue, 8 Nov 2016 17:51:33 +0100
Peter Zijlstra wrote:
> You really should already know this.
I know what we want to do, but there's some momentous problems that
need to be solved first. Until then, we may be forced to continue with
hacks.
>
> As stands the current rt
On Tue, 8 Nov 2016 17:51:33 +0100
Peter Zijlstra wrote:
> You really should already know this.
I know what we want to do, but there's some momentous problems that
need to be solved first. Until then, we may be forced to continue with
hacks.
>
> As stands the current rt cgroup code (and all
Hi Marek,
Should be this way for the sake of readability, fix globally:
struct spi_transfer assert_cs_then_reset_delay = {
.cs_change= 1,
.delay_usecs= ICE40_SPI_FPGAMGR_RESET_DELAY
};
Sure ok. Personally, I prefer it to be concise, but I'm happy to accept
the
Hi Marek,
Should be this way for the sake of readability, fix globally:
struct spi_transfer assert_cs_then_reset_delay = {
.cs_change= 1,
.delay_usecs= ICE40_SPI_FPGAMGR_RESET_DELAY
};
Sure ok. Personally, I prefer it to be concise, but I'm happy to accept
the
On Tue, Nov 08, 2016 at 06:04:15PM +0100, Peter Zijlstra wrote:
> On Tue, Nov 08, 2016 at 05:09:16PM +0100, Daniel Vetter wrote:
> > > Now, I know you're working on getting rid of this entirely for i915, but
> > > what about that MSM driver? Will we continue to need it there, is
> > > anybody
On Tue, Nov 08, 2016 at 06:04:15PM +0100, Peter Zijlstra wrote:
> On Tue, Nov 08, 2016 at 05:09:16PM +0100, Daniel Vetter wrote:
> > > Now, I know you're working on getting rid of this entirely for i915, but
> > > what about that MSM driver? Will we continue to need it there, is
> > > anybody
On Tue, Nov 08, 2016 at 05:19:54PM +0100, Arnd Bergmann wrote:
> On Tuesday, November 8, 2016 11:49:53 AM CET Mark Rutland wrote:
> > My understanding of ISA (which may be flawed) is that it's not part of
> > the PCI host bridge, but rather on x86 it happens to share the IO space
> > with PCI.
>
On Tue, Nov 08, 2016 at 05:19:54PM +0100, Arnd Bergmann wrote:
> On Tuesday, November 8, 2016 11:49:53 AM CET Mark Rutland wrote:
> > My understanding of ISA (which may be flawed) is that it's not part of
> > the PCI host bridge, but rather on x86 it happens to share the IO space
> > with PCI.
>
Since commit 4bcc595ccd80 ("printk: reinstate KERN_CONT for printing
continuation lines") the output from __do_page_fault on MIPS has been
pretty unreadable due to the lack of KERN_CONT markers. Use pr_cont
to provide the appropriate markers & restore the expected output.
Signed-off-by: Matt
Since commit 4bcc595ccd80 ("printk: reinstate KERN_CONT for printing
continuation lines") the output from __do_page_fault on MIPS has been
pretty unreadable due to the lack of KERN_CONT markers. Use pr_cont
to provide the appropriate markers & restore the expected output.
Signed-off-by: Matt
On Mon, 7 Nov 2016, kan.li...@intel.com wrote:
> There are several PCI IDs are missed for Intel SkyLake IMC.
There are ... are ???
> This patch adds the PCI IDs for SkyLake Y, U, H and S platforms.
"This patch" is just a bad habit. We already know that this is a patch. See
On Mon, 7 Nov 2016, kan.li...@intel.com wrote:
> There are several PCI IDs are missed for Intel SkyLake IMC.
There are ... are ???
> This patch adds the PCI IDs for SkyLake Y, U, H and S platforms.
"This patch" is just a bad habit. We already know that this is a patch. See
Marek,
On Mon, Nov 7, 2016 at 10:53 AM, Marek Vasut wrote:
>> On the whole, I don't think the zero-length transfers are too
>> egregiously bad, and all the alternatives seem worse to me.
>
> So why not turn the CS line into GPIO and just toggle the GPIO?
Does that work with
On 08/11/2016 16:49, Will Deacon wrote:
On Tue, Nov 08, 2016 at 04:33:44PM +, John Garry wrote:
On 08/11/2016 16:12, Will Deacon wrote:
On Tue, Nov 08, 2016 at 11:47:07AM +0800, zhichang.yuan wrote:
+static inline void arm64_set_extops(struct extio_ops *ops)
+{
+ if (ops)
+
Marek,
On Mon, Nov 7, 2016 at 10:53 AM, Marek Vasut wrote:
>> On the whole, I don't think the zero-length transfers are too
>> egregiously bad, and all the alternatives seem worse to me.
>
> So why not turn the CS line into GPIO and just toggle the GPIO?
Does that work with *all* SPI
On 08/11/2016 16:49, Will Deacon wrote:
On Tue, Nov 08, 2016 at 04:33:44PM +, John Garry wrote:
On 08/11/2016 16:12, Will Deacon wrote:
On Tue, Nov 08, 2016 at 11:47:07AM +0800, zhichang.yuan wrote:
+static inline void arm64_set_extops(struct extio_ops *ops)
+{
+ if (ops)
+
On Tue, 8 Nov 2016 20:36:34 +0530
Kirti Wankhede wrote:
> On 11/8/2016 4:46 AM, Alex Williamson wrote:
> > On Sat, 5 Nov 2016 02:40:44 +0530
> > Kirti Wankhede wrote:
> >
> ...
>
> >> -static void vfio_unmap_unpin(struct vfio_iommu *iommu, struct
On Tue, 8 Nov 2016 20:36:34 +0530
Kirti Wankhede wrote:
> On 11/8/2016 4:46 AM, Alex Williamson wrote:
> > On Sat, 5 Nov 2016 02:40:44 +0530
> > Kirti Wankhede wrote:
> >
> ...
>
> >> -static void vfio_unmap_unpin(struct vfio_iommu *iommu, struct vfio_dma
> >> *dma)
> >> +static int
On Tue, Nov 08, 2016 at 04:22:13PM +, Liang, Kan wrote:
>
>
> > >
> > >
> > > diff --git a/arch/x86/events/intel/uncore_snbep.c
> > > b/arch/x86/events/intel/uncore_snbep.c
> > > index 272427700d48..71bc348736bd 100644
> > > --- a/arch/x86/events/intel/uncore_snbep.c
> > > +++
On Tue, Nov 08, 2016 at 04:22:13PM +, Liang, Kan wrote:
>
>
> > >
> > >
> > > diff --git a/arch/x86/events/intel/uncore_snbep.c
> > > b/arch/x86/events/intel/uncore_snbep.c
> > > index 272427700d48..71bc348736bd 100644
> > > --- a/arch/x86/events/intel/uncore_snbep.c
> > > +++
On Tue, 8 Nov 2016, Tan Jui Nee wrote:
> There is already one and at least one more user coming which
> require an access to Primary to Sideband bridge (P2SB) in order
> to get IO or MMIO bar hidden by BIOS.
> Create a driver to access P2SB for x86 devices.
>
> arch/x86/Kconfig |
On Tue, 8 Nov 2016, Tan Jui Nee wrote:
> There is already one and at least one more user coming which
> require an access to Primary to Sideband bridge (P2SB) in order
> to get IO or MMIO bar hidden by BIOS.
> Create a driver to access P2SB for x86 devices.
>
> arch/x86/Kconfig |
On Tue, Nov 08, 2016 at 05:09:16PM +0100, Daniel Vetter wrote:
> > Now, I know you're working on getting rid of this entirely for i915, but
> > what about that MSM driver? Will we continue to need it there, is
> > anybody actually maintaining that thing?
>
> Rob Clark is, and since he's a one-man
On Tue, Nov 08, 2016 at 05:09:16PM +0100, Daniel Vetter wrote:
> > Now, I know you're working on getting rid of this entirely for i915, but
> > what about that MSM driver? Will we continue to need it there, is
> > anybody actually maintaining that thing?
>
> Rob Clark is, and since he's a one-man
> -Original Message-
> From: Long Li
> Sent: Tuesday, November 8, 2016 8:57 AM
> To: Greg KH
> Cc: KY Srinivasan ; Haiyang Zhang
> ; Bjorn Helgaas ;
> de...@linuxdriverproject.org;
> -Original Message-
> From: Long Li
> Sent: Tuesday, November 8, 2016 8:57 AM
> To: Greg KH
> Cc: KY Srinivasan ; Haiyang Zhang
> ; Bjorn Helgaas ;
> de...@linuxdriverproject.org; linux-kernel@vger.kernel.org; linux-
> p...@vger.kernel.org
> Subject: RE: [Resend] [PATCH] pci-hyperv:
On Tue, Nov 08, 2016 at 05:09:16PM +0100, Daniel Vetter wrote:
> > You're talking about:
> >
> > lkml.kernel.org/r/20161007154351.gl3...@twins.programming.kicks-ass.net
> >
> > ? I got no feedback from you DRM guys on that so I kinda forgot about
> > that in the hope we'd not have to do this
On Tue, Nov 08, 2016 at 05:09:16PM +0100, Daniel Vetter wrote:
> > You're talking about:
> >
> > lkml.kernel.org/r/20161007154351.gl3...@twins.programming.kicks-ass.net
> >
> > ? I got no feedback from you DRM guys on that so I kinda forgot about
> > that in the hope we'd not have to do this
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