On the Banana Pi M2 Berry board, the 5V power output (used by HDMI, SATA
and USB) is controlled via a GPIO.
Add regulator node for it.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dt
On Fri, 13 Oct 2017, Joe Lawrence wrote:
> Provide livepatch modules a klp_object (un)patching notification
> mechanism. Pre and post-(un)patch callbacks allow livepatch modules to
> setup or synchronize changes that would be difficult to support in only
> patched-or-unpatched code contexts.
>
>
On Tue, Oct 17, 2017 at 04:05:42PM +0800, Huacai Chen wrote:
> In non-coherent DMA mode, kernel uses cache flushing operations to
> maintain I/O coherency, so in ata_do_dev_read_id() the DMA buffer
> should be aligned to ARCH_DMA_MINALIGN. Otherwise, If a DMA buffer
> and a kernel structure share a
On Tue, Oct 17, 2017 at 04:30:41AM -0400, Pankaj Gupta wrote:
>
> > > Are you saying do it as existing i.e ACPI pmem like interface?
> > > The reason we have created this new driver is exiting pmem driver
> > > does not define proper semantics for guest flushing requests.
> >
> > At this point I'
Rob Herring wrote on Tue [2017-Oct-17 16:00:51 -0500]:
> On Thu, Oct 12, 2017 at 02:27:17PM -0500, Benoit Parrot wrote:
> > Device Tree bindings for the Video Processing Engine (VPE) driver.
> >
> > Signed-off-by: Benoit Parrot
> > ---
> > Documentation/devicetree/bindings/media/ti-vpe.txt | 41
On Wed, 18 Oct 2017, Gratian Crisan wrote:
> Hi Thomas,
>
> Is there additional info on the address of the venue. The wiki links to
> the Czech Technical University web page, however from what I can tell
> there are multiple faculty buildings in that area of Prague.
It's updated already and we'l
Hi,
On 17/10/17 14:03, Philipp Zabel wrote:
> Add reset line status readback, inverted status support, and socfpga
> device tree quirks to the simple reset driver, and use it to replace
> the socfpga driver.
>
> Signed-off-by: Philipp Zabel
> ---
> Changes since v3:
> - Rebased onto reset/next
On 18/10/2017 14:19, Brijesh Singh wrote:
>> Is it needed to test mem_enc_enabled? Could it instead test for the
>> availability of decode assists?
>
> We can use X86_FEATURE_DECODEASSIST but since mmu.c is common file hence
> I was not sure if its safe for the VMX. Is it okay to use decode assis
16 bits timers aren't accurate enough to be used as
clocksource, remove them from stm32f4 and stm32f7 devicetree.
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32f429.dtsi | 32
arch/arm/boot/dts/stm32f746.dtsi | 32
2
Rework driver code to be able to implement clocksource and clockevent
on the same hardware block.
Before this patch only the counter of the hardware block was used to
generate clock events. Now counter will be used to provide a 32 bits
clock source and a comparator will provide clock events.
Signe
Hi Thunder,
On Tue, Sep 12, 2017 at 09:00:36PM +0800, Zhen Lei wrote:
> Because all TLBI commands should be followed by a SYNC command, to make
> sure that it has been completely finished. So we can just add the TLBI
> commands into the queue, and put off the execution until meet SYNC or
> other c
On Tue, Sep 12, 2017 at 09:00:37PM +0800, Zhen Lei wrote:
> This patch is base on:
> (add02cfdc9bc2 "iommu: Introduce Interface for IOMMU TLB Flushing")
>
> Because iotlb_sync is moved out of ".unmap = arm_smmu_unmap", some interval
> ".unmap" calls should explicitly followed by a iotlb_sync oper
From: "Gustavo A. R. Silva"
Date: Mon, 16 Oct 2017 15:48:55 -0500
> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
> where we are expecting to fall through.
>
> Notice that in some cases I placed the "fall through" comment
> on its own line, which is what GCC is expecting t
Convert driver to use timer_of helpers. This allow to remove
custom proprietary structure.
Increase min delta value because if it is too small it could
generate too much interrupts and the system will not be able
to catch them all.
Signed-off-by: Benjamin Gaignard
---
drivers/clocksource/Kconfi
16 bits hardware are not enough accure to be used.
Do no allow them to be probed by tested max counter value.
Signed-off-by: Benjamin Gaignard
---
drivers/clocksource/timer-stm32.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/clocksourc
From: SF Markus Elfring
> Unpleasant consequences are possible in both cases.
> >> How much do you care to reduce the failure probability further?
> >
> > Zero.
>
> I am interested to improve the software situation a bit more here.
There are probably better places to spend your time!
If you
Add this deinit function to be able to undo what have been done
in timer_of_init().
Signed-off-by: Benjamin Gaignard
---
drivers/clocksource/timer-of.c | 12
drivers/clocksource/timer-of.h | 3 +++
2 files changed, 15 insertions(+)
diff --git a/drivers/clocksource/timer-of.c b/dri
version 6:
- add timer_of_deinit function in core
- rework failure cases in probe function
version 5:
- rebase on top of timer/core branch
- rework commit message of the first patch
version 4:
- split patch in 3 parts
- convert code to timer_of
- only use 32 bits timers
- add clocksource su
From: "Gustavo A. R. Silva"
Date: Mon, 16 Oct 2017 15:11:22 -0500
> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
> where we are expecting to fall through.
>
> Signed-off-by: Gustavo A. R. Silva
Applied.
On 18/10/2017 at 19:12:06 +0800, Yingjoe Chen wrote:
> On Tue, 2017-10-17 at 17:40 +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang
> >
> > This patch introduces the driver for the RTC on MT7622 SoC.
> >
> > Signed-off-by: Sean Wang
> > ---
> > drivers/rtc/Kconfig | 10 ++
> > dr
igafb driver hasn't compiled since at least kernel v2.6.34 as
commit 6016a363f6b5 ("of: unify phandle name in struct device_node")
missed updating igafb.c to use dp->phandle instead of dp->node.
Cc: "David S. Miller"
Cc: Bhumika Goyal
Signed-off-by: Bartlomiej Zolnierkiewicz
---
drivers/video/
+CC Mel who added that code (long time ago though :) in case he
remembers some catch.
On 10/18/2017 12:30 AM, David Rientjes wrote:
> SLAB_RECLAIM_ACCOUNT is a permanent attribute of a slab cache. Set
> __GFP_RECLAIMABLE as part of its ->allocflags rather than check the cachep
> flag on every p
Please send patch series with git's sendemail.thread=shallow and
sendemail.chainReplyTo=false settings (see the man git-send-email
--thread option for an explanation of the different settings).
That way email clients treat the entire series as a single email thread.
Patch management and continuous
> Am 18.10.2017 um 14:28 schrieb Pavel Machek :
>
> Hi!
>
>>> Without patch description: See Last Question in
>>>
>>> Documentation/power/power_supply_class.txt
>>
>> ...should be done in libbattery, yet to be written. :-).
>>
>> Do you have specific guidance what you'd like to see in libbatt
On Wed, Oct 18, 2017 at 1:34 PM, Colin King wrote:
> From: Colin Ian King
>
> Variable dropping is set but never read and hence is redundant
> and can be removed. Cleans up clang warning:
>
> fs/ceph/caps.c:1170:2: warning: Value stored to 'dropping' is never read
>
> Signed-off-by: Colin Ian Kin
2017-10-18 12:13 GMT+02:00 Marc Zyngier :
>
[snip!]
> It looks to me that this is all because the irq_sim creation is a bit awkward.
> You end-up with all kind of exotic interfaces because you don't know the base
> of the irq range at creation time.
>
> How about something like this:
>
> diff --g
On Odroid XU3/4 and other Exynos5422 based boards there is a case, that
different devices on the board are supplied by different regulators
with non-fixed voltages. If one of these devices temporarily requires
higher voltage, there might occur a situation that the spread between
two devices' voltag
Some regulators require keeping their voltage spread below defined
max_spread.
Add properties to provide information on regulators' coupling.
Signed-off-by: Maciej Purski
---
Documentation/devicetree/bindings/regulator/regulator.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Docume
On Odroid XU3/4 and other Exynos5422 based boards there is a case, that
different devices on the board are supplied by different regulators
with non-fixed voltages. If one of these devices temporarily requires
higher voltage, there might occur a situation that the spread between
devices' voltages i
Hi all,
this patchset adds a new mechanism to the framework - regulators' coupling.
On Odroid XU3/4 and other Exynos5422 based boards there is a case, that
different devices on the board are supplied by different regulators
with non-fixed voltages. If one of these devices temporarily requires
hi
On Mon, Oct 09, 2017 at 11:45:17AM +0200, Peter Zijlstra wrote:
> On Mon, Oct 09, 2017 at 09:08:57AM +0100, Morten Rasmussen wrote:
> > > --- a/kernel/sched/debug.c
> > > +++ b/kernel/sched/debug.c
> > > @@ -565,6 +565,8 @@ void print_cfs_rq(struct seq_file *m, in
> > > cfs_rq->re
From: Madalin Bucur
Date: Mon, 16 Oct 2017 21:36:04 +0300
> Junote Cai reported that he was not able to get a DSA setup involving the
> DPAA/FMAN driver to work and narrowed it down to of_find_net_device_by_node()
> call in DSA setup. The initial attempt to fix this by adding of_node to the
> pla
On 09/21/2017 02:48 AM, Franklin S Cooper Jr wrote:
>
>
> On 09/20/2017 04:37 PM, Mario Hüttel wrote:
>>
>>
>> On 09/20/2017 10:19 PM, Franklin S Cooper Jr wrote:
>>> Hi Wenyou,
>>>
>>> On 09/17/2017 10:47 PM, Yang, Wenyou wrote:
On 2017/9/14 13:06, Sekhar Nori wrote:
> On Thursday
> On Oct 4, 2017, at 7:22 PM, Ben Hutchings
> wrote:
>
> On Tue, 2017-09-19 at 12:30 +0400, Ilya Matveychikov wrote:
>> Hi guys,
>>
>> Please review the approach of using small fixed-sized arrays to improve
>> parsing of values like get_options() does.
>>
>> This comes to me after fixing an o
On Wed, Oct 18, 2017 at 10:48:32AM +, Srividya Desireddy wrote:
> +static void zswap_fill_page(void *ptr, unsigned long value)
> +{
> + unsigned int pos;
> + unsigned long *page;
> +
> + page = (unsigned long *)ptr;
> + if (value == 0)
> + memset(page, 0, PAGE_SIZE);
[...]
>> Are there any major reasons why the appended patch (obviously untested) won't
>> work, then?
>
> OK, there is a reason, which is the optimizations bundled into
> pm_runtime_force_*, because (a) the device may be left in runtime suspend
> by them (in which case amba_pm_suspend_early() in m
On Thursday 12 October 2017 11:49 AM, Vivek Gautam wrote:
> Refactoring the qcom-ufs phy and host controller code to move
> further towards the generic phy usage. Right now the qcom-ufs exports
> a bunch of APIs that are used by the host controller to initialize
> the phy.
> With this patch serie
On Thu, Oct 05, 2017 at 03:16:42PM +0530, Srishti Sharma wrote:
> This is a cleanup patch and doesn't change runtime behavior. It
> changes an open coded list traversal to use list_for_each_entry_safe.
> Done using the following semantic patch by coccinelle.
You have sent me two different patches
Hi!
> > Without patch description: See Last Question in
> >
> > Documentation/power/power_supply_class.txt
>
> ...should be done in libbattery, yet to be written. :-).
>
> Do you have specific guidance what you'd like to see in libbattery?
So I started something, it is at.
https://github.com/
On 2017/10/18 18:17, Borislav Petkov wrote:
> On Wed, Oct 18, 2017 at 11:04:28AM +0800, gengdongjiu wrote:
>> ARM does not have ACPI_HEST_NOTIFY_NMI notification, which should only
>> used by x86. In the code, I see those guards are never used.
> Yeah, I see it now.
Borislav/Rafael,
For this pa
2017-10-18 10:21 GMT+02:00 Julien Thierry :
>
>
> On 18/10/17 08:43, Benjamin Gaignard wrote:
>>
>> 16 bits hardware are not enough accure to be used.
>> Do no allow them to be probed by tested max counter value.
>>
>> Signed-off-by: Benjamin Gaignard
>> ---
>> drivers/clocksource/timer-stm32.c
Kees Cook writes:
> On Tue, Oct 17, 2017 at 5:29 AM, Michael Ellerman wrote:
>> Nicholas Piggin writes:
>>
>>> On Mon, 16 Oct 2017 16:47:10 -0700
>>> Kees Cook wrote:
>>>
In preparation for unconditionally passing the struct timer_list pointer to
all timer callbacks, switch to using
Em Wed, Oct 18, 2017 at 07:54:13PM +0800, 禹舟键 escreveu:
> Hi, Arnaldo
> I have done it as you said in v1 patch, but David had told me to separate
> the patch :"Makes all those related functions receive the FILE pointer" to
> two patches. Below is his opinion.
>
> On 9/13/17 9:10 AM, yuzhoujian wr
在 2017-10-16 20:06，Maxime Ripard 写道：
On Mon, Oct 16, 2017 at 05:39:58PM +0800, icen...@aosc.io wrote:
在 2017-10-16 17:32，Maxime Ripard 写道：
> On Tue, Oct 10, 2017 at 07:24:28AM +0800, Icenowy Zheng wrote:
> > >> +interrupts = ;
> > >> +clocks = <&ccu CLK_BU
Em Wed, Oct 18, 2017 at 04:34:09PM +0800, Li Zhijian escreveu:
> at debian/ubuntu, libc.so is located at /lib/x86_64-linux-gnu/libc-2.23.so
> it outputs like when testing:
> ---
Thanks, tested and applied.
- Arnaldo
> PING ::1(::1) 56 data bytes
> 64 bytes from ::1: icmp_seq=1 ttl=64
Hi Paolo,
On 10/18/17 4:26 AM, Paolo Bonzini wrote:
> On 04/10/2017 15:17, Brijesh Singh wrote:
>> +/*
>> + * On AMD platforms, under certain conditions insn_len may be zero on
>> #NPF.
>> + * This can happen if a guest gets a page-fault on data access but the
>> HW
>> + * table
On Thursday 12 October 2017 06:23 AM, Florian Fainelli wrote:
> Hi Kishon,
>
> This patch series allows the tuning of the PHY RX equalizer which may
> be necessary for particular board designs to pass compliance testing.
>
> This is based off your next branch.
>
> Please apply!
merged, thanks
Add edp panel and enable related nodes on kevin.
Signed-off-by: Jeffy Chen
Reviewed-by: Mark Yao
---
Changes in v5: None
arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts | 29 +++
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 16 +
2 files changed, 45 i
Hi!
I've got the following report while fuzzing the kernel with syzkaller.
On commit 3e0cc09a3a2c40ec1ffb6b4e12da86e98feccb11 (4.14-rc5+).
Looks like usb_get_bos_descriptor() doesn't check that buffer has
enough space for usb_dev_cap_header, which causes out-of-bounds
accesses.
Hi,
I saw the patches were tracked in
https://bugzilla.redhat.com/show_bug.cgi?id=CVE-2012-4542,
but I couldn't find them in upstream from https://lkml.org/lkml/2013/1/24/279.
Could anyone give some help on this and if they are in upstream?
If yes, what are the commits?
Thanks a lot!
QingFeng Ha
Hi,
On Tuesday 10 October 2017 01:29 PM, Roger Quadros wrote:
> On 10/10/17 10:42, Kishon Vijay Abraham I wrote:
>> Roger,
>>
>> On Tuesday 10 October 2017 12:49 PM, Roger Quadros wrote:
>>> On 09/10/17 12:03, Kishon Vijay Abraham I wrote:
PCI core access configuration space registers in resu
Add missing pm_runtime_disable() in bind()'s error handling path.
Also cleanup encoder & connector in unbind().
Fixes: 80a9a059d4e4 ("drm/rockchip/dsi: add dw-mipi power domain support")
Signed-off-by: Jeffy Chen
---
Changes in v5:
Call the destroy hook in the error handling path like in unbind
Let plat drivers own the drvdata, so that they could cleanup resources
in their unbind().
Signed-off-by: Jeffy Chen
---
Changes in v5: None
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 43 ++---
drivers/gpu/drm/imx/dw_hdmi-imx.c | 22 +--
drivers/
We inited connector in attach(), so need a detach() to cleanup.
Also fix wrong use of dw_hdmi_remove() in bind().
Signed-off-by: Jeffy Chen
---
Changes in v5: None
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/g
From: Colin Ian King
The setting of newval to zero is redundant as the following if/else
stanzas will always update newval to a new value. Remove the
redundant setting, cleans up clang build warning:
drivers/hwmon/asc7621.c:582:2: warning: Value stored to 'newval' is
never read
Signed-off-by: C
Add missing clk_disable_unprepare() in bind()'s error handling path and
unbind().
Also inline clk_prepare_enable() with bind().
Fixes: 12b9f204e804 ("drm: bridge/dw_hdmi: add rockchip rk3288 support")
Signed-off-by: Jeffy Chen
---
Changes in v5:
Add disable to unbind(), and inline clk_prepare_e
Remove unnecessary init code, since we would do it in the power_on()
callback.
Also move of parse code to probe().
Fixes: 9e32e16e9e98 ("drm: rockchip: dp: add rockchip platform dp driver")
Signed-off-by: Jeffy Chen
---
Changes in v5: None
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 27
Add missing error handling in bind().
Fixes: 412d4ae6b7a5 ("drm/rockchip: hdmi: add Innosilicon HDMI support")
Signed-off-by: Jeffy Chen
---
Changes in v5:
Call the destroy hook in the error handling path like in unbind().
Update cleanup order in unbind().
drivers/gpu/drm/rockchip/inno_hdmi.c
Since we are initing connector in the core driver and encoder in the
plat driver, let's clean them up in the right places.
Signed-off-by: Jeffy Chen
---
Changes in v5: None
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 2 --
drivers/gpu/drm/exynos/exynos_dp.c | 7 +
The driver that instantiates the bridge should own the drvdata, as all
driver model callbacks (probe, remove, shutdown, PM ops, etc.) are also
owned by its driver struct. Moreover, storing two different pointer
types in driver data depending on driver initialization status is barely
a good practice
Em Wed, Oct 18, 2017 at 05:20:46PM +0530, Ravi Bangoria escreveu:
> I see 'perf record -p ' crashes with following log:
I just applied the same patch, coming from Jin Yao, thanks! I'll add a
reported-by you there,
- Arnaldo
>*** Error in `./perf': free(): invalid next size (normal):
> 0x00
On Wednesday 18 October 2017 01:01 AM, Bjorn Helgaas wrote:
> On Mon, Oct 09, 2017 at 02:33:36PM +0530, Kishon Vijay Abraham I wrote:
>> This was supposed to only update ti-pipe3 PHY registers. However because
>> of the way the ti-pipe3 PHY, OCP2SCP and PCIe controller are connected
>> in dra7xx
Unpleasant consequences are possible in both cases.
>> How much do you care to reduce the failure probability further?
>
> Zero.
I am interested to improve the software situation a bit more here.
Regards,
Markus
Em Wed, Oct 18, 2017 at 10:12:51AM +0200, Jiri Olsa escreveu:
> On Wed, Oct 18, 2017 at 11:11:18PM +0800, Jin Yao wrote:
>
> SNIP
>
> > This change is introduced by "475fb533fb7d"
> > ("perf evsel: Fix buffer overflow while freeing events")
> >
> > This fix is to let xyarray__max_x() return max_
Hi Tim,
Here is my review of this v2:
On 10/12/17 06:45, Tim Harvey wrote:
> Add support for the TDA1997x HDMI receivers.
>
> Cc: Hans Verkuil
> Signed-off-by: Tim Harvey
> ---
> v2:
> - implement dv timings enum/cap
> - remove deprecated g_mbus_config op
> - fix dv_query_timings
> - add E
On Sat, Oct 14, 2017 at 08:17:54PM +0530, Kamalesh Babulal wrote:
> Print top-level objtool commands, along with the error on incorrect
> command line usage. Objtool command line parser exit's with code 129,
> for incorrect usage. Convert the cmd_usage() exit code also, to maintain
> consistency ac
On Thursday 12 October 2017 12:04 PM, Yoshihiro Shimoda wrote:
> This patch set is based on the latest phy.git / next branch
> (the commit id = 415060b21f318e009d865b4bcbf8f220ebc36964)
>
> After this patch set is applied, a usb 2.0 host node that is combined
> with usb 2.0 peripheral needs 'dr_
On 18 October 2017 at 02:39, Rafael J. Wysocki wrote:
> On Tuesday, October 17, 2017 9:41:16 PM CEST Ulf Hansson wrote:
>
> [cut]
>
>> >
>> >> deploying this and from a middle layer point of view, all the trivial
>> >> cases supports this.
>> >
>> > These functions are wrong, however, because they
Provide a couple of functions to allow cleaner handling of signals in a
kernel service. They are:
(1) rxrpc_kernel_get_rtt()
This allows the kernel service to find out the RTT time for a call, so
as to better judge how large a timeout to employ.
Note, though, that whilst this re
s.git
rxrpc-next-20171018
David
---
David Howells (3):
rxrpc: Support service upgrade from a kernel service
rxrpc: Provide functions for allowing cleaner handling of signals
rxrpc: Use MSG_WAITALL to tell sendmsg() to temporarily ignore signals
Documentation/networking/rxrpc.txt |
Make AF_RXRPC accept MSG_WAITALL as a flag to sendmsg() to tell it to
ignore signals whilst loading up the message queue, provided progress is
being made in emptying the queue at the other side.
Progress is defined as the base of the transmit window having being
advanced within 2 RTT periods. If
Provide support for a kernel service to make use of the service upgrade
facility. This involves:
(1) Pass an upgrade request flag to rxrpc_kernel_begin_call().
(2) Make rxrpc_kernel_recv_data() return the call's current service ID so
that the caller can detect service upgrade and see what
On Wed, Oct 18, 2017 at 11:36 AM, Daniel Drake wrote:
> [retitling and re-summarizing in hope of attention from Intel]
>
> Andy / Rafael,
>
> Thomas Gleixner suggested that you might be able to help with a nasty
> issue related to Intel Apollo Lake platforms - or you can put us in
> contact with a
If an Ethernet PHY is initialized before the interrupt controller it is
connected to, a message like the following is printed:
irq: no irq domain found for /interrupt-controller@e61c !
However, the actual error is ignored, leading to a non-functional (POLL)
PHY interrupt later:
Micre
From: Colin Ian King
The variable region_start is assigned twice, the first value is
never read and redundant, so can be removed. We can clean up the
code further by assigning rg_start directly rather than using the
temporary variable region_start which can then be removed. Cleans
up the clang w
arch_spin_lock_flags is an internal part of the spinlock implementation
and is no longer available when SMP=n and DEBUG_SPINLOCK=y, so the PPC
RTAS code fails to compile in this configuration:
arch/powerpc/kernel/rtas.c: In function 'lock_rtas':
>> arch/powerpc/kernel/rtas.c:81:2: error: implic
I see 'perf record -p ' crashes with following log:
*** Error in `./perf': free(): invalid next size (normal):
0x0298b340 ***
=== Backtrace: =
/lib/x86_64-linux-gnu/libc.so.6(+0x777e5)[0x7f7fd85c87e5]
/lib/x86_64-linux-gnu/libc.so.6(+0x8037a)[0x7f7fd85d137a]
/li
Hello
The current way to find if the PHY is internal is to compare DT phy-mode
and emac_variant/internal_phy.
But it will negate a possible future SoC where an external PHY use the
same phy mode than the integrated one.
This patchs series adds a new way to handle this problem via a mdio-mux.
The
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore arm DT about dwmac-sun8i
This reverts commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore arm64 DT about dwmac-sun8i
This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Rev
On Wed, 2017-10-18 at 13:00 +0200, SF Markus Elfring wrote:
> > Ugly grep follows:
> >
> > $ grep -rohP --include=*.[ch] "\w+\s*=\s*[kv].alloc\s*\(\s*sizeof.*," * | \
> > sed -r -e 's/(\w+)\s*=\s*[kv].alloc\s*\(\s*sizeof\s*\(\s*\*\s*\1\s*\)/foo
> > = k.alloc(sizeof(*foo))/' \
> > -e
>
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore compatibles about dwmac-sun8i
This reverts commit ad4540cc5aa3 ("net: stmmac: sun8i: Rem
stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.
Signed-off-by: Corentin Labbe
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
1 file changed, 1 inse
stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.
Since these compatible is automatically registered, dwmac-sun8i compatible
does not need to be in need_mdio_ids
This patch add documentation about the MDIO switch used on sun8i-h3-emac
for integrated PHY.
Signed-off-by: Corentin Labbe
---
.../devicetree/bindings/net/dwmac-sun8i.txt| 139 +++--
1 file changed, 127 insertions(+), 12 deletions(-)
diff --git a/Documentation/devicetree
The Allwinner H3 SoC have two distinct MDIO bus, only one could be
active at the same time.
The selection of the active MDIO bus are done via some bits in the EMAC
register of the system controller.
This patch implement this MDIO switch via a custom MDIO-mux.
Signed-off-by: Corentin Labbe
---
d
On Wednesday 18 October 2017 05:12 PM, Maxime Ripard wrote:
> On Wed, Oct 18, 2017 at 05:09:00PM +0530, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> On Tuesday 10 October 2017 02:28 AM, Maxime Ripard wrote:
>>> On Sun, Oct 08, 2017 at 04:29:01AM +, Icenowy Zheng wrote:
Allwinner R40 featur
Since dwmac-sun8i could use either an integrated PHY or an external PHY
(which could be at same MDIO address), we need to represent this selection
by a MDIO switch.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 33 +++--
1 file changed, 27 ins
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore dt-bindings documentation about dwmac-sun8i
This reverts commit 8aa33ec2f481 ("dt-bindin
Each child node of an MDIO node is scanned as a PHY when calling
of_mdiobus_register() givint the following result:
[ 18.175379] mdio_bus stmmac-0: /soc/ethernet@1c3/mdio/mdio-mux has
invalid PHY address
[ 18.175408] mdio_bus stmmac-0: scan phy mdio-mux at address 0
[ 18.175450] mdio_bus
On Wednesday, October 18, 2017 1:32:15 PM CEST jeffy wrote:
> Hi Rafael,
>
> On 10/18/2017 07:11 PM, jeffy wrote:
> >>
> > my board has these devices:
> > spi master device->spi child device->spi based pwm->pwm_bl
> >
> > and i add a device link to the pwm and pwm_bl, and got a warning about
> > t
From: Kees Cook
Date: Mon, 16 Oct 2017 17:28:44 -0700
> This is the current set of outstanding networking patches to perform
> conversions to the new timer interface (rebased to -next). This is not
> all expected conversions, but it contains everything needed in networking
> to eliminate init_tim
On Wed, Oct 18, 2017 at 05:09:00PM +0530, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Tuesday 10 October 2017 02:28 AM, Maxime Ripard wrote:
> > On Sun, Oct 08, 2017 at 04:29:01AM +, Icenowy Zheng wrote:
> >> Allwinner R40 features a USB PHY like the one in A64, but with 3 PHYs.
> >>
> >> Add s
On Wednesday, October 18, 2017 1:32:15 PM CEST jeffy wrote:
> Hi Rafael,
>
> On 10/18/2017 07:11 PM, jeffy wrote:
> >>
> > my board has these devices:
> > spi master device->spi child device->spi based pwm->pwm_bl
> >
> > and i add a device link to the pwm and pwm_bl, and got a warning about
> > t
Add check on STM32 ADC clock rate to report an explicit error.
This may avoid division by 0 later in stm32-adc driver.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-adc-core.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/iio/adc/stm32-adc-core.c b/drivers
Hi james,
On 2017/10/18 18:26, James Morse wrote:
> Hi Dongjiu Geng,
>
> On 17/10/17 09:02, Dongjiu Geng wrote:
>> ARMv8.2 requires implementation of the RAS extension, in
>> this extension it adds SEI(SError Interrupt) notification
>> type, this patch adds new GHES error source SEI handling
>> f
Add TIM15_TRGO trigger that is now supported on STM32H7.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-adc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
index cc7ca50..4725756 100644
--- a/drivers/iio/adc/stm32-adc.c
++
On Wed, Oct 18, 2017 at 11:19:30AM +0100, Marc Zyngier wrote:
> On 17/10/17 15:23, Dongjiu Geng wrote:
> > When a exception is trapped to EL2, hardware uses ELR_ELx to hold
> > the current fault instruction address. If KVM wants to inject a
> > abort to 32 bit guest, it needs to set the LR registe
Hi,
On Tuesday 10 October 2017 02:28 AM, Maxime Ripard wrote:
> On Sun, Oct 08, 2017 at 04:29:01AM +, Icenowy Zheng wrote:
>> Allwinner R40 features a USB PHY like the one in A64, but with 3 PHYs.
>>
>> Add support for it.
>>
>> Signed-off-by: Icenowy Zheng
>
> Acked-by: Maxime Ripard
Is t
On Wed, 2017-10-18 at 13:31 +0200, Johannes Berg wrote:
> On Wed, 2017-10-18 at 12:29 +0200, Johannes Berg wrote:
>
> > Anyway, the change here looks correct to me, so I'll apply it and then
> > perhaps clean up more. I've only changed "u16 tid" to "u8 tid" since
> > the valid range is 0-15 (in th
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