[PATCH v5] pci: dwc: dra7xx: Add shutdown handler to cleanly turn off clocks

Add shutdown handler to cleanly turn off clocks. This will help in cases of kexec where in a new kernel can boot abruptly. Signed-off-by: Keerthy Acked-by: Kishon Vijay Abraham I --- Changes in v5: * Declared the dra7xx_pcie_shutdown function static Changes

Re: [PATCH v5 10/26] KVM: arm/arm64: GICv4: Wire mapping/unmapping of VLPIs in VFIO irq bypass

Hi Eric and Marc, On Tue, Nov 07, 2017 at 02:42:44PM +, Marc Zyngier wrote: > Hi Eric, > > On 07/11/17 13:06, Auger Eric wrote: > > Hi Marc, > > > > On 27/10/2017 16:28, Marc Zyngier wrote: > >> Let's use the irq bypass mechanism introduced for platform device > >> interrupts > > nit: I

Re: [PATCH v5 09/26] KVM: arm/arm64: GICv4: Add init/teardown of the per-VM vPE irq domain

On 10/11/17 08:20, Christoffer Dall wrote: > On Tue, Nov 07, 2017 at 02:08:23PM +0100, Auger Eric wrote: >> Hi Marc, >> >> On 27/10/2017 16:28, Marc Zyngier wrote: >>> In order to control the GICv4 view of virtual CPUs, we rely >>> on an irqdomain allocated for that purpose. Let's add a couple >>>

RE: [PATCH] PCI: hv: use effective affinity mask

Hi, I've also tested this and it's working good. Kernels tested: - next-20171109 on top of Ubuntu 16.04 - MSFT kernel - 4.14.0-rc5 with patch applied - on top of RHEL 7.3 Adrian -Original Message- From: Bjorn Helgaas [mailto:helg...@kernel.org] Sent: Wednesday, November 8, 2017 3:08

Re: [PATCH 15/15] wait_bit: introduce {wait_on,wake_up}_devmap_idle

On Tue, Oct 31, 2017 at 04:22:56PM -0700, Dan Williams wrote: > Add hashed waitqueue infrastructure to wait for ZONE_DEVICE pages to > drop their reference counts and be considered idle for DMA. This > facility will be used for filesystem callbacks / wakeups when DMA to a > DAX mapped range of a

Re: [PATCH v2 1/6] PM / core: Add LEAVE_SUSPENDED driver flag

On 8 November 2017 at 14:25, Rafael J. Wysocki wrote: > From: Rafael J. Wysocki > > Define and document a new driver flag, DPM_FLAG_LEAVE_SUSPENDED, to > instruct the PM core and middle-layer (bus type, PM domain, etc.) > code that it is desirable

Re: [PATCH V13 03/10] mmc: block: Add blk-mq support

Following up on this: On Thu, Nov 9, 2017 at 4:52 PM, Linus Walleij wrote: >> No one has ever suggested that the legacy API will remain. Once blk-mq is >> ready the old code gets deleted. > > The block layer maintainers most definately think MQ is ready > but you seem

Re: [PATCH v2 3/3] HID: cp2112: fix broken gpio_direction_input callback

On Nov 10 2017 or thereabouts, Sébastien Szymanski wrote: > When everything goes smoothly, ret is set to 0 which makes the function > to return EIO error. > > Fixes: 8e9faa15469e ("HID: cp2112: fix gpio-callback error handling") > Signed-off-by: Sébastien Szymanski

Re: [PATCH net-next] bindings: net: stmmac: correctify note about LPI interrupt

On 11/09/2017 06:09 PM, Niklas Cassel wrote: There are two different combined signal for various interrupt events: In EQOS-CORE and EQOS-MTL configurations, mci_intr_o is the interrupt signal. In EQOS-DMA, EQOS-AHB and EQOS-AXI configurations, these interrupt events are combined with the

Re: [PATCH] gpio: davinci: Assign first bank regs for unbanked case

On Friday 10 November 2017 04:37 PM, Keerthy wrote: > From: "J, KEERTHY" Linus, The $Author field is somehow messed up. Please ignore. I will send v2 with this fixed. Regards, Keerthy > > As per the re-design assign the first bank regs for unbanked > irq case. This was

Re: [PATCH v3] kernel/kprobes: add re-register safe check for register_kretprobe()

On Fri, 10 Nov 2017 17:28:33 +0800 JianKang Chen wrote: > From: Chen Jiankang > > When there are two same struct kretprobe rp, the INIT_HLIST_HEAD() > will result in a empty list table rp->free_instances. The memory leak > will happen. So it

[PATCH v2 00/14] soundwire: Add a new SoundWire subsystem

This patch series adds a new SoundWire subsystem which implements a new MIPI bus protocol 'SoundWire'. The SoundWire protocol is a robust, scalable, low complexity, low power, low latency, two-pin (clock and data) multi-drop bus that allows for the transfer of multiple audio streams and embedded

[PATCH v2 07/14] regmap: Add SoundWire bus support

SoundWire bus provides sdw_read() and sdw_write() APIs for Slave devices to program the registers. Provide support in regmap for SoundWire bus. Signed-off-by: Hardik T Shah Signed-off-by: Sanyog Kale Signed-off-by: Vinod Koul

[PATCH v2 08/14] soundwire: Add Slave status handling helpers

From: Sanyog Kale SoundWire Slaves report status to bus. Add helpers to handle the status changes. Signed-off-by: Hardik T Shah Signed-off-by: Sanyog Kale Signed-off-by: Vinod Koul ---

[PATCH v2 3/3] HID: cp2112: fix broken gpio_direction_input callback

When everything goes smoothly, ret is set to 0 which makes the function to return EIO error. Fixes: 8e9faa15469e ("HID: cp2112: fix gpio-callback error handling") Signed-off-by: Sébastien Szymanski --- Changes in v2: - rework error handling to have only one

Re: [PATCH 18/30] x86, kaiser: map virtually-addressed performance monitoring buffers

On Wed, Nov 08, 2017 at 11:47:20AM -0800, Dave Hansen wrote: > +static > +DEFINE_PER_CPU_SHARED_ALIGNED_USER_MAPPED(struct debug_store, > cpu_debug_store); > + > /* The size of a BTS record in bytes: */ > #define BTS_RECORD_SIZE 24 > > @@ -278,6 +282,39 @@ void

Re: [PATCH v2 3/3] HID: cp2112: fix broken gpio_direction_input callback

On Fri, 10 Nov 2017, Sébastien Szymanski wrote: > When everything goes smoothly, ret is set to 0 which makes the function > to return EIO error. > > Fixes: 8e9faa15469e ("HID: cp2112: fix gpio-callback error handling") > Signed-off-by: Sébastien Szymanski > ---

[PATCH 3/4] ASN.1: Improve exiting from build_type_list()

From: Markus Elfring Date: Fri, 10 Nov 2017 12:56:33 +0100 * Add jump targets so that a call of the function "perror" and "exit" is stored only once in an if branch of this function. * Replace two calls by goto statements. Signed-off-by: Markus Elfring

Re: [PATCH v5 09/26] KVM: arm/arm64: GICv4: Add init/teardown of the per-VM vPE irq domain

On Tue, Nov 07, 2017 at 02:08:23PM +0100, Auger Eric wrote: > Hi Marc, > > On 27/10/2017 16:28, Marc Zyngier wrote: > > In order to control the GICv4 view of virtual CPUs, we rely > > on an irqdomain allocated for that purpose. Let's add a couple > > of helpers to that effect. > > > > At the

Re: [PATCH v5 16/26] KVM: arm/arm64: GICv4: Propagate property updates to VLPIs

On Wed, Nov 08, 2017 at 03:08:36PM +, Marc Zyngier wrote: > On 07/11/17 21:28, Auger Eric wrote: > > Hi Marc, > > > > On 27/10/2017 16:28, Marc Zyngier wrote: > >> Upon updating a property, we propagate it all the way to the physical > >> ITS, and ask for an INV command to be executed there.

[PATCH] perf parse events: Fix invalid precise_ip handling

When the user set a precise_ip greater than the highest precision available, perf should return EINVAL to indicate the invalid precise_ip setting. Currently, in get_event_modifier(), perf compares the user-specified precise_ip with 3, instead of the highest precision available in the current

Re: [PATCH 3/4] kbuild: create object directories simpler and faster

Hi Masahiro-san, On 11/09/2017 11:41 PM, Masahiro Yamada wrote: > For the out-of-tree build, scripts/Makefile.build creates output > directories, but this operation is not efficient. > > scripts/Makefile.lib calculates obj-dirs as follows: > > obj-dirs := $(dir $(multi-objs) $(obj-y)) > >

Re: [PATCH v5 17/26] KVM: arm/arm64: GICv4: Handle INVALL applied to a vPE

On 10/11/17 08:41, Christoffer Dall wrote: > On Tue, Nov 07, 2017 at 10:23:25PM +0100, Auger Eric wrote: >> Hi Marc, >> >> On 27/10/2017 16:28, Marc Zyngier wrote: >>> Since when updating the properties one LPI at a time, there is no >> Since we update the properties one LPI at a time, ... ? >>>

Re: [PATCH 3/4] kbuild: create object directories simpler and faster

Hi Cao, 2017-11-10 17:45 GMT+09:00 Cao jin : >> +ifneq ($(KBUILD_SRC),) >> +# Create directories for object files if directory does not exist >> +obj-dirs := $(sort $(obj) $(patsubst %/,%, $(dir $(targets >> +$(shell mkdir -p $(obj-dirs)) >> +endif >> + > > I just

Re: [PATCH 0/2][v5] Add the ability to do BPF directed error injection

On Wed, Nov 08, 2017 at 06:43:25AM +0900, Alexei Starovoitov wrote: > On 11/8/17 5:28 AM, Josef Bacik wrote: > > I'm sending this through Dave since it'll conflict with other BPF changes > > in his > > tree, but since it touches tracing as well Dave would like a review from > > somebody on the

Re: [PATCH 1/2] bpf: add a bpf_override_function helper

* Josef Bacik wrote: > @@ -551,6 +578,10 @@ static const struct bpf_func_proto > *kprobe_prog_func_proto(enum bpf_func_id func > return _get_stackid_proto; > case BPF_FUNC_perf_event_read_value: > return _perf_event_read_value_proto; > +

[tip:x86/platform] x86/virt: Add enum for hypervisors to replace x86_hyper

Commit-ID: 03b2a320b19f1424e9ac9c21696be9c60b6d0d93 Gitweb: https://git.kernel.org/tip/03b2a320b19f1424e9ac9c21696be9c60b6d0d93 Author: Juergen Gross AuthorDate: Thu, 9 Nov 2017 14:27:36 +0100 Committer: Ingo Molnar CommitDate: Fri, 10 Nov 2017

[tip:x86/timers] x86/tsc: Mark cyc2ns_init() and detect_art() __init

Commit-ID: 120fc3fbb7787fb70240190cc9c113d1f6523c42 Gitweb: https://git.kernel.org/tip/120fc3fbb7787fb70240190cc9c113d1f6523c42 Author: Dou Liyang AuthorDate: Wed, 8 Nov 2017 18:09:52 +0800 Committer: Ingo Molnar CommitDate: Fri, 10 Nov 2017

[tip:x86/platform] x86/virt, x86/platform: Merge 'struct x86_hyper' into 'struct x86_platform' and 'struct x86_init'

Commit-ID: f72e38e8ec8869ac0ba5a75d7d2f897d98a1454e Gitweb: https://git.kernel.org/tip/f72e38e8ec8869ac0ba5a75d7d2f897d98a1454e Author: Juergen Gross AuthorDate: Thu, 9 Nov 2017 14:27:35 +0100 Committer: Ingo Molnar CommitDate: Fri, 10 Nov 2017

[tip:x86/platform] x86/virt, x86/acpi: Add test for ACPI_FADT_NO_VGA

Commit-ID: 6d7305254ea947d575a066711c3349fafbebaffa Gitweb: https://git.kernel.org/tip/6d7305254ea947d575a066711c3349fafbebaffa Author: Juergen Gross AuthorDate: Thu, 9 Nov 2017 14:27:37 +0100 Committer: Ingo Molnar CommitDate: Fri, 10 Nov 2017

Re: [PATCH 3/4] x86/boot/compressed/64: Introduce place_trampoline()

On Fri, Nov 10, 2017 at 10:29:33AM +0100, Ingo Molnar wrote: > > * Kirill A. Shutemov wrote: > > > --- a/arch/x86/boot/compressed/head_64.S > > +++ b/arch/x86/boot/compressed/head_64.S > > @@ -315,6 +315,18 @@ ENTRY(startup_64) > > * The first step is go

Re: [PATCH v3 4/4] KVM: Add flush_on_enter before guest enter

On Fri, Nov 10, 2017 at 01:49:47AM -0800, Wanpeng Li wrote: > @@ -2887,7 +2899,7 @@ static void kvm_steal_time_set_preempted(struct > kvm_vcpu *vcpu) > if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED)) > return; > > - vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED; > +

Re: [PATCH v3 4/4] KVM: Add flush_on_enter before guest enter

On Fri, Nov 10, 2017 at 11:15:06AM +0100, Paolo Bonzini wrote: > On 10/11/2017 11:08, Peter Zijlstra wrote: > > On Fri, Nov 10, 2017 at 01:49:47AM -0800, Wanpeng Li wrote: > >> @@ -2887,7 +2899,7 @@ static void kvm_steal_time_set_preempted(struct > >> kvm_vcpu *vcpu) > >>if

Re: [RFC] hv_netvsc: safer orderly shutdown

Stephen Hemminger writes: > Several types of control operations require that the underlying RNDIS > infrastructure be restarted. This patch changes the ordering of the > shutdown to avoid race conditions. > Stop all transmits before doing RNDIS halt. This involves

[PATCH] ARM: AM33xx: PRM: Remove am33xx_pwrdm_read_prev_pwrst function

Referring TRM Am335X series: http://www.ti.com/lit/ug/spruh73p/spruh73p.pdf The LastPowerStateEntered bitfield is present only for PM_CEFUSE domain. This is not present in any of the other power domains. Hence remove the generic am33xx_pwrdm_read_prev_pwrst hook which wrongly reads the reserved

Re: [PATCH] lib/mpi: call cond_resched() from mpi_powm() loop

On Mon, Nov 06, 2017 at 10:19:51PM -0800, Eric Biggers wrote: > From: Eric Biggers > > On a non-preemptible kernel, if KEYCTL_DH_COMPUTE is called with the > largest permitted inputs (16384 bits), the kernel spends 10+ seconds > doing modular exponentiation in mpi_powm()

Re: [PATCH 0/2] hwrng: iproc-rng200: Add support for BCM7278

On Wed, Nov 01, 2017 at 04:20:04PM -0700, Florian Fainelli wrote: > Hi, > > This patch series adds support for the RNG200 block found on the BCM7278 SoC. > This requires us to update the compatible string (and associated binding > document) as well as the Kconfig option to make that driver

[PATCH v8 6/7] arm64: kvm: Set Virtual SError Exception Syndrome for guest

RAS Extension add a VSESR_EL2 register which can provides the syndrome value reported to software on taking a virtual SError interrupt exception. This patch supports to specify this Syndrome. In the RAS Extensions we can not set all-zero syndrome value for SError, which means 'RAS error:

[PATCH v8 1/7] arm64: cpufeature: Detect CPU RAS Extentions

From: Xie XiuQi ARM's v8.2 Extentions add support for Reliability, Availability and Serviceability (RAS). On CPUs with these extensions system software can use additional barriers to isolate errors and determine if faults are pending. Add cpufeature detection and a barrier

[PATCH v8 5/7] arm64: kvm: Introduce KVM_ARM_SET_SERROR_ESR ioctl

The ARM64 RAS SError Interrupt(SEI) syndrome value is specific to the guest and user space needs a way to tell KVM this value. So we add a new ioctl. Before user space specifies the Exception Syndrome Register ESR(ESR), it firstly checks that whether KVM has the capability to set the guest ESR, If

Welcome!

Hello dear, compliments of the season, I sent series of mail, have you seen them ?

Re: [RFC v4 13/17] [media] vb2: add in-fence support to QBUF

2017-10-25 Brian Starkey : > Hi Gustavo, > > On Fri, Oct 20, 2017 at 07:50:08PM -0200, Gustavo Padovan wrote: > > From: Gustavo Padovan > > > > Receive in-fence from userspace and add support for waiting on them > > before queueing the

Re: [PATCH v5 2/3] x86/topology: Avoid wasting 128k for package id array

On Fri, 10 Nov 2017, Prarit Bhargava wrote: > On 11/09/2017 07:43 PM, Thomas Gleixner wrote: > > On Sun, 5 Nov 2017, Prarit Bhargava wrote: > >> [v5]: Change kmalloc to GFP_ATOMIC to fix "sleeping function" warning on > >> virtual machines. > > > > What has this to do with virtual machines? The

Re: [PATCH V13 08/10] mmc: block: blk-mq: Separate card polling from recovery

On Thu, Nov 9, 2017 at 2:02 PM, Adrian Hunter wrote: > On 09/11/17 14:52, Linus Walleij wrote: >> On Thu, Nov 9, 2017 at 8:56 AM, Adrian Hunter >> wrote: >>> On 08/11/17 11:30, Linus Walleij wrote: On Fri, Nov 3, 2017 at 2:20 PM, Adrian

Re: [PATCH 26/31] nds32: Build infrastructure

2017-11-09 18:33 GMT+08:00 Arnd Bergmann : > On Thu, Nov 9, 2017 at 10:02 AM, Greentime Hu wrote: >> 2017-11-08 18:16 GMT+08:00 Arnd Bergmann : >>> On Wed, Nov 8, 2017 at 6:55 AM, Greentime Hu wrote: > +config

Re: [PATCH v2] fs: guard_bio_eod() needs to consider partitions

This looks good to me: Reviewed-by: Christoph Hellwig Jens, can you pick it up through the block tree given that is where the issue was introduced?

[PATCH 1/3] dt-bindings: reset: Add bindings for the Meson-AXG SoC Reset Controller

Add DT bindings for the Meson-AXG SoC Reset Controller include file, and also slightly update documentation. Signed-off-by: Yixun Lan --- .../bindings/reset/amlogic,meson-reset.txt | 3 +- .../dt-bindings/reset/amlogic,meson-axg-reset.h| 124

[PATCH 0/3] add Reset controller driver for Meson-AXG

This patches add the Reset controller driver which found at the Amlogic Meson-AXG SoC. Yixun Lan (3): dt-bindings: reset: Add bindings for the Meson-AXG SoC Reset Controller reset: meson-axg: add compatible string for Meson-AXG SoC arm64: dts: meson-axg: add new reset DT node

[PATCH 2/3] reset: meson-axg: add compatible string for Meson-AXG SoC

Try to add compatible string explictly to support new Meson-AXG SoC. Signed-off-by: Yixun Lan --- drivers/reset/reset-meson.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c index c419a3753d00..93cbee1ae8ef

[PATCH 3/3] arm64: dts: meson-axg: add new reset DT node

Add reset DT node for Amlogic's Meson-AXG SoC. Signed-off-by: Yixun Lan --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index

Re: [PATCH] rtc: Use time64_t variables to set time/alarm from sysfs

On 09/11/2017 at 15:09:20 +0800, Baolin Wang wrote: > Use time64_t variables and related APIs for sysfs interfaces to > support setting time or alarm after the year 2038 on 32-bit system. > > Signed-off-by: Baolin Wang > --- > drivers/rtc/rtc-sysfs.c | 25

Re: [PATCH v5 16/26] KVM: arm/arm64: GICv4: Propagate property updates to VLPIs

On 10/11/17 08:37, Christoffer Dall wrote: > On Wed, Nov 08, 2017 at 03:08:36PM +, Marc Zyngier wrote: >> On 07/11/17 21:28, Auger Eric wrote: >>> Hi Marc, >>> >>> On 27/10/2017 16:28, Marc Zyngier wrote: Upon updating a property, we propagate it all the way to the physical ITS, and

Re: [PATCH v5 10/26] KVM: arm/arm64: GICv4: Wire mapping/unmapping of VLPIs in VFIO irq bypass

On 10/11/17 08:28, Christoffer Dall wrote: > Hi Eric and Marc, > > On Tue, Nov 07, 2017 at 02:42:44PM +, Marc Zyngier wrote: >> Hi Eric, >> >> On 07/11/17 13:06, Auger Eric wrote: >>> Hi Marc, >>> >>> On 27/10/2017 16:28, Marc Zyngier wrote: Let's use the irq bypass mechanism introduced

Re: [PATCH 13/15] mm, devmap: introduce CONFIG_DEVMAP_MANAGED_PAGES

On Tue, Oct 31, 2017 at 04:22:46PM -0700, Dan Williams wrote: > Combine the now three use cases of page-idle callbacks for ZONE_DEVICE > memory into a common selectable symbol. Very sparse changelog. I understand the Kconfig bit, but it also seems to introduce new static key functionality that

Re: [PATCH 0/2][v5] Add the ability to do BPF directed error injection

From: Alexei Starovoitov Date: Wed, 8 Nov 2017 06:43:25 +0900 > looks great to me. > Peter, > could you please review x86 bits? I'm still waiting for this.

Re: [PATCH RFC v3 6/7] proc: support new 'pids=all|ptraceable' mount option

On Fri, Nov 10, 2017 at 3:38 AM, Andy Lutomirski wrote: > On Thu, Nov 9, 2017 at 8:14 AM, Djalal Harouni wrote: >> This patch introduces the new 'pids' mount option, as it was discussed >> and suggested by Andy Lutomirski [1]. >> >> * If 'pids=' is passed

Re: [PATCH RFC v3 3/7] proc: add helpers to set and get proc hidepid and gid mount options

On 11/9/17, Djalal Harouni wrote: > --- a/fs/proc/base.c > +++ b/fs/proc/base.c > -static bool has_pid_permissions(struct pid_namespace *pid, > +static bool has_pid_permissions(struct proc_fs_info *fs_info, More "const". > diff --git a/fs/proc/inode.c b/fs/proc/inode.c >

Re: linux-next 20171018 to 20171108: reboot after 'freeing SMP alternatives memory'

-20171103: I get past kernel boot, but there's kernel panic (probably) while X is starting. (I can see the capslock led blinking.). This still happens on next-20171110, if I boot the machine "cold". This is new. Pave

[PATCH v2 04/14] soundwire: Add MIPI DisCo property helpers

MIPI Discovery And Configuration (DisCo) Specification for SoundWire specifies properties to be implemented for SoundWire Masters and Slaves. The DisCo spec doesn't mandate these properties. However, SDW bus cannot work without knowing these values. The helper functions read the Master and Slave

[PATCH v2 03/14] soundwire: Add Master registration

A Master registers with SoundWire bus and scans the firmware provided for device description. In this patch we scan the ACPI namespaces and create the SoundWire Slave devices based on the ACPI description Signed-off-by: Sanyog Kale Signed-off-by: Vinod Koul

[PATCH v2 06/14] soundwire: Add IO transfer

SoundWire bus supports read or write register(s) for SoundWire Slave device. sdw_read() and sdw_write() APIs are provided for single register read/write. sdw_nread() and sdw_nwrite() for operations on contiguous registers. Signed-off-by: Sanyog Kale Signed-off-by: Vinod

[PATCH v8 7/7] arm64: kvm: handle SError Interrupt by categorization

If it is not RAS SError, directly inject virtual SError, which will keep the old way. If it is RAS SError, firstly let host ACPI module to handle it. For the ACPI handling, if the error address is invalid, APEI driver will not identify the address to hwpoison memory and can not notify guest to do

[PATCH net-next 2/2] net: dsa: lan9303: Clear offload_fwd_mark for IGMP

Now that IGMP packets no longer is flooded in HW, we want the SW bridge to forward packets based on bridge configuration. To make that happen, IGMP packets must have skb->offload_fwd_mark = 0. Signed-off-by: Egil Hjelmeland --- net/dsa/tag_lan9303.c | 13 +

[PATCH net-next 0/2] net: dsa: lan9303: IGMP handling

Set up the HW switch to trap IGMP packets to CPU port. And make sure skb->offload_fwd_mark is cleared for incoming IGMP packets. skb->offload_fwd_mark calculation is a candidate for consolidation into the DSA core. The calculation can probably be more polished when done at a point where DSA has

[PATCH net-next 1/2] net: dsa: lan9303: Set up trapping of IGMP to CPU port

IGMP packets should be trapped to the CPU port. The SW bridge knows whether to forward to other ports. With "IGMP snooping for local traffic" merged, IGMP trapping is also required for stable IGMPv2 operation. LAN9303 does not trap IGMP packets by default. Enable IGMP trapping in lan9303_setup.

Re: [PATCH 20/30] x86, mm: remove hard-coded ASID limit checks

On Wed, Nov 08, 2017 at 11:47:24AM -0800, Dave Hansen wrote: > +#define CR3_HW_ASID_BITS 12 > +#define NR_AVAIL_ASIDS ((1< - VM_WARN_ON_ONCE(asid > 4094); > + VM_WARN_ON_ONCE(asid > NR_AVAIL_ASIDS); Not the same number

Re: [PATCH v1 0/2] DRM driver for ILI9225 display panels

Hi David, nice to see a new driver. Den 08.11.2017 04.52, skrev David Lechner: This is a new driver for ILI9225 based display panels. There are a couple of things that stand out: 1. Despite my best efforts, I could not find a name for this display[1], so I have made up a generic name

[PATCH 1/4] ASN.1: Adjust two function calls together with a variable assignment

From: Markus Elfring Date: Fri, 10 Nov 2017 10:40:17 +0100 The script "checkpatch.pl" pointed information out like the following. ERROR: do not use assignment in if condition Thus fix the affected source code places. Signed-off-by: Markus Elfring

Re: [PATCH 3/4] x86/boot/compressed/64: Introduce place_trampoline()

* Kirill A. Shutemov wrote: > > One other detail I noticed: > > > > /* Bound size of trampoline code */ > > .orglvl5_trampoline_src + LVL5_TRAMPOLINE_CODE_SIZE > > > > will this generate a build error if the trampoline code exceeds 0x40? > > Yes,

Re: [PATCH 08/30] x86, kaiser: unmap kernel from userspace page tables (core patch)

* Dave Hansen wrote: > From: Dave Hansen > > These patches are based on work from a team at Graz University of > Technology: https://github.com/IAIK/KAISER . This work would not have > been possible without their work as a starting

Re: [PATCH] ovl: fix null pointer dereference on ofs allocation failure.

On Thu, Nov 9, 2017 at 6:47 PM, Colin King wrote: > From: Colin Ian King > > The current error exit path when ofs fails to allocate jumps > to clean-up code that calls ovl_free_fs resulting in a null pointer > dereference on the null ovl

Re: [PATCH 12/15] mm, dax: enable filesystems to trigger page-idle callbacks

> +DEFINE_MUTEX(devmap_lock); static? > +#if IS_ENABLED(CONFIG_FS_DAX) > +static void generic_dax_pagefree(struct page *page, void *data) > +{ > +} > + > +struct dax_device *fs_dax_claim_bdev(struct block_device *bdev, void *owner) > +{ > + struct dax_device *dax_dev; > + struct

Re: [PATCH 3/4] x86/boot/compressed/64: Introduce place_trampoline()

* Kirill A. Shutemov wrote: > If bootloader enables 64-bit mode with 4-level paging, we need to > switch over to 5-level paging. The switching requires disabling paging. > It works fine if kernel itself is loaded below 4G. > > If bootloader put the kernel above

Re: [PATCH 3/4] x86/boot/compressed/64: Introduce place_trampoline()

* Kirill A. Shutemov wrote: > --- a/arch/x86/boot/compressed/head_64.S > +++ b/arch/x86/boot/compressed/head_64.S > @@ -315,6 +315,18 @@ ENTRY(startup_64) >* The first step is go into compatibility mode. >*/ > > + /* > + * Find

Re: [PATCH] x86: use cpufreq_quick_get() for /proc/cpuinfo "cpu MHz" again

On 11/10/17 at 08:25P, Ingo Molnar wrote: > > * Rafael J. Wysocki wrote: > > > Hi Linus, > > > > On 11/9/2017 11:38 AM, WANG Chao wrote: > > > Commit 941f5f0f6ef5 (x86: CPU: Fix up "cpu MHz" in /proc/cpuinfo) caused > > > a serious performance issue when reading

Re: [PATCH 2/3] perf tools: Fix build for hardened environments

On Thu, Nov 09, 2017 at 09:52:12AM -0300, Arnaldo Carvalho de Melo wrote: > Em Thu, Nov 09, 2017 at 08:36:22AM +0100, Jiri Olsa escreveu: > > On Wed, Nov 08, 2017 at 01:03:21PM -0300, Arnaldo Carvalho de Melo wrote: > > > Em Wed, Nov 08, 2017 at 11:27:38AM +0100, Jiri Olsa escreveu: > > > > From:

Re: [PATCH 3/4] x86/boot/compressed/64: Introduce place_trampoline()

On Fri, Nov 10, 2017 at 10:14:53AM +0100, Ingo Molnar wrote: > I'm wondering, how did you test it if no current bootloader puts the kernel > to > above addresses of 4G? I didn't test it directly. I've checked with debugger that there's no memory accesses above 1M between disabling paging in

[PATCH] x86/acpi: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode

The platforms which support only IOAPIC mode and whose SCI INT is greater than 16, passes SCI INT via FADT and not via MADT int src override structure. In such cases current logic fails to handle it and throws error "Invalid bus_irq %u for legacy override". This patch handles the above mentioned

Re: [PATCH 1/3] HID: cp2112: fix interface specification URL

On Fri, 10 Nov 2017, Sébastien Szymanski wrote: > >> Signed-off-by: Sébastien Szymanski > >> --- > >> drivers/hid/hid-cp2112.c | 2 +- > >> 1 file changed, 1 insertion(+), 1 deletion(-) > >> > >> diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c

Re: [PATCH 3/3] arm64: Add software workaround for Falkor erratum 1041

Hi Shanker, On 09/11/17 15:22, Shanker Donthineni wrote: > On 11/09/2017 05:08 AM, James Morse wrote: >> On 04/11/17 21:43, Shanker Donthineni wrote: >>> On 11/03/2017 10:11 AM, Robin Murphy wrote: On 03/11/17 03:27, Shanker Donthineni wrote: > The ARM architecture defines the memory

Re: [PATCH RFC v3 2/7] proc: move /proc/{self|thread-self} dentries to proc_fs_info

On 11/9/17, Djalal Harouni wrote: > struct proc_fs_info { > struct pid_namespace *pid_ns; > + struct dentry *proc_self; /* For /proc/self/ */ > + struct dentry *proc_thread_self; /* For /proc/thread-self/ */ These are redundant comments.

Re: [PATCH RFC v3 1/7] proc: add proc_fs_info struct to store proc information

On Fri, Nov 10, 2017 at 11:26 AM, Alexey Dobriyan wrote: > On 11/9/17, Djalal Harouni wrote: > >> +struct proc_fs_info { >> + struct pid_namespace *pid_ns; >> +}; > >> +static inline struct proc_fs_info *proc_sb(struct super_block *sb) >> +{ >> +

Re: [PATCH] lib: test module for find_*_bit() functions

On 11/10/17, Andrew Morton wrote: > On Thu, 9 Nov 2017 17:07:14 +0300 Yury Norov > wrote: > >> find_bit functions are widely used in the kernel, including hot paths. >> This module tests performance of that functions in 2 typical scenarios:

Re: [PATCH RFC v3 2/7] proc: move /proc/{self|thread-self} dentries to proc_fs_info

On Fri, Nov 10, 2017 at 11:31 AM, Alexey Dobriyan wrote: > On 11/9/17, Djalal Harouni wrote: > >> struct proc_fs_info { >> struct pid_namespace *pid_ns; >> + struct dentry *proc_self; /* For /proc/self/ */ >> + struct dentry

Re: [PATCH 4/4] kbuild: optimize object directory creation for incremental build

Masahiro-san On 11/09/2017 11:41 PM, Masahiro Yamada wrote: > The previous commit largely optimized the object directory creation. > We can optimize it more for incremental build. > > There are already *.cmd files in the output directory. The existing > *.cmd files have been picked up by

Re: [PATCH] ASoC: Intel: common: Replace sst_acpi_check_hid with acpi_dev_present

Hi, On 09-11-17 22:07, Jeremy Cline wrote: Replace the sst_acpi_check_hid helper function added in commit 915ae2b9f0fe ("ASoC: Intel: Create a helper to search for matching machine") with the generic acpi_dev_present helper function and remove the now unused sst_acpi_check_hid function. This

[PATCH v8 4/7] KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA

ARMv8.2 adds a new bit HCR_EL2.TEA which routes synchronous external aborts to EL2, and adds a trap control bit HCR_EL2.TERR which traps all Non-secure EL1&0 error record accesses to EL2. This patch enables the two bits for the guest OS, guaranteeing that KVM takes external aborts and traps

[PATCH v8 2/7] KVM: arm64: Save ESR_EL2 on guest SError

From: James Morse When we exit a guest due to an SError the vcpu fault info isn't updated with the ESR. Today this is only done for traps. The v8.2 RAS Extensions define ISS values for SError. Update the vcpu's fault_info with the ESR on SError so that handle_exit() can

[PATCH v8 0/7] Support RAS virtualization in KVM

This series patches mainly do below things: 1. Trap RAS ERR* registers Accesses to EL2 from Non-secure EL1, KVM will will do a minimum simulation, there registers are simulated to RAZ/WI in KVM. 2. Route synchronous External Abort exceptions from Non-secure EL0 and EL1 to EL2. When

[PATCH v8 3/7] acpi: apei: Add SEI notification type support for ARMv8

ARMv8.2 requires implementation of the RAS extension, in this extension it adds SEI(SError Interrupt) notification type, this patch adds new GHES error source SEI handling functions. This error source parsing and handling method is similar with the SEA. Expose API ghes_notify_sei() to external

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Re: [PATCH v6 00/10] rockchip: kevin: Enable edp display

Dear all, 2017-11-01 20:33 GMT+01:00 Sean Paul : > On Tue, Oct 31, 2017 at 12:37:43PM +0800, JeffyChen wrote: >> Hi Heiko, >> >> On 10/31/2017 07:01 AM, Heiko Stuebner wrote: >> > As I was just looking at the edp dts change in patch1 again, does this >> > series also

[PATCH] arch, mm: introduce arch_tlb_gather_mmu_lazy (was: Re: [RESEND PATCH] mm, oom_reaper: gather each vma to prevent) leaking TLB entry

On Fri 10-11-17 11:15:29, Michal Hocko wrote: > On Fri 10-11-17 09:19:33, Minchan Kim wrote: > > On Tue, Nov 07, 2017 at 09:54:53AM +, Wang Nan wrote: > > > tlb_gather_mmu(, mm, 0, -1) means gathering the whole virtual memory > > > space. In this case, tlb->fullmm is true. Some archs like

Re: [PATCH V13 05/10] mmc: cqhci: support for command queue enabled host

On Thu, Nov 9, 2017 at 1:55 PM, Adrian Hunter wrote: > On 09/11/17 14:26, Linus Walleij wrote: I think the above approach to put any CQE-specific callbacks directly into the struct mmc_host_ops is way more viable. >>> >>> Nothing to do with CQE. This is CQHCI.

Re: [PATCH] sched/fair: Consider RT/IRQ pressure in capacity_spare_wake

On 9 November 2017 at 19:52, Joel Fernandes wrote: > capacity_spare_wake in the slow path influences choice of idlest groups, > as we search for groups with maximum spare capacity. In scenarios where > RT pressure is high, a sub optimal group can be chosen and hurt >

Re: [PATCH 02/14] soundwire: Add SoundWire bus type

On Fri, Nov 10, 2017 at 10:29:51AM +0530, Vinod Koul wrote: > On Thu, Nov 09, 2017 at 09:14:07PM +, Srinivas Kandagatla wrote: > > > > > > On 19/10/17 04:03, Vinod Koul wrote: > > >This adds the base SoundWire bus type, bus and driver registration. > > >along with changes to module device

Re: [PATCH 2/4] x86/boot/compressed/64: Detect and handle 5-level paging at boot-time

* Kirill A. Shutemov wrote: > This patch prepare decompression code to boot-time switching between 4- > and 5-level paging. > > Signed-off-by: Kirill A. Shutemov > --- > arch/x86/boot/compressed/head_64.S | 16

Re: [PATCH v5 10/26] KVM: arm/arm64: GICv4: Wire mapping/unmapping of VLPIs in VFIO irq bypass

On Fri, Nov 10, 2017 at 10:05 AM, Marc Zyngier wrote: > On 10/11/17 08:28, Christoffer Dall wrote: >> Hi Eric and Marc, >> >> On Tue, Nov 07, 2017 at 02:42:44PM +, Marc Zyngier wrote: >>> Hi Eric, >>> >>> On 07/11/17 13:06, Auger Eric wrote: Hi Marc, On

Re: [PATCH 3/4] x86/boot/compressed/64: Introduce place_trampoline()

On Fri, Nov 10, 2017 at 10:28:12AM +0100, Ingo Molnar wrote: > > * Ingo Molnar wrote: > > > > --- a/arch/x86/boot/compressed/head_64.S > > > +++ b/arch/x86/boot/compressed/head_64.S > > > @@ -315,6 +315,18 @@ ENTRY(startup_64) > > >* The first step is go into compatibility

Re: [PATCH 26/30] Lock down ftrace

Jiri Kosina wrote: > > The idea is to prevent cryptographic data for filesystems and other things > > from being read out of the kernel memory as well as to prevent unauthorised > > modification of kernel memory. > > Then it would make sense to actually lock down dumping of

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