On 24/05/18 22:11, Ulf Hansson wrote:
On 24 May 2018 at 17:48, Jon Hunter wrote:
On 18/05/18 11:31, Ulf Hansson wrote:
The existing dev_pm_domain_attach() function, allows a single PM domain to
be attached per device. To be able to support devices that are partitioned
> -Original Message-
> From: alsa-devel-boun...@alsa-project.org [mailto:alsa-devel-bounces@alsa-
> project.org] On Behalf Of Mark Brown
> Sent: Thursday, May 24, 2018 11:12 PM
> On Thu, May 24, 2018 at 07:55:06AM -0700, Guenter Roeck wrote:
> > On Thu, May 24, 2018 at 7:18 AM Mark Brown
Since commit b4abf91047cf ("rtmutex: Make wait_lock irq safe") the rtmutex
wait_lock is irq safe. Therefore the irqsave/restore in kernel/signal is no
longer required (see Patch 2/2). During discussions about v1 of this patch,
Eric Biederman noticed, that there is a no longer valid
Commit a841796f11c9 ("signal: align __lock_task_sighand() irq disabling and
RCU") introduced a rcu read side critical section with interrupts
disabled. The changelog suggested that a better long-term fix would be "to
make rt_mutex_unlock() disable irqs when acquiring the rt_mutex structure's
Since commit b4abf91047cf ("rtmutex: Make wait_lock irq safe") the
explanation in rcu_read_unlock() documentation about irq unsafe rtmutex
wait_lock is no longer valid.
Remove it to prevent kernel developers reading the documentation to rely on
it.
Suggested-by: Eric W. Biederman
Hi Michel,
On Thu, May 24, 2018 at 11:28 AM, Michel Pollet
wrote:
> This adds the Renesas R9A06G032 bare bone support.
>
> This currently only handles generic parts (gic, architected timer)
> and a UART.
>
> Signed-off-by: Michel Pollet
On Thu, May 24, 2018 at 11:28 AM, Michel Pollet
wrote:
> This adds a base device tree file for the RZN1-DB board, with only the
> basic support allowing the system to boot to a prompt. Only one UART is
> used, with only a single CPU running.
>
> Signed-off-by: Michel
On 24-May 11:22, Waiman Long wrote:
> On 05/24/2018 11:16 AM, Juri Lelli wrote:
> > On 24/05/18 11:09, Waiman Long wrote:
> >> On 05/24/2018 10:36 AM, Juri Lelli wrote:
> >>> On 17/05/18 16:55, Waiman Long wrote:
> >>>
> >>> [...]
> >>>
> +A parent cgroup cannot distribute all its
After an interrupt has been acknowledged, mask the IRQ priority through
PMR and clear PSR.I bit, allowing higher priority interrupts to be
received during interrupt handling.
Signed-off-by: Julien Thierry
Cc: Russell King
Cc: Catalin Marinas
Instead disabling interrupts by setting the PSR.I bit, use a priority
higher than the one used for interrupts to mask them via PMR.
The value chosen for PMR to enable/disable interrupts encodes the status
of interrupts on a single bit. This information is stored in the irqflags
values used when
Interrupts masked by ICC_PMR_EL1 will not be signaled to the CPU. This
means that hypervisor will not receive masked interrupts while running a
guest.
Avoid this by making sure ICC_PMR_EL1 is unmasked when we enter a guest.
Signed-off-by: Julien Thierry
Cc: Christoffer
Hi Michel,
On Thu, May 24, 2018 at 12:30 PM, Michel Pollet
wrote:
> The Renesas R9A06G032 second CA7 is parked in a ROM pen at boot time, it
> requires a special enable method to get it started.
>
> Signed-off-by: Michel Pollet
Thanks
From: Daniel Thompson
Currently alternatives are applied very late in the boot process (and
a long time after we enable scheduling). Some alternative sequences,
such as those that alter the way CPU context is stored, must be applied
much earlier in the boot sequence.
This series is a continuation of the work started by Daniel [1]. The goal
is to use GICv3 interrupt priorities to simulate an NMI.
To achieve this, set two priorities, one for standard interrupts and
another, higher priority, for NMIs. Whenever we want to disable interrupts,
we mask the standard
Commit-ID: 10b1105004fbd81058383537b67df35cc188ab62
Gitweb: https://git.kernel.org/tip/10b1105004fbd81058383537b67df35cc188ab62
Author: Alexey Budankov
AuthorDate: Thu, 24 May 2018 17:11:54 +0300
Committer: Ingo Molnar
CommitDate: Fri,
> -Original Message-
> From: Stephen Boyd [mailto:sb...@kernel.org]
> Sent: Saturday, March 24, 2018 12:57 AM
> To: A.s. Dong ; linux-...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> mturque...@baylibre.com;
Masking daif flags is done very early before returning to EL0.
Only toggle the interrupt masking while in the vector entry and mask daif
once in kernel_exit.
Signed-off-by: Julien Thierry
Cc: Catalin Marinas
Cc: Will Deacon
The goal of the patch serie is to enhance the state machine by:
- centralizing all state changes inside the state machine wrapper
- make the state change atomic using mutexes
- change user busy waiting for a passive wait on completion
- refactoring the initialization to avoid using a subchannel
In the current implementation, we do not want to start a new SSCH
command before the last one ends.
Currently the user needs to poll on the -EBUSY error to
wait before sending a new request.
Let's be friendly with global warming and let the user sleep
until he may send a new request.
Let's make
cpufreq would benefit from a static initializer which avoids an initcall
and bug fixing in case the warning (notifier used before initialized)
has been triggered.
Sebastian
On Fri, May 25, 2018 at 12:12 PM, Sebastian Andrzej Siewior
wrote:
> On 2018-05-25 12:05:31 [+0200], Rafael J. Wysocki wrote:
>> On Fri, May 25, 2018 at 11:46 AM, Sebastian Andrzej Siewior
>> wrote:
>> > Patch #1 is a repost with the s2idle bits
On 25/05/18 11:17, Julien Thierry wrote:
On 25/05/18 11:04, Suzuki K Poulose wrote:
On 25/05/18 10:49, Julien Thierry wrote:
Add a cpufeature indicating whether a cpu supports masking interrupts
by priority.
How is this different from the SYSREG_GIC_CPUIF cap ? Is it just
the description ?
It should be "#cooling-cells" instead of "cooling-cells". Fix it.
Signed-off-by: Viresh Kumar
---
arch/arm/boot/dts/armada-385-synology-ds116.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/armada-385-synology-ds116.dts
On 25/05/18 11:41, Suzuki K Poulose wrote:
On 25/05/18 11:39, Julien Thierry wrote:
On 25/05/18 11:36, Suzuki K Poulose wrote:
On 25/05/18 11:17, Julien Thierry wrote:
On 25/05/18 11:04, Suzuki K Poulose wrote:
On 25/05/18 10:49, Julien Thierry wrote:
Add a cpufeature indicating
On 25/05/18 05:05, Viresh Kumar wrote:
> On 25-05-18, 07:00, Ilia Lin wrote:
>>
>>
>> On May 25, 2018 6:54:12 AM GMT+03:00, Viresh Kumar
>> wrote:
>>> On 24-05-18, 18:03, Ilia Lin wrote:
+static int __init qcom_cpufreq_kryo_init(void)
+{
+ struct
This patch adds bindings for Qualcomm SLIMBus NGD controller.
SLIMBus NGD controller is a light-weight driver responsible for
communicating with SLIMBus slaves directly over the bus using messaging
interface and communicating with master component residing on ADSP for
bandwidth and data-channel
This patch adds suppor to Qualcomm SLIMBus Non-Generic Device (NGD)
controller driver.
This is light-weight SLIMBus controller driver responsible for
communicating with slave HW directly over the bus using messaging
interface, and communicating with master component residing on ADSP
for bandwidth
This patchset adds support to basic version of Qualcomm NGD SLIMBus
controller driver found SoCs from B family.
This controller is light-weight SLIMBus controller driver responsible for
communicating with slave HW directly over the bus using messaging
interface, and communicating with master
* v3:
1. Addressed all review comments in v2.
2. Added patch for removing redundant nand-ecc-step-size DT property.
3. Renamed ECC configuration setup function with minor code changes.
4. Modified comments and commit message for few patches.
* v2:
1. Addressed all review comments in v1.
1. Make
Use the NAND core helper function nand_ecc_choose_conf to tune
the ECC parameters instead of the function locally defined.
CC: Masahiro Yamada
Acked-by: Miquel Raynal
Signed-off-by: Abhishek Sahu
---
* Changes
commit 2c8f8afa7f92 ("mtd: nand: add generic helpers to check,
match, maximize ECC settings") provides generic helpers which
drivers can use for setting up ECC parameters.
Since same board can have different ECC strength nand chips so
following is the logic for setting up ECC strength and ECC
This driver is a simple muxing driver that controls the
I2S's clock input by using syscon/regmap to change the parrent.
The available inputs can be Peripheral clock and Generated clock.
Signed-off-by: Codrin Ciubotariu
---
arch/arm/mach-at91/Kconfig | 4 ++
From: Cyrille Pitchen
This patch adds support for the Atmel I2S controller embedded into
sama5d2x SoCs.
Signed-off-by: Cyrille Pitchen
Signed-off-by: Codrin Ciubotariu
---
Changes in v4:
- treated
This patch adds two clock muxes for the two I2S
buses present on sama5d2 platforms.
Signed-off-by: Codrin Ciubotariu
---
arch/arm/boot/dts/sama5d2.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi
From: Cyrille Pitchen
This patch adds DT bindings for the new Atmel I2S controller embedded
inside sama5d2x SoCs.
Signed-off-by: Cyrille Pitchen
Signed-off-by: Codrin Ciubotariu
---
Changes in v4:
From: Cyrille Pitchen
This patch sets the pin muxing for the I2S controllers
Signed-off-by: Cyrille Pitchen
[codrin.ciubota...@microchip.com: added pin muxing for the second
controller]
Signed-off-by: Codrin Ciubotariu
This is a rework of Cyrille's patches named:
[PATCH v3 0/2] ASoC: add driver for Atmel I2S controller
https://lkml.org/lkml/2015/9/29/454
This is the version 4 of the series, and addresses the received feedback
on the mailing lists.
This series applies on top of asoc-next branch of
When we receive a RMI4 report, we should not unconditionally send an
input_sync event. Instead, we should let the rmi4 transport layer do it
for us.
This fixes a situation where we might receive X in a report and the rest
in a subsequent one. And this messes up user space.
Link:
Currently userspace can only determine whether a mountpoint is unbindable
by parsing /proc//mountinfo. It would be convenient to simply retrieve
this property with a statvfs() call.
This let's userspace avoid costly parsing, supports cases where /proc is
not mounted, and supports usecases where
Currently userspace can only determine whether a mountpoint is private
by parsing /proc//mountinfo. It would be convenient to simply retrieve
this property with a statvfs() call.
This let's userspace avoid costly parsing, supports cases where /proc is
not mounted, and supports usecases where file
Currently userspace can only determine whether a mountpoint is slave
by parsing /proc//mountinfo. It would be convenient to simply retrieve
this property with a statvfs() call.
This let's userspace avoid costly parsing, supports cases where /proc is
not mounted, and supports usecases where file
On Fri, May 25, 2018 at 02:36:56PM +0200, Niklas Cassel wrote:
> A spin lock does have the advantage of ordering: memory operations issued
> before the spin_unlock_bh() will be completed before the spin_unlock_bh()
> operation has completed.
>
> However, ath10k_htt_tx_dec_pending() was called
On Fri, May 25, 2018 at 02:53:19PM +0200, Johannes Thumshirn wrote:
> Hi,
>
> This patch series aims to provide a more fine grained control over
> nvme's native multipathing, by allowing it to be switched on and off
> on a per-subsystem basis instead of a big global switch.
No. The only reason
On Fri, May 25, 2018 at 11:26:11AM +0200, Fabrice Gasnier wrote:
>On 05/22/2018 07:08 PM, Jonathan Cameron wrote:
> +* Quadrature x2 Rising:
> + Rising edges on either quadrature pair signals updates the respective
> + count. Quadrature encoding determines the direction.
This
On 25/05/18 10:15, Jisheng Zhang wrote:
> I noticed below error msg with sdhci-pxav3 on some berlin platforms:
>
> [.] sdhci-pxav3 f7ab.sdhci failed to add host
>
> It is due to getting related vmmc or vqmmc regulator returns
> -EPROBE_DEFER. It doesn't matter at all but it's confusing.
add Hisilicon ufs driver code.
Signed-off-by: Li Wei
Signed-off-by: Geng Jianfeng
Signed-off-by: Zang Leigang
Signed-off-by: Yu Jianfeng
---
drivers/scsi/ufs/Kconfig| 9 +
This patchset adds driver support for UFS for Hi3660 SoC. It is verified on
HiKey960 board.
Li Wei (5):
scsi: ufs: add Hisilicon ufs driver code
dt-bindings: scsi: ufs: add document for hisi-ufs
arm64: dts: add ufs dts node
arm64: defconfig: enable configs for Hisilicon ufs
arm64:
Partitions in HiKey960 are formatted as f2fs and squashfs.
f2fs is for userdata; squashfs is for system. Both partitions are required
by Android.
Signed-off-by: Li Wei
Signed-off-by: Zhangfei Gao
Signed-off-by: Guodong Xu
---
Commit-ID: 9511bce9fe8e5e6c0f923c09243a713eba560141
Gitweb: https://git.kernel.org/tip/9511bce9fe8e5e6c0f923c09243a713eba560141
Author: Song Liu
AuthorDate: Tue, 17 Apr 2018 23:29:07 -0700
Committer: Ingo Molnar
CommitDate: Fri, 25 May 2018
s2idle_wait_head is used during s2idle with interrupts disabled even on
RT. There is no "custom" wake up function so swait could be used instead
which is also lower weight compared to the wait_queue.
Make s2idle_wait_head a swait_queue_head.
Signed-off-by: Sebastian Andrzej Siewior
Signed-off-by: Julien Thierry
Suggested-by: Daniel Thompson
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Suzuki K Poulose
Cc: Marc Zyngier
---
On 25/05/18 11:04, Suzuki K Poulose wrote:
On 25/05/18 10:49, Julien Thierry wrote:
Add a cpufeature indicating whether a cpu supports masking interrupts
by priority.
How is this different from the SYSREG_GIC_CPUIF cap ? Is it just
the description ?
More or less.
It is just to have an
Ramon Fried wrote:
> Introduce infrastructure for supporting Factory Test Mode (FTM) of the
> wireless LAN subsystem. In order for the user space to access the
> firmware in test mode the relevant netlink channel needs to be exposed
> from the kernel driver.
>
> The above
On 25-05-18, 15:15, Jisheng Zhang wrote:
> I noticed below error msg with sdhci-pxav3 on some berlin platforms:
>
> [.] sdhci-pxav3 f7ab.sdhci failed to add host
>
> It is due to getting related vmmc or vqmmc regulator returns
> -EPROBE_DEFER. It doesn't matter at all but it's confusing.
On Wed, May 23, 2018 at 09:42:56AM +0100, Suzuki K Poulose wrote:
> On 03/05/18 14:20, Mark Rutland wrote:
> > +#define __ptrauth_key_install(k, v)\
> > +do { \
> > + write_sysreg_s(v.lo, SYS_ ## k ## KEYLO_EL1); \
>
On 25/05/18 11:00, Suzuki K Poulose wrote:
On 25/05/18 10:49, Julien Thierry wrote:
From: Daniel Thompson
Currently alternatives are applied very late in the boot process (and
a long time after we enable scheduling). Some alternative sequences,
such as those that
This fixes missing OPP and cooling device properties for CPUs for the
ARM 32 bit platforms. This is build tested by the zero day testing
infrastructure as well.
Individual maintainers can pick the patches to their SoC trees or I will
ask ARM SoC maintainers to pick them up later.
--
viresh
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a
On Thu, 2018-03-22 at 20:20:03 UTC, Mathieu Malaterre wrote:
> The header file was missing from the includes. Fix the
> following warning, treated as error with W=1:
>
> arch/powerpc/kernel/pci_32.c:286:6: error: no previous prototype for
> âsys_pciconfig_iobaseâ
On Thu, 2018-03-22 at 20:19:52 UTC, Mathieu Malaterre wrote:
> This function can be static, make it so, this fix a warning treated as
> error with W=1:
>
> arch/powerpc/kernel/btext.c:173:5: error: no previous prototype for
> âbtext_initializeâ [-Werror=missing-prototypes]
>
>
On Thu, 2018-03-22 at 20:19:56 UTC, Mathieu Malaterre wrote:
> Add a missing include .
>
> These functions can all be static, make it so. Fix warnings treated as
> errors with W=1:
>
> arch/powerpc/platforms/chrp/time.c:41:13: error: no previous prototype for
> âchrp_time_initâ
On Wed, 2018-04-04 at 20:09:11 UTC, Mathieu Malaterre wrote:
> Remove variable declaration idu_size and associated code since not used.
>
> These functions can all be static, make it so. Fix warnings treated as
> errors with W=1:
>
> arch/powerpc/platforms/chrp/setup.c:97:6: error: no previous
On 24/05/18 19:18, Mark Brown wrote:
On Thu, May 24, 2018 at 12:50:17PM -0500, Rob Herring wrote:
Subsystems or drivers may opt-in to this behavior by calling
driver_deferred_probe_check_init_done() instead of just returning
-EPROBE_DEFER. They may use additional information from DT or
On Thu, 2018-03-22 at 20:20:04 UTC, Mathieu Malaterre wrote:
> The header file was missing from the includes. Fix the
> following warning, treated as error with W=1:
>
> arch/powerpc/kernel/vecemu.c:260:5: error: no previous prototype for
> âemulate_altivecâ [-Werror=missing-prototypes]
>
On Thu, May 24, 2018 at 10:13 PM Sherry Hurwitz
wrote:
> * Processor Revision ID 0x00610f01 was accidently not included in the
previous
>submitted microcode container file.
> * Update the Version for family 15h microcode .bin file
> Key Name= AMD Microcode
On Sat, May 19, 2018 at 04:45:43AM +0200, Frederic Weisbecker wrote:
> Migrate to the new API in order to remove arch_validate_hwbkpt_settings()
> that clumsily mixes up architecture validation and commit.
>
> Signed-off-by: Frederic Weisbecker
> Cc: Linus Torvalds
The current Wound-Wait mutex algorithm is actually not Wound-Wait but
Wait-Die. Implement also Wound-Wait as a per-ww-class choice. Wound-Wait
is, contrary to Wait-Die a preemptive algorithm and is known to generate
fewer backoffs in some cases. Testing reveals that this is true if the
number of
Hi Michel,
On Wed, May 23, 2018 at 10:17 AM, M P wrote:
> On Wed, 23 May 2018 at 08:26, Geert Uytterhoeven
> wrote:
>> On Wed, May 23, 2018 at 8:44 AM, M P wrote:
>> > On Tue, 22 May 2018 at 19:44, Geert Uytterhoeven
Commit-ID: 2539fc82aa9b07d968cf9ba1ffeec3e0416ac721
Gitweb: https://git.kernel.org/tip/2539fc82aa9b07d968cf9ba1ffeec3e0416ac721
Author: Patrick Bellasi
AuthorDate: Thu, 24 May 2018 15:10:23 +0100
Committer: Ingo Molnar
CommitDate: Fri, 25 May
Commit-ID: 4ff648decf4712d39f184fc2df3163f43975575a
Gitweb: https://git.kernel.org/tip/4ff648decf4712d39f184fc2df3163f43975575a
Author: Sebastian Andrzej Siewior
AuthorDate: Thu, 24 May 2018 15:26:48 +0200
Committer: Ingo Molnar
CommitDate: Fri,
The `events_lock' is acquired during suspend while interrupts are
disabled even on RT. The lock is taken only for a very brief moment.
Make it a RAW lock which avoids "sleeping while atomic" warnings on RT.
Signed-off-by: Sebastian Andrzej Siewior
---
Hi Stephen,
> -Original Message-
> From: Stephen Boyd [mailto:sb...@kernel.org]
> Sent: Saturday, March 24, 2018 12:53 AM
> To: A.s. Dong ; linux-...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> mturque...@baylibre.com;
Patch #1 is a repost with the s2idle bits included. I tested via
echo s2idle > mem_sleep && echo mem > state
and I woke up the machine via the power on button. Patches #2+ were
additionally required with s2idle.
Sebastian
Commit-ID: a1150c202207cc8501bebc45b63c264f91959260
Gitweb: https://git.kernel.org/tip/a1150c202207cc8501bebc45b63c264f91959260
Author: Song Liu
AuthorDate: Thu, 3 May 2018 12:47:16 -0700
Committer: Ingo Molnar
CommitDate: Fri, 25 May 2018
Commit-ID: 8ecf04e11283a28ca88b8b8049ac93c3a99fcd2c
Gitweb: https://git.kernel.org/tip/8ecf04e11283a28ca88b8b8049ac93c3a99fcd2c
Author: Patrick Bellasi
AuthorDate: Thu, 24 May 2018 15:10:22 +0100
Committer: Ingo Molnar
CommitDate: Fri, 25 May
The Sub channel event callback may be called with interrupt
or thread context.
Let's thread the FSM action using workqueues.
The update of the SCHIB is now done inside an FSM action.
using the VFIO_CCW_EVENT_SCHIB_CHANGED event to guaranty
coherency with other FSM events.
Signed-off-by: Pierre
We change the FSM functions to return the next state,
and adapt the fsm_func_t function type.
This will allow to factor FSM state change out of
the action routine.
Signed-off-by: Pierre Morel
---
drivers/s390/cio/vfio_ccw_fsm.c | 23 ++-
Let's move the state change from the IRQ routine to the
workqueue callback.
Signed-off-by: Pierre Morel
---
drivers/s390/cio/vfio_ccw_drv.c | 20 +++-
drivers/s390/cio/vfio_ccw_fsm.c | 14 --
2 files changed, 15 insertions(+), 19
We use mutex around the FSM function call to make the FSM
event handling and state change atomic.
Signed-off-by: Pierre Morel
---
drivers/s390/cio/vfio_ccw_drv.c | 3 +--
drivers/s390/cio/vfio_ccw_private.h | 3 +++
2 files changed, 4 insertions(+), 2 deletions(-)
The write callback uses the a memory cell of the io_region
as the instruction to proceed.
Since we currently ever used only one instruction, SSCH,
let's state that we can only handle one instruction at a time
- by using a switch/case
- by changing the name of the event to VFIO_CCW_EVENT_SSCH_REQ
On Thu, May 24, 2018 at 12:50:23PM -0500, Rob Herring wrote:
> Now that we use the driver core to stop deferred probe for missing
> drivers, IOMMU_OF_DECLARE can be removed.
>
> This is slightly less optimal than having a list of built-in drivers in
> that we'll now defer probe twice before
On Mon, 2018-05-07 at 10:25:38 UTC, Shilpasri G Bhat wrote:
> This patch exports the accumulated power numbers of each power
> sensor maintained by OCC.
>
> Signed-off-by: Shilpasri G Bhat
> Acked-by: Guenter Roeck
Applied to powerpc next,
On Thu, 2018-03-22 at 20:19:54 UTC, Mathieu Malaterre wrote:
> These functions can all be static, make it so. Fix warnings treated as
> errors with W=1:
>
> arch/powerpc/kernel/tau_6xx.c:53:6: error: no previous prototype for
> âset_thresholdsâ [-Werror=missing-prototypes]
>
On Wed, 2018-04-04 at 20:10:28 UTC, Mathieu Malaterre wrote:
> Some function prototypes and body for Thermal Assist Units were not in
> sync. Update the function definition to match the existing function
> declaration found in `setup-common.c`, changing an `int` return type to a
> `u32` return
On Thu, May 24, 2018 at 05:29:43PM +0200, Michal Hocko wrote:
> > ie if we had more,
> > could we solve our pain by making them more generic?
>
> Well, if you have more you will consume more bits in the struct pages,
> right?
Not necessarily ... the zone number is stored in the struct page
On Fri, May 25, 2018 at 6:12 AM, Andreas Färber wrote:
> I fail to understand how splitting the MAINTAINERS section is going to
> help with the pinctrl conflict at hand?
OK let's keep it like it is then, one entry.
>The problem is that instead of
> refactoring my S500 pinctrl
On 05/15/2018 04:14 PM, Richard Genoud wrote:
On 15/05/2018 14:47, Radu Pirea wrote:
On Mon, 2018-05-14 at 12:57 +0200, Richard Genoud wrote:
After your patch, the DMA is not selected anymore:
atmel_usart_serial atmel_usart_serial.0.auto: TX channel not
available, switch to pio
instead of:
On Thu, May 24, 2018 at 08:52:14PM -0700, Florian Fainelli wrote:
> Remove redundant debug prints from phy_read/write since we can trace those
> calls through trace events. Enhance dynamic debug prints to print arguments
> which helps figuring how what is going on at the driver level with higher
The algorithm used for linux Wound/Wait mutexes, is actually not Wound/Wait
but Wait/Die. See for example
http://www.mathcs.emory.edu/~cheung/Courses/554/Syllabus/8-recv+serial/deadlock-compare.html
Rather than renaming them across the tree to something like Wait/Die mutexes or
Deadlock
For modeset locks we don't expect a high number of contending
transactions so change algorithm from Wait-Die to Wound-Wait.
Signed-off-by: Thomas Hellstrom
---
drivers/gpu/drm/drm_modeset_lock.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Currently userspace can only determine whether a mountpoint is shared
by parsing /proc//mountinfo. It would be convenient to simply retrieve
this property with a statvfs() call.
This let's userspace avoid costly parsing, supports cases where /proc is
not mounted, and supports usecases where file
Hi Bjorn,
On Fri, May 25, 2018 at 4:01 AM, Bjorn Andersson
wrote:
> The UFS host controller occationally (20%) fails to enable
> gcc_ufs_axi_clk because the UFS GDSC is not enabled. In most cases it's
> enabled through the UFS phy driver, but to make sure it's enabled
The definitions for MS_* flags are currently a mixture between hex values
and bit-shifts. All higher values are already initialized with bit-shifts
for MS_* constants starting with (1<<16).
This patch switches the definitions for MS_* constants over to uniformly
use bit-shifts.
Note that the BIT()
On Fri, 25 May 2018 04:56:25 +0200
Frederic Weisbecker wrote:
> On Tue, May 22, 2018 at 10:10:19PM +0300, Yauheni Kaliuta wrote:
> > Hi, Frederic!
> >
> > > On Mon, 29 Jan 2018 02:10:26 +0100, Frederic Weisbecker wrote:
> > > On Wed, Jan 24, 2018 at 10:46:08AM
Call trace:
[] dump_backtrace+0x0/0x428
[] show_stack+0x28/0x38
[] dump_stack+0xd4/0x124
[] print_address_description+0x68/0x258
[] kasan_report.part.2+0x228/0x2f0
[] kasan_report+0x5c/0x70
[] check_memory_region+0x12c/0x1c0
[] memcpy+0x34/0x68
[] xattr_getsecurity+0xe0/0x160
[]
Hi Alex,
> -Original Message-
> From: Alex Williamson [mailto:alex.william...@redhat.com]
> Sent: Thursday, May 24, 2018 7:21 PM
> To: Shameerali Kolothum Thodi
> Cc: eric.au...@redhat.com; pmo...@linux.vnet.ibm.com;
> k...@vger.kernel.org;
On Fri, May 25, 2018 at 8:27 AM, George Cherian
wrote:
> Hi Prashanth,
>
>
> On 05/25/2018 12:55 AM, Prakash, Prashanth wrote:
>>
>> Hi George,
>>
>> On 5/22/2018 5:42 AM, George Cherian wrote:
>>>
>>> Per Section 8.4.7.1.3 of ACPI 6.2, The platform provides
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