Like phys, target_pwrs could be allocated with devm_ function
Signed-off-by: Corentin Labbe
---
drivers/ata/libahci_platform.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c
index be9f54423a9b..fe8939e161ea
The documentation about parameter for ahci_platform_shutdown has a typo.
This fix the following build warning:
drivers/ata/libahci_platform.c:693: warning: Function parameter or member
'pdev' not described in 'ahci_platform_shutdown'
drivers/ata/libahci_platform.c:693: warning: Excess function
It's better to kcalloc instead of kzalloc(n * sizeof())
Signed-off-by: Corentin Labbe
---
drivers/ata/libahci_platform.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c
index 70052c046559..be9f54423a9b
On Thu, 2018-07-12 at 17:53 +1000, Joel Stanley wrote:
> On 12 July 2018 at 13:48, Benjamin Herrenschmidt
> wrote:
> > The Aspeed AST2x00 can contain a ColdFire v1 coprocessor which
> > is currently unused on OpenPower systems.
> >
> > This adds an alternative to the fsi-master-gpio driver that
Masahiro Yamada writes:
> 2018-07-09 20:39 GMT+09:00 Dirk Gouders :
>> Dirk Gouders writes:
>>
>>> Dirk Gouders writes:
>>>
Masahiro Yamada writes:
> syncconfig updates the .config only when sym_change_count > 0, i.e.
> any change in config symbols has been detected.
>
From: Peter De-Schrijver
Add a clock type to model the sdmmc switch divider clocks which have paths
to source clocks bypassing the divider (Low Jitter paths). These
are handled by selecting the lj path when the divider is 1 (ie the
rate is the parent rate), otherwise the normal path with divider
On Thu, Jul 12, 2018 at 09:40:40AM +0200, Peter Zijlstra wrote:
> On Wed, Jul 11, 2018 at 02:34:21PM +0200, Andrea Parri wrote:
> > Simplicity is the eye of the beholder. From my POV (LKMM maintainer), the
> > simplest solution would be to get rid of rfi-rel-acq and unlock-rf-lock-po
> > (or its
From: Peter De Schrijver
Move this to a separate file so it can be used to calculate the sdmmc
clock dividers.
Signed-off-by: Peter De-Schrijver
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
Acked-by: Jon Hunter
---
drivers/clk/tegra/Makefile | 1 +
From: Peter De-Schrijver
These clocks have low jitter paths to certain parents. To model these
correctly, use the sdmmc mux divider clock type.
Signed-off-by: Peter De-Schrijver
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
---
drivers/clk/tegra/clk-id.h | 2 --
The SDMMC clocks have a Low Jitter (LJ) clock path which bypasses a
divider to achieve better jitter performance with high speed signaling
modes. The clock path with the divider is needed by some of the slower
signaling modes. This series automatically multiplexes the LJ and
non-LJ clock paths
Add the missing linux/delay.h include statement for udelay() used by
fence_udelay() macro.
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
Acked-by: Jon Hunter
---
drivers/clk/tegra/clk.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/tegra/clk.h
On Mon, Jul 09, 2018 at 06:42:29PM -0400, Boris Ostrovsky wrote:
> On 07/02/2018 12:02 PM, Mark Rutland wrote:
> > On Mon, Jul 02, 2018 at 05:46:55PM +0200, Peter Zijlstra wrote:
> >> On Mon, Jul 02, 2018 at 04:12:50PM +0100, Mark Rutland wrote:
> >>> +static struct pt_regs
On 07/12/2018 01:10 PM, David Woodhouse wrote:
> On Thu, 2018-07-12 at 13:00 +0200, Christian Borntraeger wrote:
>>
>> On s390 this seems to add about 10ns (~3%) for a guest exit/rentry
>> microbenchmark mostly due to rcu_eqs_enter and rcu_eqs_exit now being
>> visible in perf samples. The
This patch adds a device tree platform
driver description for Cadence UFS Controller.
Signed-off-by: Jan Kotas
---
.../devicetree/bindings/ufs/cdns,ufshc.txt | 31 ++
1 file changed, 31 insertions(+)
create mode 100644
Hi all,
The Tegra Power Management Controller (PMC) can set pad power states
and voltage configuration. This series implements pinctrl interfaces
for configuring said pad properties.
Changelog
v3:
- Don't expose tegra_io_pad_is_powered()
- Remove tegra_io_pad_set_voltage() stub
Refactor the IO pad tables into macro tables so that they can be reused
to generate pinctrl pin descriptors. Also add a name field which is
needed by pinctrl.
Signed-off-by: Aapo Vienamo
---
drivers/soc/tegra/pmc.c | 233 ++--
1 file changed, 127
Register a pinctrl device and implement get and set functions for
PIN_CONFIG_LOW_POWER_MODE and PIN_CONFIG_POWER_SOURCE parameters.
Signed-off-by: Aapo Vienamo
---
drivers/soc/tegra/pmc.c | 187 +++-
1 file changed, 185 insertions(+), 2 deletions(-)
Factor out the the code to calculate the correct DPD register and bit
number for a given pad. This logic will be needed to query the status
register.
Signed-off-by: Aapo Vienamo
Acked-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 20 +---
1 file changed, 17 insertions(+), 3
Implement a function to query whether a pad is in deep power down mode.
This will is needed by the pinctrl callbacks.
Signed-off-by: Aapo Vienamo
Acked-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/soc/tegra/pmc.c
Signed-off-by: Lubomir Rintel
---
net/mac80211/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/mac80211/Kconfig b/net/mac80211/Kconfig
index 76e30f4797fb..7dc77fc91891 100644
--- a/net/mac80211/Kconfig
+++ b/net/mac80211/Kconfig
@@ -79,7 +79,7 @@ config
Make tegra_io_pad_set_voltage() and tegra_io_pad_get_voltage() static
and remove the prototypes from pmc.h. Remove enum tegra_io_pad_voltage
and use the defines from
instead.
These functions aren't used outside of the pmc driver and new use cases
should use the pinctrl interface instead.
On Wed, 2018-07-11 at 14:08 -0700, Paul E. McKenney wrote:
>
> > Also... why in $DEITY's name was the existing
> > rcu_virt_note_context_switch() not actually sufficient? If we had that
> > there, why did we need an additional explicit calls to rcu_all_qs() in
> > the KVM loop, or the more
Document the pinctrl bindings used by the PMC driver for performing pad
configuration. Both nvidia,tegra186-pmc.txt and nvidia,tegra20-pmc.txt
are modified as they both cover SoC generations for which these bindings
apply.
Add a header defining Tegra PMC pad voltage configurations.
On Thu, Jul 12, 2018 at 01:52:49PM +0200, Andrea Parri wrote:
> On Thu, Jul 12, 2018 at 09:40:40AM +0200, Peter Zijlstra wrote:
> > On Wed, Jul 11, 2018 at 02:34:21PM +0200, Andrea Parri wrote:
> > > Simplicity is the eye of the beholder. From my POV (LKMM maintainer), the
> > > simplest solution
Implement support for the PMC_IMPL_E_33V_PWR register which replaces
PMC_PWR_DET register interface of the SoC generations preceding
Tegra186. Also add the voltage bit offsets to the tegra186_io_pads[]
table and the AO_HV pad.
Signed-off-by: Aapo Vienamo
Acked-by: Jon Hunter
---
Thanks Vinod for taking look at this!
On 12/07/18 11:59, Vinod wrote:
On 11-07-18, 09:43, Srinivas Kandagatla wrote:
This patch aims at add achieving dynamic behaviour of audio card when
the dependent components disappear and reappear.
With this patch the card is removed if any of the
On 07/12/2018 01:58 PM, Christian Borntraeger wrote:
>
>
> On 07/12/2018 01:10 PM, David Woodhouse wrote:
>> On Thu, 2018-07-12 at 13:00 +0200, Christian Borntraeger wrote:
>>>
>>> On s390 this seems to add about 10ns (~3%) for a guest exit/rentry
>>> microbenchmark mostly due to
On Wed, Jul 11, 2018 at 07:37:05PM +0200, David Sterba wrote:
> On Wed, Jul 11, 2018 at 06:49:46AM +0100, Mark Rutland wrote:
> > > > Dave pointed out that it would be useful to be able to opt-in to full
> > > > checks
> > > > regardless of CONFIG_REFCOUNT_FULL, so that we can simplify callsites
On 07/12/18 at 09:19am, Chao Fan wrote:
> On Wed, Jul 11, 2018 at 08:40:08PM +0800, Baoquan He wrote:
> >Please try this v3 patch:
> >
> >From 9850d3de9c02e570dc7572069a9749a8add4c4c7 Mon Sep 17 00:00:00 2001
> >From: Baoquan He
> >Date: Wed, 11 Jul 2018 20:31:51 +0800
> >Subject: [PATCH v3] mm,
On Wed, Jul 11, 2018 at 05:05:32PM -0700, Kees Cook wrote:
> On Fri, Jun 29, 2018 at 12:05 PM, Laura Abbott wrote:
> > include/linux/stackleak.h | 1 +
> > [...]
> > diff --git a/include/linux/stackleak.h b/include/linux/stackleak.h
> > index e2da99b3a191..00d62b302efb 100644
> > ---
On Thu, Jul 12, 2018 at 02:01:00PM +0200, Andrea Parri wrote:
> > OTOH (as I pointed out earlier) the strengthening we're configuring
> > will prevent some arch. (riscv being just the example of today!) to
> > go "full RCsc", and this will inevitably "complicate" both the LKMM
>
> "full RCpc"
Hi,
On 12-07-18 13:41, Corentin Labbe wrote:
Hello
This patchset fixes some minor problem found when working on supporting
allwinner R40 AHCI.
Regards
Thanks.
The entire series looks good to me:
Reviewed-by: Hans de Goede
Regards,
Hans
Hi Stephen,
Thanks for the review comments.
Regards,
Amit
On 2018-07-09 11:04, Stephen Boyd wrote:
Quoting Amit Nischal (2018-06-06 04:41:45)
For some of the GDSCs, there is a requirement to enable/disable the
few clocks before turning on/off the gdsc power domain. Add support
Why is there
Hi Jacek,
On 12 July 2018 at 05:10, Jacek Anaszewski wrote:
> Hi Baolin.
>
>
> On 07/11/2018 01:02 PM, Baolin Wang wrote:
>>
>> Hi Jacek and Pavel,
>>
>> On 29 June 2018 at 13:03, Baolin Wang wrote:
>>>
>>> From: Bjorn Andersson
>>>
>>> Some LED controllers have support for autonomously
On 2018-07-09 11:45, Stephen Boyd wrote:
Quoting Amit Nischal (2018-06-06 04:41:46)
To turn on the gpu_gx_gdsc, there is a hardware requirement to
turn on the root clock (GFX3D RCG) first which would be the turn
on signal for the gdsc along with the SW_COLLAPSE. As per the
current
On Wed, 11 Jul 2018 14:02:20 -0700
Matthew Wilcox wrote:
> The previous comment misled me into thinking the barrier wasn't needed
> at all.
>
> Signed-off-by: Matthew Wilcox
> ---
Reviewed-by: Greg Kurz
> net/9p/client.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff
On Thu, 05 Jul 2018, Matti Vaittinen wrote:
> Document devicetree bindings for ROHM BD71837 PMIC MFD.
>
> Signed-off-by: Matti Vaittinen
> ---
> .../devicetree/bindings/mfd/rohm,bd71837-pmic.txt | 62
> ++
> 1 file changed, 62 insertions(+)
> create mode 100644
>
On 2018-07-09 11:08, Stephen Boyd wrote:
Quoting Amit Nischal (2018-06-06 04:41:47)
diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.txt
b/Documentation/devicetree/bindings/clock/qcom,gpucc.txt
new file mode 100644
index 000..e311219
--- /dev/null
+++
On Thu 12-07-18 14:01:15, Chao Fan wrote:
> On Thu, Jul 12, 2018 at 01:49:49PM +0800, Dou Liyang wrote:
> >Hi Baoquan,
> >
> >At 07/11/2018 08:40 PM, Baoquan He wrote:
> >> Please try this v3 patch:
> >> >>From 9850d3de9c02e570dc7572069a9749a8add4c4c7 Mon Sep 17 00:00:00 2001
> >> From: Baoquan He
On Wed, 11 Jul 2018 14:02:21 -0700
Matthew Wilcox wrote:
> Return NULL instead of ERR_PTR when we can't allocate a FID. The ENOSPC
> return value was getting all the way back to userspace, and that's
> confusing for a userspace program which isn't expecting read() to tell it
> there's no space
On 2018-07-09 11:37, Stephen Boyd wrote:
Quoting Amit Nischal (2018-06-06 04:41:48)
diff --git a/drivers/clk/qcom/gpucc-sdm845.c
b/drivers/clk/qcom/gpucc-sdm845.c
new file mode 100644
index 000..81f8926
--- /dev/null
+++ b/drivers/clk/qcom/gpucc-sdm845.c
@@ -0,0 +1,441 @@
+//
On 12-07-18, 13:02, Srinivas Kandagatla wrote:
> Thanks Vinod for taking look at this!
>
> On 12/07/18 11:59, Vinod wrote:
> > On 11-07-18, 09:43, Srinivas Kandagatla wrote:
> > > This patch aims at add achieving dynamic behaviour of audio card when
> > > the dependent components disappear and
On Wed, Jul 11, 2018 at 05:15:40PM +0100, Al Viro wrote:
> Actually, looking at the entire thing, I'm rather tempted to go for
> alloc_empty_file(f_flags, cred)
> setting both f_flags and f_flags-derived part of f_mode, making
> alloc_file_pseudo(inode, mnt, name, f_flags, ops)
>
Hi Lee,
On 12/07/2018 14:26, Lee Jones wrote:
> On Wed, 04 Jul 2018, Neil Armstrong wrote:
>
>> Hi All,
>>
>> The new Google "Fizz" Intel-based ChromeOS device is gaining CEC support
>> through it's Embedded Controller, to enable the Linux CEC Core to communicate
>> with it and get the CEC
On 06/29/2018 11:11 PM, Tony Krowiak wrote:
Implements the open callback on the mediated matrix device.
The function registers a group notifier to receive notification
of the VFIO_GROUP_NOTIFY_SET_KVM event. When notified,
the vfio_ap device driver will get access to the guest's
kvm
Hi Dear, my name is Jack and i am seeking for a relationship in which i will
feel loved after a series of failed relationships.
I am hoping that you would be interested and we could possibly get to know each
other more if you do not mind. I am open to answering questions from you as i
think
From: Ville Syrjälä
Make it possible to answer "m or y" or "y or m" to
oldconfig so that scripted kernel builds can easily
enable new features not present in the existing .config.
The particular use case I have in mind is continuous integration
where you probably want to test build any new
On Thu, Jul 12, 2018 at 01:00:42PM +0100, David Woodhouse wrote:
>
>
> On Wed, 2018-07-11 at 14:08 -0700, Paul E. McKenney wrote:
> >
> > > Also... why in $DEITY's name was the existing
> > > rcu_virt_note_context_switch() not actually sufficient? If we had that
> > > there, why did we need an
On Wed, Jul 11, 2018 at 10:51:33AM +0100, David Howells wrote:
> Can you say what the --target tuple should be so that I can add the arch to my
> collection of Fedora cross-binutils and cross-gcc tools built from upstream
> binutils and gcc sources?
Metor Graghics are helping us upstream gcc and
On 12/07/18 11:07, Stefan Agner wrote:
> In the uSDHC case (e.g. i.MX 6) clocks only get disabled if frequency
> is set to 0. However, it could be that the stack asks for a frequency
> change while clocks are on. In that case the function clears the
> divider registers (by clearing
On 12/07/18 11:07, Stefan Agner wrote:
> Fix indent. This also makes disable/enable clock blocks look
> alike.
>
> Signed-off-by: Stefan Agner
Acked-by: Adrian Hunter
> ---
> drivers/mmc/host/sdhci-esdhc-imx.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
[CC Jesper - I remember he was really concerned about the worst case
latencies for highspeed network workloads.]
Sorry for top posting but I do not want to torture anybody to scroll
down the long changelog which I want to preserve for Jesper.
I personally do not mind this change. I usually find
On 12/07/18 12:53, Aapo Vienamo wrote:
> From: Peter De-Schrijver
>
> Add a clock type to model the sdmmc switch divider clocks which have paths
> to source clocks bypassing the divider (Low Jitter paths). These
> are handled by selecting the lj path when the divider is 1 (ie the
> rate is the
On 12/07/18 12:53, Aapo Vienamo wrote:
> From: Peter De-Schrijver
>
> These clocks have low jitter paths to certain parents. To model these
> correctly, use the sdmmc mux divider clock type.
>
> Signed-off-by: Peter De-Schrijver
> Signed-off-by: Aapo Vienamo
> Acked-by: Peter De Schrijver
On Thu, 05 Jul 2018, Matti Vaittinen wrote:
> ROHM BD71837 PMIC MFD driver providing interrupts and support
> for three subsystems:
> - clk
> - Regulators
> - input/power-key
>
> Signed-off-by: Matti Vaittinen
> ---
> drivers/mfd/Kconfig | 13 ++
> drivers/mfd/Makefile
On Wed, 11 Jul 2018 21:42:53 -0700
Joe Perches wrote:
> > I just noticed this patch. Please don't send patches Cc'd to other
> > threads. They need to start a new thread, otherwise, like this one, it
> > will most likely be lost.
> >
> > If you want this applied still, please resend it
Coutts & Co Ltd
440 Strand, London, WC2R 0QS
Website: https://www.coutts.com
Telephone:+4420 3389 7785 & +4420 7753 1000
Fax:+44 872 110 3479
OUR REF: Coutts/UK/2018/LOANAPP
YOUR REF:LOANAPPT/Coutts/JULY/2018
TO WHOM IT MAY CONCERN
We give out both Local/International Loan starting from 2.75%*
On 12/07/18 13:00, Aapo Vienamo wrote:
> Register a pinctrl device and implement get and set functions for
> PIN_CONFIG_LOW_POWER_MODE and PIN_CONFIG_POWER_SOURCE parameters.
>
> Signed-off-by: Aapo Vienamo
> ---
> drivers/soc/tegra/pmc.c | 187
>
The CHECKPOINT_RESTORE configuration option was introduced in 2012 and
combined with EXPERT. CHECKPOINT_RESTORE is already enabled in many
distribution kernels and also part of the defconfigs of various
architectures.
To make it easier for distributions to enable CHECKPOINT_RESTORE this
removes
On Thu, 12 Jul 2018 13:59:58 +0100
Jon Hunter wrote:
> On 12/07/18 12:53, Aapo Vienamo wrote:
> > From: Peter De-Schrijver
> >
> > These clocks have low jitter paths to certain parents. To model these
> > correctly, use the sdmmc mux divider clock type.
> >
> > Signed-off-by: Peter
This driver will add a MMC clock controller driver support.
The original idea about adding a clock controller is during the
discussion in the NAND driver mainline effort[1].
I've tested this in the S400 board (AXG platform) by using NAND driver.
Changes since v2 [3]:
- squash dt-binding
Document the MMC sub clock controller driver, the potential consumer
of this driver is MMC or NAND. Also add three clock bindings IDs which
provided by this driver.
Signed-off-by: Yixun Lan
---
.../bindings/clock/amlogic,mmc-clkc.txt | 31 +++
The patch will add a MMC clock controller driver which used by MMC or NAND,
It provide a mux and divider clock, and three phase clocks - core, tx, tx.
Two clocks are provided as the parent of MMC clock controller from
upper layer clock controller - eg "amlogic,axg-clkc" in AXG platform.
To
On 06/29/2018 11:11 PM, Tony Krowiak wrote:
From: Tony Krowiak
Configures the AP adapters, usage domains and control domains for the
[..]
+static inline void kvm_ap_clear_crycb_masks(struct ap_matrix_mdev *matrix_mdev)
+{
+ memset(_mdev->kvm->arch.crypto.crycb->apcb0, 0,
+
On Wed, 11 Jul 2018 17:40:07 -0700
Matt Ranostay wrote:
> On Wed, Jul 11, 2018 at 5:13 AM, Himanshu Jha
> wrote:
> > Bosch BME680 is a 4-in-1 sensor with temperature, pressure, humidity
> > and gas sensing capability. It supports both I2C and SPI communication
> > protocol for effective data
On Wed, Jul 11, 2018 at 07:33:36PM -0700, Andrey Smirnov wrote:
> Add DT code to explicitly configure PAD_AUD3_BB_CK and avoid relying
> on defaults.
>
> Cc: Fabio Estevam
> Cc: Nikita Yushchenko
> Cc: Lucas Stach
> Cc: cphe...@gmail.com
> Cc: Shawn Guo
> Cc: Rob Herring
> Cc: Mark Rutland
On Wed, 2018-07-04 at 11:13 +0200, Stefan Agner wrote:
> The Tegra driver currently only support a single chip select, hence
> check boundaries accordingly. This fixes a off by one issue catched
> with Smatch:
> drivers/mtd/nand/raw/tegra_nand.c:476 tegra_nand_select_chip()
> warn: array
On 12/07/18 14:11, Aapo Vienamo wrote:
> On Thu, 12 Jul 2018 13:59:58 +0100
> Jon Hunter wrote:
>
>> On 12/07/18 12:53, Aapo Vienamo wrote:
>>> From: Peter De-Schrijver
>>>
>>> These clocks have low jitter paths to certain parents. To model these
>>> correctly, use the sdmmc mux divider clock
On Wed, 11 Jul 2018 21:28:25 -0700
Joel Fernandes wrote:
> On Wed, Jul 11, 2018 at 11:21:20PM -0400, Steven Rostedt wrote:
> > On Wed, 11 Jul 2018 13:52:49 -0700
> > Joel Fernandes wrote:
> >
> > > > #define __DECLARE_TRACE(name, proto, args, cond, data_proto, data_args)
> > > > \
> > > >
On Thu, 12 Jul 2018 01:38:05 -0700
Joel Fernandes wrote:
> So actually with or without the clean up, I don't see any issues with
> dropping lockdep_recursing in my tests at the moment. I'm not sure something
> else changed between then and now causing the issue to go away. I can include
>
Hi Andrey,
On Wed, Jul 11, 2018 at 11:33 PM, Andrey Smirnov
wrote:
> + pinctrl_switch: switchgrp {
> + fsl,pins = <
> + MX51_PAD_AUD3_BB_CK__GPIO4_20 0xc5
The i.MX51 Reference Manual states that 0xa5 is the default reset
value for the
On Thu, Jul 12, 2018 at 12:48:54AM +, Hugh Dickins wrote:
> __split_huge_pmd_locked() must check if the cleared huge pmd was dirty,
> and propagate that to PageDirty: otherwise, data may be lost when a huge
> tmpfs page is modified then split then reclaimed.
>
> How has this taken so long to
On 07/11, Eric W. Biederman wrote:
>
> Oleg Nesterov writes:
>
> >> - recalc_sigpending();
> >> - if (signal_pending(current)) {
> >> + if (read_seqcount_retry(>signal->multi_process_seq, seq) ||
> >> + fatal_signal_pending(current)) {
> >>retval = -ERESTARTNOINTR;
> >>
Commit 205e1b7f51e4 ("dma-mapping: warn when there is no coherent_dma_mask")
introduced a warning, if a device is missing a coherent_dma_mask.
ESP and sonic are using dma mapping functions, so they need dma masks.
Signed-off-by: Thomas Bogendoerfer
---
arch/mips/jazz/setup.c | 17
On Thu, Jul 12, 2018 at 01:31:57PM +, Marcel Ziswiler wrote:
> On Wed, 2018-07-04 at 11:13 +0200, Stefan Agner wrote:
> > The Tegra driver currently only support a single chip select, hence
> > check boundaries accordingly. This fixes a off by one issue catched
> > with Smatch:
> >
On Wed, 11 Jul 2018 15:34:30 -0400
Francis Deslauriers wrote:
> Hi Steven,
> I tested it and it prevents the kernel crash I am witnessing.
> As for the side-effect that Masami mentioned regarding not being able to probe
> function inside the trace_kprobe.c file, I suggest we move the target
>
Hi Leonard,
On Thu, Jul 12, 2018 at 10:37 AM, Leonard Crestez
wrote:
> diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
> index a6bc21433839..49a56b4fd393 100644
> --- a/arch/arm/boot/dts/imx6sl.dtsi
> +++ b/arch/arm/boot/dts/imx6sl.dtsi
> @@ -130,10 +130,30 @@
>
On 07/12, Adrian Reber wrote:
>
> The CHECKPOINT_RESTORE configuration option was introduced in 2012 and
> combined with EXPERT. CHECKPOINT_RESTORE is already enabled in many
> distribution kernels and also part of the defconfigs of various
> architectures.
>
> To make it easier for distributions
On Thu, Jul 12, 2018 at 03:07:33PM +0200, Adrian Reber wrote:
> The CHECKPOINT_RESTORE configuration option was introduced in 2012 and
> combined with EXPERT. CHECKPOINT_RESTORE is already enabled in many
> distribution kernels and also part of the defconfigs of various
> architectures.
>
> To
On Thu, Jul 12, 2018 at 01:52:49PM +0200, Andrea Parri wrote:
> On Thu, Jul 12, 2018 at 09:40:40AM +0200, Peter Zijlstra wrote:
> > On Wed, Jul 11, 2018 at 02:34:21PM +0200, Andrea Parri wrote:
> > > 2) Resolve the above mentioned controversy (the inconsistency between
> > > - locking
On 12.07.2018 15:47, Hendrik Brueckner wrote:
On Thu, Jul 12, 2018 at 03:07:33PM +0200, Adrian Reber wrote:
The CHECKPOINT_RESTORE configuration option was introduced in 2012 and
combined with EXPERT. CHECKPOINT_RESTORE is already enabled in many
distribution kernels and also part of the
Stephan reported, that pipe mode does not carry the group
information and thus the piped report won't display the
grouped output for following command:
# perf record -e '{cycles,instructions,branches}' -a sleep 4 | perf report
It has no idea about the group setup, so it will display
events
* Arnaldo Carvalho de Melo wrote:
> Hi Ingo,
>
> Please consider pulling,
>
> - Arnaldo
>
> Test results at the end of this message, as usual.
>
> The following changes since commit 092150a25cb7bd6a79aa00bb1ad131063f58073d:
>
> Merge branch 'for-linus' of
>
On Thu, 12 Jul 2018 14:54:08 +0200
Michal Hocko wrote:
> [CC Jesper - I remember he was really concerned about the worst case
> latencies for highspeed network workloads.]
Cc. Tariq as he have hit some networking benchmarks (around 100Gbit/s),
where we are contenting on the page allocator
Ville Syrjälä wrote on Thu, Jul 12, 2018:
> On Wed, Jul 11, 2018 at 09:46:15AM +0200, Dominique Martinet wrote:
> > This is effectively no-op as the next line writes a nul at the final
>
> What is "This". Please write self contained commit messages.
This could either be 'this commit' as a whole
* Adam Ford [180711 10:58]:
> The AM3517 has a different OTG controller location than the OMAP3,
> which is included from omap3.dtsi. This results in a hwmod error.
> Since the AM3517 has a different OTG controller address, this patch
> disabes one that is isn't available.
Applying into
On Wed, 11 Jul 2018 20:40:45 -0400
Francis Deslauriers wrote:
> Le mer. 11 juill. 2018, à 15 h 56, Steven Rostedt
> a écrit :
> >
> > On Wed, 11 Jul 2018 15:34:30 -0400
> > Francis Deslauriers wrote:
> >
> > > Hi Steven,
> > > I tested it and it prevents the kernel crash I am witnessing.
> > >
Commit-ID: 770d2f86c0051d4f2c0ab9d74d68434cb383241d
Gitweb: https://git.kernel.org/tip/770d2f86c0051d4f2c0ab9d74d68434cb383241d
Author: Jeremy Cline
AuthorDate: Tue, 8 May 2018 21:27:45 +
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 11 Jul 2018 10:01:50 -0300
perf scripts
On 07/11/2018 03:57 PM, Thomas Backlund wrote:
> Den 2018-07-11 kl. 20:28, skrev Jiri Kosina:
>> On Wed, 11 Jul 2018, Linus Torvalds wrote:
>>
>>> It's the testing that worries me most. Pretty much no developers run
>>> 32-bit any more, and I'd be most worried about the odd interactions
>>> that
Commit-ID: 2ab89262ff8895b8476b97345507c676fe3081fa
Gitweb: https://git.kernel.org/tip/2ab89262ff8895b8476b97345507c676fe3081fa
Author: Jeremy Cline
AuthorDate: Tue, 8 May 2018 21:27:45 +
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 11 Jul 2018 10:01:50 -0300
perf scripts
Commit-ID: 877cc639686b68c7de179a485544f4761e376b30
Gitweb: https://git.kernel.org/tip/877cc639686b68c7de179a485544f4761e376b30
Author: Jeremy Cline
AuthorDate: Tue, 8 May 2018 21:27:43 +
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 11 Jul 2018 10:01:50 -0300
perf tools:
Commit-ID: 508ef3e737bbb9858a30e7bb153507429ea89644
Gitweb: https://git.kernel.org/tip/508ef3e737bbb9858a30e7bb153507429ea89644
Author: Kim Phillips
AuthorDate: Fri, 29 Jun 2018 12:46:33 -0500
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 11 Jul 2018 10:01:51 -0300
perf test
Commit-ID: c45b168effb12719f6dfc8d2c20ba8c057e8c16b
Gitweb: https://git.kernel.org/tip/c45b168effb12719f6dfc8d2c20ba8c057e8c16b
Author: Jeremy Cline
AuthorDate: Tue, 8 May 2018 21:27:46 +
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 11 Jul 2018 10:01:50 -0300
perf scripts
"Metzger, Markus T" writes:
Adding Dave Hansen
> Hello,
>
> Starting with 4.15 I noticed that BTS is sporadically missing the tail
> of the trace in the perf_event data buffer. It shows as
>
> [decode error (1): instruction overflow]
>
> in GDB. Chances to see this are higher the longer
Commit-ID: 8c1c1ab2d2a77cb50841822168e56d11c4ebfd6e
Gitweb: https://git.kernel.org/tip/8c1c1ab2d2a77cb50841822168e56d11c4ebfd6e
Author: Jeremy Cline
AuthorDate: Tue, 8 May 2018 21:27:47 +
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 11 Jul 2018 10:01:50 -0300
perf scripts
Commit-ID: f6432b9f65001651412dbc3589d251534822d4ab
Gitweb: https://git.kernel.org/tip/f6432b9f65001651412dbc3589d251534822d4ab
Author: Kim Phillips
AuthorDate: Fri, 29 Jun 2018 12:46:52 -0500
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 11 Jul 2018 10:01:51 -0300
perf
Commit-ID: 12aa6c7389a321b4b5d921f89c3f83b9750598f7
Gitweb: https://git.kernel.org/tip/12aa6c7389a321b4b5d921f89c3f83b9750598f7
Author: Jeremy Cline
AuthorDate: Tue, 8 May 2018 21:27:48 +
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 11 Jul 2018 10:01:50 -0300
perf scripts
Commit-ID: db8fec583f250557ddd6def1505a6c466c9747aa
Gitweb: https://git.kernel.org/tip/db8fec583f250557ddd6def1505a6c466c9747aa
Author: Kim Phillips
AuthorDate: Fri, 29 Jun 2018 12:46:58 -0500
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 11 Jul 2018 10:01:51 -0300
perf test
Commit-ID: 98c6c8a1d00fba66625311730f80c6ceaa9c1d19
Gitweb: https://git.kernel.org/tip/98c6c8a1d00fba66625311730f80c6ceaa9c1d19
Author: Kim Phillips
AuthorDate: Fri, 29 Jun 2018 12:46:43 -0500
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 11 Jul 2018 10:01:51 -0300
perf test
Commit-ID: a09603f851045b031e990d2d663958ccb49db525
Gitweb: https://git.kernel.org/tip/a09603f851045b031e990d2d663958ccb49db525
Author: Jiri Olsa
AuthorDate: Mon, 2 Jul 2018 15:42:01 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 11 Jul 2018 09:39:57 -0400
perf tools: Fix
801 - 900 of 1294 matches
Mail list logo
