Hi Andrey,

On Wed, Jul 11, 2018 at 11:33 PM, Andrey Smirnov
<andrew.smir...@gmail.com> wrote:

> +       pinctrl_switch: switchgrp {
> +               fsl,pins = <
> +                       MX51_PAD_AUD3_BB_CK__GPIO4_20           0xc5

The i.MX51 Reference Manual states that 0xa5 is the default reset
value for the register IOMUXC_SW_PAD_CTL_PAD_AUD3_BB_CK.

By reading your commit log I had the impression you wanted to provide
the default value explicitly.

Please clarify.

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