On 11/08/2018 01:42 PM, Michal Hocko wrote:
> On Thu 08-11-18 12:46:47, Anshuman Khandual wrote:
>>
>>
>> On 11/07/2018 03:48 PM, Michal Hocko wrote:
> [...]
>>> @@ -1411,8 +1409,14 @@ do_migrate_range(unsigned long start_pfn, unsigned
>>> long end_pfn)
>>> /* Allocate a new page
On 07/11/2018 14:05, Peter Zijlstra wrote:
> On Wed, Nov 07, 2018 at 11:52:31AM +0100, Daniel Lezcano wrote:
>>> @@ -146,11 +152,38 @@ static void irqs_update(struct irqt_stat *irqs, u64
>>> ts)
>>> */
>>> diff = interval - irqs->avg;
>>>
>>> + /*
>>> +* Online average algorithm:
This patch is in preparation to a later patch which converts totalram_pages
and zone->managed_pages to atomic variables. Please note that re-reading
the value might lead to a different value and as such it could lead to
unexpected behavior. There are no known bugs as a result of the current code
On Wed, Nov 07, 2018 at 06:13:08PM +0800, Chen-Yu Tsai wrote:
> The AP6212 is based on the Broadcom BCM43430 or BCM43438. The WiFi side
> identifies as BCM43430, while the Bluetooth side identifies as BCM43438.
>
> The Bluetooth side is connected to UART1 in a 4 wire configuration. Same
> as the
* Thomas Gleixner wrote:
> +Variable types
> +^^
> +
> +Please use the proper u8, u16, u32, u64 types for variables which are meant
> +to describe hardware or are used as arguments for functions which access
> +hardware. These types are clearly defining the bit width and avoid
>
Hello,
On Thu, Nov 08, 2018 at 07:22:00AM +0100, Uwe Kleine-König wrote:
> On Wed, Nov 07, 2018 at 03:32:51PM -0800, Andrew Morton wrote:
> > On Tue, 23 Oct 2018 09:08:02 +0200 Uwe Kleine-König
> > wrote:
> >
> > > Without this change the following happens when using Python3 (3.6.6):
> > >
>
On Thu 08-11-18 11:53:21, Anshuman Khandual wrote:
>
>
> On 11/07/2018 03:48 PM, Michal Hocko wrote:
> > From: Michal Hocko
> >
> > The memory offlining failure reporting is inconsistent and insufficient.
> > Some error paths simply do not report the failure to the log at all.
> > When we do
On Wednesday, November 7, 2018 6:04:12 PM CET Doug Smythies wrote:
> On 2018.11.04 08:31 Rafael J. Wysocki wrote:
>
> > v2 -> v3:
> > * Simplify the pattern detection code and make it return a value
> > lower than the time to the closest timer if the majority of recent
> > idle intervals
On Wed 07-11-18 14:04:13, Andrew Morton wrote:
[...]
> Fix:
>
> ---
> a/mm/memory_hotplug.c~mm-memory_hotplug-print-reason-for-the-offlining-failure-fix
> +++ a/mm/memory_hotplug.c
> @@ -1576,7 +1576,7 @@ static int __ref __offline_pages(unsigne
>
> From: Davidlohr Bueso
> Sent: Thursday, November 8, 2018 3:00 PM
>
> On Mon, 29 Oct 2018, chouryzhou(??) wrote:
> >@@ -63,6 +63,12 @@ struct ipc_namespace {
> >unsigned intmq_msg_default;
> >unsigned intmq_msgsize_default;
> >
> >+ /* next fields are for
* Thomas Gleixner wrote:
> +Commit notifications
> +
> +
> +The tip tree is monitored by a bot for new commits. The bot sends an email
> +for each new commit to a dedicated mailing list
> +(``linux-tip-comm...@vger.kernel.org``) and Cc's all people who are
> +mentioned in
On Thu 08-11-18 13:53:16, Arun KS wrote:
> totalram_pages, zone->managed_pages and totalhigh_pages updates
> are protected by managed_page_count_lock, but readers never care
> about it. Convert these variables to atomic to avoid readers
> potentially seeing a store tear.
>
> This patch converts
Hi Jiri,
On Wed, Nov 07, 2018 at 03:10:06PM +0100, Jiri Olsa wrote:
> On Fri, Nov 02, 2018 at 10:55:16AM +0800, leo@linaro.org wrote:
> > Hi all,
> >
> > Now I found that if use the command 'perf script' for Arm CoreSight trace
> > data, it fails to parse kernel symbols if we don't specify
On 11/8/18 00:14, Andrew Morton wrote:
> On Wed, 7 Nov 2018 08:21:07 +0200 Alexey Skidanov
> wrote:
>
>>> Why does this need "fixing"? Are there current callers which can
>>> misalign chunk_start_addr? Or is there a requirement that future
>>> callers can misalign chunk_start_addr?
>>>
>>
On 11/8/18 00:12, Andrew Morton wrote:
> On Wed, 7 Nov 2018 08:27:31 +0200 Alexey Skidanov
> wrote:
>
>>
>>
>> On 11/7/18 12:15 AM, Andrew Morton wrote:
>>> On Tue, 6 Nov 2018 14:20:53 +0200 Alexey Skidanov
>>> wrote:
>>>
On success, gen_pool_first_fit_align() returns the bit number
Am Mittwoch, 7. November 2018, 23:38:13 CET schrieb Brian Norris:
> The cros_ec_keyb_bs array lists buttons and switches together, expecting
> that its users will match the appropriate type and bit fields. But
> cros_ec_keyb_register_bs() only checks the 'bit' field, which causes
> misreported
This patch adds support of hardware semaphores for stm32mp1 SoC.
The hardware block provides 32 semaphores.
Signed-off-by: Benjamin Gaignard
---
version 2 :
- change clock name from hwspinlock to hsem to be align with hardware
documentation
- remove useless licence terms from header
- fix
v2: Changes in [1-2,5] patches. The biggest change is in [5],
where repeater FR_INTERRUPTED assignment is removed.
This patchset consists of several parts. Patches [1-2] optimize
likely case of request_end(), and make this function to take
fiq->waitq.lock only, when it is really needed. This
Declare hwspinlock device for stm32mp157 SoC
Signed-off-by: Benjamin Gaignard
---
version 2 :
- change clock name from hwspinlock to hsem to be align with hardware
documentation
arch/arm/boot/dts/stm32mp157c.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git
We should sent signal only in case of interrupt is really queued.
Not a real problem, but this makes the code clearer and intuitive.
v2: Move kill_fasync() under fiq->waitq.lock
Signed-off-by: Kirill Tkhai
---
fs/fuse/dev.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
This serie adds the support of the hardware semaphore block for stm32mp1 SoC.
version 2:
- fix comments done by Bjorn about clock naming, license terms in header,
alphabetic ordering in Makefile and Kconfig and remove function
- Do not push test module in this version while waiting for
This is needed for next patch.
Signed-off-by: Kirill Tkhai
---
fs/fuse/dev.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/fs/fuse/dev.c b/fs/fuse/dev.c
index cc9e5a9bb147..7684fb7dc680 100644
--- a/fs/fuse/dev.c
+++ b/fs/fuse/dev.c
@@ -1947,18 +1947,14 @@
When queue_interrupt() is called from fuse_dev_do_write(),
it came from userspace directly. Userspace may pass any
request id, even the request's we have not interrupted
(or even background's request). This patch adds sanity
check to make kernel safe against that.
v2: Keep in mind FR_INTERRUPTED
We take global fiq->waitq.lock every time, when we are
in this function, but interrupted requests are just small
subset of all requests. This patch optimizes request_end()
and makes it to take the lock when it's really needed.
queue_interrupt() needs small change for that. After req
is linked to
Add bindings for STM32 hardware spinlock device
Signed-off-by: Benjamin Gaignard
---
version 2 :
- change clock name from hwspinlock to hsem to be align with hardware
documentation
.../bindings/hwlock/st,stm32-hwspinlock.txt| 23 ++
1 file changed, 23
Currently, we wait on req->waitq in request_wait_answer()
function only, and it's never used for background requests.
Since wake_up() is not a light-weight macros, instead of this,
it unfolds in really called function, which makes locking
operations taking some cpu cycles, let's avoid its call
for
Activate hwspinlock for stm32mp157c-ed1
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index f77bea49c079..158a337b3129 100644
---
Couple of patches to enable i2c-omap driver to be used with TI's new
AM654 platforms.
v3:
Rebase onto v4.20-rc1
Collect Reviewed-by's on v2
Add a patch to MAINTAINERS for i2c-omap.c
Vignesh R (3):
dt-bindings: i2c-omap: Add new compatible for AM654 SoCs
i2c: busses: Kconfig: Enable I2C_OMAP
Allow I2C_OMAP to be built for K3 platforms.
Signed-off-by: Vignesh R
Reviewed-by: Grygorii Strashko
---
drivers/i2c/busses/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 56ccb1ea7da5..77dc94b44011
Add separate entry for i2c-omap and add my name as reviewer for this
driver.
Signed-off-by: Vignesh R
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8d4c874a5d6e..6519eea4813e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10821,6
On Wed, Nov 07, 2018 at 03:00:02PM -0800, Paul E. McKenney wrote:
> Hello!
>
> The header comment for for_each_domain() talks about a call to
> synchronize_sched() within detach_destroy_domains(), but I am not
> seeing any such call. Because synchronize_sched() is now folded into
>
Similar to gxbb and gxl platforms, axg SCPI Cortex-M co-processor
uses the fdiv2 and fdiv3 to, among other things, provide the cpu
clock.
Until clock hand-off mechanism makes its way to CCF and the generic
SCPI claims platform specific clocks, these clocks must be marked as
critical to make sure
Leo,
On 07/11/2018 03:23, leo@linaro.org wrote:
Hi Mathieu,
On Mon, Nov 05, 2018 at 03:26:30PM -0700, Mathieu Poirier wrote:
This patch deals with the release of the CLAIM tag when the ETM is
operated from perf. Otherwise the tag is left asserted and subsequent
requests to use the device
On Wed, Nov 07, 2018 at 11:39:19PM +0100, Marc Gonzalez wrote:
> Hello ARM maintainers,
>
> v2: Improve commit message for a few patches
>
> The set of Kconfig options slowly changes with every kernel version.
> This patch series regenerates the arm64 defconfig for v4.20
> No functional change
On Thu, Nov 08, 2018 at 07:32:46AM +0100, Ingo Molnar wrote:
>
> * Aubrey Li wrote:
>
> > Expose the per-task cpu specific thread state value, it's helpful
> > for userland to classify and schedule the tasks by different policies
>
> That's pretty vague - what exactly would use this
Hi Anshuman,
On Tue, Oct 23, 2018 at 06:31:57PM +0530, Anshuman Khandual wrote:
> During huge page allocation it's migratability is checked to determine if
> it should be placed under movable zones with GFP_HIGHUSER_MOVABLE. But the
> movability aspect of the huge page could depend on other
On Tue, Oct 23, 2018 at 06:31:58PM +0530, Anshuman Khandual wrote:
> Architectures like arm64 have PUD level HugeTLB pages for certain configs
> (1GB huge page is PUD based on ARM64_4K_PAGES base page size) that can be
> enabled for migration. It can be achieved through checking for PUD_SHIFT
>
On Amlogic chipsets, the bias set through pinconf applies to the pad
itself, not only the GPIO function. This means that even when we change
the function of the pad from GPIO to anything else, the bias previously
set still applies.
As we have seen with the eMMC, depending on the bias type and the
On Amlogic chipsets, the bias set through pinconf applies to the pad
itself, not only the GPIO function. This means that even when we change
the function of the pad from GPIO to anything else, the bias previously
set still applies.
As we have seen with the eMMC, depending on the bias type and the
On Amlogic chipsets, the bias set through pinconf applies to the pad
itself, not only the GPIO function. This means that even when we change
the function of the pad from GPIO to anything else, the bias previously
set still applies.
While trying to boot from SPI, I noticed the eMMC was not working
In the pinmux of the mmc clk_gate nodes, we define 2 subnodes. One for
the function definition, the other for the bias. This is not necessary
since we can define the function and the bias in the same subnode.
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6
In some cases (such as a boot from SPI) the bootloader or the ROM code may
leave a bias pull-down on the mmc pins. If so the MMC will fail during the
initialisation.
Explicitly disabling the pinmux solves the problem.
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi
On Thu 2018-11-08 11:21:38, Sergey Senozhatsky wrote:
> On (11/07/18 11:21), Petr Mladek wrote:
> What is the problem:
> - we have tons of CPUs, with tons of tasks running on them, with preemption,
> and interrupts, and potentially printk-s coming from various
> contexts/CPUs/tasks etc. so one
On 11/7/2018 10:49 PM, Marc Gonzalez wrote:
> [ Add interested parties ]
>
> On 07/11/2018 21:18, Marc Gonzalez wrote:
>
>> Commit e8342cc7954e ("enable CAAM crypto engine on QorIQ DPAA2 SoCs")
>> enabled CRYPTO_DEV_FSL_DPAA2_CAAM, which depends on FSL_MC_DPIO,
>> which is not set.
>>
Thanks
On Wednesday 07 Nov 2018 at 11:47:09 (+0100), Dietmar Eggemann wrote:
> The important bit for EAS is that it only uses utilization in the
> non-overutilized case. Here, utilization signals should look the same
> between the two approaches, not considering tasks with long periods like the
> 39/80ms
On 11/8/18 9:23 AM, Arun KS wrote:
> This patch is in preparation to a later patch which converts totalram_pages
> and zone->managed_pages to atomic variables. Please note that re-reading
> the value might lead to a different value and as such it could lead to
> unexpected behavior. There are no
On Thu, Nov 8, 2018 at 5:25 AM Boris Brezillon
wrote:
>
> Here is the MTD fixes PR for 4.20-rc2.
Pulled,
Linus
On 08/11/18 2:53 PM, Wolfram Sang wrote:
> On Thu, Nov 08, 2018 at 02:49:31PM +0530, Vignesh R wrote:
>> Add separate entry for i2c-omap and add my name as reviewer for this
>> driver.
>
> Thanks for stepping up, yet out of curiosity: why not maintainer?
>
I wasn't sure whether the
Aion antaa sinulle osan vauraudestani vapaaehtoiseksi rahalliseksi
lahjoitukseksi sinulle, Vastaa osallistumaan.
Wang Jianlin
Wanda Group
On November 8, 2018 12:38:10 PM GMT+01:00, Horia Geanta
wrote:
>On 11/8/2018 1:23 PM, Horia Geanta wrote:
>> On 11/7/2018 10:49 PM, Marc Gonzalez wrote:
>>> [ Add interested parties ]
>>>
>>> On 07/11/2018 21:18, Marc Gonzalez wrote:
>>>
Commit e8342cc7954e ("enable CAAM crypto engine on
Hi Peter,
This is v2 patch. I'm sorry that I forgot to add the
word "v2" to the subject.
Yours,
Muchun Song
Hi All,
Ping.
Any comments for the series.
Thanks,
Kan
On 10/19/2018 1:04 PM, kan.li...@linux.intel.com wrote:
From: Kan Liang
KabyLake and CoffeeLake has the same client uncore events as SkyLake.
Add the PCI IDs for KabyLake Y, U, S processor line and CoffeeLake U,
H, S processor line.
Add missing gpio-controller property to ps gpio.
This was found via DT schema validation.
Signed-off-by: Michal Simek
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
Driver unconditionally forces UART path during probe, probably to ensure
that one can get kernel serial log as soon as possible.
This approach causes some issues, especially when board is booted with
non-UART cable connected to micro-USB port. For example, when USB cable is
connected, UART TX/RX
Driver unconditionally forces UART path during probe, probably to ensure
that one can get kernel serial log as soon as possible.
This approach causes some issues, especially when board is booted with
non-UART cable connected to micro-USB port. For example, when USB cable is
connected, UART TX/RX
Hi All
Most MAX* MUIC drivers unconditionally force UART path during probe.
This approach causes some issues, especially when board is booted with
non-UART cable connected to micro-USB port. For example, when USB cable is
connected, UART TX/RX lines are unconditionally short-circuited to USB
Yes, you are right.
I think that's the best way to deal it.
Thank you.
Best regards,
Jongseok
> Den tors 8 nov. 2018 kl 13:34 skrev �� :
> >
> > Hi Vitaly,
> > thank you for the reply.
> >
> > I agree your a new solution is more comprehensive and drop my patch is
> > simple way.
> > But, I
Driver unconditionally forces UART path during probe, probably to ensure
that one can get kernel serial log as soon as possible.
This approach causes some issues, especially when board is booted with
non-UART cable connected to micro-USB port. For example, when USB cable is
connected, UART TX/RX
Driver unconditionally forces UART path during probe, probably to ensure
that one can get kernel serial log as soon as possible.
This approach causes some issues, especially when board is booted with
non-UART cable connected to micro-USB port. For example, when USB cable is
connected, UART TX/RX
Em Tue, Nov 06, 2018 at 04:13:25PM -0300, Arnaldo Carvalho de Melo escreveu:
> Em Tue, Nov 06, 2018 at 10:23:49AM -0800, Davidlohr Bueso escreveu:
> > Mind this fixlet for using et/oneshot and the multiq option.
>
> Yes sir, applied the fixup to the first patch in the series, applied the
>
On Tue, Nov 06, 2018 at 04:01:53PM +0100, Roberto Sassu wrote:
> The TPM driver currently relies on the crypto subsystem to determine the
> digest size of supported TPM algorithms. In the future, TPM vendors might
> implement new algorithms in their chips, and those algorithms might not
> be
Hi Rohit,
On 08/11/18 13:41, Rohit kumar wrote:
Frontend dai_link id is used for closing ADM sessions.
During concurrent usecase when one session is closed,
it closes other ADM session associated with other usecase
too. Dai_link->id should always point to Frontend dai id.
Set cpu_dai id as
On Tue, Nov 06, 2018 at 04:01:57PM +0100, Roberto Sassu wrote:
> Currently the TPM driver allows other kernel subsystems to read only the
> SHA1 PCR bank. This patch modifies the parameters of tpm_pcr_read() and
> tpm2_pcr_read() to pass a tpm_digest structure, which contains the desired
> hash
On Tue, Nov 06, 2018 at 04:01:59PM +0100, Roberto Sassu wrote:
> This patch protects against data corruption that could happen in the bus,
> by checking that that the digest size returned by the TPM during a PCR read
> matches the size of the algorithm passed as argument to tpm2_pcr_read().
>
>
On 08/11/2018 13:43:27+0100, Sebastian Andrzej Siewior wrote:
> On 2018-09-25 22:14:56 [+0200], Alexandre Belloni wrote:
> > On 22/09/2018 13:29:48+0200, Daniel Lezcano wrote:
> > > You say for rt the PIT is not suitable because of the shared irq but in
> > > the driver, the interrupt is flagged
On Thu, Nov 8, 2018 at 12:10 PM Greg Kroah-Hartman
wrote:
>
> On Wed, Nov 07, 2018 at 09:58:56PM +0200, Andy Shevchenko wrote:
> > Move the Rohm vendor ID to pci_ids.h from dozen of drivers.
> >
> > Signed-off-by: Andy Shevchenko
> > ---
> >
> > I believe the best chance to get it merged and be
On (11/08/18 12:24), Petr Mladek wrote:
> I believe that I mentioned this more times. 16 buffers is the first
> attempt. We could improve it later in several ways
Sure. Like I said - maybe it is a normal development pattern; I really
don't know.
> > Let's have one more look at what we will fix
On Mon, Nov 05, 2018 at 05:32:34PM +0800, Wei Ni wrote:
> Fix dereference dev before null check.
>
> Signed-off-by: Wei Ni
> ---
> drivers/thermal/tegra/soctherm.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/thermal/tegra/soctherm.c
>
On Mon, Nov 05, 2018 at 05:32:33PM +0800, Wei Ni wrote:
> Fix memory allocation to store the pointers to
> thermal_zone_device.
>
> Signed-off-by: Wei Ni
> ---
> drivers/thermal/tegra/soctherm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Thierry Reding
signature.asc
On 26 October 2018 at 16:21, Torsten Duwe wrote:
> Based on ftrace with regs, do the usual thing.
> (see Documentation/livepatch/livepatch.txt)
>
> Use task flag bit 6 to track patch transisiton state for the consistency
> model. Add it to the work mask so it gets cleared on all kernel exits to
>
On Mittwoch, 7. November 2018 23:41:31 CET Milian Wolff wrote:
> On Dienstag, 6. November 2018 21:24:11 CET Andi Kleen wrote:
> > > Where would I look for the source to change here? So far, I only
> > > concentrated on the userspace side of perf in tools/perf.
> >
> > Kind of similar to
> >
> >
Den tors 8 nov. 2018 kl 13:34 skrev 김종석 :
>
> Hi Vitaly,
> thank you for the reply.
>
> I agree your a new solution is more comprehensive and drop my patch is simple
> way.
> But, I think it's not fair.
> If my previous patch was not wrong, is (my patch -> your patch) the right way?
I could
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Am Miss. Aisha Gaddafi, I writing this mail with tears and sorrow
>From my heart asking for your help to claim my late father funds
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On Thu, 8 Nov 2018 11:07:16 +
wrote:
> spi_nor_read_raw() calls nor->read() which might be implemented
> by the m25p80 driver. m25p80 uses the spi-mem layer which requires
> DMA-able in/out buffers. Pass kmalloc'ed dma buffer to spi_nor_read_raw().
>
> Signed-off-by: Tudor Ambarus
> ---
>
Add the secure monitor device to the axg platform.
With this, we can read the SoC serial number.
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
On Fri, Oct 05, 2018 at 06:36:37PM +0300, Dmitry Osipenko wrote:
> Wait/wound mutex shall be used in order to avoid lockups on locking of
> coupled regulators.
This breaks the build due to a few of the drivers (wm8350 and da9210 at
least) taking rdev locks in their interrupt handlers. I'd
Add a Clock driver for the Everything-Else part
of the Amlogic Meson-G12A SoC.
Signed-off-by: Jian Hu
---
drivers/clk/meson/Kconfig | 10 +
drivers/clk/meson/Makefile |1 +
drivers/clk/meson/g12a.c | 1134
drivers/clk/meson/g12a.h | 128
Changes since v3 at[4]
-add fixed clocks clk_regmap definition
Changes since v2 at[2]
-fix fixed clocks's descriptions
-fix aligment
-add enable bit for plls base on [3] patches
-add fixed clock gate bit
Changes since v1 at[1]
-fix typo of 'Everything'.
-change the word 'AmLogic' to 'Amlogic'
Add new clock controller compatible and dt-bingdings headers
for the Everything-Else domain of the g12a SoC
Signed-off-by: Jian Hu
---
.../bindings/clock/amlogic,gxbb-clkc.txt | 1 +
include/dt-bindings/clock/g12a-clkc.h | 93 ++
2 files changed, 94
s/_/-/ for node names.
It fixes warnings like this:
... Warning (node_name_chars_strict): /cpu_opp_table:
Character '_' not recommended in node name ...
Issues reported by make dtbs W=12
Signed-off-by: Michal Simek
---
dr_mode property is also reported but it is not fixed because code needs
On Thu, 2018-11-08 at 11:03 -0200, Giuliano Belinassi wrote:
> Only the ad778x have the 'gain' status bit. Check it before updating
> through a new variable is_ad778x in chip_info.
>
Looks good.
Alex
> Signed-off-by: Giuliano Belinassi
> ---
> Changes in v2:
> - Squashed is_ad778x
On 11/07/2018 03:11 PM, Roberto Sassu wrote:
On 11/7/2018 7:14 AM, Nayna Jain wrote:
On 11/06/2018 08:31 PM, Roberto Sassu wrote:
This patch removes the hard-coded limit of the active_banks array size.
The hard-coded limit in static array active_banks[] represents the
maximum possible
The goal of this patchset is to enable SCPI (dvfs and hwmon) the axg
platform. The first patches in this series fix a few issues to acheive
this.
Jerome Brunet (4):
arm64: dts: meson-axg: fix mailbox address
arm64: dts: meson-axg: correct sram shared mem unit-address
Documentation:
Correct the unit-address in the node name of the SRAM shared memory
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
Enable SCPI on the axg platform, with cpu clock and hwmon
(core temperature) support
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
MHU mailbox address is wrong. Fixing it enables the mailboxes on the A113.
These mailboxes are needed for SCPI
Fixes: 9d59b708500f ("arm64: dts: meson-axg: add initial A113D SoC DT support")
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++--
1 file changed, 2
amlogic,meson-gxbb-scpi-sensors is both the driver and DT but is not
documented. Just add it to amlogic's scpi documentation
Signed-off-by: Jerome Brunet
---
Documentation/devicetree/bindings/arm/amlogic,scpi.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git
On 2018/11/8 18:17, Peter Zijlstra wrote:
> On Thu, Nov 08, 2018 at 07:32:46AM +0100, Ingo Molnar wrote:
>>
>> * Aubrey Li wrote:
>>
>>> Expose the per-task cpu specific thread state value, it's helpful
>>> for userland to classify and schedule the tasks by different policies
>>
>> That's pretty
On Thu, Nov 08, 2018 at 04:02:08PM +0200, Jarkko Sakkinen wrote:
> On Tue, Nov 06, 2018 at 04:01:55PM +0100, Roberto Sassu wrote:
> > tcg_efi_specid_event and tcg_pcr_event2 declaration contains static arrays
> > for a list of hash algorithms used for event logs and event log digests.
> > However,
On Sun, Nov 4, 2018 at 4:55 PM wrote:
> From: Sven Van Asbroeck
> +struct anybus_mbox_hdr {
> + u16 id;
> + u16 info;
> + u16 cmd_num;
> + u16 data_size;
> + u16 frame_count;
> + u16 frame_num;
> + u16 offset_high;
> + u16 offset_low;
> +
On Sun, Nov 4, 2018 at 4:55 PM wrote:
> ---
> .../bindings/bus/arcx,anybuss-host.txt| 36 +++
> 1 file changed, 36 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/bus/arcx,anybuss-host.txt
>
> diff --git
On Wed, Nov 07, 2018 at 08:48:36PM +0100, Sebastian Andrzej Siewior wrote:
> The xfeature mask is 64bit so a shift from a number to its mask should
> have LL prefix or else nr > 31 will be lost. This is not a problem now
> but should XFEATURE_MASK_SUPERVISOR gain a bit >31 then this check won't
>
On 11/8/2018 1:23 PM, Horia Geanta wrote:
> On 11/7/2018 10:49 PM, Marc Gonzalez wrote:
>> [ Add interested parties ]
>>
>> On 07/11/2018 21:18, Marc Gonzalez wrote:
>>
>>> Commit e8342cc7954e ("enable CAAM crypto engine on QorIQ DPAA2 SoCs")
>>> enabled CRYPTO_DEV_FSL_DPAA2_CAAM, which depends on
On 2018/11/08 13:45, Sergey Senozhatsky wrote:
> So, can we just do the following? /* a sketch */
>
> lockdep.c
> printk_safe_enter_irqsave(flags);
> lockdep_report();
> printk_safe_exit_irqrestore(flags);
If buffer size were large enough to hold messages from out_of_memory(),
On 2018/11/08 20:24, Petr Mladek wrote:
>> Let's have one more look at what we will fix and what we will break.
>>
>> 'cont' has premature flushes.
>>
>> Why is it good.
>> It preserves the correct order of events.
>>
>> pr_cont("calling foo->init()");
>> foo->init()
>>
Hi Torsten,
On 26 October 2018 at 16:21, Torsten Duwe wrote:
> Use -fpatchable-function-entry (gcc8) to add 2 NOPs at the beginning
> of each function. Replace the first NOP thus generated with a quick LR
> saver (move it to scratch reg x9), so the 2nd replacement insn, the call
> to ftrace,
On Thu, Nov 08, 2018 at 10:14:01AM +, Charles Keepax wrote:
> +static const struct of_device_id lochnagar_of_match[] = {
> + { .compatible = "cirrus,lochnagar-regulator" },
> + {},
> +};
This is obviously just dumping the Linux driver model into the DT, the
regulators are clearly
From: Yue Haibing
Fixes gcc '-Wunused-but-set-variable' warning:
fs/ufs/super.c: In function 'ufs_statfs':
fs/ufs/super.c:1409:32: warning:
variable 'usb3' set but not used [-Wunused-but-set-variable]
It not used any more after commit
c596961d1b4c ("ufs: fix s_size/s_dsize users")
On Wed, Nov 07, 2018 at 04:18:35PM -0800, Stephen Boyd wrote:
> Quoting Abel Vesa (2018-11-07 12:26:25)
> > On Wed, Nov 07, 2018 at 11:01:02AM -0800, Stephen Boyd wrote:
> > >
> > >
> > > What's the plan to clean it up?
> >
> > So I'm doing this in our internal tree first to make sure I don't
Document the bindings for AK4118 S/PDIF transceiver
Signed-off-by: Clément Péron
---
.../devicetree/bindings/sound/ak4118.txt | 22 +++
1 file changed, 22 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/ak4118.txt
diff --git
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