The pull request you sent on Wed, 6 Feb 2019 09:09:39 +0100:
> git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git
> tags/pinctrl-v5.0-2
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/b66bc7776748c97a6dc013c8d06e10ebf1c14307
Thank you!
--
The pull request you sent on Wed, 6 Feb 2019 16:07:42 +0100:
> git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/fuse.git
> tags/fuse-fixes-5.0-rc6
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/076a3f553743cca32ff261d4bea29a4e92d936dd
Thank you!
--
The pull request you sent on Wed, 6 Feb 2019 14:32:56 -0500:
> git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost.git tags/for_linus
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/b0314565da2b95e73feab484467ad171fcce6dff
Thank you!
--
Deet-doot-dot, I am a
The pull request you sent on Wed, 6 Feb 2019 11:43:00 -0500:
> git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace.git
> trace-v5.0-rc3
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/4879f11615d29d7b91cd5a4cfbff8e563ada991d
Thank you!
--
Hi Dmitry,
On Tue, Feb 05, 2019 at 02:46:42PM -0800, Dmitry Torokhov wrote:
> We need to turn regulators on and off when switching brightness, and
> that may block, therefore we have to set stmfts_brightness_set() as
> LED's brightness_set_blocking() method.
>
> Fixes: 78bcac7b2ae1 ("Input: add
Hi Jon,
> So these have been sitting in my folder waiting for acks or some other
> sort of discussion, but it's been awfully quiet. Should I take them, or
> do they need further work or ... ?
These (well, the v1 actually) have been picked recently up by Ingo
in tip/sched/core.
Thanks,
Quentun
Hi,
On Mon, 2019-01-21 at 16:45 +0100, Maxime Ripard wrote:
> Now that we have everything in place in the PHY framework to deal in a
> generic way with MIPI D-PHY phys, let's convert our PHY driver and its
> associated DSI driver to that new API.
>
> Signed-off-by: Maxime Ripard
Reviewed-by:
Hi,
On Wed, 2019-01-09 at 10:33 +0100, Maxime Ripard wrote:
> Now that we have everything in place in the PHY framework to deal in a
> generic way with MIPI D-PHY phys, let's convert our PHY driver and its
> associated DSI driver to that new API.
>
> Signed-off-by: Maxime Ripard
Reviewed-by:
On 2019/2/7 6:11 上午, Nix wrote:
> So I just upgraded to 4.20 and revived my long-turned-off bcache now
> that the metadata corruption leading to mount failure on dirty close may
> have been identified (applying Tang Junhui's patch to do so)... and I
> spotted something a bit disturbing. It appears
Hi,
On Mon, 2019-01-21 at 16:45 +0100, Maxime Ripard wrote:
> Now that our MIPI D-PHY driver has been converted to the phy framework,
> let's move it into the drivers/phy directory.
>
> Signed-off-by: Maxime Ripard
Reviewed-by: Paul Kocialkowski
Cheers,
Paul
> ---
>
On 2019/2/7 11:10 上午, Dave Chinner wrote:
> On Thu, Feb 07, 2019 at 10:38:58AM +0800, Coly Li wrote:
>> On 2019/2/7 10:26 上午, Dave Chinner wrote:
>>> On Thu, Feb 07, 2019 at 01:24:25AM +0100, Andre Noll wrote:
On Thu, Feb 07, 10:43, Dave Chinner wrote
> File data readahead: REQ_RAHEAD
Hi Dmitry,
On Wed, Feb 06, 2019 at 10:16:16AM -0800, Dmitry Torokhov wrote:
> We need to access I2C bus when switching brightness, and that may block,
> therefore we have to set stmfts_brightness_set() as LED's
> brightness_set_blocking() method.
>
> Signed-off-by: Dmitry Torokhov
same here:
On Wed, Feb 6, 2019 at 6:14 PM Thierry Reding wrote:
>
> On Tue, Jan 29, 2019 at 05:13:19PM +0530, Yash Shah wrote:
> [...]
> > diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c
> [...]
> > +static void pwm_sifive_update_clock(struct pwm_sifive_ddata *pwm,
> > +
Hi,
Thank for the quick response.
On Wed, Feb 6, 2019 at 6:59 PM Vincent Guittot
wrote:
>
> Hi Gilad,
>
> On Wed, 6 Feb 2019 at 17:40, Gilad Ben-Yossef wrote:
> >
> > Hi all,
> >
> > A regression was spotted in the ccree driver running on Arm 32 bit
> > causing a kernel panic during the crypto
On Wed, Feb 06, 2019 at 07:12:04PM +0100, Philipp Zabel wrote:
> On Wed, 2019-02-06 at 17:00 +0100, Thierry Reding wrote:
[...]
> > That way we operate on the same reset control, but we wouldn't need to
> > iterate over all existing reset controls in order to determine whether
> > we can acquire
On 07.02.2019 02:03, Andrey Smirnov wrote:
Xhci_handshake() implements the algorithm already captured by
readl_poll_timeout(). Convert the former to use the latter to avoid
repetition.
readl_poll_timeout() doesn't really work here as it might sleep.
iopoll.h:
/**
* readx_poll_timeout -
Linus,
please pull sound fixes for v5.0-rc6 from:
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
tags/sound-5.0-rc6
The topmost commit is c97617a81a7616d49bc3700959e08c6c6f447093
sound fixes for 5.0-rc6
A
On 06/02/2019 01.10, Dmitry Safonov wrote:
> As it has been discussed on timens RFC, adding a new conditional branch
> `if (inside_time_ns)` on VDSO for all processes is undesirable.
> It will add a penalty for everybody as branch predictor may mispredict
> the jump. Also there are instruction
The pull request you sent on Thu, 07 Feb 2019 09:28:22 +0100:
> git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
> tags/sound-5.0-rc6
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/6f64e3a4de749575e4705fa53dd49aed28f92623
Thank you!
--
Deet-doot-dot,
On 06/02/19 17:34, Peter Zijlstra wrote:
>
> How about we extend perf_guest_info_callback with an arch section and
> add:
>
> diff --git a/kernel/events/core.c b/kernel/events/core.c
> index 5aeb4c74fb99..76ce804e72c1 100644
> --- a/kernel/events/core.c
> +++ b/kernel/events/core.c
> @@ -5835,6
Hi,
On Mon, 2019-01-21 at 16:45 +0100, Maxime Ripard wrote:
> The current configuration of the DSI bridge and its associated D-PHY is
> intertwined. In order to ease the future conversion to the phy framework
> for the D-PHY part, let's split the configuration in two.
See below about a silly
Hi,
Mathias Nyman writes:
> On 07.02.2019 02:03, Andrey Smirnov wrote:
>> Xhci_handshake() implements the algorithm already captured by
>> readl_poll_timeout(). Convert the former to use the latter to avoid
>> repetition.
>
> readl_poll_timeout() doesn't really work here as it might sleep.
>
>
Hi Michael,
On Tue, Feb 05, 2019 at 03:52:38PM -0500, Michael S. Tsirkin wrote:
> On Thu, Jan 31, 2019 at 05:33:58PM +0100, Joerg Roedel wrote:
> > Changes to v5 are:
> >
> > - Changed patch 3 to uninline dma_max_mapping_size()
>
> And this lead to problems reported by kbuild :(
Hmm, I
On Thu, Feb 07, 2019 at 09:46:13AM +0100, Joerg Roedel wrote:
> Hmm, I didn't get any kbuild emails for this series. Can you please
> forward it me so that I can look into it?
Nevermind, just found them in another inbox.
Joerg
On Tue, 29 Jan 2019, Mark Zhang wrote:
> This patch set adds support for max77620 backup battery charging and
> low battery monitoring.
>
> Changes in v2:
> - Add devicetree binding documentation
>
> Mark Zhang (4):
> mfd: max77620: Add backup battery charger support
> mfd: max77620: add
On Thu, Feb 07, 2019 at 09:51:42AM +1100, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the tegra tree got a conflict in:
>
> arch/arm64/configs/defconfig
>
> between commit:
>
> 9bd01e74c715 ("arm64: defconfig: Add i.MX8MQ boot necessary configs")
>
> from the imx-mxs
On Wed, Feb 06, 2019 at 02:08:33PM -0800, Guenter Roeck wrote:
> On Fri, Feb 01, 2019 at 02:28:26PM +0100, Thierry Reding wrote:
> > If we use the IOMMU API directly to map buffers into host1x' IOVA space,
> > we must make sure that the DMA API doesn't already set up a mapping, or
> > else
On Thu, Jan 31, 2019 at 10:19 PM Hans Verkuil wrote:
>
> On 1/31/19 1:44 PM, Philipp Zabel wrote:
> > On Thu, 2019-01-31 at 13:30 +0100, Hans Verkuil wrote:
> >> On 1/31/19 11:45 AM, Hans Verkuil wrote:
> >>> On 1/24/19 11:04 AM, Tomasz Figa wrote:
> Due to complexity of the video decoding
I am waiting to hear from you about the message I sent you.
Mr. Joseph
[Adding the MIPS folks]
On 06/02/2019 21:26, Aaro Koskinen wrote:
> When using cpufreq on Loongson 2F MIPS platform, "poweroff"
> command gets frequently stuck in syscore_shutdown(). The reason is
> that i8259A_shutdown() gets called before cpufreq_suspend(), and if we
> have pending work then
Hi Sobon,
On Tue, 5 Feb 2019 22:28:44 +
"Sobon, Przemyslaw" wrote:
> > From: Boris Brezillon
> > Sent: Sunday, February 3, 2019 12:35 AM
> > > +Przemyslaw
> > >
> > > On Fri, 1 Feb 2019 07:30:39 +0800
> > > Liu Jian wrote:
> > >
> > > > In function do_write_buffer(), in the for
On Wed, Feb 06, 2019 at 02:17:11PM -0800, Guenter Roeck wrote:
> On Thu, Jan 24, 2019 at 07:03:53PM +0200, Timo Alho wrote:
> > Split BPMP driver into common and chip specific parts to facilitate
> > adding support for previous and future Tegra chips that are using BPMP
> > as co-processor.
> >
>
On 07.02.2019 02:03, Andrey Smirnov wrote:
Get page size order using ffs() instead of open coding it with a loop.
Signed-off-by: Andrey Smirnov
Cc: Mathias Nyman
Cc: Greg Kroah-Hartman
Cc: linux-...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
drivers/usb/host/xhci-mem.c | 6 +-
On 19-02-07 09:51:42, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the tegra tree got a conflict in:
>
> arch/arm64/configs/defconfig
>
> between commit:
>
> 9bd01e74c715 ("arm64: defconfig: Add i.MX8MQ boot necessary configs")
>
> from the imx-mxs tree and commit:
>
Hi,
Mathias Nyman writes:
> On 07.02.2019 02:03, Andrey Smirnov wrote:
>> Get page size order using ffs() instead of open coding it with a loop.
>>
>> Signed-off-by: Andrey Smirnov
>> Cc: Mathias Nyman
>> Cc: Greg Kroah-Hartman
>> Cc: linux-...@vger.kernel.org
>> Cc:
Hi Marc,
On 06/02/19 9:22 PM, Marc Gonzalez wrote:
> On 06/02/2019 16:27, Alim Akhtar wrote:
>
>> On 06/02/19 8:29 PM, Marc Gonzalez wrote:
>>
>>> [2.405734] regulator_disable: ENTER vdd_l26
>>> [2.405958] regulator_disable: EXIT vdd_l26
>>> [2.406032] regulator_set_load: vdd_l26 =
On Wed, 30 Jan 2019, Hsin-Hsiung Wang wrote:
> In order to support different types of irq design,
> we decide to add separate irq drivers for different
> design and keep mt6397 mfd core simple and reusable
> to all generations of PMICs so far.
Why have you cut these lines so short?
In all
On 07/02/2019 05:33, Michael Ellerman wrote:
> Hi Laurent,
>
> I'm not sure I'm convinced about this one. It seems like we're just
> throwing away the warning because it's annoying.
>
> Laurent Vivier writes:
>> resize_hpt_for_hotplug() reports a warning when it cannot
>> increase the hash page
Hey nice to meet you here and how you today?. I'm Dino,54 years
widowed and operator from Maryland USA. Where you from?.
I like to know you and also share something on trust with you here meanwhile,
Are you a Christian, Muslim or Jewish?
Dino.
Hi Kishon,
On Wed, Feb 06, 2019 at 06:00:19PM +0530, Kishon Vijay Abraham I wrote:
> On 06/02/19 5:55 PM, Maxime Ripard wrote:
> > On Wed, Feb 06, 2019 at 05:43:12PM +0530, Kishon Vijay Abraham I wrote:
> >> On 05/02/19 2:16 PM, Daniel Vetter wrote:
> >>> On Mon, Feb 04, 2019 at 03:33:31PM +0530,
On Thu, Feb 07, 2019 at 09:44:46AM +0100, Paul Kocialkowski wrote:
> Hi,
>
> On Mon, 2019-01-21 at 16:45 +0100, Maxime Ripard wrote:
> > The current configuration of the DSI bridge and its associated D-PHY is
> > intertwined. In order to ease the future conversion to the phy framework
> > for the
Hi Wen,
Wen Yang wrote on Thu, 7 Feb 2019
03:50:55 +:
> of_find_device_by_node() takes a reference to the struct device
> when it finds a match via get_device, there is no need to call
> get_device() twice.
> We also should make sure to drop the reference to the device
> taken by
From: Claudiu Beznea
Add slew rate support for SAM9X60 pin controller.
Signed-off-by: Claudiu Beznea
Acked-by: Ludovic Desroches
---
drivers/pinctrl/pinctrl-at91.c | 48 ++
drivers/pinctrl/pinctrl-at91.h | 1 +
include/dt-bindings/pinctrl/at91.h |
From: Claudiu Beznea
Add drive strength support for SAM9X60 pin controller.
Signed-off-by: Claudiu Beznea
Acked-by: Ludovic Desroches
---
drivers/pinctrl/pinctrl-at91.c | 52 ++
drivers/pinctrl/pinctrl-at91.h | 2 ++
2 files changed, 54 insertions(+)
From: Claudiu Beznea
Add documentation for slew rate.
Signed-off-by: Claudiu Beznea
Acked-by: Ludovic Desroches
---
Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Claudiu Beznea
SAM9X60 uses high and low drive strengths. To implement this, in
at91_pinctrl_mux_ops::set_drivestrength and
at91_pinctrl_mux_ops::get_drivestrength we need bit numbers of
drive strengths (1 for low, 2 for high), thus change the code to
allow the usage of drive strength bit
On 07/02/2019 04:03, David Gibson wrote:
> On Tue, Feb 05, 2019 at 09:21:33PM +0100, Laurent Vivier wrote:
>> resize_hpt_for_hotplug() reports a warning when it cannot
>> increase the hash page table ("Unable to resize hash page
>> table to target order") but this is not blocking and
>> can make
From: Claudiu Beznea
Add device tree binding for SAM9X60 pin controller.
Signed-off-by: Claudiu Beznea
Acked-by: Ludovic Desroches
---
Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git
From: Claudiu Beznea
This series adds drive strenght and slew rate support for SAMX60's pin
controller. For drive strenght we could have 2 values: low, high.
For slew rate we could have 2 values: enable, disabled.
Besides this I took the chance and adapt the documentation for at91 pinctrl
From: Claudiu Beznea
Add compatibles for SAM9X60 pin controller.
Signed-off-by: Claudiu Beznea
Acked-by: Ludovic Desroches
---
drivers/pinctrl/pinctrl-at91.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index
From: Claudiu Beznea
Add documentation for at91 pin controller banks.
Signed-off-by: Claudiu Beznea
Acked-by: Ludovic Desroches
---
.../bindings/pinctrl/atmel,at91-pinctrl.txt| 23 ++
1 file changed, 23 insertions(+)
diff --git
On Wed, Feb 06, 2019 at 09:53:16PM -0800, Yizhuo Zhai wrote:
>
>
> On Wed, Feb 6, 2019 at 9:52 PM Yizhuo Zhai wrote:
> >
> > Thanks, but why initialization matters here? Is performance the main
> > concern?
> >
> > On Wed, Feb 6, 2019 at 8:17 PM David Miller wrote:
> >>
> >> From: Yizhuo
>
On Thu, Feb 07, 10:27, Coly Li wrote
> If different file system handles metadata flags in unified ways, it is
> OK to me to change the code to: !(bio->bi_opf & (REQ_META |REQ_PRIO)).
Yes, that's the smallest fix that should also go into 4.19-stable.
In the long run, we should try to get rid of
From: Colin Ian King
There is a spelling mistake in the SOC_SINGLE control name. Fix this.
Signed-off-by: Colin Ian King
---
sound/soc/codecs/jz4725b.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/codecs/jz4725b.c b/sound/soc/codecs/jz4725b.c
index
Thomas, et al.,
Please could you take a look at this?
I need some IRQ related guidance. TIA.
On Wed, 30 Jan 2019, Hsin-Hsiung Wang wrote:
> This adds support for the MediaTek MT6358 PMIC. This is a
> multifunction device with the following sub modules:
>
> - Regulator
> - RTC
> - Codec
> -
On Mon, Jan 7, 2019 at 5:19 PM Daniel Bristot de Oliveira
wrote:
>
> On 11/19/18 4:32 PM, Juri Lelli wrote:
> > From 9326fd2b20269cffef7290bdc5b8173460d3c870 Mon Sep 17 00:00:00 2001
> > From: Juri Lelli
> > Date: Mon, 19 Nov 2018 16:04:42 +0100
> > Subject: [PATCH] sched/core: Fix PI boosting
This patch is to remove following hardware events
from JSON file which are not supported on POWER8
pm_co_disp_fail
pm_co_tm_sc_footprint
pm_iside_disp
pm_iside_disp_fail
pm_iside_disp_fail_other
pm_iside_mru_touch
pm_l2_castout_mod
pm_l2_castout_shr
pm_l2_dc_inv
pm_l2_disp_all_l2miss
From: Colin Ian King
There is a spelling mistake in several dev_err messages. Fix these.
Signed-off-by: Colin Ian King
---
drivers/iio/adc/ti-ads124s08.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/iio/adc/ti-ads124s08.c b/drivers/iio/adc/ti-ads124s08.c
Rob,
On 21/01/19 12:18 PM, Kishon Vijay Abraham I wrote:
> AM654x has two SERDES instances. Each instance has three input clocks
> (left input, externel reference clock and right input) and two output
> clocks (left output and right output) in addition to a PLL mux clock
> which the SERDES uses
On Thu, Feb 07, 16:16, Coly Li wrote
> From: Coly Li
> Date: Thu, 7 Feb 2019 15:54:24 +0800
> Subject: [PATCH] bcache: use (REQ_META|REQ_PRIO) to indicate bio for metadata
>
> In 'commit 752f66a75aba ("bcache: use REQ_PRIO to indicate bio for
> metadata")' REQ_META is replaced by REQ_PRIO to
Hi,
On 14/01/2019 17:36, Ayan Halder wrote:
> On Thu, Jan 10, 2019 at 03:57:09AM +0800, Randy Li wrote:
>> P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits per
>> channel video format.
>>
>> P012 is a planar 4:2:0 YUV 12 bits per channel
>>
>> P016 is a planar 4:2:0 YUV with
Use unified assembler syntax (UAL) in macros. Divided syntax is
considered depricated. This will also allow to build the kernel
using LLVM's integrated assembler.
Signed-off-by: Stefan Agner
---
arch/arm/lib/copy_from_user.S | 2 +-
arch/arm/lib/copy_to_user.S | 2 +-
arch/arm/lib/memcpy.S
Use unified assembler syntax (UAL) in headers. Divided syntax is
considered depricated. This will also allow to build the kernel
using LLVM's integrated assembler.
Signed-off-by: Stefan Agner
---
arch/arm/include/asm/assembler.h | 8
arch/arm/include/asm/vfpmacros.h | 8
Use unified assembler syntax (UAL) in assembly files. Divided
syntax is considered depricated. This will also allow to build
the kernel using LLVM's integrated assembler.
Signed-off-by: Stefan Agner
---
arch/arm/boot/bootp/init.S| 2 +-
arch/arm/boot/compressed/ll_char_wr.S
Remove the -mno-warn-deprecated assembler flag to make sure the GNU
assembler warns in case non-unified syntax is used.
Signed-off-by: Stefan Agner
---
arch/arm/Makefile | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index a0d08a3c9d33..811498e16673
This patchset converts all assembly code to unified assembler
language (UAL) compatible assembly code. From what I can tell,
this mainly boils down to using conditional infixes instead of
postfixes.
Most of the conversion has been done using the following regular
expression:
find ./arch/arm/
Use unified assembler syntax (UAL) in inline assembler. Divided
syntax is considered depricated. This will also allow to build
the kernel using LLVM's integrated assembler.
Signed-off-by: Stefan Agner
---
arch/arm/mm/copypage-v4mc.c | 2 +-
arch/arm/mm/copypage-v4wb.c | 2 +-
When setting a PHY's max speed using either the max-speed DT property
or ethtool, we should mask-out all non-compatible modes according to the
settings table, instead of just the 10/100BASET modes.
Signed-off-by: Maxime Chevallier
Suggested-by: Russell King
---
drivers/net/phy/phy-core.c |
We want to be able to update a PHY's supported list in the config_init
callback, so move the Pause parameters settings from phydrv->features
after calling config_init to make sure these parameters aren't
overwritten.
Signed-off-by: Maxime Chevallier
---
drivers/net/phy/phy_device.c | 89
The 802.3bz specification, based on previous by the NBASET alliance,
defines the 2.5GBaseT and 5GBaseT link modes for ethernet traffic on
cat5e, cat6 and cat7 cables.
These mode integrate with the already defined C45 MDIO PMA/PMD registers
set that added 10G support, by defining some previously
Marvell 10G PHY driver has a generic way of initializing the supported
link modes by reading the PHY's C45 PMA abilities. This can be made
generic, since these registers are part of the 802.3 specifications.
This commit extracts the config_init link_mode initialization code from
marvell10g and
The Marvell Alaska family of PHYs supports 2.5GBaseT and 5GBaseT modes,
as defined in the 802.3bz specification.
When the link partner requests a 2.5GBASET link, the PHY will
reconfigure it's MII interface to 2500BASEX.
At 5G, the PHY will reconfigure it's interface to 5GBASE-R, but this
mode
As per 802.3bz, if bit 14 of (1.11) "PMA Extended Abilities" indicates
whether or not we should read register (1.21) "2.52/5G PMA Extended
Abilities", which contains information on the support of 2.5GBASET and
5GBASET.
After testing on several variants of PHYS of this family, it appears
that bit
This patch adds support for the 88x2110 PHY, which is similar to the
already supported 88x3310 PHY without the SFP interface.
It supports 10/100/1000BASET along with 2.5GBASET, 5GBASET and 10GBASET,
with the same interface modes that are used by the 3310.
This PHY don't have the same issue as
On Wed, 06 Feb 2019, Paul Gortmaker wrote:
> The Kconfig currently controlling compilation of this code is:
>
> drivers/mfd/Kconfig:config MFD_TPS68470
> drivers/mfd/Kconfig:bool "TI TPS68470 Power Management / LED chips"
>
> ...meaning that it currently is not being built as a module by
The PPv2 controller is able to support 2.5G speeds, allowing to use
2.5GBASET in conjunction with PHYs that use 2500BASEX as their MII
interface when using this mode.
Signed-off-by: Maxime Chevallier
---
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 1 +
1 file changed, 1 insertion(+)
diff
Hello everyone,
This is the second iteration of the series introducing support for
2.5GBASET and 5GBASET to the network PHY infrastructure.
These 2 modes are described in the 802.3bz specifications, and allow to
use 2.5G and 5G speeds on cat5e/cat6 cables.
The required infrastructure code is
Since of_set_phy_supported was moved to phy-core.c, we can also move
of_set_phy_eee_broken to the same location, so that we have all OF
functions in the same place.
This patch doesn't intend to introduce any change in behaviour.
Signed-off-by: Maxime Chevallier
---
drivers/net/phy/phy-core.c
PHY advertised and supported linkmodes contain both specific modes such
as 1000BASET Half/Full and generic ones such as TP that represent a
class of modes.
Since some modes such as Fibre, TP or Backplane match a wide range of
specific modes, we can automatically set these bits if one of the
On Wed, Feb 06, 2019 at 04:33:54PM -0800, Dave Hansen wrote:
> I wonder if the patches that you bisected to just changed the flushing
> from being CR3-based (and not taking an address) to being INVPCID-based,
> and taking an address that is sensitive to canonicality.
That is indeed one of the
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and thermal sensors etc..
This patch adds i.MX system controller thermal driver support,
Linux kernel has to communicate with system controller via MU
(message
On Thu, 24 Jan 2019 16:07:14 -0700
Keith Busch wrote:
> == Changes since v4 ==
>
> All public interfaces have kernel docs.
>
> Renamed "class" to "access", docs and changed logs updated
> accordingly. (Rafael)
>
> The sysfs hierarchy is altered to put initiators and targets in their
>
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller, the system controller is in charge of system
power, clock and thermal sensors etc. management, Linux kernel
has to communicate with system controller via MU (message unit)
IPC to get temperature from thermal sensors,
On Wed, 6 Feb 2019 at 16:09, Sudeep Holla wrote:
>
> All device objects in the driver model contain fields that control the
> handling of various power management activities. However, it's not
> always useful. There are few instances where pseudo devices are added
> to the model just to take
Add i.MX8QXP CPU thermal zone support.
Signed-off-by: Anson Huang
---
ChangeLog since V5:
- add a property in each thermal zone to pass resource ID for thermal
driver.
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 28
1 file changed, 28 insertions(+)
This patch enables CONFIG_IMX_SC_THERMAL as module.
Signed-off-by: Anson Huang
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 709e8f1..4c79832 100644
--- a/arch/arm64/configs/defconfig
+++
On Wed, Feb 06, 2019 at 05:26:06PM +, Valentin Schneider wrote:
> Hi,
>
> On 06/02/2019 16:14, Peter Zijlstra wrote:
> [...]
> >> @@ -9545,6 +9545,17 @@ static void nohz_balancer_kick(struct rq *rq)
> >>}
> >>
> >>rcu_read_lock();
> >> +
> >> + if
On Wed, Feb 06, 2019 at 05:25:31PM +, Valentin Schneider wrote:
> Hi,
>
> On 06/02/2019 16:04, Peter Zijlstra wrote:
> [...]
> >> @@ -9561,6 +9573,14 @@ static void nohz_balancer_kick(struct rq *rq)
> >
> > sd = rcu_dereference(rq->sd);
> > if (sd) {
> > if
nand_scan_ident() calls onfi_fill_data_interface() at its entry
to set up the initial timing parameters.
The timing parameters are needed not only for ->setup_data_interface(),
but also for giving the correct delay to NAND_OP_WAIT_RDY, for example.
If the driver sets the NAND_KEEP_TIMINGS flag,
On Wed, 6 Feb 2019 16:31:26 -0500
Tony Krowiak wrote:
> The current AP bus implementation periodically polls the AP configuration
> to detect changes. When the AP configuration is dynamically changed via the
> SE or an SCLP instruction, the changes will not be reflected to sysfs until
> the
Hi Lee,
On 07/02/2019 09:34, Lee Jones wrote:
> Thomas, et al.,
>
> Please could you take a look at this?
>
> I need some IRQ related guidance. TIA.
>
> On Wed, 30 Jan 2019, Hsin-Hsiung Wang wrote:
>
>> This adds support for the MediaTek MT6358 PMIC. This is a
>> multifunction device with
Hi Tudor,
On 03.02.19 14:33, tudor.amba...@microchip.com wrote:
> Hi, Frieder,
>
> On 01/23/2019 09:56 AM, Schrempf Frieder wrote:
>> From: Frieder Schrempf
>>
>> This adds support for the EON EN25Q80A, a 8Mb SPI NOR chip.
>
> I would suggest to specify who is using this flash and how did you
Linus,
please pull from
git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid.git for-linus
to receive fix for a bug in hid-debug that can lock up the kernel in
infinite loop (CVE-2019-3819), from Vladis Dronov.
Thanks.
On 2019-02-06 15:01:14 [+0100], Borislav Petkov wrote:
> On Tue, Feb 05, 2019 at 07:03:37PM +0100, Sebastian Andrzej Siewior wrote:
> > Well, nothing changes in regard to the logic. Earlier we had a variable
> > which helped us to distinguish between user & kernel thread. Now we have
> > a
This adds labels to commonly used device-tree nodes so that derivative
boards can avoid ahb/apb hierarchy.
Signed-off-by: Nicolas Ferre
---
arch/arm/boot/dts/sama5d2.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi
Hi Masahiro,
Masahiro Yamada wrote on Thu, 7 Feb
2019 18:57:56 +0900:
> nand_scan_ident() calls onfi_fill_data_interface() at its entry
> to set up the initial timing parameters.
>
> The timing parameters are needed not only for ->setup_data_interface(),
> but also for giving the correct
Hi, Frieder,
On 02/07/2019 12:06 PM, Schrempf Frieder wrote:
> Hi Tudor,
>
> On 03.02.19 14:33, tudor.amba...@microchip.com wrote:
>> Hi, Frieder,
>>
>> On 01/23/2019 09:56 AM, Schrempf Frieder wrote:
>>> From: Frieder Schrempf
>>>
>>> This adds support for the EON EN25Q80A, a 8Mb SPI NOR chip.
Hello,
On Tue, Jan 29, 2019 at 05:13:19PM +0530, Yash Shah wrote:
> Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC.
>
> Signed-off-by: Wesley W. Terpstra
> [Atish: Various fixes and code cleanup]
> Signed-off-by: Atish Patra
> Signed-off-by: Yash Shah
> ---
>
On Wed, Feb 06, 2019 at 04:17:42PM -0800, Luck, Tony wrote:
> fe0937b24ff5 ("x86/mm/cpa: Fold cpa_flush_range() and cpa_flush_array() into
> a single cpa_flush() function")
Boris pointed me at this gem:
c7486104a5ce ("x86/mce: Fix set_mce_nospec() to avoid #GP fault")
(can I just revel at
On Thu, 07 Feb 2019, Andrew Lunn wrote:
> The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It
> provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an
> MFD which will instantiate the individual drivers.
>
> Signed-off-by: Andrew Lunn
> ---
> v2:
>
> Drop
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