On Fri, Apr 5, 2019 at 11:24 AM Christoph Hellwig wrote:
>
> On Fri, Apr 05, 2019 at 05:49:34AM +, Anup Patel wrote:
> > The Maximum Physical Memory 2GiB option for 64bit systems is currently
> > broken because kernel hangs at boot-time when this option is enabled
> > and the underlying
On 05/04/19 10:55 AM, Naga Sureshkumar Relli wrote:
> Hi Vignesh,
>
> Thanks for the review.
>
>> -Original Message-
>> From: Vignesh Raghavendra
>> Sent: Friday, April 5, 2019 10:14 AM
>> To: Naga Sureshkumar Relli ; broo...@kernel.org;
>> bbrezil...@kernel.org
>> Cc:
On 05/04/2019 06.57, Borislav Petkov wrote:
> From: Borislav Petkov
>
> ... to make its name readable to humans so that it can denote what that
> helper does.
I like the current color. It computes a*b+c with overflow checking at each
step. calc_size is
way too generic and doesn't say anything
On Thu, 4 Apr 2019 at 14:38, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 5.0.7 release.
> There are 246 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
>
We have got KASAN splat when tried to set /proc/sys/fs/file-max:
BUG: KASAN: global-out-of-bounds in __do_proc_doulongvec_minmax+0x3e4/0x8f0
Read of size 8 at addr 2f9b2980 by task file-max.sh/36819
Call trace:
dump_backtrace+0x0/0x3f8
show_stack+0x3c/0x60
On 21.03.19 11:08:59, Robert Richter wrote:
> Our @cavium.com addresses will be switched off soon. Using
> @marvell.com addresses from now on.
>
> Cc: Jayachandran C
> Signed-off-by: Robert Richter
> ---
> MAINTAINERS | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Rob,
could you
tree: https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git
dev.2019.04.02a
head: 82d94d0c3c616bba12f1f2a7f2ea48a3363893c8
commit: 7950d16b08477aee3ea9aa77fb99a8650bc9378d [35/52] drivers/gpu/drm/amd:
Dynamically allocate kfd_processes_srcu
config: x86_64-rhel-7.6 (attached
Hello Stephen,
Thanks for taking care of this!
On Thu, 2019-04-04 at 14:53 -0700, Stephen Boyd wrote:
> We recently introduced a change to support devm clk lookups. That
> change
> introduced a code-path that used clk_find() without holding the
> 'clocks_mutex'. Unfortunately, clk_find()
On Thu, 4 Apr 2019 at 19:22, Sylwester Nawrocki wrote:
>
> From: Pankaj Dubey
>
> Exynos SoCs have Chipid, for identification of product IDs and SoC
> revisions. This patch intends to provide initialization code for all
> these functionalities, at the same time it provides some sysfs entries
>
Am 04.04.19 um 19:25 schrieb Michal Suchanek:
> Signed-off-by: Michal Suchanek
Except of the point there is no commit log:
Acked-by: Stefan Wahren
> ---
> drivers/dma/bcm2835-dma.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c
>
On 4/5/19 7:53 AM, Tomasz Figa wrote:
> On Tue, Jan 29, 2019 at 10:53 PM Hans Verkuil wrote:
>>
>> Hi Tomasz,
>>
>> Some comments below. Nothing major, so I think a v4 should be ready to be
>> merged.
>>
>> On 1/24/19 11:04 AM, Tomasz Figa wrote:
>>> Due to complexity of the video encoding
On 4/4/2019 3:06 PM, Dan Carpenter wrote:
On Thu, Apr 04, 2019 at 02:47:39PM +0530, Mukesh Ojha wrote:
On 4/4/2019 2:12 PM, Dan Carpenter wrote:
Smatch complains that "ret" might be uninitialized. I can see why it
generates the warning, but I don't know if it's actually possible.
Anyway
On Thu, Apr 04, 2019 at 12:57:25PM -0400, Yangtao Li wrote:
> Add support for H6's SID controller. It supports 4K-bit
> EFUSE, bigger than before.
>
> Signed-off-by: Yangtao Li
Acked-by: Maxime Ripard
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
When PM is disabled it returns -EACCES, which is currently
threated as an error, and prevents accessing the slave's
registers.
This patch ignores the -EACCES return value from
pm_runtime_get_sync() to let the SoundWire work in systems
without runtime PM.
Signed-off-by: Jan Kotas
---
On Mon, Apr 01, 2019 at 11:05:04AM -0700, Evan Green wrote:
> The PMC driver performs a 32-bit read on the sleep s0 residency counter,
> followed by a hard-coded multiplication to convert into microseconds.
> The maximum value this counter could have would be 0x*0x64
> microseconds, which
Fix a similar endless event loop as was done in commit 8dcf32175b4e
("i2c: prevent endless uevent loop with CONFIG_I2C_DEBUG_CORE"):
The culprit is the dev_dbg printk in the i2c uevent handler. If
this is activated (for instance by CONFIG_I2C_DEBUG_CORE) it results
in an endless loop with
On Thu 04-04-19 20:27:41, David Hildenbrand wrote:
> On 04.04.19 20:01, Oscar Salvador wrote:
[...]
> > But I am not really convinced by MHP_SYSTEM_RAM name, and I think we should
> > stick
> > with MHP_MEMBLOCK_API because it represents __what__ is that flag about and
> > its
> > function, e.g:
On Fri, Apr 05, 2019 at 12:38:19PM +0530, Mukesh Ojha wrote:
>
> On 4/4/2019 3:06 PM, Dan Carpenter wrote:
> > On Thu, Apr 04, 2019 at 02:47:39PM +0530, Mukesh Ojha wrote:
> > > On 4/4/2019 2:12 PM, Dan Carpenter wrote:
> > > > Smatch complains that "ret" might be uninitialized. I can see why it
On Fri, Apr 05, 2019 at 08:26:45AM +0200, Rasmus Villemoes wrote:
> I like the current color.
Color?
> It computes a*b+c with overflow checking at each step. calc_size
> is way too generic and doesn't say anything at all about how the
> calc(ulation) is done.
Ok, whatever.
Then it would need
This patch enables clocks for STM32F769 boards.
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stm32f769-disco.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f769-disco.dts
b/arch/arm/boot/dts/stm32f769-disco.dts
index 3c7216844a9b..6f1d0ac8c31c
STM32F769 board is a derived of STM32F746 board.
Concerning clocks, main differences are:
- new source clock for SAI1 and SAI2 (HSI or HSE)
- Add DFSDM & DSI clock
Gabriel Fernandez (2):
clk: stm32: Introduce clocks of STM32F769 board
ARM: dts: stm32: Enable STM32F769 clock driver
STM32F769 clocks are derived from STM32746 clocks.
main differences are:
- new source clock for SAI1 and SAI2 (HSI or HSE)
- Add DFSDM & DSI clocks
Signed-off-by: Gabriel Fernandez
---
.../bindings/clock/st,stm32-rcc.txt | 6 +
drivers/clk/clk-stm32f4.c | 307
And you forgot to Cc Josh..
On Fri, Apr 05, 2019 at 01:25:45AM +0800, Kairui Song wrote:
> Currently perf callchain is not working properly with ORC unwinder,
> we'll get useless in kernel callchain like this:
>
> perf 6429 [000]22.498450: kmem:mm_page_alloc: page=0x176a17
>
On Thu, Apr 04, 2019 at 11:32:19AM -0700, Stephane Eranian wrote:
> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
> index a4b7711ef0ee..8d356c2096bc 100644
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -4483,6 +4483,60 @@ static ssize_t
On 05.04.19 09:14, Michal Hocko wrote:
> On Thu 04-04-19 20:27:41, David Hildenbrand wrote:
>> On 04.04.19 20:01, Oscar Salvador wrote:
> [...]
>>> But I am not really convinced by MHP_SYSTEM_RAM name, and I think we should
>>> stick
>>> with MHP_MEMBLOCK_API because it represents __what__ is
On 05/04/2019 09.52, Borislav Petkov wrote:
> On Fri, Apr 05, 2019 at 08:26:45AM +0200, Rasmus Villemoes wrote:
>> It computes a*b+c with overflow checking at each step. calc_size
>> is way too generic and doesn't say anything at all about how the
>> calc(ulation) is done.
>
> Ok, whatever.
>
>
On 04/04/2019 19:58, Bjorn Helgaas wrote:
On Thu, Apr 04, 2019 at 10:43:36AM -0700, Guenter Roeck wrote:
On Thu, Apr 04, 2019 at 05:52:35PM +0100, John Garry wrote:
Note that the f71805f driver does not call
request_{muxed_}region(), as it should.
... which is the real problem, one that is
On Wed, 3 Apr 2019, Steven Rostedt wrote:
> Juri reported this from the -rt kernel, but I can easily trigger it in
> mainline. By simply doing:
>
> # cd /sys/kernel/tracing
> # echo 1 > options/userstacktrace
> # echo 1 > events/irq/enable
> This is simply caused by the irq trace events doing
On Fri, Apr 05, 2019 at 10:09:31AM +0200, Rasmus Villemoes wrote:
> On 05/04/2019 09.52, Borislav Petkov wrote:
> > On Fri, Apr 05, 2019 at 08:26:45AM +0200, Rasmus Villemoes wrote:
>
> >> It computes a*b+c with overflow checking at each step. calc_size
> >> is way too generic and doesn't say
> While we're on the subject, I'm glad to see ongoing activity on
> klp-convert (though I haven't had a chance to follow the discussions).
> What's the status of the rest of the needed bits?
>
> - kgraft-analysis-tool - will this also be submitted for inclusion in
> the kernel tree?
Yes, it
On Mon, 25 Mar 2019, Thomas Gleixner wrote:
> On Fri, 15 Mar 2019, Chang S. Bae wrote:
> > ENTRY(paranoid_exit)
> > UNWIND_HINT_REGS
> > DISABLE_INTERRUPTS(CLBR_ANY)
> > TRACE_IRQS_OFF_DEBUG
> > + ALTERNATIVE "jmp .Lparanoid_exit_no_fsgsbase", "nop",\
> > +
On 03.04.19 16:11, Vincent Whitchurch wrote:
> Especially on embedded systems, it would be convenient to have a simple
> way to disable the console (both for kernel and userspace) on a system
> which normally uses it, to free up the UART for other things.
Just symlinking to /dev/null does not
Hi,
On 5/4/19 0:42, Guenter Roeck wrote:
> On Thu, Apr 4, 2019 at 3:05 PM Pavel Machek wrote:
>>
>> On Thu 2019-04-04 14:48:35, Dmitry Torokhov wrote:
>>> On Thu, Apr 4, 2019 at 1:42 PM Pavel Machek wrote:
Hi!
>>> And what to do if internal keyboard is not platform but USB?
On 02.04.19 08:19, Lee Jones wrote:
> Please use `git format-patch` and `git send-email` to create and
> submit your patches. Use the following flags; --annotate, --compose
> and --thread to ensure the patches are sent a) pinned to each other so
> they do not become spread throughout people's
On 4/5/19 08:53, Krzysztof Kozlowski wrote:
> On Thu, 4 Apr 2019 at 19:22, Sylwester Nawrocki
> wrote:
>> From: Pankaj Dubey
>>
>> Exynos SoCs have Chipid, for identification of product IDs and SoC
>> revisions. This patch intends to provide initialization code for all
>> these functionalities,
On Thu, Apr 04, 2019 at 01:01:46PM -0400, Yangtao Li wrote:
> The device tree binding already lists compatible strings for H6
> SoC, so add a device node for it.
>
> Signed-off-by: Yangtao Li
Applied, thanks!
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
On Mon, Apr 01, 2019 at 09:41:04AM -0400, Steven Rostedt wrote:
> [ Looking for acks ]
For the arm64 bits:
Acked-by: Will Deacon
Will
On Fri, Apr 05, 2019 at 10:39:43AM +0200, Enrico Weigelt, metux IT consult
wrote:
> On 03.04.19 16:11, Vincent Whitchurch wrote:
>
> > Especially on embedded systems, it would be convenient to have a simple
> > way to disable the console (both for kernel and userspace) on a system
> > which
Hi Dave,
Thank you for the review.
On 4/4/19 11:52 AM, Dave Martin wrote:
On Fri, Feb 08, 2019 at 04:55:13PM +, Julien Grall wrote:
For RT-linux, it might be possible to use migrate_{enable, disable}. I
am quite new with RT and have some trouble to understand the semantics
of
On Thu, Apr 04, 2019 at 03:57:36PM +0200, Clément Péron wrote:
> Allwinner H6 has a watchog compatible with A31.
>
> Declare it in the device tree.
>
> Signed-off-by: Clément Péron
Applied both, thanks!
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On 4/4/19 9:20 PM, Leo Li wrote:
>
>
>> -Original Message-
>> From: Ioana Ciornei
>> Sent: Thursday, April 4, 2019 5:48 AM
>> To: Leo Li
>> Cc: linux-kernel@vger.kernel.org; Roy Pledge
>> Subject: Re: [PATCH] soc: fsl: add DPAA2 console support
>>
>> On 4/3/19 10:55 PM, Li Yang wrote:
Hi Stephen,
On Fri, Apr 05, 2019 at 09:15:19AM +1100, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the at91 tree got a conflict in:
>
> arch/arm/mach-at91/pm.c
>
> between commit:
>
> ba5e60c9b75d ("arm/mach-at91/pm : fix possible object reference leak")
>
> from the
Hi,
On Thu, Apr 04, 2019 at 02:45:04PM +0200, Clément Péron wrote:
> Beelink GS1 is an Allwinner H6 based TV box,
> which support:
> - Allwinner H6 Quad-core 64-bit ARM Cortex-A53
> - GPU Mali-T720
> - 2GB LPDDR3 RAM
> - AXP805 PMIC
> - 1Gbps GMAC via RTL8211E
> - FN-Link 6222B-SRB Wifi/BT
> - 1x
* Carlos O'Donell:
> On 4/2/19 3:08 AM, Florian Weimer wrote:
>> * Michael Ellerman:
>>
>>> I'm a bit vague on what we're trying to do here.
>>>
>>> But it seems like you want some sort of "eye catcher" prior to the branch?
>>>
>>> That value is a valid instruction on current CPUs (rlwimi.
>>>
This patch fixes the sai driver structure overwriting which results in
a cpu dai name equal NULL.
Fixes: 3e086ed ("ASoC: stm32: add SAI driver")
Signed-off-by: Arnaud Pouliquen
---
sound/soc/stm/stm32_sai_sub.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Thu, 4 Apr 2019 at 19:22, Sylwester Nawrocki wrote:
>
> This patch adds definition of selected CHIP ID register offsets
> and register bit field definitions for Exynos5422 SoC.
>
> exynos_chipid_read() helper function is added to allow reading
> the CHIP ID block registers.
>
> Signed-off-by:
On 02/04/2019 20:14, Jeremy Linton wrote:
Hi,
First thanks for taking a look at this, second sorry about the delay...
On 3/28/19 7:40 AM, John Garry wrote:
On 26/03/2019 22:39, Jeremy Linton wrote:
ACPI 6.3 adds additional fields to the MADT GICC
structure to describe SPE PPI's. We pick
Hi Nick,
On 5/4/19 0:54, Nick Crews wrote:
> I sent this out previously in a series with a keyboard backlight driver
> (https://lkml.org/lkml/2019/4/4/1370), but the backlight driver is
> still in flux, and I wanted to get this committed ASAP. Thus I'm
> sending this as a separate series, in
On Thu, Apr 04, 2019 at 09:02:30PM +0300, Alexey Dobriyan wrote:
> On Thu, Apr 04, 2019 at 10:42:49AM +0200, Peter Zijlstra wrote:
> > On Wed, Apr 03, 2019 at 11:08:09PM +0300, Alexey Dobriyan wrote:
> > > Currently there is no easy way to get the number of CPUs on the system.
> >
> > And this
Suppress the useless dynamic allocation of the dai driver structure.
Signed-off-by: Arnaud Pouliquen
---
sound/soc/stm/stm32_sai_sub.c | 43 +--
1 file changed, 9 insertions(+), 34 deletions(-)
diff --git a/sound/soc/stm/stm32_sai_sub.c
This adds support for PixArt Imaging’s miniature low power
optical navigation chip using LASER light source
enabling digital surface tracking.
This IIO driver allow to read delta position on 2 axis (X and Y).
The values can be taken through ponctual "read_raw" which will issue
a read in the
PixArt Imaging Inc. is expertized in CMOS image sensors (CIS),
capacitive touch controllers and related imaging application development.
Signed-off-by: Alexandre Mergnat
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
Add documentation for the optical tracker PAT9125 and
"ot" directory for Optical Tracker chip.
Signed-off-by: Alexandre Mergnat
---
Documentation/devicetree/bindings/iio/ot/pat9125.txt | 18 ++
1 file changed, 18 insertions(+)
create mode 100644
PixArt Imaging PAT6125 is a miniature low power optical navigation chip using
LASER light source enabling digital surface tracking.
This device driver use IIO API to provide ponctual and/or buffered data.
The data is the delta value between two position traveled, depend on
CPI (Counts Per Inch)
Hi Florian,
On 05/04/2019 00:25, Florian Fainelli wrote:
Hi all,
This patch series adds support for the Cortex-A53 micro architectural
events that I recently had to use for some debugging exercise.
Events from 0xC0 - 0xD2 are exposed, others could easily be added later
if we wanted to.
As
* Alexander Potapenko wrote:
> 1. Use memory clobber in bitops that touch arbitrary memory
>
> Certain bit operations that read/write bits take a base pointer and an
> arbitrarily large offset to address the bit relative to that base.
> Inline assembly constraints aren't expressive enough to
On 05.04.2019 5:12, Hugh Dickins wrote:
On Tue, 2 Apr 2019, Hugh Dickins wrote:
On Sun, 31 Mar 2019, Hugh Dickins wrote:
On Sun, 31 Mar 2019, Alex Xu (Hello71) wrote:
Excerpts from Vineeth Pillai's message of March 25, 2019 6:08 pm:
On Sun, Mar 24, 2019 at 11:30 AM Alex Xu (Hello71) wrote:
Hi,
On Fri, Apr 05, 2019 at 08:58:30AM +0530, saiprakash.ran...@codeaurora.org
wrote:
> On 2019-04-04 00:21, Aaro Koskinen wrote:
> >From: Aaro Koskinen
> >
> >Add support for warm reset using SYSTEM_RESET2 introduced in PSCI
> >1.1 specification.
> >
>
> There is already a patch sent by
Hi Andrew,
On 25/03/19 7:35 PM, Andrew F. Davis wrote:
> On 3/25/19 3:08 AM, Kishon Vijay Abraham I wrote:
>> Add a new SERDES driver for TI's AM654x SoC which configures
>> the SERDES only for PCIe. Support fo USB3 will be added later.
>>
>> SERDES in am654x has three input clocks (left input,
This patch adds DPAA2 MC and AIOP console log support.
The platform driver probes on the "fsl,dpaa2-console" device tree node
which describes the base firmware address needed in order to infer the
start address of both firmware logs: MC and AIOP.
It then exports two misc char devices which can be
Missatge de Rajat Jain del dia dj., 4 d’abr. 2019
a les 20:40:
>
> On Wed, Apr 3, 2019 at 2:34 PM Evan Green wrote:
> >
> > Introduce the command and response structures for the second revision
> > of the host sleep event. These structures are part of a new EC change
> > that enables detection
Missatge de Rajat Jain del dia dj., 4 d’abr. 2019
a les 20:41:
>
> On Wed, Apr 3, 2019 at 2:34 PM Evan Green wrote:
> >
> > Add support in code for the new forms of the host sleep event.
> > Detects the presence of this version of the command at runtime,
> > and use whichever form the EC
On 4/5/19 11:22, Krzysztof Kozlowski wrote:
> On Thu, 4 Apr 2019 at 19:22, Sylwester Nawrocki
> wrote:
>>
>> This patch adds definition of selected CHIP ID register offsets
>> and register bit field definitions for Exynos5422 SoC.
>>
>> exynos_chipid_read() helper function is added to allow
On Thu, Apr 04, 2019 at 10:04:04PM +0800, YueHaibing wrote:
> +cc Rafael and linux-acpi
Yeah, but please, address my comments and send v2.
--
With Best Regards,
Andy Shevchenko
On Wed, 3 Apr 2019 17:50:05 +0100
Will Deacon wrote:
> Hi Jeremy,
>
> On Thu, Mar 21, 2019 at 06:05:56PM -0500, Jeremy Linton wrote:
> > Return status based on ssbd_state and the arm64 SSBS feature. If
> > the mitigation is disabled, or the firmware isn't responding then
> > return the expected
On Fri, Apr 5, 2019 at 12:14 AM Arnaud Pouliquen
wrote:
>
> Hello Xiang,
>
>
> On 4/3/19 2:47 PM, xiang xiao wrote:
> > On Thu, Mar 21, 2019 at 11:48 PM Fabien Dessenne
> > wrote:
> >>
> >> This driver exposes a standard tty interface on top of the rpmsg
> >> framework through the
This bug is marked as fixed by commit:
vfs: namespace: error pointer dereference in do_remount()
But I can't find it in any tested tree for more than 90 days.
Is it a correct commit? Please update it by replying:
#syz fix: exact-commit-title
Until then the bug is still considered open and
new
* Peter Zijlstra:
> On Wed, Apr 03, 2019 at 11:08:09PM +0300, Alexey Dobriyan wrote:
>> Currently there is no easy way to get the number of CPUs on the system.
The size of the affinity mask is only related to the number of CPUs in
the system in such a way that the number of CPUs cannot be larger
On Tue, Apr 2, 2019 at 4:09 PM Nick Desaulniers wrote:
>
> This is needed because clang doesn't select which linker to use based on
> $LD but rather -fuse-ld={bfd,gold,lld,}. This
> is problematic especially for cc-ldoption, which checks for linker flag
> support via invoking the compiler,
On 4/4/19 3:03 PM, Peter Zijlstra wrote:
> On Thu, Apr 04, 2019 at 01:09:09PM +0200, Peter Zijlstra wrote:
>
>> That is not entirely the scenario I talked about, but *groan*.
>>
>> So what I meant was:
>>
>> CPU-0 CPU-n
>>
>>
Hi Sylwester,
Nice work, thank you!
I have a lot of minor nits all around and few more architecture-like comments.
I think this should be a driver. You initialize it quite late and it
is required by other drivers (cpufreq, devfreq), not by core.
I would also prefer it to be slightly more
On Thu, Mar 28, 2019 at 01:10:57PM -0400, Vitaly Mayatskikh wrote:
> There's no current valid use case when uninitialized hash can be read
> before being written, however let's keep every vhost_vsock field
> initialized just for clarity.
>
> Signed-off-by: Vitaly Mayatskikh
> ---
>
Allwinner Process Voltage Scaling Tables defines the voltage and
frequency value based on the speedbin blown in the efuse combination.
The sunxi-cpufreq-nvmem driver reads the efuse value from the SoC to
provide the OPP framework with required information.
This is used to determine the voltage
Add sunxi nvmem based CPU scaling driver, refers to qcom-cpufreq-kryo.
Yangtao Li (2):
cpufreq: Add sunxi nvmem based CPU scaling driver
dt-bindings: cpufreq: Document operating-points-v2-sunxi-cpu
.../bindings/opp/sunxi-nvmem-cpufreq.txt | 235 +
MAINTAINERS
For some SoCs, the CPU frequency subset and voltage value of each OPP
varies based on the silicon variant in use. Allwinner Process Voltage
Scaling Tables defines the voltage and frequency value based on the
speedbin blown in the efuse combination. The sunxi-cpufreq-nvmem driver
reads the efuse
From: Tingwei Zhang
Number of free masters is not set correctly in stm
free path. Fix this by properly adding the number
of output channels before setting them to 0 in
stm_output_disclaim().
Currently it is equivalent to doing nothing since
master->nr_free is incremented by 0.
Fixes:
On Fri 05-04-19 10:05:09, David Hildenbrand wrote:
> On 05.04.19 09:14, Michal Hocko wrote:
> > On Thu 04-04-19 20:27:41, David Hildenbrand wrote:
> >> On 04.04.19 20:01, Oscar Salvador wrote:
> > [...]
> >>> But I am not really convinced by MHP_SYSTEM_RAM name, and I think we
> >>> should stick
On 05/04/2019 11:24, Sai Prakash Ranjan wrote:
From: Tingwei Zhang
Number of free masters is not set correctly in stm
free path. Fix this by properly adding the number
of output channels before setting them to 0 in
stm_output_disclaim().
Currently it is equivalent to doing nothing since
Sai Prakash Ranjan writes:
> From: Tingwei Zhang
>
> Number of free masters is not set correctly in stm
> free path. Fix this by properly adding the number
> of output channels before setting them to 0 in
> stm_output_disclaim().
>
> Currently it is equivalent to doing nothing since
>
blsp1_i2c1 is at 0x0c175000
blsp2_i2c5 is at 0x0c1ba000 (the label is correct)
Fixes: 1e71d0c273d0a ("arm64: dts: qcom: msm8998: Enumerate i2c controllers")
Signed-off-by: Marc Gonzalez
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Commit-ID: 7c21383f3429dd70da39c0c7f1efa12377a47ab6
Gitweb: https://git.kernel.org/tip/7c21383f3429dd70da39c0c7f1efa12377a47ab6
Author: Kees Cook
AuthorDate: Thu, 4 Apr 2019 14:40:27 -0700
Committer: Borislav Petkov
CommitDate: Fri, 5 Apr 2019 12:34:35 +0200
x86/build: Keep local
Add a new reboot mode write interface that is using a NVMEM cell,
called "reboot-mode", to store the reboot mode magic.
Signed-off-by: Nandor Han
---
Description
---
Extend the reboot mode driver to use a NVMEM cell as writing interface.
Testing
---
The testing is done by
On 05.04.19 12:30, Michal Hocko wrote:
> On Fri 05-04-19 10:05:09, David Hildenbrand wrote:
>> On 05.04.19 09:14, Michal Hocko wrote:
>>> On Thu 04-04-19 20:27:41, David Hildenbrand wrote:
On 04.04.19 20:01, Oscar Salvador wrote:
>>> [...]
> But I am not really convinced by MHP_SYSTEM_RAM
On Fri, Apr 05, 2019 at 12:16:39PM +0200, Florian Weimer wrote:
> > True; but I suppose glibc already does lots of that anyway, right? It
> > does contain the right information.
>
> If I recall correctly my last investigation,
> /sys/devices/system/cpu/possible does not reflect the size of the
>
* Peter Zijlstra:
> On Fri, Apr 05, 2019 at 12:16:39PM +0200, Florian Weimer wrote:
>
>> > True; but I suppose glibc already does lots of that anyway, right? It
>> > does contain the right information.
>>
>> If I recall correctly my last investigation,
>> /sys/devices/system/cpu/possible does
From: Roger Quadros
Add support to select all 16 CLKSEL combinations that are shown in
"SerDes Reference Clock Distribution" in AM65 TRM.
Signed-off-by: Roger Quadros
Signed-off-by: Kishon Vijay Abraham I
---
drivers/phy/ti/phy-am654-serdes.c | 132 +++---
1 file
Add a new SERDES driver for TI's AM654x SoC which configures
the SERDES only for PCIe. Support fo USB3 will be added later.
SERDES in am654x has three input clocks (left input, externel reference
clock and right input) and two output clocks (left output and right
output) in addition to a PLL mux
PHY drivers may try to access PHY registers in the ->reset() callback.
Invoke phy_pm_runtime_get_sync() before invoking the ->reset() callback
so that the PHY drivers don't have to enable clocks by themselves before
accessing PHY registers.
Signed-off-by: Kishon Vijay Abraham I
---
This patch series
*) adds support for SERDES module in am654
*) modifies phy_reset API to invoke pm_runtime_get/pm_runtime_put since
the reset callback can access registers.
*) Add *release* phy_ops to be invoked when the consumer relinquishes
PHY
Changes from v3:
*) Moved SERDES driver
Add a new phy_ops *release* invoked when the consumer relinquishes the
PHY using phy_put/devm_phy_put. The initializations done by the PHY
driver in of_xlate call back can be can be cleaned up here.
Signed-off-by: Kishon Vijay Abraham I
---
drivers/phy/phy-core.c | 5 +
AM654x has two SERDES instances. Each instance has three input clocks
(left input, externel reference clock and right input) and two output
clocks (left output and right output) in addition to a PLL mux clock
which the SERDES uses for Clock Multiplier Unit (CMU refclock).
The PLL mux clock can
Commit-ID: 705acedd7fcb81a1e2be2560a1fdd16a429357f6
Gitweb: https://git.kernel.org/tip/705acedd7fcb81a1e2be2560a1fdd16a429357f6
Author: Jia Zhang
AuthorDate: Mon, 1 Apr 2019 19:40:45 +0800
Committer: Thomas Gleixner
CommitDate: Fri, 5 Apr 2019 13:07:03 +0200
x86/vdso: Remove hpet_page
Maya Nakamura writes:
> Replace PAGE_SHIFT, PAGE_SIZE, and PAGE_MASK with HV_HYP_PAGE_SHIFT,
> HV_HYP_PAGE_SIZE, and HV_HYP_PAGE_MASK, respectively, because the guest
> page size and hypervisor page size concepts are different, even though
> they happen to be the same value on x86.
>
>
From: Ingo Molnar
> Sent: 05 April 2019 10:40
>
> * Alexander Potapenko wrote:
>
> > 1. Use memory clobber in bitops that touch arbitrary memory
> >
> > Certain bit operations that read/write bits take a base pointer and an
> > arbitrarily large offset to address the bit relative to that base.
DS3232 RTC has 236 bytes of persistent memory.
Add RTC SRAM read and write access using
the NVMEM Framework.
Signed-off-by: Nandor Han
---
Description
---
Provides DS3232 RTC SRAM access using NVMEM framework.
Testing
---
The test was done on a custom board which contains a
DS3232
On Thu, Apr 04, 2019 at 01:43:09PM -0400, Waiman Long wrote:
> Waiman Long (11):
> locking/rwsem: Relocate rwsem_down_read_failed()
> locking/rwsem: Move owner setting code from rwsem.c to rwsem.h
> locking/rwsem: Move rwsem internal function declarations to
> rwsem-xadd.h
>
While adding kernfs node for child to the parent kernfs
node and when child node founds that parent kn count is
zero, then below comes like:
WARNING: fs/kernfs/dir.c:494 kernfs_get+0x64/0x88
This indicates that parent is in kernfs_put path/ or already
freed, and if the child node keeps continue
Commit-ID: 4df4309587e18a3c91e68138638dcb9d2a968906
Gitweb: https://git.kernel.org/tip/4df4309587e18a3c91e68138638dcb9d2a968906
Author: Gustavo A. R. Silva
AuthorDate: Wed, 3 Apr 2019 13:42:30 -0500
Committer: Thomas Gleixner
CommitDate: Fri, 5 Apr 2019 13:18:38 +0200
x86/kexec/crash:
> @@ -285,12 +286,14 @@ static int __init hip04_smp_init(void)
> if (!np_sctl)
> goto err;
> np_fab = of_find_compatible_node(NULL, NULL, "hisilicon,hip04-fabric");
> - if (!np_fab)
> + if (!np_fab) {
> + of_node_put(np_sctl);
> goto
Current overlap checking cannot correctly handle
a case which is baseminor < existing baseminor &&
baseminor + minorct > existing baseminor + minorct.
Signed-off-by: Chengguang Xu
---
v1->v2:
- Split fix and cleanup patches.
- Remove printing minor range in chrdev_show().
fs/char_dev.c | 6
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