On Mon, 2019-08-12 at 09:42 +0100, Quentin Perret wrote:
> The newly introduced Energy Model framework manages power cost tables
> in
> a generic way. Moreover, it supports several types of models since
> the
> tables can come from DT or firmware (through SCMI) for example. On
> the
> other hand,
On Wed, Aug 28, 2019 at 11:33:01AM +0200, Peter Zijlstra wrote:
> On Tue, Aug 27, 2019 at 11:51:35PM +0200, Peter Zijlstra wrote:
> > On Tue, Aug 27, 2019 at 08:44:23PM +, Luck, Tony wrote:
> > > > I'm reposting because the version Ingo applied and partially fixed up
> > > > still
> > > >
On Tue, Aug 27, 2019 at 01:41:51PM -0700, Hridya Valsaraju wrote:
> Currently, the binder transaction log files 'transaction_log'
> and 'failed_transaction_log' live in debugfs at the following locations:
>
> /sys/kernel/debug/binder/failed_transaction_log
>
On Thu, Aug 01, 2019 at 04:25:29PM -0500, Bjorn Helgaas wrote:
> Hi,
>
> I got the following dmesg log from Fawad [1]:
>
> imx6q-pcie 1ffc000.pcie: host bridge /soc/pcie@1ffc000 ranges:
> imx6q-pcie 1ffc000.pcie:IO 0x01f8..0x01f8 -> 0x
> imx6q-pcie 1ffc000.pcie: MEM
Hi Mimi,
> Detect and allow appended signatures.
> Signed-off-by: Mimi Zohar
Reviewed-by: Petr Vorel
Kind regards,
Petr
Scott Wood writes:
> On Tue, 2019-08-27 at 11:33 +1000, Michael Ellerman wrote:
>> Jason Yan writes:
>> > A polite ping :)
>> >
>> > What else should I do now?
>>
>> That's a good question.
>>
>> Scott, are you still maintaining FSL bits,
>
> Sort of... now that it's become very low volume,
On 28/08/19 2:14 PM, Masahiro Yamada wrote:
> Currently, the DMA addresses are casted to (u64) for the upper 32bits
> to avoid "right shift count >= width of type" warning.
>
> provides macros to address this, and the macro names
> are self-documenting.
>
> Signed-off-by: Masahiro Yamada
> ---
On Tue, Aug 27, 2019 at 9:05 PM Aaro Koskinen wrote:
> On Tue, Aug 27, 2019 at 06:33:01PM +0200, Arnd Bergmann wrote:
> > On Fri, Aug 16, 2019 at 10:34 AM Aaro Koskinen wrote:
> > > However with earlyprintk it seems to hang as soon as kernel tries to print
> > > something. So something goes
On Tue, Aug 27, 2019 at 05:37:16PM -0500, Rob Herring wrote:
> On Sat, Aug 24, 2019 at 10:26:55PM +0200, Michał Mirosław wrote:
> > Add single-pin LRCLK source options for Atmel SSC module.
> >
> > Signed-off-by: Michał Mirosław
> >
> > ---
> > v2: split from implementation patch
> >
> > ---
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 5ebb34edbefa8ea6a7e109179d5fc7b3529dbeba
Gitweb:
https://git.kernel.org/tip/5ebb34edbefa8ea6a7e109179d5fc7b3529dbeba
Author:Peter Zijlstra
AuthorDate:Tue, 27 Aug 2019 21:48:24 +02:00
On Wednesday 28 Aug 2019 at 20:58:47 (+0800), Zhang Rui wrote:
> this patch has coding style problems, please check the checkpatch.pl
> output.
> total: 5 errors, 17 warnings, 413 lines checked
Argh ! And that's what happens when I forget checkpatch ...
I'll fix this shortly. Sorry about that.
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: af239c44e3f976762e9bc052f0d5796b90ea530b
Gitweb:
https://git.kernel.org/tip/af239c44e3f976762e9bc052f0d5796b90ea530b
Author:Peter Zijlstra
AuthorDate:Tue, 27 Aug 2019 21:48:22 +02:00
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: c66f78a6de4de6cb520b15cf6a1b586617b9add5
Gitweb:
https://git.kernel.org/tip/c66f78a6de4de6cb520b15cf6a1b586617b9add5
Author:Peter Zijlstra
AuthorDate:Tue, 27 Aug 2019 21:48:21 +02:00
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: a3d8c0d13bdedf84fe74259f6949b2cdffd80e55
Gitweb:
https://git.kernel.org/tip/a3d8c0d13bdedf84fe74259f6949b2cdffd80e55
Author:Peter Zijlstra
AuthorDate:Tue, 27 Aug 2019 21:48:25 +02:00
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 5e741407eab7c602ee5a2b06afb0070a02f4412f
Gitweb:
https://git.kernel.org/tip/5e741407eab7c602ee5a2b06afb0070a02f4412f
Author:Peter Zijlstra
AuthorDate:Tue, 27 Aug 2019 21:48:23 +02:00
On 28/08/2019 14.33, Denis Efremov wrote:
> On 8/28/19 2:33 PM, Rasmus Villemoes wrote:
>> On 25/08/2019 21.19, Julia Lawall wrote:
>>>
>>>
On 26 Aug 2019, at 02:59, Denis Efremov wrote:
> On 25.08.2019 19:37, Joe Perches wrote:
>> On Sun, 2019-08-25 at 16:05 +0300,
On Wed, Aug 28, 2019 at 09:07:17AM +0200, Ricard Wanderlof wrote:
> On Wed, 28 Aug 2019, Sasha Levin wrote:
> > On Tue, Aug 27, 2019 at 12:00:14PM +0100, Mark Brown wrote:
> > > If anyone ran into this on the older kernel and fixed or worked
> > > around it locally there's a reasonable chance
On Fri, 2019-08-23 at 17:29 +0530, Amit Kucheria wrote:
> On Fri, Aug 23, 2019 at 3:08 PM Srinivas Kandagatla
> wrote:
> >
> > memory returned as part of nvmem_read via qfprom_read should be
> > freed by the consumer once done.
> > Existing code is not doing it so fix it.
> >
> > Below memory
On Tue, Aug 27, 2019 at 01:41:52PM -0700, Hridya Valsaraju wrote:
> Currently /sys/kernel/debug/binder/proc contains
> the debug data for every binder_proc instance.
> This patch makes this information also available
> in a binderfs instance mounted with a mount option
> "stats=global" in addition
On Tue, Aug 27, 2019 at 09:01:42AM -0400, Kamal Dasu wrote:
Please don't top post, reply in line with needed context. This allows
readers to readily follow the flow of conversation and understand what
you are talking about and also helps ensure that everything in the
discussion is being
Hi Michal, Thank you for spending your time on this.
On Tue, Aug 27, 2019 at 08:16:06AM +0200, Michal Hocko wrote:
> On Tue 27-08-19 02:14:20, Bharath Vedartham wrote:
> > Hi Michal,
> >
> > Here are some of my thoughts,
> > On Wed, Aug 21, 2019 at 04:06:32PM +0200, Michal Hocko wrote:
> > > On
On 08/28/2019 10:30 AM, Michal Suchanek wrote:
With endian switch disabled by default the ppc64le compat supports
ppc32le only which is something next to nobody has binaries for.
Less code means less bugs so drop the compat stuff.
I am not particularly sure about the best way to resolve the
Em Wed, Aug 28, 2019 at 08:15:54AM +0900, Namhyung Kim escreveu:
> Currently perf top only decays entries in a selected evsel. I don't
> know whether it's intended (maybe due to performance reason?) but
> anyway it might show incorrect output when event group is used since
> users will see leader
The patch
ALSA: pcm: add support for 352.8KHz and 384KHz sample rate
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.4
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next
The patch
regulator: mt6358: Add support for MT6358 regulator
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git for-5.4
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the
The patch
regulator: Add document for MT6358 regulator
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git for-5.4
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24
Em Wed, Aug 28, 2019 at 11:44:59AM +0200, Peter Zijlstra escreveu:
> On Wed, Aug 28, 2019 at 04:31:22PM +0900, Namhyung Kim wrote:
> > To support cgroup tracking, add CGROUP event to save a link between
> > cgroup path and inode number. The attr.cgroup bit was also added to
> > enable cgroup
The patch
ASoC: wcd9335: Fix primary interpolator max rate
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.4
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours)
On 27/08/19 3:33 AM, Ben Chuang wrote:
> From: Ben Chuang
>
> Add support for the GL9750 and GL9755 chipsets.
>
> Enable v4 mode and wait 5ms after set 1.8V signal enable for GL9750/
> GL9755. Fix the value of SDHCI_MAX_CURRENT register and use the vendor
> tuning flow for GL9750.
Looks good,
On 8/28/19 4:05 PM, Rasmus Villemoes wrote:
> On 28/08/2019 14.33, Denis Efremov wrote:
>> On 8/28/19 2:33 PM, Rasmus Villemoes wrote:
>>> On 25/08/2019 21.19, Julia Lawall wrote:
> On 26 Aug 2019, at 02:59, Denis Efremov wrote:
>
>
>
>> On 25.08.2019 19:37, Joe
On 2019-08-28 05:54:26 [-0700], Paul E. McKenney wrote:
> On Wed, Aug 28, 2019 at 11:27:39AM +0200, Sebastian Andrzej Siewior wrote:
> > On 2019-08-27 08:53:06 [-0700], Paul E. McKenney wrote:
> > > Am I understanding this correctly?
> >
> > Everything perfect except that it is not lockdep
This patch series enables Tegra194's C5 controller which owns x16 slot in
p2972- platform. C5 controller's PERST# and CLKREQ# are not configured as
output and bi-directional signals by default and hence they need to be
configured explicitly. Also, x16 slot's 3.3V and 12V supplies are
Add optional bindings "pinctrl-names" and "pinctrl-0" to describe pin
configuration information of a particular PCIe controller.
Signed-off-by: Vidya Sagar
---
V2:
* None
.../devicetree/bindings/pci/nvidia,tegra194-pcie.txt | 8
1 file changed, 8 insertions(+)
diff --git
On Wed, 2019-08-28 at 09:51 +0200, Dietmar Eggemann wrote:
> On 22/08/2019 04:17, Rik van Riel wrote:
> > Now that enqueue_task_fair and dequeue_task_fair no longer iterate
> > up
> > the hierarchy all the time, a method to lazily propagate
> > sum_exec_runtime
> > up the hierarchy is necessary.
>
On Wed 28-08-19 18:39:22, Bharath Vedartham wrote:
[...]
> > Therefore I would like to shift the discussion towards existing APIs and
> > whether they are suitable for such an advance auto-tuning. I haven't
> > heard any arguments about missing pieces.
> I understand your concern here. Just
Add optional bindings "vpcie3v3-supply" and "vpcie12v-supply" to describe
regulators of a PCIe slot's supplies 3.3V and 12V provided the platform
is designed to have regulator controlled slot supplies.
Signed-off-by: Vidya Sagar
---
V2:
* None
Add support to configure sideband signal pins when information is present
in respective controller's device-tree node.
Signed-off-by: Vidya Sagar
---
V2:
* Addressed review comment from Andrew Murray
* Handled failure case of pinctrl_pm_select_default_state() cleanly
Add support to get regulator information of 3.3V and 12V supplies of a PCIe
slot from the respective controller's device-tree node and enable those
supplies. This is required in platforms like p2972- where the supplies
to x16 slot owned by C5 controller need to be enabled before attempting to
Add 3.3V and 12V supplies regulators information of x16 PCIe slot in
p2972- platform which is owned by C5 controller and also enable C5
controller.
Signed-off-by: Vidya Sagar
---
V2:
* None
.../arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 24 +++
Add support to configure PCIe C5's sideband signals PERST# and CLKREQ#
as output and bi-directional signals respectively which unlike other
PCIe controllers sideband signals are not configured by default.
Signed-off-by: Vidya Sagar
---
V2:
* None
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 38
Move the static keyword to the front of declarations of
pci_regs_behavior and pcie_cap_regs_behavior, and resolve
the following compiler warning that can be seen when
building with warnings enabled (W=1):
drivers/pci/pci-bridge-emul.c:41:1: warning: ‘static’ is not at beginning of
declaration
On Wed, Aug 28, 2019 at 06:43:35PM +0800, Brad Campbell wrote:
> On 28/8/19 6:23 pm, Mika Westerberg wrote:
>
> > On Wed, Aug 28, 2019 at 05:12:00PM +0800, Brad Campbell wrote:
> >
> > Apart from the warning in the log (which is not fatal, I'll look into
> > it) to me the second path setup looks
For testing, it is useful to be able to specify a clock rate manually.
As this is a dangerous feature, it is not enabled by default.
Users need to modify the source directly and #define
CLOCK_ALLOW_WRITE_DEBUGFS.
This follows the spirit of commit 09c6ecd394105c48 ("regmap: Add support
for writing
On 28/08/2019 00:36, Jason Gunthorpe wrote:
> On Tue, Aug 27, 2019 at 04:34:31PM -0700, Andrew Morton wrote:
>> On Tue, 27 Aug 2019 01:34:13 + Jason Gunthorpe wrote:
>>
>>> On Sat, Aug 24, 2019 at 03:26:55PM -0700, Christoph Hellwig wrote:
On Fri, Aug 23, 2019 at 01:43:12PM +, Jason
KH,
Just make sure I understand details.
> Commit "HID: i2c-hid: Don't reset device upon system resume
If you revert this it's fixed on this system?
In that commit you had mentioned if this causes problems it might be worth
quirking just Raydium but commit
Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
provide Shared Virtual Addressing (SVA) between accelerators and processes.
So accelerator can access any data structure of the main cpu.
This differs from the data sharing between cpu and io device, which share
data
From: Kenneth Lee
Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
provide Shared Virtual Addressing (SVA) between accelerators and processes.
So accelerator can access any data structure of the main cpu.
This differs from the data sharing between cpu and io device,
From: Kenneth Lee
Uacce (Unified/User-space-access-intended Accelerator Framework) is
a kernel module targets to provide Shared Virtual Addressing (SVA)
between the accelerator and process.
This patch add document to explain how it works.
Signed-off-by: Kenneth Lee
Signed-off-by: Zaibo Xu
On Wed, Aug 28, 2019 at 8:52 PM Linus Walleij wrote:
>
> On Sun, Aug 25, 2019 at 5:06 PM Alejandro González
> wrote:
>
> > Jernej Skrabec compared the BSP driver with this
> > driver, and found that the BSP driver configures pinctrl to operate at
> > 1.8 V when entering DDR mode (although 3.3 V
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 42880f726c66f13ae1d9ac9ce4c43abe64ecac84
Gitweb:
https://git.kernel.org/tip/42880f726c66f13ae1d9ac9ce4c43abe64ecac84
Author:Alexander Shishkin
AuthorDate:Tue, 06 Aug 2019 11:46:01 +03:00
The following commit has been merged into the perf/core branch of tip:
Commit-ID: ab43762ef010967e4ccd53627f70a2eecbeafefb
Gitweb:
https://git.kernel.org/tip/ab43762ef010967e4ccd53627f70a2eecbeafefb
Author:Alexander Shishkin
AuthorDate:Tue, 06 Aug 2019 11:46:00 +03:00
The following commit has been merged into the x86/vmware branch of tip:
Commit-ID: f7b15c74cffd760ec9959078982d8268a38456c4
Gitweb:
https://git.kernel.org/tip/f7b15c74cffd760ec9959078982d8268a38456c4
Author:Thomas Hellstrom
AuthorDate:Wed, 28 Aug 2019 10:03:53 +02:00
The following commit has been merged into the x86/vmware branch of tip:
Commit-ID: bac7b4e843232a3a49a042410cf743341eb0887e
Gitweb:
https://git.kernel.org/tip/bac7b4e843232a3a49a042410cf743341eb0887e
Author:Thomas Hellstrom
AuthorDate:Wed, 28 Aug 2019 10:03:50 +02:00
The following commit has been merged into the x86/vmware branch of tip:
Commit-ID: 6abe3778cf5abd59b23b9037796f3eab8b7f1d98
Gitweb:
https://git.kernel.org/tip/6abe3778cf5abd59b23b9037796f3eab8b7f1d98
Author:Thomas Hellstrom
AuthorDate:Wed, 28 Aug 2019 10:03:52 +02:00
On Tue, Aug 27, 2019 at 11:56:20AM +0200, Krzysztof Wilczynski wrote:
> Merge PCI Express ASPM function prototypes and definitions
> from include/linux/pci-aspm.h into include/linux/pci.h.
>
> Function prototypes to move are pci_disable_link_state(),
> pci_disable_link_state_locked(),
The following commit has been merged into the x86/vmware branch of tip:
Commit-ID: b4dd4f6e3648dfd66576515fd885a9a765c0
Gitweb:
https://git.kernel.org/tip/b4dd4f6e3648dfd66576515fd885a9a765c0
Author:Thomas Hellstrom
AuthorDate:Wed, 28 Aug 2019 10:03:51 +02:00
Caching dates is never a good idea ;-)
Signed-off-by: Geert Uytterhoeven
---
arch/arm/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index dcf46f0e45c24a5f..eb18279a63027c08 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@
IS_ERR, IS_ERR_OR_NULL, IS_ERR_VALUE already contain unlikely optimization
internally. Thus, there is no point in calling these functions under
likely/unlikely.
This check is based on the coccinelle rule developed by Enrico Weigelt
Caching dates is never a good idea ;-)
Fixes: e7affb1dba0e9068 ("powerpc/cache: add cache flush operation for various
e500")
Signed-off-by: Geert Uytterhoeven
---
arch/powerpc/kernel/cpu_setup_fsl_booke.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA512
On 8/27/19 2:25 PM, Valdis Kl?tnieks wrote:
> On Mon, 26 Aug 2019 10:42:52 -0500, Dinh Nguyen said:
>> The primecell controller on some SoCs, i.e. SoCFPGA, is held in
>> reset by default. Until recently, the DMA controller was brought
>> out of
The csky implementation of free_initrd_mem() is an open-coded version of
free_reserved_area() without poisoning.
Remove it and make csky use the generic version of free_initrd_mem().
Signed-off-by: Mike Rapoport
---
arch/csky/mm/init.c | 16
1 file changed, 16 deletions(-)
Hello,
On Wed, 28 Aug 2019 15:17:33 +0200
Krzysztof Wilczynski wrote:
> Move the static keyword to the front of declarations of
> pci_regs_behavior and pcie_cap_regs_behavior, and resolve
> the following compiler warning that can be seen when
> building with warnings enabled (W=1):
>
>
On Thu, Aug 15, 2019 at 05:40:54PM +, Matthew Michilot wrote:
> Enable support for cbus gpios on FT232H. The cbus configuration is
> stored in one word in the EEPROM at byte-offset 0x1a with the mux
You forgot to fix the copy-paste error here; it should be "two words" as
I mentioned before.
mftb() includes a feature fixup for CELL ppc.
Use ASM_FTR_IFSET() macro instead of opencoding the setup
of the fixup sections.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/reg.h | 16 +++-
1 file changed, 3 insertions(+), 13 deletions(-)
diff --git
On Wed, Aug 28, 2019 at 09:29:32PM +0800, Chen-Yu Tsai wrote:
> On Wed, Aug 28, 2019 at 8:52 PM Linus Walleij
> wrote:
> >
> > On Sun, Aug 25, 2019 at 5:06 PM Alejandro González
> > wrote:
> >
> > > Jernej Skrabec compared the BSP driver with this
> > > driver, and found that the BSP driver
Nathan Chancellor writes:
> Commit aea447141c7e ("powerpc: Disable -Wbuiltin-requires-header when
> setjmp is used") disabled -Wbuiltin-requires-header because of a warning
> about the setjmp and longjmp declarations.
>
> r367387 in clang added another diagnostic around this, complaining that
>
On 2019-08-27, Petr Mladek wrote:
+/**
+ * dataring_push() - Reserve a data block in the data array.
+ *
+ * @dr: The data ringbuffer to reserve data in.
+ *
+ * @size: The size to reserve.
+ *
+ * @desc: A pointer to a descriptor to store the data block
On 8/28/19 4:00 AM, Michal Hocko wrote:
> On Tue 27-08-19 16:22:38, Michal Hocko wrote:
>> Dan, isn't this something we have discussed recently?
> This was
> http://lkml.kernel.org/r/20190725023100.31141-3-t-fukas...@vx.jp.nec.com
> and talked about /proc/kpageflags but this is essentially the
On Wed, Aug 28, 2019 at 9:43 PM Maxime Ripard wrote:
>
> On Wed, Aug 28, 2019 at 09:29:32PM +0800, Chen-Yu Tsai wrote:
> > On Wed, Aug 28, 2019 at 8:52 PM Linus Walleij
> > wrote:
> > >
> > > On Sun, Aug 25, 2019 at 5:06 PM Alejandro González
> > > wrote:
> > >
> > > > Jernej Skrabec compared
On Wed, 28 Aug 2019 08:34:20 -0500, Dinh Nguyen said:
> > Does this DTRT for both old and new U-Boots? My naive reading of
> > this patch
>
> What is a DTRT?
Do The Right Thing, sorry...
> > says on an old U-Boot, we end up attempting to bring it out of
> > reset even though they had already
On Wed, Aug 28, 2019 at 04:13:03PM +0300, Adrian Hunter wrote:
> On 27/08/19 3:33 AM, Ben Chuang wrote:
> Looks good, one minor comment
...
> > +#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
>
> Arguably CONFIG_MMC_SDHCI_IO_ACCESSORS needs to be removed altogether. i.e.
> making the accessors always
On Wed, Aug 28, 2019 at 11:03:33AM -, tip-bot2 for Sebastian Andrzej
Siewior wrote:
> The following commit has been merged into the timers/core branch of tip:
>
> Commit-ID: 71fed982d63cb2bb88db6f36059e3b14a7913846
> Gitweb:
>
Hi Gustavo,
On Sun, 2019-08-11 at 18:55 -0500, Gustavo A. R. Silva wrote:
> hdr is being freed and then dereferenced by accessing hdr->pkcs7_msg
>
> Fix this by copying the value returned by PTR_ERR(hdr->pkcs7_msg) into
> automatic variable err for its safe use after freeing hdr.
>
>
Hi Rik,
On Thu, 22 Aug 2019 at 04:18, Rik van Riel wrote:
>
> The runnable_load magic is used to quickly propagate information about
> runnable tasks up the hierarchy of runqueues. The runnable_load_avg is
> mostly used for the load balancing code, which only examines the value at
> the root
On Wed, Aug 28, 2019 at 01:23:06PM +0200, Thomas Gleixner wrote:
> On Wed, 28 Aug 2019, Ming Lei wrote:
> > On Wed, Aug 28, 2019 at 01:09:44AM +0200, Thomas Gleixner wrote:
> > > > > Also how is that supposed to work when sched_clock is jiffies based?
> > > >
> > > > Good catch, looks
On 8/28/2019 5:02 AM, Peter Zijlstra wrote:
On Wed, Aug 28, 2019 at 10:44:16AM +0200, Peter Zijlstra wrote:
Let me clean up this mess for you.
Here, how's that. Now we don't check is_metric_idx() _3_ times on the
enable/disable path and all the topdown crud is properly placed in the
fixed
Add the missing "SPDX-License-Identifier" license header
to the arch/x86/pci/numachip.c (use the GPL-2.0 identifier
derived using the comment mentioning license from the
top of the file), and remove license boilerplate as per
a similar commit 8cfab3cf63cf ("PCI: Add SPDX GPL-2.0 to
replace GPL v2
On Thu, 22 Aug 2019 at 04:18, Rik van Riel wrote:
>
> Use an explicit "cfs_rq of parent sched_entity" helper in a few
> strategic places, where cfs_rq_of(se) may no longer point at the
The only case is the sched_entity of a task which will point to root
cfs, isn't it ?
> right runqueue once we
Move the PERF_RECORD_ID_INDEX event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Adding PRI_ld64 define, so we can use it in printf output.
Link:
Move the PERF_RECORD_STAT_ROUND event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Link: http://lkml.kernel.org/n/tip-x7c2m4n8303nftb4maf33...@git.kernel.org
Signed-off-by: Jiri Olsa
---
hi,
to export 'union perf_event' we need to export the rest of events.
It's also available in here:
git://git.kernel.org/pub/scm/linux/kernel/git/jolsa/perf.git
perf/fixes
thanks,
jirka
---
Jiri Olsa (23):
libperf: Add PERF_RECORD_HEADER_ATTR 'struct attr_event' to perf/event.h
Move the PERF_RECORD_SWITCH event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Link: http://lkml.kernel.org/n/tip-hduuqm2bnzbxhhoynf2x3...@git.kernel.org
Signed-off-by: Jiri Olsa
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Move the PERF_RECORD_HEADER_FEATURE event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Link: http://lkml.kernel.org/n/tip-adohmimljqrbq2i3dxhhr...@git.kernel.org
Signed-off-by: Jiri Olsa
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Move the PERF_RECORD_CPU_MAP event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Link: http://lkml.kernel.org/n/tip-mvxietu3tdtqfi7e2nbqk...@git.kernel.org
Signed-off-by: Jiri Olsa
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Move the PERF_RECORD_HEADER_EVENT_TYPE event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Link: http://lkml.kernel.org/n/tip-1zsyvaupk78y7w42jfrvu...@git.kernel.org
Signed-off-by: Jiri Olsa
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Move the PERF_RECORD_AUX event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Link: http://lkml.kernel.org/n/tip-u8n9stb8xl6hq0qoqjego...@git.kernel.org
Signed-off-by: Jiri Olsa
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Move the PERF_RECORD_AUXTRACE_ERROR event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Link: http://lkml.kernel.org/n/tip-2i1ggfthfst9ont7ulmej...@git.kernel.org
Signed-off-by: Jiri Olsa
---
Move the PERF_RECORD_ITRACE_START event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Link: http://lkml.kernel.org/n/tip-it9jc5sr10hblg89ljuz7...@git.kernel.org
Signed-off-by: Jiri Olsa
---
Move the PERF_RECORD_AUXTRACE event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Link: http://lkml.kernel.org/n/tip-wrq43lrq47pqj0vhdqpgy...@git.kernel.org
Signed-off-by: Jiri Olsa
---
Move the PERF_RECORD_HEADER_ATTR event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Link: http://lkml.kernel.org/n/tip-53ciuchxtqxz9kuntcd5v...@git.kernel.org
Signed-off-by: Jiri Olsa
---
Move the PERF_RECORD_EVENT_UPDATE event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Link: http://lkml.kernel.org/n/tip-evb1r0gk2usfnby0b9dxl...@git.kernel.org
Signed-off-by: Jiri Olsa
---
Move the PERF_RECORD_AUXTRACE_INFO event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Link: http://lkml.kernel.org/n/tip-794xxtrbjexwc0o0p2o79...@git.kernel.org
Signed-off-by: Jiri Olsa
---
So it's available for libperf's users.
Link: http://lkml.kernel.org/n/tip-2b9e9f0y7szdwtgnyua58...@git.kernel.org
Signed-off-by: Jiri Olsa
---
tools/perf/lib/include/perf/event.h | 36 +
tools/perf/util/event.h | 36 -
2 files
Am I the only one, who is not seeing it getting reflected on
kernel.org???
Well, I have tried it 2 different browsers.cleared caches several
times(heck) .3 different devices .and importantly 3 different
networks.
Wondering!
Thanks,
Bhaskar
signature.asc
Description: PGP
Hi Lingyan,
On Mon, 12 Aug 2019 10:40:34 +0800, lingyxu wrote:
> From: Lingyan Xu
>
> In current i801 driver, SMBALERT interrupt is allowed
> (Slave Command Register bit2 is 0).
> But these is no handler for SMBALERT interrupt in i801_isr,
> if there is SMBALERT interrupt asserted and
Even more, to have a "perf_record_" prefix, so that they match the
PERF_RECORD_ enum they map to.
Link: http://lkml.kernel.org/n/tip-rrypskxisy9mpmu96jtgp...@git.kernel.org
Signed-off-by: Jiri Olsa
---
tools/perf/arch/arm/util/cs-etm.c| 4 +-
tools/perf/arch/arm64/util/arm-spe.c | 2 +-
Move the PERF_RECORD_TIME_CONV event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Link: http://lkml.kernel.org/n/tip-dize9k67s0341vek7hs8v...@git.kernel.org
Signed-off-by: Jiri Olsa
---
Move the PERF_RECORD_COMPRESSED event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Link: http://lkml.kernel.org/n/tip-czl9nuv0c9tpdkzby92lx...@git.kernel.org
Signed-off-by: Jiri Olsa
---
Move the PERF_RECORD_STAT_CONFIG event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Link: http://lkml.kernel.org/n/tip-ftr4j2l1by743i4rk9msj...@git.kernel.org
Signed-off-by: Jiri Olsa
---
Move the PERF_RECORD_STAT event definition to libperf's event.h.
In order to keep libperf simple, we switch 'u64/u32/u16/u8'
types used events to their generic '__u*' versions.
Link: http://lkml.kernel.org/n/tip-80tqbm5o9hhyl924f8khd...@git.kernel.org
Signed-off-by: Jiri Olsa
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