On Tue, Sep 8, 2020 at 4:32 AM tanhuazhong wrote:
>
>
>
> On 2020/9/7 23:35, Willem de Bruijn wrote:
> > On Mon, Sep 7, 2020 at 3:38 PM tanhuazhong wrote:
> >>
> >>
> >>
> >> On 2020/9/7 17:22, Willem de Bruijn wrote:
> >>> On Sun, Sep 6, 2020 at 8:42 PM Jakub Kicinski wrote:
>
> On
On Tue, 1 Sep 2020 at 23:27, Krzysztof Kozlowski wrote:
>
> Common pattern of handling deferred probe can be simplified with
> dev_err_probe(). Less code and the error value gets printed.
>
> Signed-off-by: Krzysztof Kozlowski
Acked-by: Chunyan Zhang
Thanks,
Chunyan
> ---
>
On Tue, 1 Sep 2020 at 23:27, Krzysztof Kozlowski wrote:
>
> If dma_request_chan() for TX channel fails with EPROBE_DEFER, the RX
> channel would not be released and on next re-probe it would be requested
> second time.
>
> Fixes: 386119bc7be9 ("spi: sprd: spi: sprd: Add DMA mode support")
> Cc:
Now that the switch ports have a label in the .dtsi, simplify the whole
"switch0" block for the v7 dts files.
Signed-off-by: Andre Heider
---
This goes on top of Pali's patch:
"arm64: dts: marvell: espressobin: Add ethernet switch aliases"
The resulting .dtb files are the same.
Hello,
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dashboard link:
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syzbot found the following issue on:
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On Tue, Sep 8, 2020 at 9:20 AM Anson Huang wrote:
> # SPDX-License-Identifier: GPL-2.0-only
> config PINCTRL_IMX
> - bool
> + tristate "IMX pinctrl core driver"
> + depends on OF
> select GENERIC_PINCTRL_GROUPS
> select GENERIC_PINMUX_FUNCTIONS
>
When there is no output port, coresight_alloc_conns() still do the following
copy connection information to pdata->conns, and this may cause kernel panic.
Let's fix it.
Signed-off-by: Qi Liu
---
drivers/hwtracing/coresight/coresight-platform.c | 13 +++--
1 file changed, 7
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syzbot found the following issue on:
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On Tuesday 08 September 2020 09:30:50 Andre Heider wrote:
> Now that the switch ports have a label in the .dtsi, simplify the whole
> "switch0" block for the v7 dts files.
>
> Signed-off-by: Andre Heider
Thank you, looks good!
Reviewed-by: Pali Rohár
> ---
>
> This goes on top of Pali's
Hello,
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> Subject: Re: [PATCH V3 3/3] pinctrl: imx: Support building i.MX pinctrl core
> driver as module
>
> On Tue, Sep 8, 2020 at 9:20 AM Anson Huang
> wrote:
>
> > # SPDX-License-Identifier: GPL-2.0-only config PINCTRL_IMX
> > - bool
> > + tristate "IMX pinctrl core driver"
> > +
This patch depends on the MT6799 DTS patch submitted by Hanks Chen
https://lkml.org/lkml/2020/8/4/1094
Hector.Yuan (2):
cpufreq: mediatek-hw: Add support for Mediatek cpufreq HW driver
dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW
.../bindings/cpufreq/cpufreq-mediatek-hw.yaml
From: "Hector.Yuan"
Add MT6779 cpufreq HW support.
Signed-off-by: Hector.Yuan
---
drivers/cpufreq/Kconfig.arm | 12 ++
drivers/cpufreq/Makefile |1 +
drivers/cpufreq/mediatek-cpufreq-hw.c | 294 +
3 files changed, 307 insertions(+)
From: "Hector.Yuan"
Add devicetree bindings for MediaTek HW driver.
Signed-off-by: Hector.Yuan
---
.../bindings/cpufreq/cpufreq-mediatek-hw.yaml | 141
1 file changed, 141 insertions(+)
create mode 100644
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tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 9322c47b21b9e05d7f9c037aa2c472e9f0dc7f3b
commit: f110f3188e5639c81c457b2b831d40dfe3891bdb iio: temperature: Add support
for LTC2983
date: 11 months ago
config: powerpc64-randconfig-r021-20200904 (attached
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On Fri, Sep 04, 2020 at 06:29:51PM +0800, Jinyang He wrote:
> Commit 1bdb7b76705a ("MIPS: Loongson64: Cleanup unused code")
> left the loongson_reboot unused, delete it.
>
> Signed-off-by: Jinyang He
> ---
> arch/mips/loongson64/reset.c | 5 -
> 1 file changed, 5 deletions(-)
applied to
On Fri, Sep 04, 2020 at 02:36:47PM +0200, Paul Cercueil wrote:
> Cleanup a bit the Device Tree file:
>
> 1. Respect the number of cells in GPIO descriptors and keyboard matrix;
> 2. Use 'ecc-engine' instead of deprecated 'ingenic,bch-controller'
>property;
> 3. The NAND's rb-gpios is actually
Hi,
On 07/09/2020 21:52, Sam Ravnborg wrote:
> Hi Neil.
>
> On Mon, Sep 07, 2020 at 01:10:27PM +0200, Neil Armstrong wrote:
>> This adds support for the TDO TL070WSH30 TFT-LCD panel module.
>> The panel has a 1024×600 resolution and uses 24 bit RGB per pixel.
>> It provides a MIPI DSI interface
On 2020-09-08 08:11, Zhen Lei wrote:
Add support to use dw-apb-ictl as primary interrupt controller.
Suggested-by: Marc Zyngier
Signed-off-by: Zhen Lei
Tested-by: Haoyu Lv
---
drivers/irqchip/Kconfig | 2 +-
drivers/irqchip/irq-dw-apb-ictl.c | 75 +--
On Tue, Sep 08, 2020 at 10:43:12AM +0530, Anshuman Khandual wrote:
>
>
> On 09/07/2020 05:46 PM, Will Deacon wrote:
> > On Mon, Aug 17, 2020 at 05:34:23PM +0530, Anshuman Khandual wrote:
> >> HWCAP name arrays (hwcap_str, compat_hwcap_str, compat_hwcap2_str) that are
> >> scanned for
On Mon, 07 Sep 2020, Michael Walle wrote:
> The Kontron sl28cpld is a board management chip providing gpio, pwm, fan
> monitoring and an interrupt controller. For now this controller is used on
> the Kontron SMARC-sAL28 board. But because of its flexible nature, it
> might also be used on other
On Tue, Sep 8, 2020 at 9:19 AM Gene Chen wrote:
> Jonathan Cameron 於 2020年8月30日 週日 上午1:12寫道：
> > On Mon, 24 Aug 2020 17:06:24 +0800
> > Gene Chen wrote:
> > A few comments inline. The big one centres on why we can't
> > expose the channels as _raw, _offset and _scale?
> >
>
> I think i have 3
On Sat 2020-09-05 12:18:27, Stephen Rothwell wrote:
> Hi all,
>
> Commit
>
> 4c31ead75f41 ("printk: ringbuffer: support dataless records")
>
> is missing a Signed-off-by from its committer.
Thanks for catching this. It should be fixed now.
It has been originally committed by Sergey. I
Mauro Carvalho Chehab writes:
> Em Mon, 7 Sep 2020 17:59:34 +0200
> Mauro Carvalho Chehab escreveu:
>
>> diff --git a/drivers/usb/dwc3/dwc3-of-simple.c
>> b/drivers/usb/dwc3/dwc3-of-simple.c
>> index 8852fbfdead4..2d497165efe2 100644
>> --- a/drivers/usb/dwc3/dwc3-of-simple.c
>> +++
On Tue, Sep 8, 2020 at 9:34 AM Anson Huang wrote:
> > Subject: Re: [PATCH V3 3/3] pinctrl: imx: Support building i.MX pinctrl core
> > driver as module
> >
> > On Tue, Sep 8, 2020 at 9:20 AM Anson Huang
> > wrote:
> >
> > > # SPDX-License-Identifier: GPL-2.0-only config PINCTRL_IMX
> > > -
On Monday 07 September 2020 19:23:45 Andrew Lunn wrote:
> On Mon, Sep 07, 2020 at 06:13:16PM +0200, Pali Rohár wrote:
> > On Monday 07 September 2020 17:43:53 Andrew Lunn wrote:
> > > > I would not say it is a "new feature". But rather that patch in this
> > > > email fixes issue that Linux kernel
On Tue, Sep 08, 2020 at 07:14:38AM +0200, Christophe Leroy wrote:
> You forgot arch/powerpc/mm/book3s64/subpage_prot.c it seems.
Yes, and also two more sources :/
arch/powerpc/mm/kasan/8xx.c
arch/powerpc/mm/kasan/kasan_init_32.c
But these two are not quite obvious wrt
Hi Arun,
On Mon, Sep 07, 2020 at 11:46:27PM -0700, Arun Easi wrote:
> How about printing the "func", which gives an indication of the caller
> function, in the ql_log-s, rather than removing it? At least in the cases
> like you describe, it'd give an indication which handler the path was
>
From: Ethan Zhao
'commit e8c7d14ac6c3 ("block: revert back to synchronous request_queue
removal")' introduced panic issue to NVMe hotplug as following(hit
after just 2 times NVMe SSD hotplug under stable 5.9-RC2):
BUG: sleeping function called from invalid context at block/genhd.c:1563
Hi, Arnd
> Subject: Re: [PATCH V3 3/3] pinctrl: imx: Support building i.MX pinctrl core
> driver as module
>
> On Tue, Sep 8, 2020 at 9:34 AM Anson Huang
> wrote:
> > > Subject: Re: [PATCH V3 3/3] pinctrl: imx: Support building i.MX
> > > pinctrl core driver as module
> > >
> > > On Tue, Sep 8,
> > @@ -300,6 +303,22 @@ int hv_ringbuffer_write(struct vmbus_channel *channel,
> > kv_list[i].iov_len);
> > }
> >
> > + /*
> > +* Allocate the request ID after the data has been copied into the
> > +* ring buffer. Once this request
This adds support bindings and support for the TDO TL070WSH30 TFT-LCD panel
module shipped with the Amlogic S400 Development Kit.
The panel has a 1024×600 resolution and uses 24 bit RGB per pixel.
It provides a MIPI DSI interface to the host, a built-in LED backlight
and touch controller.
Changes
This add the bindings for the 1024x600 TFT LCD TL070WSH30 DSI panel to
panel-simple-dsi.
Signed-off-by: Neil Armstrong
---
.../devicetree/bindings/display/panel/panel-simple-dsi.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
This adds support for the TDO TL070WSH30 TFT-LCD panel module.
The panel has a 1024×600 resolution and uses 24 bit RGB per pixel.
It provides a MIPI DSI interface to the host, a built-in LED backlight
and touch controller.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/panel/Kconfig
Simple DSI panels can also have a reset GPIO signal in addition/instead of an
enable GPIO signal.
This adds an optional reset-gpios property.
Signed-off-by: Neil Armstrong
---
.../devicetree/bindings/display/panel/panel-simple-dsi.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
Shanghai Top Display Optolelectronics Co., Ltd is a display manufacturer
from Shanghai.
Web site of the company: http://www.shtdo.com/
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
On 2020-09-07 20:18, Daniel Vetter wrote:
> On Mon, Sep 07, 2020 at 07:17:12PM +0300, Laurent Pinchart wrote:
>> Hi Stefan,
>>
>> Thank you for the patch.
>>
>> On Mon, Sep 07, 2020 at 06:03:43PM +0200, Stefan Agner wrote:
>> > The lcdif IP does not support a framebuffer pitch (stride) other than
Currently we call shake_page and then check whether the page is
Buddy because shake_page calls drain_all_pages, which sends pcp-pages
back to the buddy freelists, so we could have a chance to handle
free pages.
get_hwpoison_page already calls drain_all_pages, and we do call
get_hwpoison_page
The important bit of this patchset is patch#1, which is a fix to take off
HWPoison pages off a buddy freelist since it can lead us to having HWPoison
pages back in the game without no one noticing it.
So fix it (we did that already for soft_offline_page [1]).
The other patches are clean-ups and
Make a proper if-else condition for {hard,soft}-offline.
Signed-off-by: Oscar Salvador
---
mm/madvise.c | 30 +-
1 file changed, 13 insertions(+), 17 deletions(-)
diff --git a/mm/madvise.c b/mm/madvise.c
index e32e7efbba0f..e92e06890b08 100644
--- a/mm/madvise.c
+++
The crux of the matter is that historically we left poisoned pages
in the buddy system because we have some checks in place when
allocating a page that a gatekeeper for poisoned pages.
Unfortunately, we do have other users (e.g: compaction [1]) that scan
buddy freelists and try to get a page from
A page with 0-refcount and !PageBuddy could perfectly be a pcppage.
Currently, we bail out with an error if we encounter such a page,
meaning that we do not handle pcppages neither from hard-offline
nor from soft-offline path.
Fix this by draining pcplists whenever we find this kind of page
and
Hello,
This series adds CPUFreq support for Qualcomm SM8250 SoC. The existing
qcom-hw driver is reworked to support the EPSS block on this SoC which
handles the CPUFreq duties.
The EPSS block supports additional features for which incremental patches
will be submitted on top of this series!
memory_failure and soft_offline_path paths now drain pcplists by calling
get_hwpoison_page.
memory_failure flags the page as HWPoison before, so that page cannot longer
go into a pcplist, and soft_offline_page only flags a page as HWPoison
if 1) we took the page off a buddy freelist 2) the page
SM8250 SoC uses EPSS block for carrying out the cpufreq duties. Hence, add
support for it in the driver with relevant of_match data.
Signed-off-by: Manivannan Sadhasivam
---
drivers/cpufreq/qcom-cpufreq-hw.c | 9 +
1 file changed, 9 insertions(+)
diff --git
devm_platform_ioremap_resource() is the combination of
platform_get_resource() and devm_ioremap_resource(). Hence, use it to
simplify the code a bit.
Signed-off-by: Manivannan Sadhasivam
---
drivers/cpufreq/qcom-cpufreq-hw.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
Hi Arun,
On Mon, Sep 07, 2020 at 11:47:48PM -0700, Arun Easi wrote:
> Could you drop the above comment about firmware, as it is speculation at
> this point?
Sure, no problem.
> It'd be best to take a chip reset path, rather than assuming the
> packet is good and having the appropriate handler
On Tue, Sep 08, 2020 at 12:39:51AM +0200, Halil Pasic wrote:
> On Mon, 7 Sep 2020 11:39:05 +0200
> Pierre Morel wrote:
>
> > Hi all,
> >
> > The goal of the series is to give a chance to the architecture
> > to validate VIRTIO device features.
>
> Michael, is this going in via your tree?
I
Hi,
This height patch series rework the previous O_MAYEXEC series by not
adding a new flag to openat2(2) but to faccessat2(2) instead. As
suggested, this enables to perform the access check on a file descriptor
instead of on a file path (while opening it). This may require two
checks (one on
From: Mickaël Salaün
This enables to configure a policy for executable scripts which can be
queried with faccessat2(2) and the AT_INTERPRETED flag. This may allow
script interpreters to check execution permission before reading
commands from a file, or dynamic linkers to allow shared object
From: Mickaël Salaün
The AT_INTERPRETED flag combined with the X_OK mode enable trusted user
space tasks to check that files are allowed to be executed by user
space. The security policy is consistently managed by the kernel
through a sysctl or implemented by an LSM thanks to the
Use regmap for accessing cpufreq registers in hardware.
Signed-off-by: Manivannan Sadhasivam
---
drivers/cpufreq/qcom-cpufreq-hw.c | 55 ++-
1 file changed, 47 insertions(+), 8 deletions(-)
diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c
The file opening action on the system may be from user-mode sys_open()
or kernel-mode filp_open().
Currently, fsnotify_open() is invoked in do_sys_openat2().
But filp_open() is not notified. Why? Is this an omission?
Do we need to call fsnotify_open() in filp_open() or do_filp_open() to
From: Bjorn Andersson
Add cpufreq HW device node to scale 4-Silver/3-Gold/1-Gold+ cores
on SM8250 SoCs.
Signed-off-by: Bjorn Andersson
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git
Document the SM8250 SoC specific compatible for Qualcomm Cpufreq HW. The
hardware block which carries out CPUFreq operations on SM8250 SoC is
called EPSS.
Signed-off-by: Manivannan Sadhasivam
---
Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt | 2 +-
1 file changed, 1
For preparing the driver to handle further SoC revisions, let's use the
of_match data for getting the device specific offsets and row size instead
of defining them globally.
Signed-off-by: Manivannan Sadhasivam
---
drivers/cpufreq/qcom-cpufreq-hw.c | 96 +--
1 file
On Fri, 04 Sep 2020, Russ Weight wrote:
> Extend the MAX10 BMC Security Engine driver to include
> the functions that enable secure updates of BMC images,
> FPGA images, etc.
>
> Signed-off-by: Russ Weight
> Reviewed-by: Wu Hao
> ---
> drivers/fpga/intel-m10-bmc-secure.c | 272
Get rid of global_pdev pointer and make use of cpufreq driver_data for
passing the reference of pdev. This aligns with what other cpufreq drivers
are doing.
Signed-off-by: Manivannan Sadhasivam
---
drivers/cpufreq/qcom-cpufreq-hw.c | 11 ++-
1 file changed, 6 insertions(+), 5
Hi,
On 07/09/2020 20:03, Daniel Vetter wrote:
> On Mon, Sep 07, 2020 at 11:03:29AM +0200, Neil Armstrong wrote:
>> On 07/09/2020 10:44, Daniel Vetter wrote:
>>> On Mon, Sep 07, 2020 at 10:43:51AM +0200, Daniel Vetter wrote:
On Mon, Sep 07, 2020 at 10:18:25AM +0200, Neil Armstrong wrote:
From: Mickaël Salaün
Test that checks performed by faccessat2(2) with AT_INTERPRETED on file
path and file descriptors are consistent with noexec mount points and
file execute permissions, according to the policy configured with the
fs.interpreted_access sysctl.
Signed-off-by: Mickaël Salaün
Hi Sam,
On 01/09/2020 08:22, Sam McNally wrote:
> With DP v2.0 errata E5, CEC tunneling can be supported through an MST
> topology.
Oh wow, this is finally supported in the spec. Very nice to see this.
Also very nice to see that my old experimental patches attempting to
support CEC on MST didn't
On 09/08/2020 01:11 PM, Will Deacon wrote:
> On Tue, Sep 08, 2020 at 10:43:12AM +0530, Anshuman Khandual wrote:
>>
>>
>> On 09/07/2020 05:46 PM, Will Deacon wrote:
>>> On Mon, Aug 17, 2020 at 05:34:23PM +0530, Anshuman Khandual wrote:
HWCAP name arrays (hwcap_str, compat_hwcap_str,
Hello,
just a bit of nitpicking left. If Lee is going to apply, I can care for
a followup patch if need be.
On Mon, Sep 07, 2020 at 11:37:55PM +0200, Michael Walle wrote:
> [..]
> +config PWM_SL28CPLD
> + tristate "Kontron sl28cpld PWM support"
> + depends on MFD_SL28CPLD ||
After commit 0a31bc97c80c3f mm: memcontrol: rewrite uncharge API, no one
using MEM_CGROUP_CHARGE_TYPE_xxx, let's remove them.
Signed-off-by: Alex Shi
Cc: Johannes Weiner
Cc: Michal Hocko
Cc: Vladimir Davydov
Cc: Andrew Morton
Cc: cgro...@vger.kernel.org
Cc: linux...@kvack.org
Cc:
Alex Shi writes:
After commit 0a31bc97c80c3f mm: memcontrol: rewrite uncharge API, no one
using MEM_CGROUP_CHARGE_TYPE_xxx, let's remove them.
Signed-off-by: Alex Shi
Cc: Johannes Weiner
Cc: Michal Hocko
Cc: Vladimir Davydov
Cc: Andrew Morton
Cc: cgro...@vger.kernel.org
Cc:
On Sat, 05 Sep 2020, Andy Shevchenko wrote:
> On Saturday, September 5, 2020, Jonathan Neuschäfer
> wrote:
>
> > The Netronix EC provides a PWM output which is used for the backlight
> > on some ebook readers. This patches adds a driver for the PWM output.
> >
> > Signed-off-by: Jonathan
Refactor qla2x00_get_sp_from_handle() to avoid the unecessary
goto if early returns are used. With this we can also avoid
preinitilzing the sp pointer.
Reviewed-by: Martin Wilck
Signed-off-by: Daniel Wagner
---
drivers/scsi/qla2xxx/qla_isr.c | 8 +++-
1 file changed, 3 insertions(+), 5
Commit 7c3df1320e5e ("[SCSI] qla2xxx: Code changes to support new
dynamic logging infrastructure.") removed the use of the func
argument. Let's add it back.
Signed-off-by: Daniel Wagner
---
drivers/scsi/qla2xxx/qla_isr.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff
Emit a warning when ->done or ->free are called on an already freed
srb. There is a hidden use-after-free bug in the driver which corrupts
the srb memory pool which originates from the cleanup callbacks.
An extensive search didn't bring any lights on the real problem. The
initial fix was to set
It was observed on an ISP8324 16Gb HBA with fw=8.08.203 (d0d5) in a
PowerPC64 machine that pkt->entry_type was MBX_IOCB_TYPE/0x39 with an
sp->type SRB_SCSI_CMD which is invalid and should not be possible.
Reading the entry_type from the crash dump shows the expected value of
STATUS_TYPE/0x03 but
The first crash we observed is due memory corruption in the srb memory
pool. Unforuntatly, I couldn't find the source of the problem but the
workaround by resetting the cleanup callbacks 'fixes' this problem
(patch #1). I think as intermeditate step this should be merged until
the real cause can
Le 08/09/2020 à 09:46, Alexander Gordeev a écrit :
On Tue, Sep 08, 2020 at 07:14:38AM +0200, Christophe Leroy wrote:
You forgot arch/powerpc/mm/book3s64/subpage_prot.c it seems.
Yes, and also two more sources :/
arch/powerpc/mm/kasan/8xx.c
Change PINCTR_IMX_SCU to tristate, add module author, description
and license to support building SCU pinctrl core driver as module.
Signed-off-by: Anson Huang
---
changes since V3:
- remove the prompt for PINCTRL_IMX_SCU.
---
drivers/pinctrl/freescale/Kconfig | 2 +-
Change PINCTRL_IMX to tristate to support loadable module build.
And i.MX common pinctrl driver should depend on CONFIG_OF to make sure
no build error when i.MX common pinctrl driver is enabled for different
architectures without CONFIG_OF.
Also add module author, description and license.
Use function callbacks for SCU related functions in pinctrl-imx.c
in order to support the scenario of PINCTRL_IMX is built in while
PINCTRL_IMX_SCU is built as module, all drivers using SCU pinctrl
driver need to initialize the SCU related function callback, and
no need to check
Hi,
On 08/09/2020 10:55, Stefan Agner wrote:
> On 2020-09-07 20:18, Daniel Vetter wrote:
>> On Mon, Sep 07, 2020 at 07:17:12PM +0300, Laurent Pinchart wrote:
>>> Hi Stefan,
>>>
>>> Thank you for the patch.
>>>
>>> On Mon, Sep 07, 2020 at 06:03:43PM +0200, Stefan Agner wrote:
The lcdif IP
On 07/09/2020 15:02, Jonathan Marek wrote:
Srini do you have any suggestions for how to name these values?
These are domain id corresponding to each core.
you can use SDSP_DOMAIN_ID in here!
these are already defined in the file as:
#define ADSP_DOMAIN_ID (0)
#define MDSP_DOMAIN_ID (1)
Actions Semi Owl SoCs SIRQ interrupt controller is found in S500, S700
and S900 SoCs and provides support for handling up to 3 external
interrupt lines.
Signed-off-by: Cristian Ciocaltea
---
Changes in v6:
- Got rid of the 'actions,owl-sirq' compatible, per Robs's feedback
- Replaced
This interrupt controller is found in the Actions Semi Owl SoCs (S500,
S700 and S900) and provides support for handling up to 3 external
interrupt lines.
Each line can be independently configured as interrupt and triggers on
either of the edges or either of the levels. Additionally, each line
can
This patch series adds support for the external interrupt controller
(SIRQ) found in the Actions Semi Owl family of SoC's (S500, S700 and
S900). The controller handles up to 3 external interrupt lines through
dedicated SIRQ pins.
This is a rework of the patch series submitted some time ago by
Add entries for Actions Semi Owl SIRQ controller binding and driver.
Signed-off-by: Cristian Ciocaltea
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9544eec4eff2..04c75815fac6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1525,6 +1525,7
On Thu, 03 Sep 2020, Marc Zyngier wrote:
> The name allocated for the regmap_config structure is freed
> pretty early, right after the registration of the MMIO region.
>
> Unfortunately, that doesn't follow the life cycle that debugfs
> expects, as it can access the name field long after the
Hi Stephen,
On 9/8/20 6:00 AM, Stephen Rothwell wrote:
Hi all,
Today's linux-next merge of the drm-intel tree got a conflict in:
drivers/gpu/drm/i915/display/intel_panel.c
between commit:
f8bd54d21904 ("drm/i915: panel: Use atomic PWM API for devs with an external PWM
controller")
On Mon, Sep 07, 2020 at 10:58:05AM -0700, Joe Perches wrote:
> Convert the various sprintf fmaily calls in sysfs device show functions
> to sysfs_emit and sysfs_emit_at for PAGE_SIZE buffer safety.
But no sysfs_emit_at() calls are used in this patch :(
thanks,
greg k-h
On Tue 08-09-20 16:12:07, Alex Shi wrote:
> After commit 0a31bc97c80c3f mm: memcontrol: rewrite uncharge API, no one
> using MEM_CGROUP_CHARGE_TYPE_xxx, let's remove them.
>
> Signed-off-by: Alex Shi
> Cc: Johannes Weiner
> Cc: Michal Hocko
> Cc: Vladimir Davydov
> Cc: Andrew Morton
>
This patch depend on the patchsets: "Modularization of DFL private
feature drivers" & "add dfl bus support to MODULE_DEVICE_TABLE()"
https://lore.kernel.org/linux-fpga/1599488581-16386-1-git-send-email-yilun...@intel.com/
The driver supports the EMIF controller on Intel Programmable
Acceleration
On Mon, Sep 07, 2020 at 10:58:06AM -0700, Joe Perches wrote:
> strcat is no longer necessary for sysfs_emit and sysfs_emit_at uses.
>
> Convert the strcat uses to sysfs_emit calls and neaten other block
> uses of direct returns to use an intermediate const char *.
>
> Signed-off-by: Joe Perches
On Tue, 2020-09-08 at 10:27 +0200, Greg Kroah-Hartman wrote:
> On Mon, Sep 07, 2020 at 10:58:05AM -0700, Joe Perches wrote:
> > Convert the various sprintf fmaily calls in sysfs device show functions
> > to sysfs_emit and sysfs_emit_at for PAGE_SIZE buffer safety.
>
> But no sysfs_emit_at() calls
On Tue, 01 Sep 2020, Kalle Valo wrote:
> Lee Jones wrote:
>
> > 'mwifiex_1d_to_wmm_queue' is used in'; main.c, txrx.c and uap_txrx.c
> >
> > ... but not used in 14 other source files which include 'wmm.h'.
> >
> > Fixes the following W=1 kernel build warning(s):
> >
> > In file included
On Fri, Sep 04, 2020 at 10:12:07PM +0300, Andy Shevchenko wrote:
> On Fri, Sep 4, 2020 at 7:52 PM Vadym Kochan wrote:
> >
> > Marvell Prestera 98DX326x integrates up to 24 ports of 1GbE with 8
> > ports of 10GbE uplinks or 2 ports of 40Gbps stacking for a largely
> > wireless SMB deployment.
> >
From: Camel Guo
According to its datasheet, after reset this codec goes into sleep
mode. In this mode, any register accessing should be avoided except for
exiting sleep mode. Hence this commit moves SLEEP_CFG access before any
register accessing.
Signed-off-by: Camel Guo
---
On Tuesday, 2020-09-08 09:54 Neil Armstrong wrote:
> Shanghai Top Display Optolelectronics Co., Ltd is a display manufacturer
> from Shanghai.
> Web site of the company: http://www.shtdo.com/
>
> Signed-off-by: Neil Armstrong
> ---
> Documentation/devicetree/bindings/vendor-prefixes.yaml | 2
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