Hi Mansur,
On 2020-11-02 16:01, Mansur Alisha Shaik wrote:
Currently in calculate_inst_freq(), video driver is calculating
macro blocks per frame in stead of macro blocks per second(mpbs).
instead
Which results frequency is always setting to lower frequency (150MB)
as per frequency table for
On Sun, Nov 01, 2020 at 12:09:35PM +0100, Hagen Paul Pfeifer wrote:
> * Mike Rapoport | 2020-09-24 16:28:58 [+0300]:
>
> >This is an implementation of "secret" mappings backed by a file descriptor.
> >I've dropped the boot time reservation patch for now as it is not strictly
> >required for the b
On Mon, Nov 02, 2020 at 04:20:30PM +0100, Bartosz Golaszewski wrote:
> +Chunks allocated with `kmalloc` can be resized with `krealloc`. Similarly
> +to `kmalloc_array`: a helper for resising arrays is provided in the form of
> +`krealloc_array`.
Is there any reason you chose to `do_this` instead o
Lee Jones writes:
> [Last batch!]
>
> This set is part of a larger effort attempting to clean-up W=1
> kernel builds, which are currently overwhelmingly riddled with
> niggly little warnings.
>
> Lee Jones (41):
> wil6210: wmi: Correct misnamed function parameter 'ptr_'
> rsi_91x_usb: Fix so
On Mon, Nov 2, 2020 at 4:41 PM Matthew Wilcox wrote:
>
> On Mon, Nov 02, 2020 at 04:20:30PM +0100, Bartosz Golaszewski wrote:
> > +Chunks allocated with `kmalloc` can be resized with `krealloc`. Similarly
> > +to `kmalloc_array`: a helper for resising arrays is provided in the form of
> > +`kreall
On Thu, Oct 29, 2020 at 03:28:43PM +, Mark Brown wrote:
> On Thu, Oct 29, 2020 at 04:15:38PM +0100, Vincent Whitchurch wrote:
>
> > + config.init_data = of_get_regulator_init_data(dev, dev->of_node,
> > &da9121_reg);
> > + if (!config.init_data)
> > + return -ENOMEM;
>
> Don't
Hey Ben,
A few comments on probe/remove below:
On Fri, Oct 30, 2020 at 02:28:34PM -0700, Ben Levinsky wrote:
> R5 is included in Xilinx Zynq UltraScale MPSoC so by adding this
> remotproc driver, we can boot the R5 sub-system in different 2
> configurations -
> * split
> * lock-step
>
On 30/10/2020 02:57, Leo Yan wrote:
> When outputs strings to the decoding buffer with function snprintf(),
> SPE decoder needs to detects if any error returns from snprintf() and if
> so needs to directly bail out. If snprintf() returns success, it needs
> to update buffer pointer and reduce the
This series introduces support for the LogiCVC display controller.
The controller is a bit unusual since it is usually loaded as
programmable logic on Xilinx FPGAs or Zynq-7000 SoCs.
More details are presented on the main commit for the driver.
More information about the controller is available on
The Xylon LogiCVC is a display controller implemented as programmable
logic in Xilinx FPGAs.
Signed-off-by: Paul Kocialkowski
Acked-by: Rob Herring
---
.../display/xylon,logicvc-display.yaml| 313 ++
1 file changed, 313 insertions(+)
create mode 100644
Documentation/de
On Mon, Nov 02, 2020 at 02:23:58PM +0100, Daniel Vetter wrote:
> On Mon, Nov 2, 2020 at 2:01 PM Jason Gunthorpe wrote:
> >
> > On Mon, Nov 02, 2020 at 01:56:10PM +0100, Daniel Vetter wrote:
> > > On Mon, Nov 2, 2020 at 8:29 AM Christoph Hellwig
> > > wrote:
> > > >
> > > > On Fri, Oct 30, 2020 a
---
drivers/gpu/drm/logicvc/logicvc_drm.h | 3 +
drivers/gpu/drm/logicvc/logicvc_layer.c | 143 +++-
drivers/gpu/drm/logicvc/logicvc_layer.h | 7 ++
3 files changed, 149 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/logicvc/logicvc_drm.h
b/drivers/gpu/drm/l
Introduces a driver for the LogiCVC display controller, a programmable
logic controller optimized for use in Xilinx Zynq-7000 SoCs and other
Xilinx FPGAs. The controller is mostly configured at logic synthesis
time so only a subset of configuration is left for the driver to
handle.
The following f
On Mon, Nov 02, 2020 at 08:52:17AM +0800, Tian Tao wrote:
> The code has been in a irq-disabled context since it is hard IRQ. There
> is no necessity to do it again.
>
Ah, yes. This should save few cycles!
> Signed-off-by: Tian Tao
Reviewed-by: Manivannan Sadhasivam
Thanks,
Mani
> ---
> dr
Jérôme Pouiller writes:
> On Tuesday 13 October 2020 18:49:35 CEST Rob Herring wrote:
>> On Mon, Oct 12, 2020 at 12:46:26PM +0200, Jerome Pouiller wrote:
>> > From: Jérôme Pouiller
> [...]
>> > + Note that in add of the properties below, the WFx driver also supports
>> > + `mac-address` and `l
On 29/10/2020 00:28, Evan Green wrote:
Certain fuses are protected by the XPU such that the AP cannot
access them. Attempting to do so causes an SError. Introduce an
SoC-specific compatible string, and introduce support into the
nvmem core to avoid accessing specified regions. Then use those
n
Ulf Hansson writes:
> On Thu, 15 Oct 2020 at 16:03, Jérôme Pouiller
> wrote:
>>
>> On Wednesday 14 October 2020 14:43:34 CEST Pali Rohár wrote:
>> > On Wednesday 14 October 2020 13:52:15 Jérôme Pouiller wrote:
>> > > On Tuesday 13 October 2020 22:11:56 CEST Pali Rohár wrote:
>> > > > On Monday 1
From: Min Li
Add idt82p33_adjwritephase() to support PHC write phase mode.
Changes since v1:
- Fix broken build on 32 bit machine due to 64 bit division.
Signed-off-by: Min Li
---
drivers/ptp/ptp_idt82p33.c | 317 ++---
drivers/ptp/ptp_idt82p33.h | 3
he issue here, neither with Sphinx 2.4.4
> nor with Sphinx 3.2.1.
That could be one source of the problem: ;)
from my docs build:
Sphinx version: 1.7.6
Warning: It is recommended at least Sphinx version 1.7.9.
If you want pdf, you need at least 2.4.4.
Note: It is recommended at l
From: Vincenzo Frascino
Provide helper functions to manipulate allocation and pointer tags for
kernel addresses.
Low-level helper functions (mte_assign_*, written in assembly) operate
tag values from the [0x0, 0xF] range. High-level helper functions
(mte_get/set_*) use the [0xF0, 0xFF] range to
On Fri, Oct 30, 2020 at 10:46:54AM +0800, Alex Shi wrote:
> -static void lru_add_page_tail(struct page *page, struct page *page_tail,
> +static void lru_add_page_tail(struct page *head, struct page *tail,
> struct lruvec *lruvec, struct list_head *list)
> {
> - VM_BUG_ON_PAGE(!Pa
From: Vincenzo Frascino
Hardware tag-based KASAN relies on Memory Tagging Extension (MTE) which
is an armv8.5-a architecture extension.
Enable the correct asm option when the compiler supports it in order to
allow the usage of ALTERNATIVE()s with MTE instructions.
Signed-off-by: Vincenzo Frasci
From: Vincenzo Frascino
Hardware tag-based KASAN relies on Memory Tagging Extension (MTE)
feature and requires it to be enabled.
The Tag Checking operation causes a synchronous data abort as
a consequence of a tag check fault when MTE is configured in
synchronous mode.
Enable MTE in Synchronous
Currently only generic KASAN mode supports vmalloc, reflect that
in the config.
Signed-off-by: Andrey Konovalov
Signed-off-by: Vincenzo Frascino
Reviewed-by: Marco Elver
---
Change-Id: I1889e5b3bed28cc5d607802fb6ae43ba461c0dc1
---
lib/Kconfig.kasan | 2 +-
1 file changed, 1 insertion(+), 1 del
This is a preparatory commit for the upcoming addition of a new hardware
tag-based (MTE-based) KASAN mode.
The new mode won't be using shadow memory, so only build init.c that
contains shadow initialization code for software modes.
No functional changes for software modes.
Signed-off-by: Andrey
Hardware tag-based KASAN uses the memory tagging approach, which requires
all allocations to be aligned to the memory granule size. Align the
allocations to MTE_GRANULE_SIZE via ARCH_SLAB_MINALIGN when
CONFIG_KASAN_HW_TAGS is enabled.
Signed-off-by: Andrey Konovalov
Signed-off-by: Vincenzo Frasci
This is a preparatory commit for the upcoming addition of a new hardware
tag-based (MTE-based) KASAN mode.
Group all vmalloc-related function declarations in include/linux/kasan.h,
and their implementations in mm/kasan/common.c.
No functional changes.
Signed-off-by: Andrey Konovalov
Signed-off-
This is a preparatory commit for the upcoming addition of a new hardware
tag-based (MTE-based) KASAN mode.
The new mode won't be using shadow memory, but will still use the concept
of memory granules. Each memory granule maps to a single metadata entry:
8 bytes per one shadow byte for generic mode
Rename generic_report.c to report_generic.c and tags_report.c to
report_sw_tags.c, as their content is more relevant to report.c file.
Also rename tags.c to sw_tags.c to better reflect that this file contains
code for software tag-based mode.
No functional changes.
Signed-off-by: Andrey Konovalov
From: Vincenzo Frascino
Add the implementation of the in-kernel fault handler.
When a tag fault happens on a kernel address:
* MTE is disabled on the current CPU,
* the execution continues.
When a tag fault happens on a user address:
* the kernel executes do_bad_area() and panics.
The tag faul
From: Vincenzo Frascino
The hardware tag-based KASAN for compatibility with the other modes
stores the tag associated to a page in page->flags.
Due to this the kernel faults on access when it allocates a page with an
initial tag and the user changes the tags.
Reset the tag associated by the kern
From: Vincenzo Frascino
The gcr_user mask is a per thread mask that represents the tags that are
excluded from random generation when the Memory Tagging Extension is
present and an 'irg' instruction is invoked.
gcr_user affects the behavior on EL0 only.
Currently that mask is an include mask an
This is a preparatory commit for the upcoming addition of a new hardware
tag-based (MTE-based) KASAN mode.
The new mode won't be using shadow memory. Move all shadow-related code
to shadow.c, which is only enabled for software KASAN modes that use
shadow memory.
No functional changes for software
Don't mention "GNU General Public License version 2" text explicitly,
as it's already covered by the SPDX-License-Identifier.
Signed-off-by: Andrey Konovalov
Signed-off-by: Vincenzo Frascino
Reviewed-by: Marco Elver
---
Change-Id: If0a2690042a2aa0fca70cea601ae9aabe72fa233
---
mm/kasan/common.c
Decoding routines aren't needed when CONFIG_KASAN_STACK_ENABLE is not
enabled. Currently only generic KASAN mode implements stack error
reporting.
No functional changes for software modes.
Signed-off-by: Andrey Konovalov
Signed-off-by: Vincenzo Frascino
Reviewed-by: Marco Elver
---
Change-Id:
Both KASAN_GENERIC and KASAN_SW_TAGS have common dependencies, move
those to KASAN.
Signed-off-by: Andrey Konovalov
Signed-off-by: Vincenzo Frascino
Reviewed-by: Marco Elver
---
Change-Id: I77e475802e8f1750b9154fe4a6e6da4456054fcd
---
lib/Kconfig.kasan | 8 ++--
1 file changed, 2 insertion
This is a preparatory commit for the upcoming addition of a new hardware
tag-based (MTE-based) KASAN mode.
Group shadow-related KASAN function declarations and only define them
for the two existing software modes.
No functional changes for software modes.
Signed-off-by: Andrey Konovalov
Signed-
Define KASAN_GRANULE_PAGE as (KASAN_GRANULE_SIZE << PAGE_SHIFT), which is
the same as (KASAN_GRANULE_SIZE * PAGE_SIZE), and use it across KASAN code
to simplify it.
Signed-off-by: Andrey Konovalov
Signed-off-by: Vincenzo Frascino
Reviewed-by: Marco Elver
---
Change-Id: I0b627b24187d06c8b9bb2f1d
This is a preparatory commit for the upcoming addition of a new hardware
tag-based (MTE-based) KASAN mode.
Hardware tag-based KASAN won't be using shadow memory, but will reuse
this function. Rename "shadow" to implementation-neutral "metadata".
No functional changes.
Signed-off-by: Andrey Konov
Add documentation for hardware tag-based KASAN mode and also add some
clarifications for software tag-based mode.
Signed-off-by: Andrey Konovalov
Signed-off-by: Vincenzo Frascino
Reviewed-by: Marco Elver
---
Change-Id: Ib46cb444cfdee44054628940a82f5139e10d0258
---
Documentation/dev-tools/kasan
Hardware tag-based KASAN is now ready, enable the configuration option.
Signed-off-by: Andrey Konovalov
Signed-off-by: Vincenzo Frascino
Acked-by: Catalin Marinas
---
Change-Id: I6eb1eea770e6b61ad71c701231b8d815a7ccc853
---
arch/arm64/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a
Add error reporting for hardware tag-based KASAN. When CONFIG_KASAN_HW_TAGS
is enabled, print KASAN report from the arm64 tag fault handler.
SAS bits aren't set in ESR for all faults reported in EL1, so it's
impossible to find out the size of the access the caused the fault.
Adapt KASAN reporting
Kernel allocator code accesses metadata for slab objects, that may lie
out-of-bounds of the object itself, or be accessed when an object is freed.
Such accesses trigger tag faults and lead to false-positive reports with
hardware tag-based KASAN.
Software KASAN modes disable instrumentation for all
From: Vincenzo Frascino
This test is specific to MTE and verifies that the GCR_EL1 register
is context switched correctly.
It spawn 1024 processes and each process spawns 5 threads. Each thread
writes a random setting of GCR_EL1 through the prctl() system call and
reads it back verifying that it
Provide implementation of KASAN functions required for the hardware
tag-based mode. Those include core functions for memory and pointer
tagging (tags_hw.c) and bug reporting (report_tags_hw.c). Also adapt
common KASAN code to support the new mode.
Signed-off-by: Andrey Konovalov
Signed-off-by: Vi
This patch adds a configuration option for a new KASAN mode called
hardware tag-based KASAN. This mode uses the memory tagging approach
like the software tag-based mode, but relies on arm64 Memory Tagging
Extension feature for tag management and access checking.
Signed-off-by: Andrey Konovalov
Co
Software tag-based KASAN provides its own tag checking machinery that
can conflict with MTE. Don't allow enabling software tag-based KASAN
when MTE is enabled.
Signed-off-by: Andrey Konovalov
Signed-off-by: Vincenzo Frascino
Reviewed-by: Catalin Marinas
---
Change-Id: Icd29bd0c6b1d3d7a0ee3d50c2
With the intoduction of hardware tag-based KASAN some kernel checks of
this kind:
ifdef CONFIG_KASAN
will be updated to:
if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS)
x86 and s390 use a trick to #undef CONFIG_KASAN for some of the code
that isn't linked with KASAN runtim
This is a preparatory commit for the upcoming addition of a new hardware
tag-based (MTE-based) KASAN mode.
kasan_non_canonical_hook() is only applicable to KASAN modes that use
shadow memory, and won't be needed for hardware tag-based KASAN.
No functional changes for software modes.
Signed-off-b
This is a preparatory commit for the upcoming addition of a new hardware
tag-based (MTE-based) KASAN mode.
Rework print_memory_metadata() to make it agnostic with regard to the
way metadata is stored. Allow providing a separate metadata_fetch_row()
implementation for each KASAN mode. Hardware tag-
Hardware tag-based KASAN has granules of MTE_GRANULE_SIZE. Define
KASAN_GRANULE_SIZE to MTE_GRANULE_SIZE for CONFIG_KASAN_HW_TAGS.
Signed-off-by: Andrey Konovalov
Signed-off-by: Vincenzo Frascino
Reviewed-by: Marco Elver
---
Change-Id: I5d1117e6a991cbca00d2cfb4ba66e8ae2d8f513a
---
mm/kasan/kas
Some #ifdef CONFIG_KASAN checks are only relevant for software KASAN
modes (either related to shadow memory or compiler instrumentation).
Expand those into CONFIG_KASAN_GENERIC || CONFIG_KASAN_SW_TAGS.
Signed-off-by: Andrey Konovalov
Signed-off-by: Vincenzo Frascino
Reviewed-by: Catalin Marinas
On 11/2/20 7:12 PM, Tom Rix wrote:
>
> On 11/1/20 10:51 PM, kajoljain wrote:
>>
>> On 10/31/20 7:18 PM, t...@redhat.com wrote:
>>> From: Tom Rix
>>>
>>> A semicolon is not needed after a switch statement.
>> Hi Tom,
>>I was checking this patch. Not sure if it will come under as fix patch.
Hi,
On Sun, Nov 1, 2020 at 11:21 AM Laurent Pinchart
wrote:
>
> Hi Stephen,
>
> Thank you for the patch.
>
> On Thu, Oct 29, 2020 at 06:17:37PM -0700, Stephen Boyd wrote:
> > Use the DDC connection to read the EDID from the eDP panel instead of
> > relying on the panel to tell us the modes.
> >
>
This patchset adds a new hardware tag-based mode to KASAN [1]. The new mode
is similar to the existing software tag-based KASAN, but relies on arm64
Memory Tagging Extension (MTE) [2] to perform memory and pointer tagging
(instead of shadow memory and compiler instrumentation).
This patchset is co
This is a preparatory commit for the upcoming addition of a new hardware
tag-based (MTE-based) KASAN mode.
Hardware tag-based KASAN won't be using shadow memory, but will reuse
this function. Rename "shadow" to implementation-neutral "metadata".
No functional changes.
Signed-off-by: Andrey Konov
asm/kasan.h relies on pgd_t type that is defined in asm/page.h. Include
asm/page.h from asm/kasan.h.
Signed-off-by: Andrey Konovalov
---
Change-Id: I369a8f9beb442b9d05733892232345c3f4120e0a
---
arch/s390/include/asm/kasan.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/s390/include/
ASSERT_GE() is defined as:
/**
* ASSERT_GE(expected, seen)
*
* @expected: expected value
* @seen: measured value
*
* ASSERT_GE(expected, measured): expected >= measured
*/
#define ASSERT_GE(expected, seen) \
__EXPECT(expected, #expected, seen, #seen, >=, 1)
but that means that logically, i
This is a preparatory commit for the upcoming addition of a new hardware
tag-based (MTE-based) KASAN mode.
Hardware tag-based KASAN won't be using shadow memory, but will reuse
these macros. Rename "SHADOW" to implementation-neutral "META".
No functional changes.
Signed-off-by: Andrey Konovalov
This patch add a set of arch_*() memory tagging helpers currently only
defined for arm64 when hardware tag-based KASAN is enabled. These helpers
will be used by KASAN runtime to implement the hardware tag-based mode.
The arch-level indirection level is introduced to simplify adding hardware
tag-ba
This is a preparatory commit for the upcoming addition of a new hardware
tag-based (MTE-based) KASAN mode.
For software KASAN modes the check is based on the value in the shadow
memory. Hardware tag-based KASAN won't be using shadow, so hide the
implementation of the check in check_invalid_free().
This is a preparatory commit for the upcoming addition of a new hardware
tag-based (MTE-based) KASAN mode.
Hardware tag-based KASAN won't be using shadow memory. Only initialize
it when one of the software KASAN modes are enabled.
No functional changes for software modes.
Signed-off-by: Andrey K
This is a preparatory commit for the upcoming addition of a new hardware
tag-based (MTE-based) KASAN mode.
The new mode won't be using shadow memory, but will reuse the same
functions. Rename kasan_unpoison_shadow to kasan_unpoison_memory,
and kasan_poison_shadow to kasan_poison_memory.
No functi
From: Vincenzo Frascino
When MTE is present, the GCR_EL1 register contains the tags mask that
allows to exclude tags from the random generation via the IRG instruction.
With the introduction of the new Tag-Based KASAN API that provides a
mechanism to reserve tags for special reasons, the MTE imp
This is a preparatory commit for the upcoming addition of a new hardware
tag-based (MTE-based) KASAN mode.
Hardware tag-based KASAN won't use kasan_depth. Only define and use it
when one of the software KASAN modes are enabled.
No functional changes for software modes.
Signed-off-by: Andrey Kono
Daisy Zhang251 writes:
> From: Daisy Zhang1
>
> Register a WiFi driver of IEEE80211 WLAN for the Unisoc Marlin3
> chipsets. The following code is a simple architecture for probing
> driver.
>
> Signed-off-by: Daisy Zhang1
Can you clarify what this driver actually does? The commit log is very
c
On Mon, Nov 02, 2020 at 04:20:37PM +0100, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> Use the helper that checks for overflows internally instead of manually
> calculating the size of the new array.
...
> + nfences = krealloc_array(fences, i,
> +
On 10/28, Chao Yu wrote:
> On 2020/10/26 17:40, Robin Hsu via Linux-f2fs-devel wrote:
> > 'ret' should not have been used here: otherwise, it would be wrongly used
> > as the error code and then be returned from main().
> >
> > Signed-off-by: Robin Hsu
>
> BTW, how about changing 'ret = EXIT_ERR
Hi Guys,
I remember watching this YouTube video years ago and something Linus
said really stuck with me:
https://www.youtube.com/watch?v=5PmHRSeA2c8
It was around the whole binaries, package management problem, because
it's been something that has been troublesome for me, building separate
binar
Hi Russell,
On Mon, Nov 02, 2020 at 10:23:43AM +, Russell King - ARM Linux admin wrote:
> On Sun, Nov 01, 2020 at 01:11:22PM +, Lee Jones wrote:
> > On Sat, 31 Oct 2020, Russell King - ARM Linux admin wrote:
> >
> > > On Fri, Oct 30, 2020 at 06:18:22PM +, Lee Jones wrote:
> > > > Comm
32-bit messages translated by xfrm_compat can have attributes attached.
For all, but XFRMA_SA, XFRMA_POLICY the size of payload is the same
in 32-bit UABI and 64-bit UABI. For XFRMA_SA (struct xfrm_usersa_info)
and XFRMA_POLICY (struct xfrm_userpolicy_info) it's only tail-padding
that is present in
xfrm_xlate32() translates 64-bit message provided by kernel to be sent
for 32-bit listener (acknowledge or monitor). Translator code doesn't
expect XFRMA_UNSPEC attribute as it doesn't know its payload.
Kernel never attaches such attribute, but a user can.
I've searched if any opensource does it a
32-bit to 64-bit messages translator zerofies needed paddings in the
translation, the rest is the actual payload.
Don't allocate zero pages as they are not needed.
Fixes: 5106f4a8acff ("xfrm/compat: Add 32=>64-bit messages translator")
Signed-off-by: Dmitry Safonov
---
net/xfrm/xfrm_compat.c | 2
v2: Added "Fixes" tags to the patches.
WARN_ON() for XFRMA_UNSPEC translation which likely no-one except
syzkaller uses; properly zerofy tail-padding for 64-bit attribute;
don't use __GFP_ZERO as the memory is initialized during translation.
Cc: Steffen Klassert
Cc: "David S. Miller"
Cc: Jakub
On Mon, Nov 02, 2020 at 03:56:57PM +0100, Borislav Petkov wrote:
> On Mon, Oct 19, 2020 at 02:17:50PM +0800, shuo.a@intel.com wrote:
> > +static inline long acrn_hypercall0(unsigned long hcall_id)
> > +{
> > + long result;
> > +
> > + asm volatile("movl %1, %%r8d\n\t"
> > +"
On Mon, Nov 02, 2020 at 05:14:42PM +0530, Sumit Garg wrote:
> Add support to handle SGIs as pseudo NMIs. As SGIs or IPIs default to a
> special flow handler: handle_percpu_devid_fasteoi_ipi(), so skip NMI
> handler update in case of SGIs.
>
> Also, enable NMI support prior to gic_smp_init() as all
On Mon, Nov 02 2020 at 11:30, Marc Zyngier wrote:
> On 2020-11-01 22:27, Thomas Gleixner wrote:
> The following patch makes it work for me (GICv3 guest without an ITS)by
> checking for the presence of an MSI domain at the point where we
> actually
> perform this association, and before starting to
On 14.10.20 11:05, Andra Paraschiv wrote:
Update the assigned value of the poll result to be EPOLLHUP instead of
POLLHUP to match the __poll_t type.
Signed-off-by: Andra Paraschiv
Reported-by: kernel test robot
---
drivers/virt/nitro_enclaves/ne_misc_dev.c | 2 +-
1 file changed, 1 inser
On Mon, Nov 02, 2020 at 03:50:49PM +0100, Daniel Vetter wrote:
> Maybe Peilin is going to include the full re-cosntification in a
> cleanup series, dunno.
Sure, I will do it in a separate patch.
Thank you,
Peilin Ye
From: Viorel Suman
The break condition copied by mistake as same
as loop condition in the previous version, but must
be the opposite. So fix it.
Signed-off-by: Viorel Suman
---
sound/soc/fsl/fsl_xcvr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/fsl/fsl_xcvr.c
Hi,
On Thu, Oct 29, 2020 at 6:17 PM Stephen Boyd wrote:
>
> These register reads and writes are sometimes directly next to each
> other in the register address space. Let's use regmap bulk read/write
> APIs to get the data with one transfer instead of multiple i2c
> transfers. This helps cut down
On Mon, Nov 02, 2020 at 05:14:43PM +0530, Sumit Garg wrote:
> Assign an unused IPI which can be turned as NMI using ipi_nmi framework.
> Also, invoke corresponding dynamic IPI setup/teardown APIs.
>
> Signed-off-by: Sumit Garg
> ---
> arch/arm64/kernel/smp.c | 8
> 1 file changed, 8 ins
Hi Jason
On Mon, Nov 02, 2020 at 09:20:36AM -0400, Jason Gunthorpe wrote:
> > of IDXD for guest drivers. These look and feel like IDXD, not another
> > device
> > interface. In that sense if we move PF/VF mailboxes as
> > separate drivers i thought it feels a bit odd.
>
> You need this split a
On Mon, Nov 02, 2020 at 05:14:45PM +0530, Sumit Garg wrote:
> Enable NMI backtrace support on arm64 using IPI turned as an NMI
> leveraging pseudo NMIs support. It is now possible for users to get a
> backtrace of a CPU stuck in hard-lockup using magic SYSRQ.
>
> Signed-off-by: Sumit Garg
> ---
>
Hi Mirela,
I wanted to give it a more in-depth look but I then saw that patch 11
deletes a lot of code from this file. So, the review on the deleted
parts would be pointless... :/
I suggest you squash 4 and 11 together.
However, there are a few comments below.
On Mon, Nov 02, 2020 at 05:08:14AM
Hi Anand,
On 01.11.2020 15:07, Anand Moon wrote:
> Hi Lukasz,
>
> On Thu, 1 Oct 2020 at 19:25, Łukasz Stelmach wrote:
>> Add a placeholder for a MAC address. A bootloader may fill it
>> to set the MAC address and override EEPROM settings.
>>
>> Signed-off-by: Łukasz Stelmach
>> ---
>> Changes in
Hi Mirela,
On Mon, Nov 02, 2020 at 05:08:16AM +0200, Mirela Rabulea (OSS) wrote:
> From: Mirela Rabulea
>
> Added as:
> FREESCALE IMX / MXC JPEG V4L2 DRIVER
>
> Signed-off-by: Mirela Rabulea
> ---
> MAINTAINERS | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/MAINTAINERS b/MA
Little modify for nfs4_lock_delegation_recall delay retry
Wenle Chen (2):
NFS: Reduce redundant comparison
NFS: Limit the number of retries
fs/nfs/nfs4proc.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
--
2.29.1
On Mon, 02 Nov 2020, Peilin Ye wrote:
> On Mon, Nov 02, 2020 at 03:50:49PM +0100, Daniel Vetter wrote:
> > Maybe Peilin is going to include the full re-cosntification in a
> > cleanup series, dunno.
>
> Sure, I will do it in a separate patch.
Are you happy to conduct a proper clean-up on top of
The err wouldn't be change after sleep. There is no need
to compare err and -NFS4ERR_DELAY
Signed-off-by: Wenle Chen
---
fs/nfs/nfs4proc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c
index 9e0ca9b2b210..f6b5dc792b33 100644
--- a/fs/
We can't wait forever, even if the state
is always delayed.
Signed-off-by: Wenle Chen
---
fs/nfs/nfs4proc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c
index f6b5dc792b33..bb2316bf13f6 100644
--- a/fs/nfs/nfs4proc.c
+++ b/fs/nfs/
On Mon, 02 Nov 2020, Lee Jones wrote:
> On Mon, 02 Nov 2020, Peilin Ye wrote:
>
> > On Mon, Nov 02, 2020 at 03:50:49PM +0100, Daniel Vetter wrote:
> > > Maybe Peilin is going to include the full re-cosntification in a
> > > cleanup series, dunno.
> >
> > Sure, I will do it in a separate patch.
>
On Fri, Oct 30, 2020 at 02:57:23AM +, Leo Yan wrote:
> From: Andre Przywara
>
> When SPE records a physical address, it can additionally tag the event
> with information from the Memory Tagging architecture extension.
>
> Decode the two additional fields in the SPE event payload.
>
> [leoy:
Arnd Bergmann writes:
> From: Arnd Bergmann
>
> gcc-10 shows a false-positive warning with CONFIG_KASAN:
>
> drivers/net/wireless/ath/ath9k/dynack.c: In function
> 'ath_dynack_sample_tx_ts':
> include/linux/etherdevice.h:290:14: warning: writing 4 bytes into a region of
> size 0 [-Wstringop-ov
On Sun, Nov 1, 2020 at 8:17 AM Alexander Lobakin wrote:
>
> Virtual netdevs should use NETIF_F_GSO_SOFTWARE to forward GSO skbs
> as-is and let the final drivers deal with them when supported.
> Also remove NETIF_F_GSO_UDP_L4 from bonding and team drivers as it's
> now included in the "software" l
On 11/02, Chao Yu wrote:
> This patch supports to store chksum value with compressed
> data, and verify the integrality of compressed data while
> reading the data.
>
> The feature can be enabled through specifying mount option
> 'compress_chksum'.
>
> Signed-off-by: Chao Yu
> ---
> Documentati
On 11/2/20 2:11 PM, Johan Jonker wrote:
> Hi,
>
> On 11/2/20 2:07 PM, Miquel Raynal wrote:
>> Hi Johan, Yifeng
>>
>> Johan Jonker wrote on Mon, 2 Nov 2020 13:57:56
>> +0100:
>>
>>> Hi Yifeng,
>>>
>>> Don't poke with "ecc->bytes" ones it is set in rk_nfc_ecc_init(). It
>>> will not be noted by the
Hi,
On Thu, Oct 29, 2020 at 6:17 PM Stephen Boyd wrote:
>
> We should be setting the drm_dp_aux_msg::reply field if a NACK or a
> SHORT reply happens. Update the error bit handling logic in
> ti_sn_aux_transfer() to handle these cases and notify upper layers that
> such errors have happened. This
On 2020-11-02 04:27, carl@quectel.com wrote:
From: "carl.yin"
MHI wwan modems support download firmware to nand or emmc
by firehose protocol, process as next:
1. modem boot up and enter EE AMSS, create DIAG channels (4, 5) device
2. user space tool send EDL command via DIAG channel,
then
On Mon, Nov 02, 2020 at 04:24:47PM +, Lee Jones wrote:
> On Mon, 02 Nov 2020, Peilin Ye wrote:
>
> > On Mon, Nov 02, 2020 at 03:50:49PM +0100, Daniel Vetter wrote:
> > > Maybe Peilin is going to include the full re-cosntification in a
> > > cleanup series, dunno.
> >
> > Sure, I will do it in
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