On Fri, 2014-05-02 at 08:36 +0200, Mike Galbraith wrote:
> Reason why is that case was on a box where FAIR_SLEEPERS is disabled by
> default, meaning there is no such thing as wakeup preemption. Guess
> what happens when you don't have shared LLC for a fast/light wakee to
> escape to when the wak
On Fri, 2014-05-02 at 02:08 -0400, Rik van Riel wrote:
> On 05/02/2014 01:58 AM, Mike Galbraith wrote:
> > On Fri, 2014-05-02 at 07:32 +0200, Mike Galbraith wrote:
> >> On Fri, 2014-05-02 at 00:42 -0400, Rik van Riel wrote:
> >>> Currently sync wakeups from the wake_affine code cannot work as
>
CPTS refclk name is hardcoded, which makes it fail in case of DRA7x
Remove the hardcoded clock name for CPTS refclk and get the same from DT.
Signed-off-by: George Cherian
---
drivers/net/ethernet/ti/cpts.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/n
Add CPSW fck and CPTS clock and clock names
Signed-off-by: George Cherian
---
arch/arm/boot/dts/am33xx.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 9770e35..d1e2b36 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/
Add CPSW fck and CPTS clock and clock names for AM4372
Signed-off-by: George Cherian
---
arch/arm/boot/dts/am4372.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 36d523a..c2779f6 100644
--- a/arch/arm/boot/dts/am4372.
cpsw_cpts_rft_clk has got the choice of 3 clocksources
-dpll_core_m4_ck
-dpll_core_m5_ck
-dpll_disp_m2_ck
By default dpll_core_m4_ck is selected, witn this as clock
source the CPTS doesnot work properly. It gives clockcheck errors
while running PTP.
clockcheck: clock jumped backward or runnin
Enable the Annex F Time Sync explicitly for DRA7x and AM4372.
With this enabled the L2 PTP is working.
while at that rename TS_BIT8 to TS_TTL_NONZERO
Signed-off-by: George Cherian
---
drivers/net/ethernet/ti/cpsw.c | 49 +++---
1 file changed, 37 insertions(+
Enable cpts hardware time stamping for Dra7xx and AM4372.
This enables PTPv2 for DRA7xx and AM4372.
Signed-off-by: George Cherian
---
drivers/net/ethernet/ti/cpsw.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti
The series adds CPTS support for AM4372.
Patch 1 - DT changes w.r.t clock changes for AM33xx.
Patch 2 - CPTS clock name harcoding in the driver is removed.
Easier to pass the clock name from dt rather than hardcoding in
driver.
Also in prepration for DRA7x CPTS support.
Patch
On 01.05.2014 07:49, Alexandre Courbot wrote:
> Agreed. Besides I hope the day won't come where we have to go through
> 2 layers of memory translation for the GPU...
That's actually the method of operation that gives us the best
performance. GPU likes big pages, and without IOMMU translation you'd
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On Fri, 2014-05-02 at 00:42 -0400, Rik van Riel wrote:
> Whether or not this is the right thing to do remains to be seen,
> but it does allow us to verify whether or not the wake_affine
> strategy of always doing affine wakeups and only disabling them
> in a specific circumstance is sound, or need
On Thu, 2014-05-01 at 13:05 -0600, Bjorn Helgaas wrote:
> [+cc Arnd]
>
> On Thu, May 1, 2014 at 8:08 AM, James Bottomley
> wrote:
> > On Wed, 2014-04-30 at 14:33 -0600, Bjorn Helgaas wrote:
> >> dma_declare_coherent_memory() takes two addresses for a region of memory: a
> >> "bus_addr" and a "dev
On 05/02/2014 01:58 AM, Mike Galbraith wrote:
> On Fri, 2014-05-02 at 07:32 +0200, Mike Galbraith wrote:
>> On Fri, 2014-05-02 at 00:42 -0400, Rik van Riel wrote:
>>> Currently sync wakeups from the wake_affine code cannot work as
>>> designed, because the task doing the sync wakeup from the targ
Hi friend I am a banker in IDB BANK. I want to transfer an abandoned USD5.
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To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a
On Fri, 2014-05-02 at 07:32 +0200, Mike Galbraith wrote:
> On Fri, 2014-05-02 at 00:42 -0400, Rik van Riel wrote:
> > Currently sync wakeups from the wake_affine code cannot work as
> > designed, because the task doing the sync wakeup from the target
> > cpu will block its wakee from selecting th
On Wed, Apr 30, 2014 at 11:15:15AM +0200, Miklos Szeredi wrote:
> On Tue, Apr 29, 2014 at 07:56:13PM -0700, Linus Torvalds wrote:
> > On Tue, Apr 29, 2014 at 7:31 PM, Al Viro wrote:
> > >
> > > OK, aggregate diff follows, more readable splitup (3 commits) attached.
> > > It seems to survive beatin
On Wed, 2014-04-30 at 11:27 -0500, Felipe Balbi wrote:
> On Thu, Apr 24, 2014 at 06:48:11PM +0300, Ivan T. Ivanov wrote:
> > From: Tim Bird
> >
> > Fix the value used for Parallel Transceiver Select (PTS) for the MSM USB
> > controller. This is a standard chipidea PORTSC definition, where
> > a
Jungseok Lee wrote:
>
> Hi All,
>
> This v5 patchset supports 4 levels of tranlsation tables for ARM64.
>
> Firstly, the patchset introduces virtual address space size and
> translation level options as taking account into the comment from
> Catalin Marinas:
> http://www.spinics.net/linux/lists/
On Fri, 2014-05-02 at 07:32 +0200, Mike Galbraith wrote:
> On Fri, 2014-05-02 at 00:42 -0400, Rik van Riel wrote:
> > Currently sync wakeups from the wake_affine code cannot work as
> > designed, because the task doing the sync wakeup from the target
> > cpu will block its wakee from selecting th
On 05/01/2014 05:52 PM, Linus Torvalds wrote:
> On Thu, May 1, 2014 at 3:44 PM, Andi Kleen wrote:
>> This is the earlier patchkit based on Linus original feedback.
>> It should be merged for 3.15 to finally quell the asmlinkage warnings
>> that are visible in various configurations.
>
> Ack, look
On Fri, May 2, 2014 at 2:33 AM, Stephen Warren wrote:
> On 05/01/2014 01:10 AM, Alexandre Courbot wrote:
>> Tegra Note 7 is a consumer tablet embedding a Tegra 4 SoC with 1GB RAM
>> and a 720p panel.
>>
>> The following features are enabled by this device tree: UART, eMMC, USB
>> (needs external p
On Fri, 2014-05-02 at 00:42 -0400, Rik van Riel wrote:
> Currently sync wakeups from the wake_affine code cannot work as
> designed, because the task doing the sync wakeup from the target
> cpu will block its wakee from selecting that cpu.
>
> This is despite the fact that whether or not the wake
On 2 May 2014 10:48, Nishanth Menon wrote:
> On Thu, May 1, 2014 at 11:30 PM, Viresh Kumar wrote:
>>> diff --git a/drivers/cpufreq/cpufreq_opp.c b/drivers/cpufreq/cpufreq_opp.c
>>> new file mode 100644
>>> index 000..2602ff8
>>> --- /dev/null
>>> +++ b/drivers/cpufreq/cpufreq_opp.c
>>> @@ -0,
On Thu, May 1, 2014 at 11:30 PM, Viresh Kumar wrote:
> On 2 May 2014 06:36, Nishanth Menon wrote:
>> diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
>> index 1fbe11f..281ccfb 100644
>> --- a/drivers/cpufreq/Kconfig
>> +++ b/drivers/cpufreq/Kconfig
>> @@ -17,6 +17,11 @@ config CPU_F
On Thu, May 01, 2014 at 08:19:39PM -0600, Jens Axboe wrote:
> I've taken the consequence of this and implemented another tagging
> scheme that blk-mq will use if it deems that percpu_ida isn't going
> to be effective for the device being initialized. But I really hate
> to have both of them in ther
On Wed, Apr 30, 2014 at 11:13:57AM +0200, Thomas Gleixner wrote:
> On Tue, 29 Apr 2014, Dave Jones wrote:
> > This is trickier to reproduce than it first seemed, as logging slows
> > things down so much. But after a few hours, it logged that the
> > call that triggered this was..
> >
> > fu
On 05/01/2014 10:10 PM, Mark Brown wrote:
> On Thu, May 01, 2014 at 08:54:14AM -0700, Doug Anderson wrote:
>
>> This is exactly the thing (expected clock parenting) we agreed could
>> be put in the device tree I think. ...but I don't know that anyone
>> proposed exactly how that would work.
>
>
This patch adds pin definitiones for the MSM8x74 TLMM. New definitions
include:
BLSP devices (I2C, UART, UART flow control, SPI, and UIM), mi2s, gp clk, pdm,
gcc clk, cci_timer, cci_i2c, cam_clk, hsic, tsif, sdc3, sdc4, and other assorted
pins.
Signed-off-by: Andy Gross
---
.../bindings/pinctr
Currently sync wakeups from the wake_affine code cannot work as
designed, because the task doing the sync wakeup from the target
cpu will block its wakee from selecting that cpu.
This is despite the fact that whether or not the wakeup is sync
determines whether or not we want to do an affine wakeu
On 2 May 2014 06:36, Nishanth Menon wrote:
> diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
> index 1fbe11f..281ccfb 100644
> --- a/drivers/cpufreq/Kconfig
> +++ b/drivers/cpufreq/Kconfig
> @@ -17,6 +17,11 @@ config CPU_FREQ
>
> if CPU_FREQ
>
> +config CPU_FREQ_PM_OPP
> + bo
If NO_DMA=y:
drivers/built-in.o: In function `spi_map_buf':
spi.c:(.text+0x21bc60): undefined reference to `dma_map_sg'
drivers/built-in.o: In function `spi_unmap_buf.isra.33':
spi.c:(.text+0x21c32e): undefined reference to `dma_unmap_sg'
make[3]: *** [vmlinux] Error 1
Protect the DMA code by #if
If NO_DMA=y:
drivers/built-in.o: In function `altera_tse_probe':
altera_tse_main.c:(.text+0x25ec2e): undefined reference to `dma_set_mask'
altera_tse_main.c:(.text+0x25ec78): undefined reference to `dma_supported'
altera_tse_main.c:(.text+0x25ecb6): undefined reference to `dma_supported'
drivers/b
On Wed, Apr 23, 2014 at 02:47:48PM -0400, David Miller wrote:
> > --- a/net/bridge/br_multicast.c
> > +++ b/net/bridge/br_multicast.c
> > @@ -1282,8 +1282,7 @@ static int br_ip6_multicast_query(struct net_bridge
> > *br,
> > goto out;
> > }
> >
> > - br_multicast_query_received
On 2014-05-01 20:38, Kent Overstreet wrote:
On Thu, May 01, 2014 at 08:19:39PM -0600, Jens Axboe wrote:
On 2014-05-01 16:47, Kent Overstreet wrote:
On Tue, Apr 29, 2014 at 03:13:38PM -0600, Jens Axboe wrote:
On 04/29/2014 05:35 AM, Ming Lei wrote:
On Sat, Apr 26, 2014 at 10:03 AM, Jens Axboe
On Thu, May 01, 2014 at 04:18:16PM -0700, Yinghai Lu wrote:
> in sh calling path:
> register_intc_controller
> ==> irq_create_identity_mapping/irq_create_strict_mappins
> ==>irq_alloc_desc: it will set bits on allocate_irq
> ==> intc_register_
On Thu, May 01, 2014 at 08:19:39PM -0600, Jens Axboe wrote:
> On 2014-05-01 16:47, Kent Overstreet wrote:
> >On Tue, Apr 29, 2014 at 03:13:38PM -0600, Jens Axboe wrote:
> >>On 04/29/2014 05:35 AM, Ming Lei wrote:
> >>>On Sat, Apr 26, 2014 at 10:03 AM, Jens Axboe wrote:
> On 2014-04-25 18:01, M
On Fri, 2014-05-02 at 10:35 +1000, Alistair Popple wrote:
> > The plan to add MMC_SDHCI_OF_476GTR seems to have been abandoned (see
> > the discussion of https://lkml.org/lkml/2014/2/21/24 ). So this select
> > is not needed. Should I submit a trivial patch to drop this select?
>
> Thanks for poi
On 2014-05-01 16:47, Kent Overstreet wrote:
On Tue, Apr 29, 2014 at 03:13:38PM -0600, Jens Axboe wrote:
On 04/29/2014 05:35 AM, Ming Lei wrote:
On Sat, Apr 26, 2014 at 10:03 AM, Jens Axboe wrote:
On 2014-04-25 18:01, Ming Lei wrote:
Hi Jens,
On Sat, Apr 26, 2014 at 5:23 AM, Jens Axboe wro
On Thursday, May 01, 2014 7:06 PM, Christoffer Dall wrote:
> On Thu, May 01, 2014 at 11:34:05AM +0900, Jungseok Lee wrote:
> > This patch adds memory layout and translation lookup information about
> > 48-bit address space with 4K pages. The description is based on 4
> > levels of translation table
On 05/01/2014 04:05 PM, Tomas Pop wrote:
One more time this patch sent with correct settings of my email client
- I'm sorry for this.
This is a second version of the driver for Sensirion SHTC1 humidity and
temperature sensor. Initial version was submitted in July 2012.
http://www.gossamer-thread
On Thursday, May 01, 2014 7:06 PM, Christoffer Dall wrote:
> On Thu, May 01, 2014 at 11:33:56AM +0900, Jungseok Lee wrote:
> > This patch adds virtual address space size and a level of translation
> > tables to kernel configuration. It facilicates introduction of
> > different MMU options, such as
On 05/01/2014 04:18 PM, Rafael J. Wysocki wrote:
On Thursday, May 01, 2014 02:30:42 PM Dirk Brandewie wrote:
On 05/01/2014 02:00 PM, Stratos Karafotis wrote:
Currently the driver calculates the next pstate proportional to
core_busy factor, scaled by the ratio max_pstate / current_pstate.
Using
On Thu, 2014-05-01 at 14:42 -0400, Steven Rostedt wrote:
> On Thu, 01 May 2014 19:36:18 +0200
> Mike Galbraith wrote:
>
> > Hah! I knew you were just hiding, you sneaky little SOB ;-)
>
> What's this from? A new bug that had all the patches applied? Or was
> this without one of the patches?
Hi all,
I have a problem running the latest version of kvm with nested configuration.
I used to run it with kernel 3.2.2 both for L0 and L1, which works perfectly.
When I change my L0 to kernel 3.10.36, L1 to kernel 3.12.10.
When I start L2 guest in L1 with qemu-kvm. I get the following error
from
(2014/05/02 6:06), Andi Kleen wrote:
>> When bar returns, would it skip foo and go straight back to foo's
>> caller? If so, then it should be safe to patch foo after it jumps to
>> bar.
>
> foo is no problem, you see it in the backtrace.
> But you don't see bar.
No, there is no "foo" in backtrac
On Thu, 2014-04-03 at 15:16 +0200, Yann Droneaud wrote:
> Hi,
>
> I'm using cscope to browse kernel sources, but I'm facing warnings from
> the tool since following commit:
>
> http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=22d651dcef536c75f75537290bf3da5038e68b6b
>
>
(2014/05/01 14:26), Vineet Gupta wrote:
> On Thursday 24 April 2014 04:28 PM, tip-bot for Masami Hiramatsu wrote:
>> Commit-ID: 376e242429bf8539ef39a080ac113c8799840b13
>> Gitweb:
>> http://git.kernel.org/tip/376e242429bf8539ef39a080ac113c8799840b13
>> Author: Masami Hiramatsu
>> AuthorD
CPUFREQ specific functions for OPP (Operating Performance Points) can
be isolated to just cpufreq. This allows for independent modifications
as needed. The functionality desired by cpufreq can easily be provided
by existing functions and any future "special handling" needed for
cpufreq drivers can
On Thu, Apr 24, 2014 at 10:30 AM, Santosh Shilimkar
wrote:
> From: Grygorii Strashko
>
> The of_dma_get_range() allows to find "dma-range" property for
> the specified device and parse it.
> dma-ranges format:
>DMA addr (dma_addr) : naddr cells
>CPU addr (phys_addr_t) : pn
On Thu, Apr 24, 2014 at 10:30 AM, Santosh Shilimkar
wrote:
> On few architectures, there are few restrictions on DMAble area of system
> RAM. That also means that devices needs to know about this restrictions so
> that the dma_masks can be updated accordingly and dma address translation
> helpers
On Thu, Apr 24, 2014 at 10:30 AM, Santosh Shilimkar
wrote:
> Implement the set_arch_dma_coherent_ops() for ARM architecture.
>
> Cc: Greg Kroah-Hartman
> Cc: Russell King
> Cc: Arnd Bergmann
> Cc: Olof Johansson
> Cc: Grant Likely
> Cc: Rob Herring
> Cc: Catalin Marinas
> Cc: Linus Walleij
On Thu, May 01, 2014 at 04:57:13PM -0700, Andy Lutomirski wrote:
> Suppose I bind-mount /usr into a private namespace with
> nosuid,nodev,ro. How can you use it to attack anything? The only
> thing I've thought of is to open fifos and connect to sockets. I'm
> assuming that there's a pid namesp
On Thu, Apr 24, 2014 at 10:30 AM, Santosh Shilimkar
wrote:
> The of_dma_is_coherent() helper parses the given DT device
> node to see if the "dma-coherent" property is supported and
> returns true or false accordingly.
>
> If the arch is always coherent or always noncoherent, then the default
> DM
On Thu, May 1, 2014 at 3:44 PM, Andi Kleen wrote:
> This is the earlier patchkit based on Linus original feedback.
> It should be merged for 3.15 to finally quell the asmlinkage warnings
> that are visible in various configurations.
Ack, looks good to me. I'm assuming I'll get this through the -t
On Thu, Apr 24, 2014 at 10:30 AM, Santosh Shilimkar
wrote:
> Retrieve DMA configuration from DT and setup platform device's DMA
> parameters. The DMA configuration in DT has to be specified using
> "dma-ranges" and "dma-coherent" properties if supported.
>
> We setup dma_pfn_offset using "dma-rang
On Thu, 2014-05-01 at 19:09 +0200, Denys Vlasenko wrote:
> Before this patch, instructions such as div, mul,
> shifts with count in CL, cmpxchg are mishandled.
>
> This patch adds vex prefix handling. In particular,
> it avoids colliding with register operand encoded
> in vex. field.
>
> Sinc
Hi David,
Given that the Akebono board support has landed in linux-next (next-20140501)
and there are no outstanding issues with this patch that I'm aware of (please
let me know if I've missed anything) would it be possible to get this included
via your tree? Or should I get Ben H to
Paul,
On Thu, 1 May 2014 11:27:27 Paul Bolle wrote:
> On Thu, 2014-03-06 at 14:52 +1100, Alistair Popple wrote:
[...]
> > This patch adds support for the IBM Akebono board.
> > + select IBM_EMAC_RGMII_WOL
>
> The patch that added this symbol (and the related driver) was submitted
> in https:/
Hi Linus,
Please pull from
git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband.git
tags/rdma-for-linus
InfiniBand/RDMA updates for 3.15-rc4:
- cxgb4 hardware driver fixes
On Thu, May 1, 2014 at 4:51 PM, Al Viro wrote:
> On Thu, May 01, 2014 at 04:00:49PM -0700, Andy Lutomirski wrote:
>> On Thu, May 1, 2014 at 3:34 PM, Al Viro wrote:
>> > On Thu, May 01, 2014 at 03:20:00PM -0700, Andy Lutomirski wrote:
>> >> Is it supposed to work?
>> >
>> > Why the hell not? Same
On Thu, May 01, 2014 at 04:00:49PM -0700, Andy Lutomirski wrote:
> On Thu, May 1, 2014 at 3:34 PM, Al Viro wrote:
> > On Thu, May 01, 2014 at 03:20:00PM -0700, Andy Lutomirski wrote:
> >> Is it supposed to work?
> >
> > Why the hell not? Same as opening a device node on r/o filesystem for
> > wri
On Friday, May 02, 2014 01:36:38 AM Rafael J. Wysocki wrote:
> On Friday, May 02, 2014 01:15:14 AM Rafael J. Wysocki wrote:
[cut]
>
> OK, I guess you mean that the first flag (resume_not_needed) should be
> introduced
> by one patch and the second one by another, but I'm not sure if that would
On Thu, 2014-05-01 at 20:50 +0200, Oleg Nesterov wrote:
> Thanks, I hope that Jim's ack still applies to this version.
Yes. v4 looks fine, although Oleg has a good point about moving the
comment. But I'd move more of the comment, starting with
* We have to fix things up as follows:
Reviewed-by
Hi Beniamino,
Am Donnerstag, 1. Mai 2014, 21:50:34 schrieb Beniamino Galvani:
> Add new vendor prefixes for:
>
> * bq, a company that sells multimedia devices and 3D printers
bq is actually only a brandname. The company itself is "Mundo Reader S.L.".
I'm not sure what the actual policy is co
Hi Maxime,
On Fri, May 2, 2014 at 12:36 AM, Maxime Ripard
wrote:
> But it actually doesn't work in a case where you can't really predict
> what is on the other side of the bus. Either because, on the board
> you're using the pins are exposed and it's pretty much up to the user
> to know what to p
An MS_RDONLY mount disallows binding unix sockets and creating
FIFOs, but it does not prevent opening existing FIFOs and connecting
to unix sockets. Containers and other sandbox-like applications may
want to block IPC to the outside world. Network namespaces can
control access to abstract namespa
No user any more.
Signed-off-by: Yinghai Lu
---
include/linux/irq.h | 6 --
kernel/irq/irqdesc.c | 25 -
2 files changed, 31 deletions(-)
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 28cbd3e..02dc0e4 100644
--- a/include/linux/irq.h
+++ b/include/li
Hot-added interrupt controllers can reserve a range of interrupt
numbers, but only allocate some of them. To simplify the release on
hot-remove allow them to iterate over the reserved range, let the
free_desc() code return early when the descriptor does not exist
-v2: changelog from tglx
Signed-o
Second irq_reserve_irqs calling is from arch s390, and
s390 does not use SPARSE_IRQ yet.
We could set bits for legacy bits early in !SPARSE_IRQ version
early_irq_init() directly instead of calling irq_reserve_irqs later.
Adding weak version arch_proble_early_allocate_nr_irqs() for
!SPARESE_IRQ, a
irq_reserve_irq actually only set bit allocated_irq, and it is not really
"reserve" and cause confusion.
For !CONFIG_SPARSE_IRQ path, irq_alloc_desc_at() will only set bit
in allocated_irq.
We can use that instead, kill one irq_reserve_irq() calling.
Signed-off-by: Yinghai Lu
---
kernel/irq/ch
On Friday, May 02, 2014 01:15:14 AM Rafael J. Wysocki wrote:
> On Thursday, May 01, 2014 05:39:31 PM Alan Stern wrote:
> > On Fri, 25 Apr 2014, Rafael J. Wysocki wrote:
> >
> > > From: Rafael J. Wysocki
> > >
> > > Currently, some subsystems (e.g. PCI and the ACPI PM domain) have to
> > > resume
Hi,
These patches are core changes for x86 ioapic hotplug support.
First part for kill old irq_reserve_irqs:
During reviewing ioapic hotplug patchset, Thomas pointed out that
should not extend irq_reserve_irq for that purpose as that is not
actually reserve.
Neet to clean up old irq_reserve_irq
On Mon, 2014-04-14 at 17:11 +0200, Igor Mammedov wrote:
> Hang is observed on virtual machines during CPU hotplug,
> especially in big guests with many CPUs. (It reproducible
> more often if host is over-committed).
>
> It happens because master CPU gives up waiting on
> secondary CPU and allows i
Prepare for ioapic hotplug.
Signed-off-by: Yinghai Lu
---
include/linux/irq.h | 3 +++
kernel/irq/irqdesc.c | 68
2 files changed, 71 insertions(+)
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 02dc0e4..2ba3245 100644
--- a/i
Now x86 only support sparseirq path, for that path, calling path like:
early_irq_init
==> arch_probe_nr_irqs : return legacy irq number
==> alloc_desc for legacy irqs and set bits in allocated_irqs
==> arch_early_irq_init
in sh calling path:
register_intc_controller
==> irq_create_identity_mapping/irq_create_strict_mappins
==>irq_alloc_desc: it will set bits on allocate_irq
==> intc_register_irq
==> irq_reserve_irq: set bits agai
For ioapic hot-add support, it would be easy if we have continuous
irq numbers for hot added ioapic controller.
We can reserve irq range at first, and later allocate desc for those
pre-reserved irqs when they are needed.
The reasons for not allocating them during reserving:
1. only several pins o
Quoting Richard Guy Briggs (r...@redhat.com):
> Log the namespace details of a task.
>
> Signed-off-by: Richard Guy Briggs
Acked-by: Serge Hallyn
Looks good, and does look useful. We'll certainly want to also dump
netns and userns for some target objects eventually.
> ---
> include/linux/au
One more time this patch sent with correct settings of my email client
- I'm sorry for this.
This is a second version of the driver for Sensirion SHTC1 humidity and
temperature sensor. Initial version was submitted in July 2012.
http://www.gossamer-threads.com/lists/linux/kernel/1569130#1569130
On Thu, 2014-05-01 at 16:18 -0400, Peter Hurley wrote:
> On 05/01/2014 01:50 PM, Tim Chen wrote:
> > It takes me a while to understand how rwsem's count field mainifest
> > itself in different scenarios. I'm adding comments to provide a quick
> > reference on the the rwsem's count field for each s
On Thursday, May 01, 2014 02:30:42 PM Dirk Brandewie wrote:
> On 05/01/2014 02:00 PM, Stratos Karafotis wrote:
> > Currently the driver calculates the next pstate proportional to
> > core_busy factor, scaled by the ratio max_pstate / current_pstate.
> >
> > Using the scaled load (core_busy) to calc
On Thu, May 1, 2014 at 3:34 PM, Al Viro wrote:
> On Thu, May 01, 2014 at 03:20:00PM -0700, Andy Lutomirski wrote:
>> Is it supposed to work?
>
> Why the hell not? Same as opening a device node on r/o filesystem for
> write, or doing the same with FIFO.
You can't bind a socket on a read-only fs,
On 05/01/2014 03:56 PM, Andy Lutomirski wrote:
>
> I think we're comparing:
>
> a) cpuid to detect rdrand *or* emulated rdrand followed by rdrand
>
> to
>
> b) cpuid to detect rdrand or the paravirt seed msr/cpuid call,
> followed by rdrand or the msr or cpuid read
>
> this seems like it barel
On Thursday, May 01, 2014 05:39:31 PM Alan Stern wrote:
> On Fri, 25 Apr 2014, Rafael J. Wysocki wrote:
>
> > From: Rafael J. Wysocki
> >
> > Currently, some subsystems (e.g. PCI and the ACPI PM domain) have to
> > resume all runtime-suspended devices during system suspend, mostly
> > because th
On Thu, May 1, 2014 at 2:55 PM, Helge Deller wrote:
>
> I agree that this idea looks much better.
> I will try to rewrite this code as you suggested (it sadly didn't worked out
> of the box).
> But since it will take me some time, do you mind to pull in the other two
> remaining patches?
Done.
On Thu, May 1, 2014 at 3:46 PM, H. Peter Anvin wrote:
> On 05/01/2014 03:32 PM, Andy Lutomirski wrote:
>> On Thu, May 1, 2014 at 3:28 PM, wrote:
>>> On Thu, May 01, 2014 at 02:06:13PM -0700, Andy Lutomirski wrote:
I still don't see the point. What does this do better than virtio-rng?
On Thu, May 1, 2014 at 2:05 PM, Al Viro wrote:
>
> ... and so has this one, the bounce being
I actually got all three messages despite the bounces. But I seem to
have gotten at least the first one through lkml.
Your email is lacking SPF or any other authentication, so it may be
gmail being pissy
Quoting Richard Guy Briggs (r...@redhat.com):
Most of this looks reasonable, but I'm curious about something,
> +/**
> + * ns_serial - compute a serial number for the namespace
> + *
> + * Compute a serial number for the namespace to uniquely identify it in
> + * audit records.
> + */
> +unsigned
On Tue, Apr 29, 2014 at 03:13:38PM -0600, Jens Axboe wrote:
> On 04/29/2014 05:35 AM, Ming Lei wrote:
> > On Sat, Apr 26, 2014 at 10:03 AM, Jens Axboe wrote:
> >> On 2014-04-25 18:01, Ming Lei wrote:
> >>>
> >>> Hi Jens,
> >>>
> >>> On Sat, Apr 26, 2014 at 5:23 AM, Jens Axboe wrote:
>
>
On 05/01/2014 03:32 PM, Andy Lutomirski wrote:
> On Thu, May 1, 2014 at 3:28 PM, wrote:
>> On Thu, May 01, 2014 at 02:06:13PM -0700, Andy Lutomirski wrote:
>>>
>>> I still don't see the point. What does this do better than virtio-rng?
>>
>> I believe you had been complaining about how complicate
From: Andi Kleen
As requested by Linus, revert adding __visible to asmlinkage.
Instead we add __visible explicitely to all the symbols
that need it.
This reverts commit 128ea04a9885af9629059e631ddf0cab4815b589.
---
include/linux/linkage.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-
From: Andi Kleen
As requested by Linus add explicit __visible to the asmlinkage users.
This marks functions visible to assembler.
Tree sweep for rest of tree.
Signed-off-by: Andi Kleen
---
drivers/pnp/pnpbios/bioscalls.c | 2 +-
init/main.c | 2 +-
kernel/context_trackin
On 05/01/2014 03:18 PM, Andi Kleen wrote:
>> I haven't looked through the flows (I'm at LCE so I have limited screen
>> bandwidth) to see how that would be handled in this case, but in the
>> general paranoid case it comes down to the fact that in this particular
>> subcase we don't necessarily kno
This is the earlier patchkit based on Linus original feedback.
It should be merged for 3.15 to finally quell the asmlinkage warnings
that are visible in various configurations.
This reverts the asm linkage __visible patch.
Then adds __visible explicitly everywhere where it is needed.
-Andi
--
To
From: Andi Kleen
As requested by Linus add explicit __visible to the asmlinkage users.
This marks all functions visible to assembler.
Tree sweep for arch/x86/*
Signed-off-by: Andi Kleen
---
arch/x86/boot/compressed/misc.c | 2 +-
arch/x86/kernel/acpi/sleep.c | 2 +-
arc
Udo :
[...]
> [354436.656703] r8169 :01:00.0 eth0: Rx ERROR. status = 342ac40d
> [354615.387915] r8169 :01:00.0 eth0: Rx ERROR. status = 342cc075
> (and a load more of them)
>
> What is wrong? Hardware?
Ethernet CRC is wrong.
Which kind of 816x is it (see XID in kernel log) ?
--
Ueimo
On Wed, Apr 30, 2014 at 06:18:11PM -0700, Mark Brown wrote:
> On Wed, Apr 30, 2014 at 11:06:09AM -0700, Maxime Ripard wrote:
> > On Tue, Apr 29, 2014 at 11:37:58AM -0700, Mark Brown wrote:
>
> > > Why can we not handle this by using sysfs to bind spidev to the
> > > device?
>
> > I just tried it,
On Thursday 01 May 2014 12:11:25 Mark Brown wrote:
> On Tue, Apr 29, 2014 at 07:18:34PM +0800, Xia Kaixu wrote:
> > From: Arnd Bergmann
> >
> > SND_S3C_DMA_LEGACY can only be set on S3C24xx, which does not
> > (yet) support the dmaengine framework, so samsung_dma_get_ops()
> > fails to link if S3
Today is May Day, an ancient festival day. A time for dancing, singing,
feasting and refactoring repository topology. We are preparing Tux3
now for review with a view to mainline merge.
Our repository is currently on Github:
https://github.com/OGAWAHirofumi/tux3
This repository needs some refac
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