[PATCH 1/6] staging: wlan-ng: Fix sparse warning of restricted __le16

This patch fixes the following sparse warning: warning: cast to restricted __le16 Signed-off-by: simran singhal --- drivers/staging/wlan-ng/prism2sta.c | 51 ++--- 1 file changed, 25 insertions(+), 26 deletions(-) diff --git

[PATCH 1/6] staging: wlan-ng: Fix sparse warning of restricted __le16

This patch fixes the following sparse warning: warning: cast to restricted __le16 Signed-off-by: simran singhal --- drivers/staging/wlan-ng/prism2sta.c | 51 ++--- 1 file changed, 25 insertions(+), 26 deletions(-) diff --git a/drivers/staging/wlan-ng/prism2sta.c

Re: [PATCH v4 1/2] dt-bindings: mmc: add DT binding for S3C24XX MMC/SD/SDIO controller

On Wed, Mar 01, 2017 at 10:18:55PM -0300, Sergio Prado wrote: > Adds the device tree bindings description for Samsung S3C24XX > MMC/SD/SDIO controller, used as a connectivity interface with external > MMC, SD and SDIO storage mediums. > > Signed-off-by: Sergio Prado

Re: [PATCH v4 1/2] dt-bindings: mmc: add DT binding for S3C24XX MMC/SD/SDIO controller

On Wed, Mar 01, 2017 at 10:18:55PM -0300, Sergio Prado wrote: > Adds the device tree bindings description for Samsung S3C24XX > MMC/SD/SDIO controller, used as a connectivity interface with external > MMC, SD and SDIO storage mediums. > > Signed-off-by: Sergio Prado > --- >

Re: mm: fault in __do_fault

On Tue, Feb 28, 2017 at 4:42 PM, Andrea Arcangeli wrote: > Hello Dmitry, > > On Tue, Feb 28, 2017 at 03:04:53PM +0100, Dmitry Vyukov wrote: >> Hello, >> >> The following program triggers GPF in __do_fault: >>

Re: mm: fault in __do_fault

On Tue, Feb 28, 2017 at 4:42 PM, Andrea Arcangeli wrote: > Hello Dmitry, > > On Tue, Feb 28, 2017 at 03:04:53PM +0100, Dmitry Vyukov wrote: >> Hello, >> >> The following program triggers GPF in __do_fault: >>

Re: [PATCH 1/6] cpufreq: schedutil: reset sg_cpus's flags at IDLE enter

On 02-03-17, 15:45, Patrick Bellasi wrote: > diff --git a/include/linux/sched.h b/include/linux/sched.h > index e2ed46d..739b29d 100644 > --- a/include/linux/sched.h > +++ b/include/linux/sched.h > @@ -3653,6 +3653,7 @@ static inline unsigned long rlimit_max(unsigned int > limit) > #define

Re: [PATCH 1/6] cpufreq: schedutil: reset sg_cpus's flags at IDLE enter

On 02-03-17, 15:45, Patrick Bellasi wrote: > diff --git a/include/linux/sched.h b/include/linux/sched.h > index e2ed46d..739b29d 100644 > --- a/include/linux/sched.h > +++ b/include/linux/sched.h > @@ -3653,6 +3653,7 @@ static inline unsigned long rlimit_max(unsigned int > limit) > #define

[PATCH] mtd: mtdram: check offs and len in mtdram->point madram->unpoint,mtdram->write and mtdram->read

We should prevent user to erasing mtd device with an unaligned offset or length. Signed-off-by: Chen Wenyong --- drivers/mtd/devices/mtdram.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/mtd/devices/mtdram.c

[PATCH] mtd: mtdram: check offs and len in mtdram->point madram->unpoint,mtdram->write and mtdram->read

We should prevent user to erasing mtd device with an unaligned offset or length. Signed-off-by: Chen Wenyong --- drivers/mtd/devices/mtdram.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/mtd/devices/mtdram.c b/drivers/mtd/devices/mtdram.c index cbd8547..b0468c1

Re: [PATCH v2 2/3] Documentation: bindings: add DT documentation for u2phy and u2phy grf

Am Freitag, 3. März 2017, 00:21:56 CET schrieb Rob Herring: > On Thu, Mar 02, 2017 at 03:49:04PM +0800, Meng Dongyang wrote: > > Due to the u2phy registers are separated from general grf, we need to > > add u2phy grf node and place u2phy node in it. So this patch add u2phy > > grf node. > >

Re: [PATCH v2 2/3] Documentation: bindings: add DT documentation for u2phy and u2phy grf

Am Freitag, 3. März 2017, 00:21:56 CET schrieb Rob Herring: > On Thu, Mar 02, 2017 at 03:49:04PM +0800, Meng Dongyang wrote: > > Due to the u2phy registers are separated from general grf, we need to > > add u2phy grf node and place u2phy node in it. So this patch add u2phy > > grf node. > >

Re: [PATCH v17 2/3] usb: USB Type-C connector class

On 2017-03-03 04:13, Guenter Roeck wrote: On 03/02/2017 07:22 AM, Mats Karrman wrote: Looking forward, one thing I have run into is how to connect the typec driver with a driver for an alternate mode. E.g. the DisplayPort Alternate Mode specification includes the HPD (hot plug) and

Re: [PATCH 2/2] drivers: pwm: pwm-atmel: enable pwm on sama5d2

On Tue, Feb 28, 2017 at 12:40:15PM +0200, Claudiu Beznea wrote: > sama5d2 can use the same atmel_pwm_data as sama5d3. > > Signed-off-by: Claudiu Beznea > --- > Documentation/devicetree/bindings/pwm/atmel-pwm.txt | 1 + > drivers/pwm/pwm-atmel.c

Re: [PATCH v17 2/3] usb: USB Type-C connector class

On 2017-03-03 04:13, Guenter Roeck wrote: On 03/02/2017 07:22 AM, Mats Karrman wrote: Looking forward, one thing I have run into is how to connect the typec driver with a driver for an alternate mode. E.g. the DisplayPort Alternate Mode specification includes the HPD (hot plug) and

Re: [PATCH 2/2] drivers: pwm: pwm-atmel: enable pwm on sama5d2

On Tue, Feb 28, 2017 at 12:40:15PM +0200, Claudiu Beznea wrote: > sama5d2 can use the same atmel_pwm_data as sama5d3. > > Signed-off-by: Claudiu Beznea > --- > Documentation/devicetree/bindings/pwm/atmel-pwm.txt | 1 + > drivers/pwm/pwm-atmel.c | 3 +++ > 2 files

Re: [PATCH 1/2] Documentation: dt-bindings: Use generic property for hardware enable pins

On 3/3/2017 3:21 PM, Rob Herring wrote: On Tue, Feb 28, 2017 at 04:50:40PM +0900, Milo Kim wrote: With index usages, device specific properties can be replaced with generic one. Vpos is index 0 and Vneg is index 1. DT examples are added as well. Signed-off-by: Milo Kim ---

Re: [PATCH 1/2] Documentation: dt-bindings: Use generic property for hardware enable pins

On 3/3/2017 3:21 PM, Rob Herring wrote: On Tue, Feb 28, 2017 at 04:50:40PM +0900, Milo Kim wrote: With index usages, device specific properties can be replaced with generic one. Vpos is index 0 and Vneg is index 1. DT examples are added as well. Signed-off-by: Milo Kim ---

[PATCH v7 kernel 1/5] virtio-balloon: rework deflate to add page to a list

From: Liang Li When doing the inflating/deflating operation, the current virtio-balloon implementation uses an array to save 256 PFNS, then send these PFNS to host through virtio and process each PFN one by one. This way is not efficient when inflating/deflating a large

[PATCH v7 kernel 1/5] virtio-balloon: rework deflate to add page to a list

From: Liang Li When doing the inflating/deflating operation, the current virtio-balloon implementation uses an array to save 256 PFNS, then send these PFNS to host through virtio and process each PFN one by one. This way is not efficient when inflating/deflating a large mount of memory because

Re: [PATCH V3 3/4] dt-bindings: serial: add a new compatible string for SC9860

On Thu, Mar 02, 2017 at 02:22:09PM +0800, Chunyan Zhang wrote: > SC9860 use the same serial device, so added a new compatible string to > support SC9860 as well, also added an example of how to describe this > serial device in DT. > > Signed-off-by: Chunyan Zhang >

Re: [PATCH V3 3/4] dt-bindings: serial: add a new compatible string for SC9860

On Thu, Mar 02, 2017 at 02:22:09PM +0800, Chunyan Zhang wrote: > SC9860 use the same serial device, so added a new compatible string to > support SC9860 as well, also added an example of how to describe this > serial device in DT. > > Signed-off-by: Chunyan Zhang > --- >

Re: [PATCH] clk: sunxi-ng: sun5i: Fix mux width for csi clock

On Thu, Mar 02, 2017 at 10:55:27PM +0200, Priit Laes wrote: > Mux for CSI clock is 3 bits, not 2. > > Signed-off-by: Priit Laes Applied, thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com signature.asc

Re: [PATCH] clk: sunxi-ng: sun5i: Fix mux width for csi clock

On Thu, Mar 02, 2017 at 10:55:27PM +0200, Priit Laes wrote: > Mux for CSI clock is 3 bits, not 2. > > Signed-off-by: Priit Laes Applied, thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com signature.asc Description: PGP signature

Re: [PATCH 4/4] dt-bindings: List devicetree binding for the CCU of Allwinner A20

On Mon, Feb 27, 2017 at 11:09:14PM +0200, Priit Laes wrote: > Allwinner A20 is now driven by sunxi-ng CCU driver. > > Add devicetree binding for it. > > Signed-off-by: Priit Laes > --- > Documentation/devicetree/bindings/clock/sunxi-ccu.txt | 1 + > 1 file changed, 1

Re: [PATCH 4/4] dt-bindings: List devicetree binding for the CCU of Allwinner A20

On Mon, Feb 27, 2017 at 11:09:14PM +0200, Priit Laes wrote: > Allwinner A20 is now driven by sunxi-ng CCU driver. > > Add devicetree binding for it. > > Signed-off-by: Priit Laes > --- > Documentation/devicetree/bindings/clock/sunxi-ccu.txt | 1 + > 1 file changed, 1 insertion(+) Acked-by:

Re: [PATCH 2/2] HID: hiddev: store hiddev's minor number when hiddev is connected

2017-03-02 23:13 GMT+09:00 Benjamin Tissoires : > On Mar 02 2017 or thereabouts, Jaejoong Kim wrote: >> The hid-core announces kernel message which driver is loaded if there is >> a hiddev, but hiddev's minor number is always zero even though it's not >> zero. >> >>

Re: [PATCH 2/2] HID: hiddev: store hiddev's minor number when hiddev is connected

2017-03-02 23:13 GMT+09:00 Benjamin Tissoires : > On Mar 02 2017 or thereabouts, Jaejoong Kim wrote: >> The hid-core announces kernel message which driver is loaded if there is >> a hiddev, but hiddev's minor number is always zero even though it's not >> zero. >> >> So, we need to store the minor

Re: Kernel bio layer is sending bio size more than our block device is capable of handling

>From the kernel source code i came to know below things. 4.1 kernel version onward *""nr_pages = min(sdio->pages_in_io, bio_get_nr_vecs(map_bh->b_bdev))""* line has been removed which was considering max_sectors_kb of queue. Now new code is something like this* "nr_pages =

Re: Kernel bio layer is sending bio size more than our block device is capable of handling

>From the kernel source code i came to know below things. 4.1 kernel version onward *""nr_pages = min(sdio->pages_in_io, bio_get_nr_vecs(map_bh->b_bdev))""* line has been removed which was considering max_sectors_kb of queue. Now new code is something like this* "nr_pages =

Re: [PATCH v3 19/25] dt-bindings: arm: cpus: Add S500 enable-method

On Tue, Feb 28, 2017 at 07:35:29AM +0100, Andreas Färber wrote: > The Actions Semi S500 SoC requires a special secondary CPU boot procedure. > > Signed-off-by: Andreas Färber > --- > v3: new > > Documentation/devicetree/bindings/arm/cpus.txt | 1 + > 1 file changed, 1

Re: [PATCH v3 19/25] dt-bindings: arm: cpus: Add S500 enable-method

On Tue, Feb 28, 2017 at 07:35:29AM +0100, Andreas Färber wrote: > The Actions Semi S500 SoC requires a special secondary CPU boot procedure. > > Signed-off-by: Andreas Färber > --- > v3: new > > Documentation/devicetree/bindings/arm/cpus.txt | 1 + > 1 file changed, 1 insertion(+) Acked-by:

RE: [PATCH] mmc: core: fix changing bus witdh in hs400es mode

Hi Shawn Thanks for the information. Best Regards Piotr Sroka > -Original Message- > From: Shawn Lin [mailto:shawn@rock-chips.com] > Sent: 03 March, 2017 4:43 AM > Subject: Re: [PATCH] mmc: core: fix changing bus witdh in hs400es mode > > Hi Poitr, > > On 2017/3/2 21:47, Piotr

RE: [PATCH] mmc: core: fix changing bus witdh in hs400es mode

Hi Shawn Thanks for the information. Best Regards Piotr Sroka > -Original Message- > From: Shawn Lin [mailto:shawn@rock-chips.com] > Sent: 03 March, 2017 4:43 AM > Subject: Re: [PATCH] mmc: core: fix changing bus witdh in hs400es mode > > Hi Poitr, > > On 2017/3/2 21:47, Piotr

[RFC PATCH v2 15/32] x86: Add support for changing memory encryption attribute in early boot

Some KVM-specific custom MSRs shares the guest physical address with hypervisor. When SEV is active, the shared physical address must be mapped with encryption attribute cleared so that both hypervsior and guest can access the data. Add APIs to change memory encryption attribute in early boot

[RFC PATCH v2 15/32] x86: Add support for changing memory encryption attribute in early boot

Some KVM-specific custom MSRs shares the guest physical address with hypervisor. When SEV is active, the shared physical address must be mapped with encryption attribute cleared so that both hypervsior and guest can access the data. Add APIs to change memory encryption attribute in early boot

[PATCH v4 4/5] perf report: Show inline stack in stdio mode

If the address belongs to an inlined function, the source information back to the first non-inlined function will be printed. For example: perf report --stdio --inline 0.69% 0.00% inline ld-2.23.so [.] dl_main | ---dl_main |

Business proposal

-- Dear Friend, I would like to discuss a very important issue with you. I am writing to find out if this is your valid email. Please, let me know if this email is valid Kind regards Adrien Saif Attorney to Qatif Group of Companies.

[PATCH v4 4/5] perf report: Show inline stack in stdio mode

If the address belongs to an inlined function, the source information back to the first non-inlined function will be printed. For example: perf report --stdio --inline 0.69% 0.00% inline ld-2.23.so [.] dl_main | ---dl_main |

Business proposal

-- Dear Friend, I would like to discuss a very important issue with you. I am writing to find out if this is your valid email. Please, let me know if this email is valid Kind regards Adrien Saif Attorney to Qatif Group of Companies.

Re: [PATCH v2 2/2] dt-bindings: extcon: Add support for cros-ec device

On Wed, Mar 01, 2017 at 12:19:43PM +0100, Enric Balletbo i Serra wrote: > From: Benson Leung > > This patch add documentation for binding of USB Type C cable detection > mechanism is using EXTCON subsystem. The device can detect the presence > of display out but it may also

Re: [PATCH v2 2/2] dt-bindings: extcon: Add support for cros-ec device

On Wed, Mar 01, 2017 at 12:19:43PM +0100, Enric Balletbo i Serra wrote: > From: Benson Leung > > This patch add documentation for binding of USB Type C cable detection > mechanism is using EXTCON subsystem. The device can detect the presence > of display out but it may also detect other external

[PATCH v3 0/5] coresight: enable debug module

ARMv8 architecture reference manual (ARM DDI 0487A.k) Chapter H7 "The Sample-based Profiling Extension" has description for sampling registers, we can utilize these registers to check program counter value with combined CPU exception level, secure state, etc. So this is helpful for CPU lockup

Re: [PATCH 1/2] HID: hiddev: move hiddev's minor number from struct hid_device to hiddev

2017-03-02 23:10 GMT+09:00 Benjamin Tissoires : > On Mar 02 2017 or thereabouts, Jaejoong Kim wrote: >> We need to store the minor number each drivers. In case of hidraw, it's >> minor number stores in struct hidraw. But hiddev's minor is located in >> struct

[PATCH v3 0/5] coresight: enable debug module

ARMv8 architecture reference manual (ARM DDI 0487A.k) Chapter H7 "The Sample-based Profiling Extension" has description for sampling registers, we can utilize these registers to check program counter value with combined CPU exception level, secure state, etc. So this is helpful for CPU lockup

Re: [PATCH 1/2] HID: hiddev: move hiddev's minor number from struct hid_device to hiddev

2017-03-02 23:10 GMT+09:00 Benjamin Tissoires : > On Mar 02 2017 or thereabouts, Jaejoong Kim wrote: >> We need to store the minor number each drivers. In case of hidraw, it's >> minor number stores in struct hidraw. But hiddev's minor is located in >> struct hid_device. >> >> So reallocates for

Re: [PATCH 10/11] dt-bindings: Add bindings for the Amlogic Meson dw-hdmi extension

On Thu, Mar 02, 2017 at 04:40:06PM +0100, Neil Armstrong wrote: > This binding describes the Amlogic Meson specific extension to the > Synopsys Designware HDMI Controller. > > Signed-off-by: Neil Armstrong > --- > .../bindings/display/amlogic,meson-dw-hdmi.txt | 111

Re: [PATCH 10/11] dt-bindings: Add bindings for the Amlogic Meson dw-hdmi extension

On Thu, Mar 02, 2017 at 04:40:06PM +0100, Neil Armstrong wrote: > This binding describes the Amlogic Meson specific extension to the > Synopsys Designware HDMI Controller. > > Signed-off-by: Neil Armstrong > --- > .../bindings/display/amlogic,meson-dw-hdmi.txt | 111 > +

[PATCH v3 2/5] coresight: refactor with function of_coresight_get_cpu

This is refactor to add function of_coresight_get_cpu(), so it's used to retrieve CPU id for coresight component. Finally can use it as a common function for multiple places. Suggested-by: Mathieu Poirier Signed-off-by: Leo Yan ---

[PATCH v3 2/5] coresight: refactor with function of_coresight_get_cpu

This is refactor to add function of_coresight_get_cpu(), so it's used to retrieve CPU id for coresight component. Finally can use it as a common function for multiple places. Suggested-by: Mathieu Poirier Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/of_coresight.c | 37

Re: [PATCH v4 3/4] fpga dt: bindings for Altera Partial Reconfiguration IP.

On Thu, Mar 02, 2017 at 07:57:11AM -0800, matthew.gerl...@linux.intel.com wrote: > From: Matthew Gerlach > > Device Tree bindings for Altera Partial Reconfiguration IP. > > v3: s/altr,pr-ip/altr,a10-pr-ip/ > v2: s/Reconfiguraion/Reconfiguration/ >

Re: [PATCH v4 3/4] fpga dt: bindings for Altera Partial Reconfiguration IP.

On Thu, Mar 02, 2017 at 07:57:11AM -0800, matthew.gerl...@linux.intel.com wrote: > From: Matthew Gerlach > > Device Tree bindings for Altera Partial Reconfiguration IP. > > v3: s/altr,pr-ip/altr,a10-pr-ip/ > v2: s/Reconfiguraion/Reconfiguration/ > The version info should

Re: XTS Crypto Not Found In /proc/crypto Even After Compiled for 4.10.1.

On Thu, Mar 02, 2017 at 05:35:30PM -0600, Nathan Royce wrote: > ARM ODroid XU4 > > $ cat /proc/config.gz | gunzip | grep XTS > CONFIG_CRYPTO_XTS=y > > $ grep xts /proc/crypto > //4.9.13 > name : xts(aes) > driver : xts(aes-generic) > //4.10.1 > > //cbc can be found though > >

Re: XTS Crypto Not Found In /proc/crypto Even After Compiled for 4.10.1.

On Thu, Mar 02, 2017 at 05:35:30PM -0600, Nathan Royce wrote: > ARM ODroid XU4 > > $ cat /proc/config.gz | gunzip | grep XTS > CONFIG_CRYPTO_XTS=y > > $ grep xts /proc/crypto > //4.9.13 > name : xts(aes) > driver : xts(aes-generic) > //4.10.1 > > //cbc can be found though > >

Re: [PATCH v2 1/3] Documentation: bindings: add assign clock property in u2phy node

On Thu, Mar 02, 2017 at 03:49:03PM +0800, Meng Dongyang wrote: > On some platform such as RK3328, the 480m clock may need to assign > clock parent in dts in stead of clock driver. So this patch add > property of assigned-clocks and assigned-clock-parents to assign > parent for 480m clock. > >

Re: [PATCH v5 02/11] dt-bindings: hisi: Add Hisilicon HiP05/06/07 Djtag dts bindings

On Thu, Mar 02, 2017 at 05:48:36AM -0500, Anurup M wrote: > From: Tan Xiaojun > > Add Hisilicon HiP05/06/07 Djtag dts bindings for CPU and IO Die > > Signed-off-by: Tan Xiaojun > Signed-off-by: Anurup M > --- >

Re: [PATCH v2 1/3] Documentation: bindings: add assign clock property in u2phy node

On Thu, Mar 02, 2017 at 03:49:03PM +0800, Meng Dongyang wrote: > On some platform such as RK3328, the 480m clock may need to assign > clock parent in dts in stead of clock driver. So this patch add > property of assigned-clocks and assigned-clock-parents to assign > parent for 480m clock. > >

Re: [PATCH v5 02/11] dt-bindings: hisi: Add Hisilicon HiP05/06/07 Djtag dts bindings

On Thu, Mar 02, 2017 at 05:48:36AM -0500, Anurup M wrote: > From: Tan Xiaojun > > Add Hisilicon HiP05/06/07 Djtag dts bindings for CPU and IO Die > > Signed-off-by: Tan Xiaojun > Signed-off-by: Anurup M > --- > .../devicetree/bindings/arm/hisilicon/djtag.txt| 51 > ++

Re: [PATCH v2 2/3] Documentation: bindings: add DT documentation for u2phy and u2phy grf

On Thu, Mar 02, 2017 at 03:49:04PM +0800, Meng Dongyang wrote: > Due to the u2phy registers are separated from general grf, we need to > add u2phy grf node and place u2phy node in it. So this patch add u2phy > grf node. Similar comment on the subject. > > Changes in v2: > - add u2phy grf

Re: [PATCH v2 2/3] Documentation: bindings: add DT documentation for u2phy and u2phy grf

On Thu, Mar 02, 2017 at 03:49:04PM +0800, Meng Dongyang wrote: > Due to the u2phy registers are separated from general grf, we need to > add u2phy grf node and place u2phy node in it. So this patch add u2phy > grf node. Similar comment on the subject. > > Changes in v2: > - add u2phy grf

Re: [PATCH v2 2/3] Documentation: bindings: add DT documentation for u2phy and u2phy grf

On 2017/3/3 14:21, Rob Herring wrote: On Thu, Mar 02, 2017 at 03:49:04PM +0800, Meng Dongyang wrote: Due to the u2phy registers are separated from general grf, we need to add u2phy grf node and place u2phy node in it. So this patch add u2phy grf node. Similar comment on the subject.

Re: [PATCH v2 2/3] Documentation: bindings: add DT documentation for u2phy and u2phy grf

On 2017/3/3 14:21, Rob Herring wrote: On Thu, Mar 02, 2017 at 03:49:04PM +0800, Meng Dongyang wrote: Due to the u2phy registers are separated from general grf, we need to add u2phy grf node and place u2phy node in it. So this patch add u2phy grf node. Similar comment on the subject.

Re: [PATCH 2/2] hwmon: Aspeed AST2400/AST2500 ADC

On Tue, Feb 28, 2017 at 07:45:23PM -0800, Guenter Roeck wrote: > On 02/28/2017 04:49 PM, Joel Stanley wrote: > > On Wed, Mar 1, 2017 at 6:44 AM, Rick Altherr wrote: > > > Aspeed AST2400/AST2500 BMC SoCs include a 16 channel, 10-bit ADC. This > > > driver implements reading

Re: [PATCH 2/2] hwmon: Aspeed AST2400/AST2500 ADC

On Tue, Feb 28, 2017 at 07:45:23PM -0800, Guenter Roeck wrote: > On 02/28/2017 04:49 PM, Joel Stanley wrote: > > On Wed, Mar 1, 2017 at 6:44 AM, Rick Altherr wrote: > > > Aspeed AST2400/AST2500 BMC SoCs include a 16 channel, 10-bit ADC. This > > > driver implements reading the ADC values,

Re: [PATCH v3 22/25] dt-bindings: power: Add Owl SPS power domains

On Tue, Feb 28, 2017 at 07:35:32AM +0100, Andreas Färber wrote: > Define power domains for all non-reserved S500 power gates. > > Signed-off-by: Andreas Färber > --- > v3: new > > .../devicetree/bindings/power/actions,owl-sps.txt | 17 + >

Re: [PATCH v3 22/25] dt-bindings: power: Add Owl SPS power domains

On Tue, Feb 28, 2017 at 07:35:32AM +0100, Andreas Färber wrote: > Define power domains for all non-reserved S500 power gates. > > Signed-off-by: Andreas Färber > --- > v3: new > > .../devicetree/bindings/power/actions,owl-sps.txt | 17 + >

Re: [PATCH 1/2] Documentation: dt-bindings: Use generic property for hardware enable pins

On Tue, Feb 28, 2017 at 04:50:40PM +0900, Milo Kim wrote: > With index usages, device specific properties can be replaced with generic > one. Vpos is index 0 and Vneg is index 1. > DT examples are added as well. > > Signed-off-by: Milo Kim > --- >

Re: [PATCH 1/2] Documentation: dt-bindings: Use generic property for hardware enable pins

On Tue, Feb 28, 2017 at 04:50:40PM +0900, Milo Kim wrote: > With index usages, device specific properties can be replaced with generic > one. Vpos is index 0 and Vneg is index 1. > DT examples are added as well. > > Signed-off-by: Milo Kim > --- > .../bindings/regulator/lm363x-regulator.txt

Re: [PATCH V2 1/4] dt-bindings: display: megachips-stdpxxxx-ge-b850v3-fw

On Tue, Feb 28, 2017 at 03:28:10PM +0100, Peter Senna Tschudin wrote: > Devicetree binding documentation for the second video output > of the GE B850v3: >STDP4028-ge-b850v3-fw bridges (LVDS-DP) >STDP2690-ge-b850v3-fw bridges (DP-DP++) > > Added entry for MegaChips at: >

Re: [PATCH V2 1/4] dt-bindings: display: megachips-stdpxxxx-ge-b850v3-fw

On Tue, Feb 28, 2017 at 03:28:10PM +0100, Peter Senna Tschudin wrote: > Devicetree binding documentation for the second video output > of the GE B850v3: >STDP4028-ge-b850v3-fw bridges (LVDS-DP) >STDP2690-ge-b850v3-fw bridges (DP-DP++) > > Added entry for MegaChips at: >

Re: [PATCH v2 2/3] clk: meson-gxbb: Add MALI clocks

On Thu, 2017-03-02 at 12:07 +0100, Neil Armstrong wrote: > Hi Stephen, > > On 03/01/2017 08:11 PM, Stephen Boyd wrote: > > On 03/01, Neil Armstrong wrote: > > > diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c > > > index a52063f..31f6090 100644 > > > ---

Re: [PATCH v2] video: fbdev: imxfb: support AUS mode

On Tue, Feb 28, 2017 at 09:04:16PM +0100, Martin Kaiser wrote: > Some displays require setting AUS mode in the LDCD AUS Mode Control > Register to work with the imxfb driver. Like the value of the Panel > Configuration Register, the AUS Mode Control Register's value depends on > the display mode.

Re: [PATCH v2 2/3] clk: meson-gxbb: Add MALI clocks

On Thu, 2017-03-02 at 12:07 +0100, Neil Armstrong wrote: > Hi Stephen, > > On 03/01/2017 08:11 PM, Stephen Boyd wrote: > > On 03/01, Neil Armstrong wrote: > > > diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c > > > index a52063f..31f6090 100644 > > > ---

Re: [PATCH v2] video: fbdev: imxfb: support AUS mode

On Tue, Feb 28, 2017 at 09:04:16PM +0100, Martin Kaiser wrote: > Some displays require setting AUS mode in the LDCD AUS Mode Control > Register to work with the imxfb driver. Like the value of the Panel > Configuration Register, the AUS Mode Control Register's value depends on > the display mode.

Re: [PATCH v3] lockdep: Teach lockdep about memalloc_noio_save

On Wed, 2017-03-01 at 16:46 +0100, Peter Zijlstra wrote: > On Wed, Mar 01, 2017 at 01:29:57PM +0200, Nikolay Borisov wrote: > > Commit 21caf2fc1931 ("mm: teach mm by current context info to not do I/O > > during memory allocation") added the memalloc_noio_(save|restore) functions > > to enable

Re: [PATCH v3] lockdep: Teach lockdep about memalloc_noio_save

On Wed, 2017-03-01 at 16:46 +0100, Peter Zijlstra wrote: > On Wed, Mar 01, 2017 at 01:29:57PM +0200, Nikolay Borisov wrote: > > Commit 21caf2fc1931 ("mm: teach mm by current context info to not do I/O > > during memory allocation") added the memalloc_noio_(save|restore) functions > > to enable

[PATCH] doc/ko_KR/memory-barriers: Update control-dependencies section

This commit applies upstream change, commit c8241f8553e8 ("doc: Update control-dependencies section of memory-barriers.txt"), to Korean translation. Signed-off-by: SeongJae Park --- .../translations/ko_KR/memory-barriers.txt | 68 -- 1 file

[PATCH] doc/ko_KR/memory-barriers: Update control-dependencies section

This commit applies upstream change, commit c8241f8553e8 ("doc: Update control-dependencies section of memory-barriers.txt"), to Korean translation. Signed-off-by: SeongJae Park --- .../translations/ko_KR/memory-barriers.txt | 68 -- 1 file changed, 37 insertions(+),

[GIT PULL] More power management updates for v4.11-rc1

Hi Linus, Please pull from the tag git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \ pm-extra-4.11-rc1 with top-most commit 9b5e9cb164ee93ae19c4c6593e8188a55481f78b Merge branches 'pm-cpuidle', 'pm-cpufreq' and 'pm-sleep' on top of commit

[GIT PULL] More power management updates for v4.11-rc1

Hi Linus, Please pull from the tag git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \ pm-extra-4.11-rc1 with top-most commit 9b5e9cb164ee93ae19c4c6593e8188a55481f78b Merge branches 'pm-cpuidle', 'pm-cpufreq' and 'pm-sleep' on top of commit

Re: [PATCH v5 1/4] dt-bindings: iio: accel: Document ADXL345 accelerometer binding

On Tue, Feb 28, 2017 at 10:37:16AM +0800, Eva Rachel Retuya wrote: > Add the device tree binding documentation for the ADXL345 3-axis digital > accelerometer. > > Signed-off-by: Eva Rachel Retuya > --- > Changes from v4: > * Update subject-prefix > * Update node name from

Re: [PATCH v5 1/4] dt-bindings: iio: accel: Document ADXL345 accelerometer binding

On Tue, Feb 28, 2017 at 10:37:16AM +0800, Eva Rachel Retuya wrote: > Add the device tree binding documentation for the ADXL345 3-axis digital > accelerometer. > > Signed-off-by: Eva Rachel Retuya > --- > Changes from v4: > * Update subject-prefix > * Update node name from "adxl345@unit-address"

Re: [PATCH] USB: misc: ldusb: Fixed coding style issues

On Fri, Mar 03, 2017 at 12:55:46AM +0100, Milian Reichardt wrote: > Fixed multiple coding style issues. Please be specific as to exactly what issues you are fixing up. And don't do multiple things in the same patch, each different thing needs to be broken up into an individual patch. thanks,

Re: [PATCH v1] nvmem: i.MX IIM driver

Srinivas, Maxime, Any comments on this one? Sascha On Mon, Feb 13, 2017 at 04:31:47PM +0100, Sascha Hauer wrote: > > This adds a readonly nvmem driver for the i.MX IC Identification Module (IIM) > which is found on the older i.MX SoCs. The IIM is part of the i.MX dts files > for long now, but

Re: [PATCH] selftests: lib.mk Fix individual test builds

Shuah Khan writes: > In commit a8ba798bc8ec ("selftests: enable O and KBUILD_OUTPUT"), added > support to generate compile targets in a user specified directory. OUTPUT > variable controls the location which is undefined when tests are built in > the test directory or

Re: [PATCH] USB: misc: ldusb: Fixed coding style issues

On Fri, Mar 03, 2017 at 12:55:46AM +0100, Milian Reichardt wrote: > Fixed multiple coding style issues. Please be specific as to exactly what issues you are fixing up. And don't do multiple things in the same patch, each different thing needs to be broken up into an individual patch. thanks,

Re: [PATCH v1] nvmem: i.MX IIM driver

Srinivas, Maxime, Any comments on this one? Sascha On Mon, Feb 13, 2017 at 04:31:47PM +0100, Sascha Hauer wrote: > > This adds a readonly nvmem driver for the i.MX IC Identification Module (IIM) > which is found on the older i.MX SoCs. The IIM is part of the i.MX dts files > for long now, but

Re: [PATCH] selftests: lib.mk Fix individual test builds

Shuah Khan writes: > In commit a8ba798bc8ec ("selftests: enable O and KBUILD_OUTPUT"), added > support to generate compile targets in a user specified directory. OUTPUT > variable controls the location which is undefined when tests are built in > the test directory or with "make -C

[PATCH v4 2/5] perf report: Find the inline stack for a given address

It would be useful for perf to support a mode to query the inline stack for a given callgraph address. This would simplify finding the right code in code that does a lot of inlining. The srcline.c has contained the code which supports to translate the address to filename:line_nr. This patch just

[PATCH v4 2/5] perf report: Find the inline stack for a given address

It would be useful for perf to support a mode to query the inline stack for a given callgraph address. This would simplify finding the right code in code that does a lot of inlining. The srcline.c has contained the code which supports to translate the address to filename:line_nr. This patch just

Re: [RFC v0 0/2] Introduce on-chip interconnect API

On Wed, Mar 01, 2017 at 08:22:33PM +0200, Georgi Djakov wrote: > Modern SoCs have multiple processors and various dedicated cores (video, gpu, > graphics, modem). These cores are talking to each other and can generate a lot > of data flowing through the on-chip interconnects. These interconnect

Re: [RFC v0 0/2] Introduce on-chip interconnect API

On Wed, Mar 01, 2017 at 08:22:33PM +0200, Georgi Djakov wrote: > Modern SoCs have multiple processors and various dedicated cores (video, gpu, > graphics, modem). These cores are talking to each other and can generate a lot > of data flowing through the on-chip interconnects. These interconnect

[PATCH v7 kernel 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration

Take over this work from Liang. This patch series implements two optimizations: 1) transfer pages in chuncks between the guest and host; 1) transfer the guest unused pages to the host so that they can be skipped to migrate in live migration. Please check patch 0003 for more details about

[PATCH v7 kernel 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration

Take over this work from Liang. This patch series implements two optimizations: 1) transfer pages in chuncks between the guest and host; 1) transfer the guest unused pages to the host so that they can be skipped to migrate in live migration. Please check patch 0003 for more details about

Re: [PATCH] PM / OPP: Documentation: Fix opp-microvolt in examples

On Wed, Mar 01, 2017 at 04:39:55PM +0530, Viresh Kumar wrote: > The triplet present in "opp-microvolt" property should be in the order > , while all the examples have it in the order > . > > Fix it. > > Luckily all of the users of "opp-microvolt" property have applied brain > instead of copying

Re: [PATCH 2/6] cpufreq: schedutil: ignore the sugov kthread for frequencies selections

On 02-03-17, 15:45, Patrick Bellasi wrote: > In system where multiple CPUs shares the same frequency domain a small > workload on a CPU can still be subject frequency spikes, generated by > the activation of the sugov's kthread. > > Since the sugov kthread is a special RT task, which goal is just

Re: [PATCH] PM / OPP: Documentation: Fix opp-microvolt in examples

On Wed, Mar 01, 2017 at 04:39:55PM +0530, Viresh Kumar wrote: > The triplet present in "opp-microvolt" property should be in the order > , while all the examples have it in the order > . > > Fix it. > > Luckily all of the users of "opp-microvolt" property have applied brain > instead of copying

Re: [PATCH 2/6] cpufreq: schedutil: ignore the sugov kthread for frequencies selections

On 02-03-17, 15:45, Patrick Bellasi wrote: > In system where multiple CPUs shares the same frequency domain a small > workload on a CPU can still be subject frequency spikes, generated by > the activation of the sugov's kthread. > > Since the sugov kthread is a special RT task, which goal is just

Re: [PATCH v2 2/3] perf annotate: Introduce the new source code view

Hi Peter, On Wed, Mar 01, 2017 at 04:07:46PM +0100, Peter Zijlstra wrote: > On Wed, Mar 01, 2017 at 11:56:39PM +0900, Namhyung Kim wrote: > > > It's a kind of user experience issue. We provide the asm-only and > > asm+source annotation, and I think it'd be nice to add source-only > > option.

RE: [PATCH v2] staging: mkspec: added aarch64 ifarch case.

Hi Will, This patch (http://lkml.kernel.org/r/20161122213434.14788-1-mma...@suse.com) looks better. It has what Linus calls "good taste". ;-) I didn't see it in mmarek's kbuild branches (for-next,rc-fixes), however. Still making its way there? But it doesn't quite fix the native 'make rpm'

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