On Tue, 11 Dec 2018 17:09:14 -0600, "Serge E. Hallyn" wrote:
> On Mon, Dec 10, 2018 at 03:35:46AM +0900, Masatake YAMATO wrote:
>> Finding endpoints of an IPC channel is one of essential task to
>> understand how a user program works. Procfs and netlink socket provide
>> enough hints to find
Allocate affinity option and masks for mmap data buffers and
record thread as well as initialize allocated objects.
Signed-off-by: Alexey Budankov
---
tools/perf/builtin-record.c | 11 ++-
tools/perf/perf.h | 5 +
tools/perf/util/evlist.c| 6 +++---
On Wed, 12 Dec 2018 at 07:25, Ashish Mhetre wrote:
>
> From: Krishna Reddy
>
> In the cases where greater than 4GB allocations are required, current
> definition of scatterlist doesn't support it. For example, Tegra devices
> have more than 4GB of system memory available. So they are expected to
Hello,
On Wed, Dec 12, 2018 at 11:09:31AM +0330, Hossein Radhasani wrote:
> I need some help.
> I have device with eMMC storage and wnat to write on specific page of it.
> I was trying to use MMC driver, but unfortunately have some problems.
> Would you please help me?
The usual approach to get
On 12/12/18 at 11:10am, Chao Fan wrote:
> Introduce kstrtoull() from lib/kstrtox.c to boot directory so that code
It's not introducing kstrtoull(), just copying kstrtoull() from
lib/kstrtox.c to boot.
> in boot/ can use kstrtoull() and the old simple_strtoull() can be
> replaced.
>
>
On 12/12/18 12:19 PM, Sagi Grimberg wrote:
struct nvme_sgl_desc {
__le64 addr;
- __le32 length;
+ __le64 length;
__u8 rsvd[3];
__u8 type;
};
Isn't this a device or protocol defined datastructure? You can't just
change it like this.
You're
Implement --affinity=node|cpu option for the record mode defaulting
to system affinity mask bouncing.
Signed-off-by: Alexey Budankov
---
tools/perf/Documentation/perf-record.txt | 5 +
tools/perf/builtin-record.c | 18 ++
2 files changed, 23 insertions(+)
On Wed, Dec 12, 2018 at 09:30:42AM +1100, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the sparc-next tree got a conflict in:
>
> arch/sparc/kernel/ioport.c
>
> between commit:
>
> 53b7670e5735 ("sparc: factor the dma coherent mapping into helper")
>
> from the
This patch adds a regulator driver for the MCP16502 PMIC.
This drivers supports basic operations through the
regulator interface such as:
- setting/reading voltage
- setting/reading operating mode
- reading current status
- transitioning to/from suspend-to-ram and standby
power states
This patch adds a maintainer for the MCP16502 PMIC
driver.
Signed-off-by: Andrei Stefanescu
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index b755a89..6a74a65 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9730,6 +9730,13 @@ M:
This patch describes the compatible and the device tree
bindings necessary for the MCP16502 PMIC.
Signed-off-by: Andrei Stefanescu
Reviewed-by: Rob Herring
---
.../bindings/regulator/mcp16502-regulator.txt | 143 +
1 file changed, 143 insertions(+)
create mode 100644
MCP16502 is a Power Management IC from Microchip.
It has 4 Buck outputs and 2 LDOs. The buck regulators
can be used in two modes: normal(FPWM) and low-power(Auto PFM).
This patch series adds support for the MCP16502 PMIC.
v4:
- make entire intial comment a C++ comment
v3:
- use CONFIG_SUSPEND
On Tue, Dec 11, 2018 at 06:22:27PM +, Parshuram Raju Thombare wrote:
> One reason of using device mapper here is to use existing tools like
> 'dmsetup', otherwise some user space application is needed and may be
> some changes in block layer to pass the crypto information (crypto
> algorithm,
Build node cpu masks for mmap data buffers. Bind AIO data buffers
to nodes according to kernel data buffers location. Apply node cpu
masks to trace reading thread every time it references memory cross
node or cross cpu.
Signed-off-by: Alexey Budankov
---
tools/perf/builtin-record.c | 9
> >> >> + USB_CMD_STMODE |
> >> >> +
> >> >> + USB_STS_TMODE_SEL(tmode - 1));
> >> >
> >> >I'm 90% sure this won't work. There's a reason why we only enter the
> >> >requested test mode from status stage. How have you tested this?
> >>
> >
> > What's the
On Tue, Dec 11, 2018 at 11:57:15AM -0800, Guenter Roeck wrote:
> Hi,
>
> can someone point me to a working c-sky toolchain ?
>
> I tried several from https://github.com/c-sky/tools/, but they all fail
> to build csky:defconfig with various error messages.
Try this:
It has been observed that trace reading thread runs on the same hw thread
most of the time during perf record sampling collection. This scheduling
layout leads up to 30% profiling overhead in case when some cpu intensive
workload fully utilizes a large server system with NUMA. Overhead usually
Hi, Rob
Best Regards!
Anson Huang
> -Original Message-
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: 2018年12月12日 5:35
> To: Anson Huang
> Cc: daniel.lezc...@linaro.org; t...@linutronix.de; mark.rutl...@arm.com;
> linux-kernel@vger.kernel.org; devicet...@vger.kernel.org;
The i.MX GPT timer driver binding doc is out of date,
update it according to current GPT timer driver.
Signed-off-by: Anson Huang
---
.../devicetree/bindings/timer/fsl,imxgpt.txt | 28 +-
1 file changed, 22 insertions(+), 6 deletions(-)
diff --git
Le 12/12/2018 à 01:23, Michael Ellerman a écrit :
Christophe Leroy writes:
This patch implements CONFIG_DEBUG_VIRTUAL to warn about
incorrect use of virt_to_phys() and page_to_phys()
Below is the result of test_debug_virtual:
[1.438746] WARNING: CPU: 0 PID: 1 at
On Mon, 2018-12-03 at 21:49 -0800, Sean Wang wrote:
> 於 2018年12月3日 週一 上午5:34寫道：
> >
> > From: qii wang
> >
> > Add i2c compatible for MT8183. Compare to 2712 i2c controller, MT8183 has
> > different registers, offsets, clock, and multi-user function.
> >
> > Signed-off-by: qii wang
> > ---
> >
form-tools-r2600
* kselftest-vsyscall-mode-native
* kselftest-vsyscall-mode-none
Summary
kernel: 4.4.167-rc1
git repo: https://git.linaro.org/lkft/arm64-stable-rc.git
git branch: 4.4.167-rc1-hikey-20181211-336
git commit: 904b62
On Tue, Dec 11, 2018 at 07:49:27PM +0100, Mkrtchyan, Tigran wrote:
>
>
> Hi Greg,
>
> Thanks for pushing this into sable as well. However, I think patch makes more
> sense
> with 320f35b7bf8cccf1997ca3126843535e1b95e9c4
I need an ack from the nfs maintainer before I can do that...
On Tue, Dec 11, 2018 at 05:03:49PM -0700, shuah wrote:
> On 12/11/18 8:40 AM, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 4.19.9 release.
> > There are 118 patches in this series, all will be posted as a response
> > to this one. If anyone has any issues
> On 12. Dec 2018, at 01:47, Benjamin Herrenschmidt
> wrote:
>
>> On Tue, 2018-12-11 at 19:17 +0100, Christian Zigotzky wrote:
>> X5000 (P5020 board): U-Boot loads the kernel and the dtb file. Then the
>> kernel starts but it doesn't find any hard disks (partitions). That
>> means this is
It`s possible ip overrun in lzo1x_1_do_compress() when compressed page is
point to the end of memory and which virtual address is 0xf000.
Leading to a NULL pointer access during the get_unaligned_le32(ip).
Fix this panic:
[ 2738.034508] Unable to handle kernel NULL pointer dereference
On Wed, Dec 05, 2018 at 09:01:33AM -0500, Boris Ostrovsky wrote:
>On 12/5/18 4:32 AM, Roger Pau Monné wrote:
>> On Wed, Dec 05, 2018 at 10:19:17AM +0800, Chao Gao wrote:
>>> I find some pass-thru devices don't work any more across guest reboot.
>>> Assigning it to another guest also meets the same
Hi Tony, again
> > > https://patchwork.kernel.org/patch/10712877/
> >
> > Hmm, so do you have multiple separate ports at the "" node
> > hardware? If so then yeah multiple ports make sense.
> >
> > But if you only a single physical (I2S?) port at the
> > "" node hardware, then IMO you should
Peter Chen writes:
>> >> +tmode = le16_to_cpu(ctrl->wIndex);
>> >> +
>> >> +if (!set || (tmode & 0xff) != 0)
>> >> +return -EINVAL;
>> >> +
>> >> +switch (tmode >> 8) {
>> >> +case TEST_J:
>> >> +case TEST_K:
>> >> +
On Tue, 11 Dec 2018 21:10:07 +0100,
wrote:
>
>
> Do I need to resubmit?
Yes, please.
Andy, I think it's better to merge the series through my tree, as it
uses the new leds audio trigger stuff.
Could you give ACK if the revised one is OK?
Then I'll merge them to the immutable branch
Hi
Pawel Laszczak writes:
>>> + cdns->phy = devm_phy_get(dev, "cdns3,usbphy");
>>> + if (IS_ERR(cdns->phy)) {
>>> + ret = PTR_ERR(cdns->phy);
>>> + if (ret == -ENOSYS || ret == -ENODEV) {
>>
>>Are you sure you can get ENOSYS here? Have you checked output of
>>checkpatch
From: Xin Long
Date: Fri, 7 Dec 2018 14:30:32 +0800
> Without the support for the total_nr_elements's growing or shrinking
> dynamically, flex_array is not that 'flexible'. Like when users want
> to change the size, they have to redo flex_array_alloc and copy all
> the elements from the old to
struct nvme_sgl_desc {
__le64 addr;
- __le32 length;
+ __le64 length;
__u8rsvd[3];
__u8type;
};
Isn't this a device or protocol defined datastructure? You can't just
change it like this.
You're correct, we can't...
[Replied before seeing
On Wed, Dec 12, 2018 at 03:28:41PM +0900, Sergey Senozhatsky wrote:
On (12/11/18 22:08), Daniel Wang wrote:
I've been meaning to try it but kept getting distracted by other
things. I'll try to find some time for it this week or next. Right now
my intent is to get Steven's patch into 4.14
struct nvme_sgl_desc {
__le64 addr;
- __le32 length;
+ __le64 length;
__u8rsvd[3];
__u8type;
};
in what world changing a wire protocol for this make sense?
please get rid of this hunk, NVMe will never cross the 32 bit sg element
size.
Now the FlexCAN driver always use last mailbox for TX, it will work well
when MB payload size is 8/16 bytes.
TX mailbox would change to 13 when MB payload size is 64 bytes to
support CANFD. So we may need to set iflag register to add support for
variable payload size.
Signed-off-by: Joakim Zhang
On Tue, 11 Dec 2018 at 21:19, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.9.145 release.
> There are 51 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
>
Hi Catalin,
Can you mark this patch as acknowledged so that it can be picked up by
the maintainer.
Adding Andrew.
Thanks,
On 10/29/2018 4:13 PM, Catalin Marinas wrote:
On Mon, Oct 22, 2018 at 11:38:43PM +0530, Prateek Patel wrote:
From: Sri Krishna chowdary
Kmemleak scan can be cpu
On Wed, Dec 12 2018, Herbert Xu wrote:
> On Wed, Dec 12, 2018 at 11:02:35AM +1100, NeilBrown wrote:
>>
>> So I think this is a real bug - it is quite unlikely to hit, but
>> possibly.
>> You need a chain with at least 2 objects, you need
>> rhashtable_walk_stop() to be called after visiting an
There's a new wmi event generated by dell-wmi when pressing keyboard
backlight hotkey:
[ 3285.474172] dell_wmi: Unknown key with type 0x0010 and code 0x003f pressed
This event is for notification purpose, let's ignore it. The keyboard
backlight hotkey uses another event so it still works without
On Tue, 11 Dec 2018 at 21:22, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.14.88 release.
> There are 67 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
>
Hi all,
Changes since 20181211:
The sparc-next tree gained a conflict against the dma-mapping tree.
The rdma tree still had its build failure so I used the version from
next-20181203.
The net-next tree gained a conflict against the char-misc.current tree.
The phy-next tree gained a conflict
> On Dec 11, 2018, at 4:03 PM, Rick Edgecombe
> wrote:
>
> This adds a more efficient x86 architecture specific implementation of
> arch_vunmap, that can free any type of special permission memory with only 1
> TLB
> flush.
>
> In order to enable this, _set_pages_p and _set_pages_np are made
From: Ashish Mhetre
Date: Wed, 12 Dec 2018 11:54:13 +0530
> diff --git a/include/linux/nvme.h b/include/linux/nvme.h
> index 68e91ef..0a07a29 100644
> --- a/include/linux/nvme.h
> +++ b/include/linux/nvme.h
> @@ -587,7 +587,7 @@ enum {
>
> struct nvme_sgl_desc {
> __le64 addr;
> -
On (12/11/18 22:08), Daniel Wang wrote:
>
> I've been meaning to try it but kept getting distracted by other
> things. I'll try to find some time for it this week or next. Right now
> my intent is to get Steven's patch into 4.14 stable as it evidently
> fixed the particular issue I was seeing, and
From: Krishna Reddy
In the cases where greater than 4GB allocations are required, current
definition of scatterlist doesn't support it. For example, Tegra devices
have more than 4GB of system memory available. So they are expected to
support larger allocation requests.
This patch updates the
On Tue, 11 Dec 2018 at 21:25, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.19.9 release.
> There are 118 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
>
On Tue, Dec 11, 2018 at 1:04 AM Dmitry Vyukov wrote:
>
> On Tue, Dec 11, 2018 at 1:41 AM syzbot
> wrote:
> >
> > Hello,
> >
> > syzbot found the following crash on:
> >
> > HEAD commit:3f06bda61398 kmsan: remove excessive KMSAN wrappers from a..
> > git tree:
Hi, Fabio
Obviously, some of the dts files (such as
arch/arm/boot/dts/exynos5420-peach-pit.dts) using "vcc" as isl29018's power
supply name, they are NOT matched with datasheet, so should we update those dts
files with "vdd" as well or just using the "vcc" in isl29018 driver? Which
On Wed, 2018-12-12 at 03:35 +, Wei Yang wrote:
> I see the above code is wrapped with CONFIG_DEBUG_VM on current Linus
> tree.
> This is removed by someone else?
Yes, e8abbd69957288 ("mm, memory_hotplug: be more verbose for memory
offline failures") got rid of the CONFIG_DEBUG_VM.
This commit
On Mon, 10 Dec 2018, Enric Balletbo i Serra wrote:
> Commit '88ba95bedb79 ("backlight: pwm_bl: Compute brightness of LED
> linearly to human eye")' allows the possibility to compute a default
> brightness table when there isn't the brightness-levels property in the
> DT. Unfortunately the changes
Got it. Thank you.
On Tue, Dec 11, 2018 at 10:06 PM Sergey Senozhatsky
wrote:
>
> On (12/11/18 21:59), Daniel Wang wrote:
> > No worries. I will follow up. You would recommend that all four
> > patches in this set to be backported though, right?
>
> Just the last one, which makes consoles
> So... did my patch address the deadlock you are seeing or it didn't?
I've been meaning to try it but kept getting distracted by other
things. I'll try to find some time for it this week or next. Right now
my intent is to get Steven's patch into 4.14 stable as it evidently
fixed the particular
On (12/11/18 21:59), Daniel Wang wrote:
> No worries. I will follow up. You would recommend that all four
> patches in this set to be backported though, right?
Just the last one, which makes consoles re-entrant
panic: avoid deadlocks in re-entrant console drivers
Because only this one
No worries. I will follow up. You would recommend that all four
patches in this set to be backported though, right?
On Tue, Dec 11, 2018 at 9:23 PM Sergey Senozhatsky
wrote:
>
> On (12/11/18 16:53), Daniel Wang wrote:
> > Is it okay to tag this commit with `Cc: sta...@vger.kernel.org` so
> >
> On Dec 11, 2018, at 10:05 AM, Josh Poimboeuf wrote:
>
> On Fri, Dec 07, 2018 at 04:06:32PM +, Edward Cree wrote:
>> Sorry if this has been pointed out before (it's a very long thread), but
>> in the out-of-line implementation, it appears that static_call_update()
>> never alters key->func.
Hello Eric,
Thank you for a comment.
>-Original Message-
>From: Eric Biggers
>Sent: Tuesday, December 11, 2018 11:47 PM
>To: Parshuram Raju Thombare
>Cc: ax...@kernel.dk; vinholika...@gmail.com; j...@linux.vnet.ibm.com;
>martin.peter...@oracle.com; mchehab+sams...@kernel.org;
On Wed, Dec 12, 2018 at 11:02:35AM +1100, NeilBrown wrote:
>
> So I think this is a real bug - it is quite unlikely to hit, but
> possibly.
> You need a chain with at least 2 objects, you need
> rhashtable_walk_stop() to be called after visiting an object other than
> the last object, and you
PCI host has list of resource entries contain memory
address range for which IOVA address mapping has to
be reserve.
These address ranges are the address holes in
dma-ranges property.
It is similar to PCI IO resources address range
reserving in IOMMU for each EP connected to
corresponding host.
IPROC host has the limitation that it can use
only those address ranges given by dma-ranges
property as inbound address.
So that the memory address holes in dma-ranges
should be reserved to allocate as DMA address.
All such reserved addresses are created as resource
entries and add to dma_resv
Add a dma_resv parameter in pci host bridge structure
to hold resource entries list of memory regions for
which IOVAs has to reserve.
IOMMU framework reserve IOVA for this list of address
range while initializing IOMMU domain of corresponding
PCI EP connected to the HOST.
PCIe host driver will
Few SOCs have limitation that their PCIe host
can't allow few inbound address ranges.
Allowed inbound address ranges are listed in
dma-ranges DT property and this address ranges
are required to do IOVA mapping.
Remaining address ranges have to be reserved in
IOVA mapping.
PCIe Host driver of
On Fri, 2018-12-07 at 20:56 +0800, Jianjun Wang wrote:
> On Thu, 2018-12-06 at 13:53 +0800, Honghui Zhang wrote:
> > On Thu, 2018-12-06 at 09:09 +0800, Jianjun Wang wrote:
> > > MT7629 is an arm platform SoC which has the same PCIe IP with MT7622.
> > >
> > > The read value of BAR0 is
--
Hi friend
I am a banker in ADB BANK. I want to transfer an abandoned sum of
USD27.5Million to your Bank account. 40/percent will be your share.
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Hello Jens,
Thank you for a comment.
>-Original Message-
>From: Jens Axboe
>Sent: Tuesday, December 11, 2018 7:07 PM
>To: Parshuram Raju Thombare ; t...@kernel.org;
>jba...@fb.com; michaelcalla...@fb.com; snit...@redhat.com;
>osan...@fb.com; keith.bu...@intel.com; ming@redhat.com;
Hello Greg,
Thank you for comments.
>-Original Message-
>From: Greg KH
>Sent: Tuesday, December 11, 2018 5:34 PM
>To: Parshuram Raju Thombare
>Cc: ax...@kernel.dk; vinholika...@gmail.com; j...@linux.vnet.ibm.com;
>martin.peter...@oracle.com; mchehab+sams...@kernel.org;
Hi,
On 12/12/18 10:42 AM, Stephen Rothwell wrote:
> Hi Kishon,
>
> On Wed, 12 Dec 2018 10:37:37 +0530 Kishon Vijay Abraham I
> wrote:
>>
>> I've rebased by 'next' branch on top of my 'fixes' branch to avoid this
>> conflict.
>
> Why didn't you just merge them?
Merging will create a new
We are compiling PCI code today for systems with ACPI and no PCI
device present. Remove the useless code and reduce the tight
dependency.
Signed-off-by: Sinan Kaya
---
arch/x86/include/asm/pci_x86.h | 7 +++
drivers/acpi/Kconfig | 1 -
drivers/acpi/Makefile | 2 +-
Getting ready to allow PCI to be disabled with ACPI enabled. Stub out
acpi_os_read_pci_configuration function that depend on PCI.
Signed-off-by: Sinan Kaya
---
drivers/acpi/osl.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c
index
Now that we allow CONFIG_PCI to be unset, remove useless code from ACPICA
too.
Signed-off-by: Sinan Kaya
---
drivers/acpi/acpica/Makefile | 2 +-
drivers/acpi/osl.c | 9 +
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/acpi/acpica/Makefile
Add the binding doc for nxp system counter timer module.
Signed-off-by: Bai Ping
---
change v1->v2
- remove the blank line at EOF
---
.../devicetree/bindings/timer/nxp,sysctr_timer.txt | 26 ++
1 file changed, 26 insertions(+)
create mode 100644
Getting ready to allow PCI to be disabled with ACPI enabled. Stub out
acpi_os_write_pci_configuration function that depend on PCI.
Signed-off-by: Sinan Kaya
---
drivers/acpi/osl.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c
index
The system counter (sys_ctr) is a programmable system counter
which provides a shared time base to the Cortex A15, A7, A53 etc cores.
It is intended for use in applications where the counter is always
powered on and supports multiple, unrelated clocks. The sys_ctr hardware
supports:
- 56-bit
Make PCI reboot conditional on PCI support being present on the kernel
configuration.
Signed-off-by: Sinan Kaya
---
drivers/acpi/reboot.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/acpi/reboot.c b/drivers/acpi/reboot.c
index 6fa9c2a4cfe9..d75e637ee36a
Hi Boris & Miquel,
An update to my comments on thread https://lkml.org/lkml/2018/11/15/656.
In this I said, will take a default error count value as 16 and during page
read, will check the error count
Register value with this and if it is equal to or greater than the default
count(16) then I am
We are compiling PCI code today for systems with ACPI and no PCI
device present. Remove the useless code and reduce the tight
dependency.
Signed-off-by: Sinan Kaya
---
arch/x86/include/asm/pci_x86.h | 7 +++
drivers/acpi/Kconfig | 1 -
drivers/acpi/Makefile | 2 +-
Now that we allow CONFIG_PCI to be unset, remove useless code from ACPICA
too.
Signed-off-by: Sinan Kaya
---
drivers/acpi/acpica/Makefile | 2 +-
drivers/acpi/osl.c | 9 +
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/acpi/acpica/Makefile
Getting ready to allow PCI to be disabled with ACPI enabled. Stub out
acpi_os_write_pci_configuration function that depend on PCI.
Signed-off-by: Sinan Kaya
---
drivers/acpi/osl.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c
index
Getting ready to allow PCI to be disabled with ACPI enabled. Stub out
acpi_os_read_pci_configuration function that depend on PCI.
Signed-off-by: Sinan Kaya
---
drivers/acpi/osl.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c
index
On (12/11/18 16:53), Daniel Wang wrote:
> Is it okay to tag this commit with `Cc: sta...@vger.kernel.org` so
> that it'll get applied to the stable trees once merged into Linux's
> tree, if it's not too late? Otherwise I'll follow up on the stable
> merges separately. Thanks for making the changes
On (12/11/18 17:16), Daniel Wang wrote:
> > Let's first figure out if it works.
>
> I would still like to try applying your patches that went into
> printk.git, but for now I wonder if we can get Steven's patch into
> 4.14 first, for at least we know it mitigated the issue if not
> fundamentally
Hi Markus,
OK, thanks. I`ll change it in v3.
Thanks,
Yueyi
On 2018/12/6 23:03, Markus F.X.J. Oberhumer wrote:
> Hi Yueyi,
>
> yes, my LZO patch works for all cases.
>
> The reason behind the issue in the first place is that if KASLR
> includes the very last page 0xf000 then we do
Populate power-domain property for UART nodes, this is required for
Linux to enable UART clocks via PM calls. Without this UART instances
not initialized by bootloader (like main_uart1) fails to work in Linux.
Also, drop current-speed property from main_uart1 and main_uart2 nodes
as these UARTs
On Tue, Dec 11, 2018 at 11:21:44AM +0300, Konstantin Khlebnikov wrote:
> On 11.12.2018 8:12, Peter Xu wrote:
> > When splitting a huge migrating PMD, we'll transfer all the existing
> > PMD bits and apply them again onto the small PTEs. However we are
> > fetching the bits unconditionally via
Once BSS STA mode gets started, it can be scanned by other clients but
cannot entablish a connection.
Turns out the set_bcn_reg() and its *_set_beacon_related_registers()
callbacks never get called so it has problem beaconing.
Enable the function in rtl_op_bss_info_changed() can make BSS STA
Hi Kishon,
On Wed, 12 Dec 2018 10:37:37 +0530 Kishon Vijay Abraham I wrote:
>
> I've rebased by 'next' branch on top of my 'fixes' branch to avoid this
> conflict.
Why didn't you just merge them?
--
Cheers,
Stephen Rothwell
pgpz6d1Bd0Tqx.pgp
Description: OpenPGP digital signature
Hi Greg,
Please find the pull request for 4.21 merge window below.
The major changes are, the set_mode ops now takes 2 arguments (mode and
submode) instead of just 'mode'. The value in 'submode' will be specific to
'mode'. The other major change is PHY framework now gets 2 new APIs
Hi,
On 12/12/18 9:46 AM, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the phy-next tree got a conflict in:
>
> Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
>
> between commit:
>
> 7243ec72b902 ("dt-bindings: phy-qcom-qmp: Fix several mistakes from prior
>
On 12/12/2018 3:31 AM, Stephen Boyd wrote:
Quoting Rajendra Nayak (2018-12-11 01:49:34)
The RPMh power domain driver aggregates the corner votes from various
consumers for the ARC resources and communicates it to RPMh.
With RPMh we use 2 different numbering space for corners, one used
by the
On (12/12/18 12:42), Sergey Senozhatsky wrote:
[..]
> > >> [ 87.255156]CPU0CPU1
> > >> [ 87.255813]
> > >> [ 87.256460] lock(_lock_key);
> > >> [ 87.256973]lock(console_owner);
> > >> [
On Thu, Dec 06, 2018 at 09:21:10PM +0800, lantianyu1...@gmail.com wrote:
> From: Lan Tianyu
>
> The patch is to make kvm_set_spte_hva() return int and caller can
> check return value to determine flush tlb or not.
It would be helpful if the patch description told the reader which
return
From: Marc Zyngier Sent: Friday, December 7, 2018 6:43
AM
> > Add ARM64-specific code to enable Hyper-V. This code includes:
> > * Detecting Hyper-V and initializing the guest/Hyper-V interface
> > * Setting up Hyper-V's synthetic clocks
> > * Making hypercalls using the HVC instruction
> > *
On 12/11/18 6:33 AM, Keith Busch wrote:
Platforms may provide system memory where some physical address ranges
perform differently than others, or is side cached by the system.
Add documentation describing a high level overview of such systems and the
performance and caching attributes the
Andrew Murray writes:
> On Tue, Dec 11, 2018 at 10:06:53PM +1100, Michael Ellerman wrote:
>> [ Reviving old thread. ]
>>
>> Andrew Murray writes:
>> > On Tue, Nov 20, 2018 at 10:31:36PM +1100, Michael Ellerman wrote:
>> >> Andrew Murray writes:
>> >>
>> >> > Update design.txt to reflect the
On 11-12-18, 19:05, Taniya Das wrote:
> The design here assumes that there would not be any per-cpu/per-cluster
> based SW requirement for the HW during frequency transitions, which again
> makes me think that we would require to re-introduce these structures again
> in case we have such
On 11-12-18, 13:48, Quentin Perret wrote:
> On Tuesday 11 Dec 2018 at 16:56:29 (+0530), Viresh Kumar wrote:
> > There is one case where we may end up with no "supply" directory for the
> > OPPs in debugfs. That happens when the OPP core isn't managing the
> > regulators for the device and the
Hi Paul,
On Wed, 12 Dec 2018 at 00:29, Paul Burton wrote:
> > Will this below change will help?
> >
> > #define _MIPS_SIM_ABI32 1
> > #define _MIPS_SIM_NABI322
> > #define _MIPS_SIM_ABI64 3
> > +#define _MIPS_SIM_ABIN64 _MIPS_SIM_ABI64
>
> Hmm,
On 12/12/2018 3:21 AM, Stephen Boyd wrote:
Quoting Rajendra Nayak (2018-12-11 01:49:28)
Changes in v6:
* OPP binding updates for qcom,level reviewed by Rob
* DT bindings for rpmpd and rpmhpd updated to specify the
OPP tables as child nodes of the power-controller itself
* Removed some module
On Wednesday, December 12, 2018 12:42:20 AM IST Tony Lindgren wrote:
> Hi,
>
> Looks like commit 4de97efb578a ("fsverity: Move verity status check
> to fsverity_file_open") causes a boot regression for me with root
> on ext4 SDIO card, see below.
>
fsverity_file_open() used to incorrectly
Hi all,
Today's linux-next merge of the phy-next tree got a conflict in:
Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
between commit:
7243ec72b902 ("dt-bindings: phy-qcom-qmp: Fix several mistakes from prior
commits")
from Linus' tree and commit:
91fdc9b127c9 ("dt-bindings:
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