On Mon, Feb 11, 2019 at 02:35:49PM +0100, Christoph Hellwig wrote:
> This is where all the related code already lives.
>
> Signed-off-by: Christoph Hellwig
> ---
> drivers/base/Kconfig | 77
> kernel/dma/Kconfig | 77
On Mon, Feb 11, 2019 at 02:25:33PM +0100, Christoph Hellwig wrote:
> Hi Greg and Jiri,
>
> I've been working hard to get rid of the remaining callers the pass a
> NULL struct device to the DMA mapping functions and am almost done.
>
> The only non-trivial driver is the synclink driver, which has
On Mon, Feb 11, 2019 at 02:35:51PM +0100, Christoph Hellwig wrote:
> All users of dma_declare_coherent want their allocations to be
> exclusive, so default to exclusive allocations.
>
> Signed-off-by: Christoph Hellwig
> ---
> Documentation/DMA-API.txt | 9 +--
>
On Mon, Feb 11, 2019 at 6:53 PM Nathan Chancellor
wrote:
>
> On Mon, Feb 11, 2019 at 06:07:51PM +0100, Sedat Dilek wrote:
> > From: Sedat Dilek
> >
> > commit 1917d42d14b7 ("fcoe: use enum for fip_mode") introduces a separate
> > enum for the fip_mode that shall be used during initialisation
On 12/02/2019 0.57, Tony Lindgren wrote:
> I noticed that we can get a -EREMOTEIO errors on at least omap4 duovero:
>
> twl6040 0-004b: Failed to write 2d = 19: -121
>
> And then any following register access will produce errors.
>
> There 2d offset above is register ACCCTL that gets written
On Mon, Feb 11, 2019 at 02:35:48PM +0100, Christoph Hellwig wrote:
> This API is primarily used through DT entries, but two architectures
> and two drivers call it directly. So instead of selecting the config
> symbol for random architectures pull it in implicitly for the actual
> users. Also
On Mon, Feb 11, 2019 at 02:35:44PM +0100, Christoph Hellwig wrote:
> No need to carry an unused field around.
>
> Signed-off-by: Christoph Hellwig
> ---
> include/linux/device.h | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Greg Kroah-Hartman
On Tue, Feb 12, 2019 at 10:36:23AM +0800, Hean-Loong, Ong via dri-devel wrote:
> From: Ong, Hean Loong
>
> Driver for Intel FPGA Video and Image Processing Suite Frame Buffer II.
> The driver only supports the Intel Arria10 devkit and its variants.
> This driver can be either loaded staticlly or
On Thu, Feb 07, 2019 at 11:29:14PM +, Paul Burton wrote:
> Would you like this to go through the MIPS tree or elsewhere? If the
> latter:
>
> Acked-by: Paul Burton
Please pick it up through the mips tree!
On Mon 11-02-19 09:56:53, Matthew Wilcox wrote:
> On Mon, Feb 11, 2019 at 06:48:46PM +0100, Jan Kara wrote:
> > On Mon 11-02-19 13:59:24, Linux Upstream wrote:
> > > >
> > > >> Signed-off-by: Chintan Pandya
> > > >
> > > > NAK.
> > > >
> > > > This is bound to regress some stuff. Now agreed
Texas Instruments' K3 generation SoCs has an IP Interrupt Aggregator
which is an interrupt controller that does the following:
- Converts events to interrupts that can be understood by
an interrupt router.
- Allows for multiplexing of events to interrupts.
Configuration of the interrupt
Add the DT binding documentation for Interrupt Aggregator driver.
Signed-off-by: Lokesh Vutla
---
Changes sine v4:
- None
.../interrupt-controller/ti,sci-inta.txt | 74 +++
MAINTAINERS | 1 +
2 files changed, 75 insertions(+)
create mode
Texas Instruments' K3 generation SoCs has an IP Interrupt Router
that does allows for redirection of input interrupts to host
interrupt controller. Interrupt Router inputs are either from a
peripheral or from an Interrupt Aggregator which is another
interrupt controller.
Configuration of the
Select all the TISCI dependent interrupt controller drivers
for AM6 SoC.
Suggested-by: Marc Zyngier
Signed-off-by: Lokesh Vutla
---
Changes since v4:
- None
drivers/soc/ti/Kconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/soc/ti/Kconfig b/drivers/soc/ti/Kconfig
index
Add the DT binding documentation for Interrupt router driver.
Signed-off-by: Lokesh Vutla
---
Changes since v4:
- None
.../interrupt-controller/ti,sci-intr.txt | 85 +++
MAINTAINERS | 1 +
2 files changed, 86 insertions(+)
create mode
With the system coprocessor managing the range allocation of the
inputs to Interrupt Aggregator, it is difficult to represent
the device IRQs from DT.
The suggestion is to use MSI in such cases where devices wants
to allocate and group interrupts dynamically.
Create a MSI domain bus layer that
TISCI abstracts the handling of IRQ routes where interrupt sources
are not directly connected to host interrupt controller. Add support
for the set of TISCI commands for requesting and releasing IRQs.
Signed-off-by: Lokesh Vutla
---
Changes since v4:
- Updated to the latest sysfw APIs where
TI AM65x SoC based on K3 architecture introduced support for Events
which are message based interrupts with minimal latency. These events
are not compatible with regular interrupts and are valid only through
an event transport lane. An Interrupt Aggregator(INTA) is introduced
to convert these
TISCI provides support for getting the resources(IRQ, RING etc..)
assigned to a specific device. These resources can be handled by
the client and in turn sends TISCI cmd to configure the resources.
It is very important that client should keep track on usage of these
resources.
Add support for
From: Peter Ujfalusi
Add the resource mapping table for AM654 SoC as defined
in http://downloads.ti.com/tisci/esd/latest/5_soc_doc/am6x/resasg_types.html
Introduce a new compatible for AM654 "ti,am654-sci" for using
this resource map table.
Reviewed-by: Rob Herring
Signed-off-by: Peter
From: Grygorii Strashko
TISCI has been updated to have support for Resource management(likes
interrupts etc..). And there can be multiple device instances of a
resource type in a SoC. So every driver corresponding to a resource type
should get a TISCI handle so that it can make TISCI calls. And
On Mon, 11 Feb 2019 at 19:40, Gustavo A. R. Silva
wrote:
>
> In preparation to enabling -Wimplicit-fallthrough, mark switch
> cases where we are expecting to fall through.
>
> This patch fixes the following warnings:
>
> drivers/clk/samsung/clk-s3c2443.c: In function ‘s3c2443_common_clk_init’:
>
The XArray is, in a way, a replacement data structure for linked lists,
as such, on first use developers may wonder if it is safe to remove
items while iterating over the array.
For example, this is fine:
DEFINE_XARRAY(things);
void cleanup()
{
struct
Hi,
On 11-02-19 20:01, egran...@chromium.org wrote:
From: Enrico Granata
ACPI 5 added support for GpioInt resources as a way to provide
information about interrupts mediated via a GPIO controller.
Several device buses (e.g. SPI, I2C) have support for retrieving
an IRQ specified via this type
On Mon, Feb 11, 2019 at 01:17:49PM -0800, Florian Fainelli wrote:
> There is no code that tries to get the attribute
> SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS, remove support for doing that.
>
> Signed-off-by: Florian Fainelli
> ---
> drivers/staging/fsl-dpaa2/ethsw/ethsw.c | 5 -
> 1 file
On Mon, Feb 11, 2019 at 02:43:48PM -0600, Alan Tull wrote:
> On Mon, Feb 11, 2019 at 1:13 PM Greg Kroah-Hartman
> wrote:
> >
> > On Mon, Feb 11, 2019 at 12:41:40PM -0600, Alan Tull wrote:
> > > On Fri, Nov 9, 2018 at 12:58 AM Frank Rowand
> > > wrote:
> > >
> > > What LTSI's are these patches
Instead of setting up a kernel pointer to track the current PIO address,
track the offset in the current page, and do an atomic kmap for the page
while doing the actual PIO operations.
Signed-off-by: Christoph Hellwig
---
drivers/mmc/host/mvsdio.c | 33 +
1 file
If we want to get rid of the block layer bounce buffering for highmem we
need to ensure no segment spans multiple pages so that we can kmap it.
Add a flag to struct mmc_host so that we can handle the block and DMA
layer interactions in common code.
Signed-off-by: Christoph Hellwig
---
Instead of setting up a kernel pointer to track the current PIO address,
track the offset in the current page, and do an atomic kmap for the page
while doing the actual PIO operations.
Signed-off-by: Christoph Hellwig
---
drivers/mmc/host/s3cmci.c | 107 +++---
Use the proper sg_next() helper to move to the next scatterlist element
to support chained scatterlists.
Signed-off-by: Christoph Hellwig
---
drivers/mmc/host/omap.c | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/host/omap.c
Instead of setting up a kernel pointer to track the current PIO address,
track the offset in the current page, and do an atomic kmap for the page
while doing the actual PIO operations.
Signed-off-by: Christoph Hellwig
---
drivers/mmc/host/sh_mmcif.c | 59 +++--
1
All MMC and SD host drivers are highmem safe now, and bounce buffering
for addressing limitations is handled in the DMA layer now.
Signed-off-by: Christoph Hellwig
---
drivers/mmc/core/queue.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/mmc/core/queue.c
Instead of setting up a kernel pointer to track the current PIO address,
track the offset in the current page, and do an atomic kmap for the page
while doing the actual PIO operations.
Signed-off-by: Christoph Hellwig
---
drivers/mmc/host/omap.c | 15 ++-
1 file changed, 10
Hi everyone,
this series converts the remaining MMC host drivers to properly kmap the
scatterlist entries it does PIO operations on, and then goes on to
remove the usage of block layer bounce buffering (which I plan to remove
eventually) from the MMC layer.
As a bonus I've converted various
Instead of setting up a kernel pointer to track the current PIO address,
track the offset in the current page, and do an atomic kmap for the page
while doing the actual PIO operations.
Signed-off-by: Christoph Hellwig
---
drivers/mmc/host/davinci_mmc.c | 22 +-
1 file
These days the DMA mapping code must bounce buffer for any not supported
address, and if they driver needs to optimize for natively supported
ranged it should use dma_get_required_mask.
Signed-off-by: Christoph Hellwig
---
arch/arm/include/asm/dma-mapping.h | 7 ---
Use the proper sg_next() helper to move to the next scatterlist element
to support chained scatterlists.
Signed-off-by: Christoph Hellwig
---
drivers/mmc/host/sh_mmcif.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/host/sh_mmcif.c
Instead of setting up a kernel pointer to track the current PIO address,
track the offset in the current page, and do a kmap for the page while
doing the actual PIO operations.
Signed-off-by: Christoph Hellwig
---
drivers/mmc/host/moxart-mmc.c | 20
1 file changed, 12
Use the proper sg_next() helper to move to the next scatterlist element
to support chained scatterlists.
Signed-off-by: Christoph Hellwig
---
drivers/mmc/host/s3cmci.c | 19 +--
drivers/mmc/host/s3cmci.h | 2 +-
2 files changed, 10 insertions(+), 11 deletions(-)
diff --git
This avoids bug prone open coding of the sg offset handling and
also helps to document the limitations of mapping scatterlist
entries.
Signed-off-by: Christoph Hellwig
---
include/linux/scatterlist.h | 26 ++
1 file changed, 26 insertions(+)
diff --git
Signed-off-by: Christoph Hellwig
---
include/linux/mmc/host.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 4d35ff36ceff..4eadf01b4a93 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -397,7 +397,6 @@ struct
On Tue, 12 Feb 2019 at 04:45, Masahiro Yamada
wrote:
>
> It took me a while to understand what is going on in the nested
> if-blocks.
>
> Simplify it by removing unneeded code.
>
> - if_changed automatically adds 'set -e', so any failure in the
> series of commands makes it immediately fail
On 12/02/2019 04:39, Matthew Wilcox wrote:
On Tue, Feb 12, 2019 at 01:27:38AM +0200, Igor Stoppa wrote:
+#ifndef CONFIG_PRMEM
[...]
+#else
+
+#include
It's a mistake to do conditional includes like this. That way you see
include loops with some configs and not others. Our headers are
Use the runtime-detected denali->nbanks instead of hard-coded
DENALI_NR_BANKS (=4).
The actual number of banks depends on the IP configuration, and
can be less than DENALI_NR_BANKS. It is pointless to touch
registers of unsupported banks.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
The Denali IP adopts the syndrome page layout (payload and ECC are
interleaved). The *_page_raw() and *_oob() callbacks are complicated
because they must hide the underlying layout used by the hardware,
and always return contiguous in-band and out-of-band data.
Currently, similar code is
Use 'bool' type for the following boolean parameters.
- write (write or read?)
- raw (raw access or not?)
- dma_avail (DMA engine available or not?)
Signed-off-by: Masahiro Yamada
---
Changes in v2:
- Use bool for dma_avail as well
drivers/mtd/nand/raw/denali.c | 27
Since (u32 *) can accept an opaque pointer, the explicit casting
from (void *) to (u32 *) is redundant. Change the function argument type
to remove the casts.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mtd/nand/raw/denali.c | 12 +---
1 file changed, 5
As Documentation/process/coding-style.rst says, choose label names
which say what the goto does. The out_ label style is already
used in denali_dt.c. Rename likewise for denali_pci.c
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mtd/nand/raw/denali_pci.c | 8
1 file
Implement ->exec_op(), and remove the deprecated hooks.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mtd/nand/raw/denali.c | 234 +++---
1 file changed, 126 insertions(+), 108 deletions(-)
diff --git a/drivers/mtd/nand/raw/denali.c
Eliminate the following reports from 'scripts/checkpatch.pl --strict'.
CHECK: Prefer kernel type 'u8' over 'uint8_t'
CHECK: Prefer kernel type 'u32' over 'uint32_t'
CHECK: Alignment should match open parenthesis
I slightly changed denali_check_erased_page() to make it shorter.
With the recent refactoring, the NAND driver hooks now take a pointer
to nand_chip. Add to_denali() in order to convert (struct nand_chip *)
to (struct denali_nand_info *) directly. It is more useful than the
current mtd_to_denali().
I changed some helper functions to take (struct nand_chip *).
I took time for the Denali driver to catch up with the latest framework.
- switch over to exec_op() and remove legacy hooks
- separate controller/chips
- various cleanups
Masahiro Yamada (10):
mtd: rawnand: denali: use nand_chip pointer more for internal
functions
mtd: rawnand:
Currently, wait_for_completion_timeout() is always passed in the
hard-coded msec_to_jiffies(1000). There is no specific reason for
1000 msec, but it was chosen to be long enough.
With the exec_op() conversion, NAND_OP_WAITRDY_INSTR provides more
precise timeout value, depending on the preceding
Currently, this driver sticks to the legacy NAND model because it was
upstreamed before commit 2d472aba15ff ("mtd: nand: document the NAND
controller/NAND chip DT representation"). However, relying on the
dummy_controller is already deprecated.
Switch over to the new controller/chip
On Fri, Jan 18, 2019 at 03:03:08PM +0100, Johan Hovold wrote:
> Use the new for_each_of_cpu_node() helper to iterate over cpu nodes
> instead of open coding. Note that this will allow matching also on the
> node name instead of the (for FDT) deprecated device_type property.
>
> Signed-off-by:
From: QianWenfa
the two phase handsake make the client could initiate the transfer
immediately without the server side send any dummy message first.
Signed-off-by: Wenfa Qian
Signed-off-by: Xiang Xiao
---
drivers/rpmsg/virtio_rpmsg_bus.c | 25 -
1 file changed, 20
On Fri, Jan 18, 2019 at 03:03:07PM +0100, Johan Hovold wrote:
> Follow the Linux convention and treat devicetree nodes without a status
> property as enabled rather than disabled, while also allowing "ok" as a
> shorthand for "okay".
>
> Signed-off-by: Johan Hovold
Looks good:
Reviewed-by:
On Fri, Jan 18, 2019 at 03:03:06PM +0100, Johan Hovold wrote:
> The riscv_of_processor_hartid() helper returns -ENODEV when the
> specified node isn't an enabled and valid RISC-V hart node.
>
> Also drop the unnecessary parenthesis around errno defines.
>
> Signed-off-by: Johan Hovold
Looks
Le 12/02/2019 à 00:17, Srinivas Pandruvada a écrit :
> [...]
> To know if the intel_pstate in control, you can look at:
> #cat /sys/devices/system/cpu/cpufreq/policy0/scaling_driver
>
> So if it is not loaded and Intel intend to support a processor model
> with intel_pstate, then OEM's
On Sat, Jan 19, 2019 at 11:26:21AM +0530, Anup Patel wrote:
> This patch does following optimizations:
> 1. Pre-compute hart base for each context handler
> 2. Pre-compute enable base for each context handler
> 3. Have enable lock for each context handler instead
> of global plic_toggle_lock
>
>
On Fri, Jan 18, 2019 at 03:03:04PM +0100, Johan Hovold wrote:
> Add missing newline characters to printk messages.
>
> Also replace two pr_warning with the shorter pr_warn, and fix up the
> tense of one error message while at it.
>
> Signed-off-by: Johan Hovold
Looks good,
Reviewed-by:
On Fri, Jan 18, 2019 at 03:03:05PM +0100, Johan Hovold wrote:
> Use the pr_info and pr_err macros instead of printk with explicit log
> levels.
>
> Signed-off-by: Johan Hovold
Looks good,
Reviewed-by: Christoph Hellwig
On 12/02/2019 03:26, Kees Cook wrote:
On Mon, Feb 11, 2019 at 5:08 PM igor.sto...@gmail.com
wrote:
On Tue, 12 Feb 2019, 4.47 Kees Cook
On Mon, Feb 11, 2019 at 4:37 PM Igor Stoppa wrote:
On 12/02/2019 02:09, Kees Cook wrote:
On Mon, Feb 11, 2019 at 3:28 PM Igor Stoppa wrote:
It
Looks fine,
Reviewed-by: Christoph Hellwig
gfp_flags is always set high_order_gfp_flags even if allocations of
order 0 are made.But for smaller allocations, the system should be able
to reclaim some memory.
Signed-off-by: Jing Xia
Reviewed-by: Yuming Han
Reviewed-by: Zhaoyang Huang
Reviewed-by: Orson Zhai
---
On Sat, Jan 19, 2019 at 11:26:22AM +0530, Anup Patel wrote:
> The plic_toggle() uses raw_spin_lock() and plic_irq_toggle has a
> for loop so both these functions are not suitable for being inline
> hence this patch removes the inline keyword.
I still very much disagree. Very strongly with the
The init code path has several exceptions where the module can decide not to
load.
As CONFIG_X86_INTEL_PSTATE is generally set to Y, the return code is not
reachable.
The initialization code is neither verbose of the reason why it did choose to
prematurely exit.
This situation leads to a
On Sat, Jan 19, 2019 at 01:28:59PM +, Anup Patel wrote:
> This patch implements keepinitrd kernel parameter. By default,
> keepinitrd=1 but users can pass "keepinitrd=0" to free-up
> initrd memory at boot-time in free_initrd_mem() function.
>
> The keepinitrd kernel parameter is already
The cpufreq core doesn't remove the cpufreq policy anymore on CPU
offline operation, rather that happens when the CPU device gets
unregistered from the kernel. This allows faster recovery when the CPU
comes back online. This is also very useful during system wide
suspend/resume where we offline
Implement the light-weight tear down and bring up helpers to reduce the
amount of work to do on CPU offline/online operation.
Signed-off-by: Viresh Kumar
---
drivers/cpufreq/cpufreq-dt.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/cpufreq/cpufreq-dt.c
Looks good,
Reviewed-by: Christoph Hellwig
The cpufreq core doesn't remove the cpufreq policy anymore on CPU
offline operation, rather that happens when the CPU device gets
unregistered from the kernel. This allows faster recovery when the CPU
comes back online. This is also very useful during system wide
suspend/resume where we offline
On Sat, Jan 19, 2019 at 01:28:07PM +, Anup Patel wrote:
> We should setup init_mm before doing parse_early_param()
> in setup_arch() to be consistent with setup_arch() of
> other architectures such as x86, ARM, and ARM64.
Please use up all 72 lines in all your commit logs..
Otherwise looks
On 12/02/2019 09:44, Daniel Jordan wrote:
> Beginning with bc3e53f682d9 ("mm: distinguish between mlocked and pinned
> pages"), locked and pinned pages are accounted separately. The SPAPR
> TCE VFIO IOMMU driver accounts pinned pages to locked_vm; use pinned_vm
> instead.
>
> pinned_vm
Hi all,
Changes since 20190211:
The tegra tree gained a conflict against the imx-mxs tree.
The net-next tree gained a conflict against the net tree.
The drm-misc tree lost its build failure.
The rtc tree lost its build failure.
The xarray tree gained a build failure for which I added a merge
This patch set adds support for max77620 backup battery charging and
low battery monitoring.
Changes in v3:
- Add unit suffix to backup battery charging dts properties
- Reduce/optimize the low battery monitoring dts properties
Changes in v2:
- Add devicetree binding documentation
Mark Zhang
Adding documentation for 3 new backup battery charging dts
properties:
- maxim,charging-current-microamp
- maxim,charging-voltage-microvolt
- maxim,output-resister-ohms
Signed-off-by: Mark Zhang
---
.../devicetree/bindings/mfd/max77620.txt | 20 +++
1 file changed, 20
Adding documentation for low battery monitor properties:
- maxim,low-battery-dac-enable
- maxim,low-battery-mode
Signed-off-by: Mark Zhang
---
Documentation/devicetree/bindings/mfd/max77620.txt | 14 ++
1 file changed, 14 insertions(+)
diff --git
This patch adds PMIC configurations for low-battery
monitoring by handling max77620 register CNFGGLBL1.
Signed-off-by: Laxman Dewangan
Signed-off-by: Venkat Reddy Talla
Signed-off-by: Mark Zhang
---
drivers/mfd/max77620.c | 35 ++-
1 file changed, 34
Add PMIC configurations for backup battery charger, which
is a constant voltage and constant current style charger
with a series output resistance.
The max77620 register CNFGBBC(addr: 0x04) defines the
parameters of backup battery charger. This patch adds
support for it.
Signed-off-by: Laxman
On Mon, Feb 11, 2019 at 08:08:13AM -0600, Josh Poimboeuf wrote:
> On Sat, Feb 09, 2019 at 02:47:28PM +0530, Kamalesh Babulal wrote:
> > After removal of the immediate flag by commit d0807da78e11
> > ("livepatch: Remove immediate feature"), reliable stack trace became
> > enforcing dependency for
Daniel Jordan writes:
> On Mon, Feb 11, 2019 at 04:38:46PM +0800, Huang, Ying wrote:
>> +struct swap_info_struct *get_swap_device(swp_entry_t entry)
>> +{
>> +struct swap_info_struct *si;
>> +unsigned long type, offset;
>> +
>> +if (!entry.val)
>> +goto out;
>
>> +
On Tue 12-02-19 04:44:30, Jiri Kosina wrote:
> On Fri, 1 Feb 2019, Vlastimil Babka wrote:
>
> > >> After "mm/mincore: make mincore() more conservative" we sometimes
> > >> restrict the
> > >> information about page cache residency, which we have to do without
> > >> breaking
> > >> existing
On Mon, 11 Feb 2019 at 20:35, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.9.156 release.
> There are 137 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
>
On Mon, 11 Feb 2019 at 20:25, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.14.99 release.
> There are 205 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
>
Martin Steigerwald writes:
> Well the file has in its header:
>
> /* Fast hashing routine for a long.
>(C) 2002 William Lee Irwin III, IBM */
>
> /*
> * Knuth recommends primes in approximately golden ratio to the maximum
> * integer representable by a machine word for multiplicative
Martin Steigerwald writes:
> Well the file has in its header:
>
> /* Fast hashing routine for a long.
>(C) 2002 William Lee Irwin III, IBM */
>
> /*
> * Knuth recommends primes in approximately golden ratio to the maximum
> * integer representable by a machine word for multiplicative
Martin Steigerwald writes:
> Well the file has in its header:
>
> /* Fast hashing routine for a long.
>(C) 2002 William Lee Irwin III, IBM */
>
> /*
> * Knuth recommends primes in approximately golden ratio to the maximum
> * integer representable by a machine word for multiplicative
On Mon, Feb 11, 2019 at 07:02:06PM -0600, Eric W. Biederman wrote:
> Greg Kroah-Hartman writes:
>
> > 4.20-stable review patch. If anyone has any objections, please let me
> > know.
>
> No objection. But I think of this as a feature addition rather than a
> fix for something. As a feature
This patch adds mipi tx driver support for mt8183.
Mipi_tx of mt8183 is very different to mt8173.
1.Separate mipi tx setting to mtk_mt8173_mipi_tx.c for mt8173
2.Separate mipi tx setting to mtk_mt8183_mipi_tx.c for mt8183
3.To reuse the common code, make the common functions in mtk_mipi_tx.c
Hi all,
Today's linux-next merge of the akpm tree got a conflict in:
net/xdp/xdp_umem.c
between commit:
e451eb510684 ("xsk: share the mmap_sem for page pinning")
from the bpf tree and patch:
"net/xdp/xdp_umem.c: do not use mmap_sem"
from the akpm tree.
I fixed it up (I dropped the
Hi Lukasz,
On 19. 2. 11. 오후 8:11, Lukasz Luba wrote:
> Hi Chanwoo,
>
> On 2/3/19 10:56 AM, Chanwoo Choi wrote:
>> Hi Lukasz,
>>
>> I recommend that please don't send the version up patchset before
>> finishing the discussion.
>>
>> 2019년 2월 2일 (토) 오전 2:47, Lukasz Luba 님이 작성:
>>>
>>> This patch
> -Original Message-
> From: Heikki Krogerus
> Sent: 2019年2月11日 18:46
> To: Jun Li
> Cc: Greg Kroah-Hartman ; Andy Shevchenko
> ; Chen Yu ; Hans de
> Goede ; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v2 6/9] usb: roles: Find the muxes by also
Actually, total amount of available minor number
for a single major is MINORMARK + 1. So expand
minor range when registering chrdev region.
Signed-off-by: Chengguang Xu
---
drivers/misc/mei/main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/misc/mei/main.c
On 11/02/19 6:30 PM, Marc Zyngier wrote:
> On 11/02/2019 12:25, Bartosz Golaszewski wrote:
>> +/*
>> + * Nobody knows why anymore, but this interrupt has been handled as
>> + * a level irq from the very beginning of davinci support in mainline
>> + * linux.
>> + */
>> +
Hi Lukasz,
On 19. 2. 12. 오전 12:30, Lukasz Luba wrote:
> This patch set changes workqueue related features in devfreq framework.
> First patch switches to delayed work instead of deferred.
> The second switches to regular system work and deletes custom 'devfreq'.
>
> Using deferred work in this
On Tue, Feb 12, 2019 at 4:48 AM Dave Young wrote:
>
> On 02/06/19 at 08:08pm, Dave Young wrote:
> > On 02/05/19 at 09:15am, Borislav Petkov wrote:
> > > On Mon, Feb 04, 2019 at 03:30:16PM -0700, Jerry Hoemann wrote:
> > > > Is your objection only to the second fallback of allocating
> > > >
Tetsuo Handa wrote:
> Andrew Morton wrote:
> > > --- a/fs/open.c
> > > +++ b/fs/open.c
> > > @@ -733,6 +733,12 @@ static int do_dentry_open(struct file *f,
> > > return 0;
> > > }
> > >
> > > + /* Any file opened for execve()/uselib() has to be a regular file. */
> > > + if
Hi all,
After merging the xarray tree, today's linux-next build (powerpc
ppc64_defconfig) failed like this:
In file included from include/linux/list.h:9,
from include/linux/module.h:9,
from drivers/infiniband/core/device.c:34:
drivers/infiniband/core/device.c:
On Mon, Feb 11, 2019 at 10:28:31AM +0100, David Hildenbrand wrote:
> On 10.02.19 01:38, Michael S. Tsirkin wrote:
> > On Fri, Feb 08, 2019 at 02:05:09PM -0800, Alexander Duyck wrote:
> >> On Fri, Feb 8, 2019 at 1:38 PM Michael S. Tsirkin wrote:
> >>>
> >>> On Fri, Feb 08, 2019 at 03:41:55PM
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