Re: [PATCH v3] RISC-V: Fix Maximum Physical Memory 2GiB option for 64bit systems
On Fri, Apr 05, 2019 at 05:49:34AM +, Anup Patel wrote: > The Maximum Physical Memory 2GiB option for 64bit systems is currently > broken because kernel hangs at boot-time when this option is enabled > and the underlying system has more than 2GiB memory. > > This issue can be easily reproduced on SiFive Unleashed board where > we have 8GiB of memory. > > This patch fixes above issue by removing unusable memory region in > setup_bootmem(). > > Signed-off-by: Anup Patel > Reviewed-by: Christoph Hellwig Btw, what is the rationale behind even offering the 2GiB option and the medlow model on 64-bit? Do we reall have use cases where the slightly more effient generated code matters so much to keep up the support burden of this mostly unused and unusual configuration?
[PATCH v3] RISC-V: Fix Maximum Physical Memory 2GiB option for 64bit systems
The Maximum Physical Memory 2GiB option for 64bit systems is currently broken because kernel hangs at boot-time when this option is enabled and the underlying system has more than 2GiB memory. This issue can be easily reproduced on SiFive Unleashed board where we have 8GiB of memory. This patch fixes above issue by removing unusable memory region in setup_bootmem(). Signed-off-by: Anup Patel Reviewed-by: Christoph Hellwig --- Changes since v2: - Drop brackets in if() condition added by this patch Changes since v1: - Use memblock_remove() instead of memblock_reserve() --- arch/riscv/mm/init.c | 8 1 file changed, 8 insertions(+) diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c index 5fd8c922e1c2..bc7b77e34d09 100644 --- a/arch/riscv/mm/init.c +++ b/arch/riscv/mm/init.c @@ -121,6 +121,14 @@ void __init setup_bootmem(void) */ memblock_reserve(reg->base, vmlinux_end - reg->base); mem_size = min(reg->size, (phys_addr_t)-PAGE_OFFSET); + + /* +* Remove memblock from the end of usable area to the +* end of region +*/ + if (reg->base + mem_size < end) + memblock_remove(reg->base + mem_size, + end - reg->base - mem_size); } } BUG_ON(mem_size == 0); -- 2.17.1
linux-next: Tree for Apr 5
Hi all, Changes since 20190404: The at91 tree gained a conflict against the at91-fixes tree. The btrfs-kdave tree gained a conflict against the btrfs-fixes tree. The drm-misc tree gained a build failure for which I disabled a driver. Non-merge commits (relative to Linus' tree): 4926 4791 files changed, 149266 insertions(+), 70366 deletions(-) I have created today's linux-next tree at git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git (patches at http://www.kernel.org/pub/linux/kernel/next/ ). If you are tracking the linux-next tree using git, you should not use "git pull" to do so as that will try to merge the new linux-next release with the old one. You should use "git fetch" and checkout or reset to the new master. You can see which trees have been included by looking in the Next/Trees file in the source. There are also quilt-import.log and merge.log files in the Next directory. Between each merge, the tree was built with a ppc64_defconfig for powerpc, an allmodconfig for x86_64, a multi_v7_defconfig for arm and a native build of tools/perf. After the final fixups (if any), I do an x86_64 modules_install followed by builds for x86_64 allnoconfig, powerpc allnoconfig (32 and 64 bit), ppc44x_defconfig, allyesconfig and pseries_le_defconfig and i386, sparc and sparc64 defconfig. And finally, a simple boot test of the powerpc pseries_le_defconfig kernel in qemu (with and without kvm enabled). Below is a summary of the state of the merge. I am currently merging 298 trees (counting Linus' and 69 trees of bug fix patches pending for the current merge release). Stats about the size of the tree over time can be seen at http://neuling.org/linux-next-size.html . Status of my local build tests will be at http://kisskb.ellerman.id.au/linux-next . If maintainers want to give advice about cross compilers/configs that work, we are always open to add more builds. Thanks to Randy Dunlap for doing many randconfig builds. And to Paul Gortmaker for triage and bug fixes. -- Cheers, Stephen Rothwell $ git checkout master $ git reset --hard stable Merging origin/master (145f47c7381d Merge tag '5.1-rc3-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6) Merging fixes/master (b352face4ca9 adfs: mark expected switch fall-throughs) Merging kspp-gustavo/for-next/kspp (2d212a1bac7e NFC: st21nfca: Fix fall-through warnings) Merging kbuild-current/fixes (79a3aaa7b82e Linux 5.1-rc3) Merging arc-current/for-curr (831e90bd606e ARC: PAE40: don't panic and instead turn off hw ioc) Merging arm-current/fixes (d410a8a49e3e ARM: 8849/1: NOMMU: Fix encodings for PMSAv8's PRBAR4/PRLAR4) Merging arm64-fixes/for-next/fixes (1c41860864c8 arm64: fix wrong check of on_sdei_stack in nmi context) Merging m68k-current/for-linus (28713169d879 m68k: Add -ffreestanding to CFLAGS) Merging powerpc-fixes/fixes (6f845ebec270 powerpc/pseries/mce: Fix misleading print for TLB mutlihit) Merging sparc/master (7d762d69145a afs: Fix manually set volume location server list) Merging fscrypt-current/for-stable (ae64f9bd1d36 Linux 4.15-rc2) Merging net/master (aecfde23108b tcp: Ensure DCTCP reacts to losses) Merging bpf/master (5eed7898626b flow_dissector: rst'ify documentation) Merging ipsec/master (8742dc86d0c7 xfrm4: Fix uninitialized memory read in _decode_session4) Merging netfilter/master (5f543a54eec0 net: hns3: fix for not calculating tx bd num correctly) Merging ipvs/master (b2e3d68d1251 netfilter: nft_compat: destroy function must not have side effects) Merging wireless-drivers/master (4837696f6b54 Merge tag 'iwlwifi-for-kalle-2019-03-22' of git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi-fixes) Merging mac80211/master (53bf5811ca37 cfg80211: add ratelimited variants of err and warn) Merging rdma-fixes/for-rc (1abe186ed8a6 IB/mlx5: Reset access mask when looping inside page fault handler) Merging sound-current/for-linus (8b030a57e35a ALSA: xen-front: Do not use stream buffer size before it is set) Merging sound-asoc-fixes/for-linus (27fa31a359b6 Merge branch 'asoc-5.1' into asoc-linus) Merging regmap-fixes/for-linus (34fd5ecd01f0 Merge branch 'regmap-5.1' into regmap-linus) Merging regulator-fixes/for-linus (29a825a05951 Merge branch 'regulator-5.1' into regulator-linus) Merging spi-fixes/for-linus (6ccd28875a50 Merge branch 'spi-5.1' into spi-linus) Merging pci-current/for-linus (0fa635aec9ab PCI/LINK: Deduplicate bandwidth reports for multi-function devices) Merging driver-core.current/driver-core-linus (79a3aaa7b82e Linux 5.1-rc3) Merging tty.current/tty-linus (79a3aaa7b82e Linux 5.1-rc3) Merging usb.current/usb-linus (79a3aaa7b82e Linux 5.1-rc3) Merging usb-gadget-fixes/fixes (072684e8c58d USB: gadget: f_hid: fix deadlock in f_hidg_write()) Merging usb-serial-fixes/usb-linus (79a3aaa7b82e Linux 5.1-rc3) Merging usb-chipidea-fixes/ci-for-usb-stable (d6d768a0ec3c usb: chipidea: fix st
Re: [PATCH 4.19 000/187] 4.19.34-stable review
stable-rc/linux-4.19.y boot: 120 boots: 13 failed, 90 passed with 16 offline, 1 untried/unknown (v4.19.33-187-g4b338ef616b3) Full Boot Summary: https://kernelci.org/boot/all/job/stable-rc/branch/linux-4.19.y/kernel/v4.19.33-187-g4b338ef616b3/ Full Build Summary: https://kernelci.org/build/stable-rc/branch/linux-4.19.y/kernel/v4.19.33-187-g4b338ef616b3/ Tree: stable-rc Branch: linux-4.19.y Git Describe: v4.19.33-187-g4b338ef616b3 Git Commit: 4b338ef616b3d99a0c49c952acec89b827db9c1b Git URL: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git Tested: 66 unique boards, 23 SoC families, 14 builds out of 206 Boot Regressions Detected: arm64: defconfig: gcc-7: meson-gxbb-nanopi-k2: lab-baylibre: failing since 1 day (last pass: v4.19.32-135-g01a3983fac4e - first fail: v4.19.32-323-g8822c8438169) meson-gxbb-odroidc2: lab-baylibre-seattle: failing since 1 day (last pass: v4.19.32-135-g01a3983fac4e - first fail: v4.19.32-323-g8822c8438169) meson-gxbb-p200: lab-baylibre-seattle: failing since 1 day (last pass: v4.19.32-135-g01a3983fac4e - first fail: v4.19.32-323-g8822c8438169) meson-gxl-s805x-p241: lab-baylibre: failing since 3 days (last pass: v4.19.32-135-g64b7b716f98c - first fail: v4.19.32-135-gd6e41cce5aee) meson-gxl-s905d-p230: lab-baylibre-seattle: failing since 1 day (last pass: v4.19.32-135-g01a3983fac4e - first fail: v4.19.32-323-g8822c8438169) meson-gxl-s905x-khadas-vim: lab-baylibre-seattle: failing since 1 day (last pass: v4.19.32-135-g01a3983fac4e - first fail: v4.19.32-323-g8822c8438169) meson-gxl-s905x-libretech-cc: lab-baylibre: failing since 1 day (last pass: v4.19.32-135-g01a3983fac4e - first fail: v4.19.32-323-g8822c8438169) lab-baylibre-seattle: failing since 1 day (last pass: v4.19.32-135-g01a3983fac4e - first fail: v4.19.32-323-g8822c8438169) meson-gxl-s905x-nexbox-a95x: lab-baylibre-seattle: failing since 1 day (last pass: v4.19.32-135-g01a3983fac4e - first fail: v4.19.32-323-g8822c8438169) meson-gxl-s905x-p212: lab-baylibre-seattle: failing since 1 day (last pass: v4.19.32-135-g01a3983fac4e - first fail: v4.19.32-323-g8822c8438169) meson-gxm-nexbox-a1: lab-baylibre-seattle: failing since 1 day (last pass: v4.19.32-135-g01a3983fac4e - first fail: v4.19.32-323-g8822c8438169) Boot Failures Detected: arm64: defconfig: gcc-7: meson-gxbb-nanopi-k2: 1 failed lab meson-gxbb-odroidc2: 1 failed lab meson-gxbb-p200: 1 failed lab meson-gxl-s805x-p241: 1 failed lab meson-gxl-s905d-p230: 1 failed lab meson-gxl-s905x-khadas-vim: 1 failed lab meson-gxl-s905x-libretech-cc: 1 failed lab meson-gxl-s905x-nexbox-a95x: 1 failed lab meson-gxl-s905x-p212: 1 failed lab meson-gxm-nexbox-a1: 1 failed lab Offline Platforms: arm: bcm2835_defconfig: gcc-7 bcm2835-rpi-b: 1 offline lab multi_v7_defconfig: gcc-7 alpine-db: 1 offline lab at91-sama5d4_xplained: 1 offline lab qcom-apq8064-cm-qs600: 1 offline lab qcom-apq8064-ifc6410: 1 offline lab socfpga_cyclone5_de0_sockit: 1 offline lab sun5i-r8-chip: 1 offline lab tegra124-jetson-tk1: 1 offline lab tegra_defconfig: gcc-7 tegra124-jetson-tk1: 1 offline lab sunxi_defconfig: gcc-7 sun5i-r8-chip: 1 offline lab sama5_defconfig: gcc-7 at91-sama5d4_xplained: 1 offline lab qcom_defconfig: gcc-7 qcom-apq8064-cm-qs600: 1 offline lab qcom-apq8064-ifc6410: 1 offline lab arm64: defconfig: gcc-7 apq8016-sbc: 1 offline lab juno-r2: 1 offline lab mt7622-rfb1: 1 offline lab --- For more info write to
Re: [PATCH v2] extcon: axp288: Add a depends on ACPI to the Kconfig entry
On 4/4/2019 7:47 PM, Yue Haibing wrote:
From: YueHaibing
As Hans de Goede pointed, using this driver without ACPI
makes little sense, so add ACPI dependency to Kconfig entry
to fix a build error while CONFIG_ACPI is not set.
drivers/extcon/extcon-axp288.c: In function 'axp288_extcon_probe':
drivers/extcon/extcon-axp288.c:363:20: error: dereferencing pointer to
incomplete type
put_device(>dev);
Fixes: 0cf064db948a ("extcon: axp288: Convert to use
acpi_dev_get_first_match_dev()")
Reported-by: Hulk Robot
Suggested-by: Hans de Goede
Signed-off-by: YueHaibing
This looks good too.
Reviewed-by: Mukesh Ojha
Cheers,
-Mukesh
---
v2: rework patch
---
drivers/extcon/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/extcon/Kconfig b/drivers/extcon/Kconfig
index 1ed4b45..de06faf 100644
--- a/drivers/extcon/Kconfig
+++ b/drivers/extcon/Kconfig
@@ -30,7 +30,7 @@ config EXTCON_ARIZONA
config EXTCON_AXP288
tristate "X-Power AXP288 EXTCON support"
- depends on MFD_AXP20X && USB_SUPPORT && X86
+ depends on MFD_AXP20X && USB_SUPPORT && X86 && ACPI
select USB_ROLE_SWITCH
help
Say Y here to enable support for USB peripheral detection
RE: [LINUX PATCH v2 3/3] spi: spi-mem: Add support for Zynq QSPI controller
Hi Vignesh,
Thanks for the review.
> -Original Message-
> From: Vignesh Raghavendra
> Sent: Friday, April 5, 2019 10:14 AM
> To: Naga Sureshkumar Relli ; broo...@kernel.org;
> bbrezil...@kernel.org
> Cc: linux-...@vger.kernel.org; dw...@infradead.org; marek.va...@gmail.com;
> rich...@nod.at; linux-...@lists.infradead.org; linux-kernel@vger.kernel.org;
> Michal Simek
> ; nagasures...@gmail.com
> Subject: Re: [LINUX PATCH v2 3/3] spi: spi-mem: Add support for Zynq QSPI
> controller
>
>
>
> On 01/04/19 1:29 PM, Naga Sureshkumar Relli wrote:
> > +/**
> > + * zynq_qspi_config_op - Configure QSPI controller for specified transfer
> > + * @xqspi: Pointer to the zynq_qspi structure
> > + * @qspi: Pointer to the spi_device structure
> > + *
> > + * Sets the operational mode of QSPI controller for the next QSPI
> > +transfer and
> > + * sets the requested clock frequency.
> > + *
> > + * Return: 0 on success and -EINVAL on invalid input parameter
> > + *
> > + * Note: If the requested frequency is not an exact match with what
> > +can be
> > + * obtained using the prescalar value, the driver sets the clock
> > +frequency which
> > + * is lower than the requested frequency (maximum lower) for the
> > +transfer. If
> > + * the requested frequency is higher or lower than that is supported
> > +by the QSPI
> > + * controller the driver will set the highest or lowest frequency
> > +supported by
> > + * controller.
> > + */
> > +static int zynq_qspi_config_op(struct zynq_qspi *xqspi, struct
> > +spi_device *spi) {
> > + u32 config_reg, baud_rate_val = 0;
> > +
> > + /*
> > +* Set the clock frequency
> > +* The baud rate divisor is not a direct mapping to the value written
> > +* into the configuration register (config_reg[5:3])
> > +* i.e. 000 - divide by 2
> > +* 001 - divide by 4
> > +*
> > +* 111 - divide by 256
> > +*/
> > + while ((baud_rate_val < ZYNQ_QSPI_BAUD_DIV_MAX) &&
> > + (clk_get_rate(xqspi->refclk) / (2 << baud_rate_val)) >
> > + spi->max_speed_hz)
> > + baud_rate_val++;
> > +
>
> Instead use DIV_ROUND_UP, something like below should work(untested):
>
> unsigned long refclk_rate = clk_get_rate(xqspi->refclk);
> u32 baud_rate_val = DIV_ROUND_UP(refclk_rate, spi->max_speed_hz) - 1;
>
This is not just direct calculation.
i.e. for example
refclk_rate = 200MHz and max_speed_hx = 100MHz.
then DIV_ROUND_UP gives a value of 2.
But writing a value of 2 to config registers means, divide by 8. But we should
write divide by 2 (value of zero).
That’s why we implemented the above calculation.
000: divide by 2.
001: divide by 4
010: divide by 8
011: divide by 16
100: divide by 32
101: divide by 64
110: divide by 128
111: divide by 256
Thanks,
Naga Sureshkumar Relli
> if (baud_rate_val > ZYNQ_QSPI_BAUD_DIV_MAX)
> baud_rate_val = ZYNQ_QSPI_BAUD_DIV_MAX;
>
> > + config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET);
> > +
> > + /* Set the QSPI clock phase and clock polarity */
> > + config_reg &= (~ZYNQ_QSPI_CONFIG_CPHA_MASK) &
> > + (~ZYNQ_QSPI_CONFIG_CPOL_MASK);
> > + if (spi->mode & SPI_CPHA)
> > + config_reg |= ZYNQ_QSPI_CONFIG_CPHA_MASK;
> > + if (spi->mode & SPI_CPOL)
> > + config_reg |= ZYNQ_QSPI_CONFIG_CPOL_MASK;
> > +
> > + config_reg &= ~ZYNQ_QSPI_CONFIG_BDRATE_MASK;
> > + config_reg |= (baud_rate_val << ZYNQ_QSPI_BAUD_DIV_SHIFT);
> > + zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg);
> > +
> > + return 0;
> > +}
> > +
>
> --
> Regards
> Vignesh
Re: [PATCH 5.0 072/246] drm/amd/display: Fix reference counting for struct dc_sink.
Greg, as I mentioned in the commit message, I saw more fixes to that area in Alex Deuchers queue when I fed that to Alex. There is one fix that I can think of that interacts with my fixes. Means, we may get unwanted side effects of my patch without the fix mentioned below. With that below patch also selected, I think we should be ok for stable. Alex, AMD people, your opinion? The one that I can spot not already in linux-5.0.y is: commit 3f01f098a4e2ef30ef628497c43a3d568e720376 Author: Jerry (Fangzhi) Zuo Date: Thu Jan 24 11:46:49 2019 -0500 drm/amd/display: Clear dc_sink after it gets released [Why] The dc_sink was released but the pointer on the aconnector was not cleared. [How] Clear it. best Mathias On Thursday, 4 April 2019 10:46:12 CEST Greg Kroah-Hartman wrote: > 5.0-stable review patch. If anyone has any objections, please let me know. > > -- > > [ Upstream commit dcd5fb82ffb484124203aa339733663ac0b059f3 ] > > Reference counting in amdgpu_dm_connector for amdgpu_dm_connector::dc_sink > and amdgpu_dm_connector::dc_em_sink as well as in dc_link::local_sink seems > to be out of shape. Thus make reference counting consistent for these > members and just plain increment the reference count when the variable > gets assigned and decrement when the pointer is set to zero or replaced. > Also simplify reference counting in selected function sopes to be sure the > reference is released in any case. In some cases add NULL pointer check > before dereferencing. > At a hand full of places a comment is placed to stat that the reference > increment happened already somewhere else. > > This actually fixes the following kernel bug on my system when enabling > display core in amdgpu. There are some more similar bug reports around, > so it probably helps at more places. > >kernel BUG at mm/slub.c:294! >invalid opcode: [#1] SMP PTI >CPU: 9 PID: 1180 Comm: Xorg Not tainted 5.0.0-rc1+ #2 >Hardware name: Supermicro X10DAi/X10DAI, BIOS 3.0a 02/05/2018 >RIP: 0010:__slab_free+0x1e2/0x3d0 >Code: 8b 54 24 30 48 89 4c 24 28 e8 da fb ff ff 4c 8b 54 24 28 85 c0 0f 85 > 67 fe ff ff 48 8d 65 d8 5b 41 5c 41 5d 41 5e 41 5f 5d c3 <0f> 0b 49 3b 5c 24 > 28 75 ab 48 8b 44 24 30 49 89 4c 24 28 49 89 44 >RSP: 0018:b0978589fa90 EFLAGS: 00010246 >RAX: 92f12806c400 RBX: 80200019 RCX: 92f12806c400 >RDX: 92f12806c400 RSI: dd6421a01a00 RDI: 92ed2f406e80 >RBP: b0978589fb40 R08: 0001 R09: c0ee4748 >R10: 92f12806c400 R11: 0001 R12: dd6421a01a00 >R13: 92f12806c400 R14: 92ed2f406e80 R15: dd6421a01a20 >FS: 7f4170be0ac0() GS:92ed2fb4() > knlGS: >CS: 0010 DS: ES: CR0: 80050033 >CR2: 562818aaa000 CR3: 00045745a002 CR4: 003606e0 >DR0: DR1: DR2: >DR3: DR6: fffe0ff0 DR7: 0400 >Call Trace: > ? drm_dbg+0x87/0x90 [drm] > dc_stream_release+0x28/0x50 [amdgpu] > amdgpu_dm_connector_mode_valid+0xb4/0x1f0 [amdgpu] > drm_helper_probe_single_connector_modes+0x492/0x6b0 [drm_kms_helper] > drm_mode_getconnector+0x457/0x490 [drm] > ? drm_connector_property_set_ioctl+0x60/0x60 [drm] > drm_ioctl_kernel+0xa9/0xf0 [drm] > drm_ioctl+0x201/0x3a0 [drm] > ? drm_connector_property_set_ioctl+0x60/0x60 [drm] > amdgpu_drm_ioctl+0x49/0x80 [amdgpu] > do_vfs_ioctl+0xa4/0x630 > ? __sys_recvmsg+0x83/0xa0 > ksys_ioctl+0x60/0x90 > __x64_sys_ioctl+0x16/0x20 > do_syscall_64+0x5b/0x160 > entry_SYSCALL_64_after_hwframe+0x44/0xa9 >RIP: 0033:0x7f417110809b >Code: 0f 1e fa 48 8b 05 ed bd 0c 00 64 c7 00 26 00 00 00 48 c7 c0 ff ff ff > ff c3 66 0f 1f 44 00 00 f3 0f 1e fa b8 10 00 00 00 0f 05 <48> 3d 01 f0 ff ff > 73 01 c3 48 8b 0d bd bd 0c 00 f7 d8 64 89 01 48 >RSP: 002b:7ffdd8d1c268 EFLAGS: 0246 ORIG_RAX: 0010 >RAX: ffda RBX: 562818a8ebc0 RCX: 7f417110809b >RDX: 7ffdd8d1c2a0 RSI: c05064a7 RDI: 0012 >RBP: 7ffdd8d1c2a0 R08: 562819012280 R09: 0007 >R10: R11: 0246 R12: c05064a7 >R13: 0012 R14: 0012 R15: 7ffdd8d1c2a0 >Modules linked in: nfsv4 dns_resolver nfs lockd grace fscache fuse vfat > fat amdgpu intel_rapl sb_edac x86_pkg_temp_thermal intel_powerclamp coretemp > kvm_intel kvm irqbypass crct10dif_pclmul chash gpu_sched crc32_pclmul > snd_hda_codec_realtek ghash_clmulni_intel amd_iommu_v2 iTCO_wdt > iTCO_vendor_support ttm snd_hda_codec_generic snd_hda_codec_hdmi > ledtrig_audio snd_hda_intel drm_kms_helper snd_hda_codec intel_cstate > snd_hda_core drm snd_hwdep snd_seq snd_seq_device intel_uncore snd_pcm > intel_rapl_perf snd_timer snd soundcore ioatdma
Re: [PATCH] staging: rtl8192u: ieee80211: add space around '==' and before '('
On Fri, Apr 05, 2019 at 10:31:17AM +0800, YueHaibing wrote:
> On 2019/4/5 9:56, Caio Salvador Rohwedder wrote:
> > if(!list_empty(pUnusedList)) {
> > (*ppTS) = list_entry(pUnusedList->next, struct
> > ts_common_info, list);
> > list_del_init(&(*ppTS)->list);
> > - if(TxRxSelect==TX_DIR) {
> > + if (TxRxSelect == TX_DIR) {
> > struct tx_ts_record *tmp =
> > container_of(*ppTS, struct tx_ts_record, ts_common_info);
>
> This line seems over 80 characters, may also be fixed.
>
The 80 character problem isn't really related to the "space required"
problem. Those would need to be fixed in separate patches.
> In fact, this file has so many code style issues, see
>
> ./scripts/checkpatch.pl --no-tree -f
> drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c
>
Yes. Of course it has millions of style issues. It's staging code.
Leave it. We'll fix it little by little.
That said, I kind of would prefer to review patches which fix all the
"space[s] required" checkpatch warnings in a file in one go...
regards,
dan carpenter
Re: [PATCH v3] Staging: rtlwifi: Cleanup crc16_ccitt()
Thanks! Reviewed-by: Dan Carpenter regards, dan carpenter
[PATCH] overflow.h: Rename __ab_c_size() to __calc_size()
From: Borislav Petkov
... to make its name readable to humans so that it can denote what that
helper does.
No functional changes.
Signed-off-by: Borislav Petkov
Cc: Kees Cook
Cc: Matthew Wilcox
---
include/linux/overflow.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/linux/overflow.h b/include/linux/overflow.h
index 40b48e2133cb..a9cb77d54df0 100644
--- a/include/linux/overflow.h
+++ b/include/linux/overflow.h
@@ -278,7 +278,7 @@ static inline __must_check size_t array3_size(size_t a,
size_t b, size_t c)
return bytes;
}
-static inline __must_check size_t __ab_c_size(size_t n, size_t size, size_t c)
+static inline __must_check size_t __calc_size(size_t n, size_t size, size_t c)
{
size_t bytes;
@@ -302,7 +302,7 @@ static inline __must_check size_t __ab_c_size(size_t n,
size_t size, size_t c)
* Return: number of bytes needed or SIZE_MAX on overflow.
*/
#define struct_size(p, member, n) \
- __ab_c_size(n, \
+ __calc_size(n, \
sizeof(*(p)->member) + __must_be_array((p)->member),\
sizeof(*(p)))
--
2.21.0
Re: [PATCH 4.19 000/187] 4.19.34-stable review
On Thu, 4 Apr 2019 at 14:31, Greg Kroah-Hartman wrote: > > This is the start of the stable review cycle for the 4.19.34 release. > There are 187 patches in this series, all will be posted as a response > to this one. If anyone has any issues with these being applied, please > let me know. > > Responses should be made by Sat Apr 6 08:44:30 UTC 2019. > Anything received after that time might be too late. > > The whole patch series can be found in one patch at: > > https://www.kernel.org/pub/linux/kernel/v4.x/stable-review/patch-4.19.34-rc1.gz > or in the git tree and branch at: > > git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git > linux-4.19.y > and the diffstat can be found below. > > thanks, > > greg k-h > Results from Linaro’s test farm. No regressions on arm64, arm, x86_64, and i386. Summary kernel: 4.19.34-rc1 git repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git git branch: linux-4.19.y git commit: 4b338ef616b3d99a0c49c952acec89b827db9c1b git describe: v4.19.33-187-g4b338ef616b3 Test details: https://qa-reports.linaro.org/lkft/linux-stable-rc-4.19-oe/build/v4.19.33-187-g4b338ef616b3 No regressions (compared to build v4.19.32-323-g8822c8438169) No fixes (compared to build v4.19.32-323-g8822c8438169) Ran 23543 total tests in the following environments and test suites. Environments -- - dragonboard-410c - arm64 - hi6220-hikey - arm64 - i386 - juno-r2 - arm64 - qemu_arm - qemu_arm64 - qemu_i386 - qemu_x86_64 - x15 - arm - x86_64 Test Suites --- * boot * install-android-platform-tools-r2600 * kselftest * libhugetlbfs * ltp-cap_bounds-tests * ltp-commands-tests * ltp-containers-tests * ltp-cpuhotplug-tests * ltp-cve-tests * ltp-dio-tests * ltp-fcntl-locktests-tests * ltp-filecaps-tests * ltp-fs-tests * ltp-fs_bind-tests * ltp-fs_perms_simple-tests * ltp-fsx-tests * ltp-hugetlb-tests * ltp-io-tests * ltp-ipc-tests * ltp-math-tests * ltp-mm-tests * ltp-nptl-tests * ltp-pty-tests * ltp-sched-tests * ltp-securebits-tests * ltp-syscalls-tests * ltp-timers-tests * perf * spectre-meltdown-checker-test * v4l2-compliance * ltp-open-posix-tests * kselftest-vsyscall-mode-native * kselftest-vsyscall-mode-none -- Linaro LKFT https://lkft.linaro.org
Re: linux-next: build warning after merge of the scsi tree
On Thu, 2019-04-04 at 21:30 -0700, Bart Van Assche wrote:
> On 4/4/19 8:25 PM, Stephen Rothwell wrote:
> > Hi James,
> >
> > After merging the scsi tree, today's linux-next build (powerpc
> > ppc64_defconfig) produced this warning:
> >
> > drivers/scsi/lpfc/lpfc_nvme.c:2140:1: warning:
> > 'lpfc_nvme_lport_unreg_wait' defined but not used [-Wunused-
> > function]
> > lpfc_nvme_lport_unreg_wait(struct lpfc_vport *vport,
> > ^~
> >
> > Introduced by commit
> >
> >3999df75bccb ("scsi: lpfc: Declare local functions static")
> >
> > It use is guarded by IS_ENABLED(CONFIG_NVME_FC).
>
> I will have a closer look at this tomorrow.
In the meantime, we can just revert the patch. Making functions static
serves no real purpose except it does tell the compiler they have to be
used internally which is where the problem is coming from. Once the
issue is sorted, the static patch can be reapplied.
James
Re: [LINUX PATCH v2 3/3] spi: spi-mem: Add support for Zynq QSPI controller
On 01/04/19 1:29 PM, Naga Sureshkumar Relli wrote:
> +/**
> + * zynq_qspi_config_op - Configure QSPI controller for specified transfer
> + * @xqspi: Pointer to the zynq_qspi structure
> + * @qspi:Pointer to the spi_device structure
> + *
> + * Sets the operational mode of QSPI controller for the next QSPI transfer
> and
> + * sets the requested clock frequency.
> + *
> + * Return: 0 on success and -EINVAL on invalid input parameter
> + *
> + * Note: If the requested frequency is not an exact match with what can be
> + * obtained using the prescalar value, the driver sets the clock frequency
> which
> + * is lower than the requested frequency (maximum lower) for the transfer. If
> + * the requested frequency is higher or lower than that is supported by the
> QSPI
> + * controller the driver will set the highest or lowest frequency supported
> by
> + * controller.
> + */
> +static int zynq_qspi_config_op(struct zynq_qspi *xqspi, struct spi_device
> *spi)
> +{
> + u32 config_reg, baud_rate_val = 0;
> +
> + /*
> + * Set the clock frequency
> + * The baud rate divisor is not a direct mapping to the value written
> + * into the configuration register (config_reg[5:3])
> + * i.e. 000 - divide by 2
> + * 001 - divide by 4
> + *
> + * 111 - divide by 256
> + */
> + while ((baud_rate_val < ZYNQ_QSPI_BAUD_DIV_MAX) &&
> +(clk_get_rate(xqspi->refclk) / (2 << baud_rate_val)) >
> + spi->max_speed_hz)
> + baud_rate_val++;
> +
Instead use DIV_ROUND_UP, something like below should work(untested):
unsigned long refclk_rate = clk_get_rate(xqspi->refclk);
u32 baud_rate_val = DIV_ROUND_UP(refclk_rate, spi->max_speed_hz) - 1;
if (baud_rate_val > ZYNQ_QSPI_BAUD_DIV_MAX)
baud_rate_val = ZYNQ_QSPI_BAUD_DIV_MAX;
> + config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET);
> +
> + /* Set the QSPI clock phase and clock polarity */
> + config_reg &= (~ZYNQ_QSPI_CONFIG_CPHA_MASK) &
> + (~ZYNQ_QSPI_CONFIG_CPOL_MASK);
> + if (spi->mode & SPI_CPHA)
> + config_reg |= ZYNQ_QSPI_CONFIG_CPHA_MASK;
> + if (spi->mode & SPI_CPOL)
> + config_reg |= ZYNQ_QSPI_CONFIG_CPOL_MASK;
> +
> + config_reg &= ~ZYNQ_QSPI_CONFIG_BDRATE_MASK;
> + config_reg |= (baud_rate_val << ZYNQ_QSPI_BAUD_DIV_SHIFT);
> + zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg);
> +
> + return 0;
> +}
> +
--
Regards
Vignesh
Re: 32-bit Amlogic (ARM) SoC: kernel BUG in kfree()
Hi Liang, On Fri, Mar 29, 2019 at 8:44 AM Liang Yang wrote: > > Hi Martin, > > On 2019/3/29 2:03, Martin Blumenstingl wrote: > > Hi Liang, > [..] > >> I don't think it is caused by a different NAND type, but i have followed > >> the some test on my GXL platform. we can see the result from the > >> attachment. By the way, i don't find any information about this on meson > >> NFC datasheet, so i will ask our VLSI. > >> Martin, May you reproduce it with the new patch on meson8b platform ? I > >> need a more clear and easier compared log like gxl.txt. Thanks. > > your gxl.txt is great, finally I can also compare my own results with > > something that works for you! > > in my results (see attachment) the "DATA_IN [256 B, force 8-bit]" > > instructions result in a different info buffer output. > > does this make any sense to you? > > > I have asked our VLSI designer for explanation or simulation result by > an e-mail. Thanks. do you have any update on this? Martin
Re: linux-next: build warning after merge of the scsi tree
On 4/4/19 8:25 PM, Stephen Rothwell wrote:
Hi James,
After merging the scsi tree, today's linux-next build (powerpc
ppc64_defconfig) produced this warning:
drivers/scsi/lpfc/lpfc_nvme.c:2140:1: warning: 'lpfc_nvme_lport_unreg_wait'
defined but not used [-Wunused-function]
lpfc_nvme_lport_unreg_wait(struct lpfc_vport *vport,
^~
Introduced by commit
3999df75bccb ("scsi: lpfc: Declare local functions static")
It use is guarded by IS_ENABLED(CONFIG_NVME_FC).
I will have a closer look at this tomorrow.
Bart.
[PATCH V2] csky: Reconstruct signal.c and entry.S
From: Guo Ren Linux kernel has provided some apis for arch signal's implementation. For example: restore_saved_sigmask() set_current_blocked() restore_altstack() But in last version of csky signal.c didn't use them and some codes are confusing, so reconstruct signal.c with reference to riscv's code. Now csky signal.c implementation are very close to riscv and we can get the following benefits: - Clear code structure - The signal code of riscv and csky can be reviewed together - Promoting the unification of arch's signal implementation Also modified the related code in entry.S Changelog: - Fixup compile error with verify_area in signal.c Signed-off-by: Guo Ren Cc: Arnd Bergmann Cc: Guenter Roeck --- arch/csky/abiv1/inc/abi/entry.h | 7 - arch/csky/abiv1/inc/abi/regdef.h | 2 + arch/csky/abiv2/inc/abi/entry.h | 7 - arch/csky/abiv2/inc/abi/regdef.h | 2 + arch/csky/kernel/atomic.S| 26 +-- arch/csky/kernel/entry.S | 152 - arch/csky/kernel/signal.c| 343 +++ 7 files changed, 207 insertions(+), 332 deletions(-) diff --git a/arch/csky/abiv1/inc/abi/entry.h b/arch/csky/abiv1/inc/abi/entry.h index f041299..fa26461 100644 --- a/arch/csky/abiv1/inc/abi/entry.h +++ b/arch/csky/abiv1/inc/abi/entry.h @@ -16,9 +16,6 @@ #define LSAVE_A4 40 #define LSAVE_A5 44 -#define EPC_INCREASE 2 -#define EPC_KEEP 0 - .macro USPTOKSP mtcrsp, ss1 mfcrsp, ss0 @@ -29,10 +26,6 @@ mfcrsp, ss1 .endm -.macro INCTRAP rx - addi\rx, EPC_INCREASE -.endm - .macro SAVE_ALL epc_inc mtcrr13, ss2 mfcrr13, epsr diff --git a/arch/csky/abiv1/inc/abi/regdef.h b/arch/csky/abiv1/inc/abi/regdef.h index 9e7e692..729b1c3 100644 --- a/arch/csky/abiv1/inc/abi/regdef.h +++ b/arch/csky/abiv1/inc/abi/regdef.h @@ -21,4 +21,6 @@ #define SYSTRACE_SAVENUM 2 +#define TRAP0_SIZE 2 + #endif /* __ASM_CSKY_REGDEF_H */ diff --git a/arch/csky/abiv2/inc/abi/entry.h b/arch/csky/abiv2/inc/abi/entry.h index b4232c3..31d0aa9 100644 --- a/arch/csky/abiv2/inc/abi/entry.h +++ b/arch/csky/abiv2/inc/abi/entry.h @@ -14,18 +14,11 @@ #define LSAVE_A2 32 #define LSAVE_A3 36 -#define EPC_INCREASE 4 -#define EPC_KEEP 0 - #define KSPTOUSP #define USPTOKSP #define usp cr<14, 1> -.macro INCTRAP rx - addi\rx, EPC_INCREASE -.endm - .macro SAVE_ALL epc_inc subisp, 152 stw tls, (sp, 0) diff --git a/arch/csky/abiv2/inc/abi/regdef.h b/arch/csky/abiv2/inc/abi/regdef.h index 652f5ce..77cb178 100644 --- a/arch/csky/abiv2/inc/abi/regdef.h +++ b/arch/csky/abiv2/inc/abi/regdef.h @@ -21,4 +21,6 @@ #define SYSTRACE_SAVENUM 5 +#define TRAP0_SIZE 4 + #endif /* __ASM_CSKY_REGDEF_H */ diff --git a/arch/csky/kernel/atomic.S b/arch/csky/kernel/atomic.S index d2357c8..5b84f11 100644 --- a/arch/csky/kernel/atomic.S +++ b/arch/csky/kernel/atomic.S @@ -12,11 +12,10 @@ * If *ptr != oldval && return 1, * else *ptr = newval return 0. */ -#ifdef CONFIG_CPU_HAS_LDSTEX ENTRY(csky_cmpxchg) USPTOKSP mfcra3, epc - INCTRAP a3 + addia3, TRAP0_SIZE subisp, 8 stw a3, (sp, 0) @@ -24,6 +23,7 @@ ENTRY(csky_cmpxchg) stw a3, (sp, 4) psrset ee +#ifdef CONFIG_CPU_HAS_LDSTEX 1: ldexa3, (a2) cmpne a0, a3 @@ -33,27 +33,7 @@ ENTRY(csky_cmpxchg) bez a3, 1b 2: sync.is - mvc a0 - ldw a3, (sp, 0) - mtcra3, epc - ldw a3, (sp, 4) - mtcra3, epsr - addisp, 8 - KSPTOUSP - rte -END(csky_cmpxchg) #else -ENTRY(csky_cmpxchg) - USPTOKSP - mfcra3, epc - INCTRAP a3 - - subisp, 8 - stw a3, (sp, 0) - mfcra3, epsr - stw a3, (sp, 4) - - psrset ee 1: ldw a3, (a2) cmpne a0, a3 @@ -61,6 +41,7 @@ ENTRY(csky_cmpxchg) 2: stw a1, (a2) 3: +#endif mvc a0 ldw a3, (sp, 0) mtcra3, epc @@ -71,6 +52,7 @@ ENTRY(csky_cmpxchg) rte END(csky_cmpxchg) +#ifndef CONFIG_CPU_HAS_LDSTEX /* * Called from tlbmodified exception */ diff --git a/arch/csky/kernel/entry.S b/arch/csky/kernel/entry.S index d40fbd5..efcd7a1 100644 --- a/arch/csky/kernel/entry.S +++ b/arch/csky/kernel/entry.S @@ -2,19 +2,19 @@ // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. #include -#include -#include -#include -#include -#include -#include #include -#include + +#include +#include #include +#include #include +#include -.macro tlbop_begin - SAVE_ALL EPC_KEEP +#include + +.macro TLBOP_PREPARE + SAVE_ALL 0 #ifdef CONFIG_CPU_HAS_TLBI RD_MEH a1 tlbi.vaas a1 @@ -27,67 +27,66 @@ #endif .endm -.macro tlbop_end - mov a0, sp +.macro TLBOP_FINISH
Re: [PATCH v8 06/20] riscv: mm: Add p?d_large() definitions
On Wed, Apr 3, 2019 at 7:47 PM Steven Price wrote:
>
> walk_page_range() is going to be allowed to walk page tables other than
> those of user space. For this it needs to know when it has reached a
> 'leaf' entry in the page tables. This information is provided by the
> p?d_large() functions/macros.
>
> For riscv a page is large when it has a read, write or execute bit
> set on it.
>
> CC: Palmer Dabbelt
> CC: Albert Ou
> CC: linux-ri...@lists.infradead.org
> Signed-off-by: Steven Price
> ---
> arch/riscv/include/asm/pgtable-64.h | 7 +++
> arch/riscv/include/asm/pgtable.h| 7 +++
> 2 files changed, 14 insertions(+)
>
> diff --git a/arch/riscv/include/asm/pgtable-64.h
> b/arch/riscv/include/asm/pgtable-64.h
> index 7aa0ea9bd8bb..73747d9d7c66 100644
> --- a/arch/riscv/include/asm/pgtable-64.h
> +++ b/arch/riscv/include/asm/pgtable-64.h
> @@ -51,6 +51,13 @@ static inline int pud_bad(pud_t pud)
> return !pud_present(pud);
> }
>
> +#define pud_large pud_large
> +static inline int pud_large(pud_t pud)
> +{
> + return pud_present(pud)
> + && (pud_val(pud) & (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC));
> +}
> +
> static inline void set_pud(pud_t *pudp, pud_t pud)
> {
> *pudp = pud;
> diff --git a/arch/riscv/include/asm/pgtable.h
> b/arch/riscv/include/asm/pgtable.h
> index 1141364d990e..9570883c79e7 100644
> --- a/arch/riscv/include/asm/pgtable.h
> +++ b/arch/riscv/include/asm/pgtable.h
> @@ -111,6 +111,13 @@ static inline int pmd_bad(pmd_t pmd)
> return !pmd_present(pmd);
> }
>
> +#define pmd_large pmd_large
> +static inline int pmd_large(pmd_t pmd)
> +{
> + return pmd_present(pmd)
> + && (pmd_val(pmd) & (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC));
> +}
> +
> static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
> {
> *pmdp = pmd;
> --
> 2.20.1
>
Looks good to me.
Reviewed-by: Anup Patel
Regards,
Anup
Re: [PATCH] x86/microcode: Refactor Intel microcode loading
On Fri, Apr 05, 2019 at 12:54:31AM +0200, Jann Horn wrote: > [ 159.485731] microcode: CPU7 found a matching microcode update with > version 0x25 (current=0x19) Yeah, that printk can be kinda misleading :) > I thought I had checked /sys/devices/system/cpu/cpu0/microcode/version > afterwards. But apparently I didn't. Bleh. Sorry about that. No worries at all, now at least it is all clear what's happening. I was beginning to recheck what I'm seeing here too. And I can finally deprecate this ancient method which is just as kaputtski because it is happening as late as the late loading method when you do echo 1 > /sys/devices/system/cpu/microcode/reload --- diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 5ad92419be19..5a0a752f3ddd 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1330,8 +1330,16 @@ config MICROCODE_AMD processors will be enabled. config MICROCODE_OLD_INTERFACE - def_bool y + bool "Ancient loading interface (DEPRECATED)" + default n depends on MICROCODE + ---help--- + DO NOT USE THIS! This is the ancient /dev/cpu/microcode interface + which was used by userspace tools like iucode_tool and microcode.ctl. + It is inadequate because it runs too late to be able to properly + load microcode on a machine and it needs special tools. Instead, you + should've switched to the early loading method with the initrd or + builtin microcode by now: Documentation/x86/microcode.txt config X86_MSR tristate "/dev/cpu/*/msr - Model-specific register support" --- I'll test some more and post later. Thx! -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.
[PATCH 1/3] dt-bindings: interconnect: Add Qualcomm QCS404 DT bindings
The Qualcomm QCS404 platform has several buses that could be controlled
and tuned according to the bandwidth demand.
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/qcom,qcs404.txt | 45 +++
1 file changed, 45 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
diff --git a/Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
b/Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
new file mode 100644
index ..2ea63ea827d7
--- /dev/null
+++ b/Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
@@ -0,0 +1,45 @@
+Qualcomm QCS404 Network-On-Chip interconnect driver binding
+---
+
+Required properties :
+- compatible : shall contain only one of the following:
+ "qcom,qcs404-bimc"
+ "qcom,qcs404-pcnoc"
+ "qcom,qcs404-snoc"
+- #interconnect-cells : should contain 1
+
+Optional properties :
+clocks : list of phandles and specifiers to all interconnect bus clocks
+clock-names : clock names should include both "bus_clk" and "bus_a_clk"
+
+Example:
+
+rpm-glink {
+ ...
+ rpm_requests: glink-channel {
+ ...
+ bimc: interconnect@0 {
+ compatible = "qcom,qcs404-bimc";
+ #interconnect-cells = <1>;
+ clock-names = "bus_clk", "bus_a_clk";
+ clocks = < RPM_SMD_BIMC_CLK>,
+ < RPM_SMD_BIMC_A_CLK>;
+ };
+
+ pnoc: interconnect@1 {
+ compatible = "qcom,qcs404-pcnoc";
+ #interconnect-cells = <1>;
+ clock-names = "bus_clk", "bus_a_clk";
+ clocks = < RPM_SMD_PNOC_CLK>,
+ < RPM_SMD_PNOC_A_CLK>;
+ };
+
+ snoc: interconnect@2 {
+ compatible = "qcom,qcs404-snoc";
+ #interconnect-cells = <1>;
+ clock-names = "bus_clk", "bus_a_clk";
+ clocks = < RPM_SMD_SNOC_CLK>,
+ < RPM_SMD_SNOC_A_CLK>;
+ };
+ };
+};
[PATCH 3/3] arm64: dts: qcs404: Add interconnect provider DT nodes
Add the DT nodes for the network-on-chip interconnect buses found
on qcs404-based platforms.
Signed-off-by: Georgi Djakov
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi
b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index e8fd26633d57..706e918f79f6 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2018, Linaro Limited
+#include
#include
#include
#include
@@ -226,6 +227,30 @@
compatible = "qcom,rpm-qcs404";
qcom,glink-channels = "rpm_requests";
+ bimc: interconnect@0 {
+ compatible = "qcom,qcs404-bimc";
+ #interconnect-cells = <1>;
+ clock-names = "bus_clk", "bus_a_clk";
+ clocks = < RPM_SMD_BIMC_CLK>,
+ < RPM_SMD_BIMC_A_CLK>;
+ };
+
+ pcnoc: interconnect@1 {
+ compatible = "qcom,qcs404-pcnoc";
+ #interconnect-cells = <1>;
+ clock-names = "bus_clk", "bus_a_clk";
+ clocks = < RPM_SMD_PNOC_CLK>,
+ < RPM_SMD_PNOC_A_CLK>;
+ };
+
+ snoc: interconnect@2 {
+ compatible = "qcom,qcs404-snoc";
+ #interconnect-cells = <1>;
+ clock-names = "bus_clk", "bus_a_clk";
+ clocks = < RPM_SMD_SNOC_CLK>,
+ < RPM_SMD_SNOC_A_CLK>;
+ };
+
rpmcc: clock-controller {
compatible = "qcom,rpmcc-qcs404";
#clock-cells = <1>;
[PATCH 2/3] interconnect: qcom: Add QCS404 interconnect provider driver
From: Bjorn Andersson
Add driver for the interconnect buses found in Qualcomm QCS404-based
platforms. The topology consists of three NoCs that are controlled by
a remote processor that collects the aggregated bandwidth for each
master-slave pairs.
Signed-off-by: Bjorn Andersson
Signed-off-by: Georgi Djakov
---
drivers/interconnect/qcom/Kconfig | 8 +
drivers/interconnect/qcom/Makefile| 2 +
drivers/interconnect/qcom/qcs404.c| 488 ++
drivers/interconnect/qcom/qcs404_ids.h| 86 +++
.../dt-bindings/interconnect/qcom,qcs404.h| 88
5 files changed, 672 insertions(+)
create mode 100644 drivers/interconnect/qcom/qcs404.c
create mode 100644 drivers/interconnect/qcom/qcs404_ids.h
create mode 100644 include/dt-bindings/interconnect/qcom,qcs404.h
diff --git a/drivers/interconnect/qcom/Kconfig
b/drivers/interconnect/qcom/Kconfig
index 290d330abe5a..cf9e6d430994 100644
--- a/drivers/interconnect/qcom/Kconfig
+++ b/drivers/interconnect/qcom/Kconfig
@@ -4,6 +4,14 @@ config INTERCONNECT_QCOM
help
Support for Qualcomm's Network-on-Chip interconnect hardware.
+config INTERCONNECT_QCOM_QCS404
+ tristate "Qualcomm QCS404 interconnect driver"
+ depends on INTERCONNECT_QCOM
+ depends on QCOM_SMD_RPM || COMPILE_TEST
+ help
+ This is a driver for the Qualcomm Network-on-Chip on qcs404-based
+ platforms.
+
config INTERCONNECT_QCOM_SDM845
tristate "Qualcomm SDM845 interconnect driver"
depends on INTERCONNECT_QCOM
diff --git a/drivers/interconnect/qcom/Makefile
b/drivers/interconnect/qcom/Makefile
index 1c1cea690f92..059ff325ee6c 100644
--- a/drivers/interconnect/qcom/Makefile
+++ b/drivers/interconnect/qcom/Makefile
@@ -1,5 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
+qnoc-qcs404-objs := qcs404.o
qnoc-sdm845-objs := sdm845.o
+obj-$(CONFIG_INTERCONNECT_QCOM_QCS404) += qnoc-qcs404.o
obj-$(CONFIG_INTERCONNECT_QCOM_SDM845) += qnoc-sdm845.o
diff --git a/drivers/interconnect/qcom/qcs404.c
b/drivers/interconnect/qcom/qcs404.c
new file mode 100644
index ..42d36db13ec0
--- /dev/null
+++ b/drivers/interconnect/qcom/qcs404.c
@@ -0,0 +1,488 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Linaro Ltd
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "qcs404_ids.h"
+
+#define RPM_BUS_MASTER_REQ 0x73616d62
+#define RPM_BUS_SLAVE_REQ 0x766c7362
+#define RPM_KEY_BW 0x7762
+
+#define to_qcom_provider(_provider) \
+ container_of(_provider, struct qcom_icc_provider, provider)
+
+struct qcom_smd_rpm *qcs404_rpm;
+
+struct icc_rpm_smd_req {
+ __le32 key;
+ __le32 nbytes;
+ __le32 value;
+};
+
+struct qcom_icc_provider {
+ struct icc_provider provider;
+ struct clk *bus_clk;
+ struct clk *bus_a_clk;
+};
+
+#define QCS404_MAX_LINKS 12
+
+/**
+ * struct qcom_icc_node - Qualcomm specific interconnect nodes
+ * @name: the node name used in debugfs
+ * @id: a unique node identifier
+ * @links: an array of nodes where we can go next while traversing
+ * @num_links: the total number of @links
+ * @buswidth: width of the interconnect between a node and the bus (bytes)
+ * @mas_rpm_id:RPM id for devices that are bus masters
+ * @slv_rpm_id:RPM id for devices that are bus slaves
+ * @rate: current bus clock rate in Hz
+ */
+struct qcom_icc_node {
+ unsigned char *name;
+ u16 id;
+ u16 links[QCS404_MAX_LINKS];
+ u16 num_links;
+ u16 buswidth;
+ int mas_rpm_id;
+ int slv_rpm_id;
+ u64 rate;
+};
+
+struct qcom_icc_desc {
+ struct qcom_icc_node **nodes;
+ size_t num_nodes;
+};
+
+#define DEFINE_QNODE(_name, _id, _buswidth, _mas_rpm_id, _slv_rpm_id, \
+_numlinks, ...)\
+ static struct qcom_icc_node _name = { \
+ .name = #_name, \
+ .id = _id, \
+ .buswidth = _buswidth, \
+ .mas_rpm_id = _mas_rpm_id, \
+ .slv_rpm_id = _slv_rpm_id, \
+ .num_links = _numlinks, \
+ .links = { __VA_ARGS__ }, \
+ }
+
+DEFINE_QNODE(mas_apps_proc, QCS404_MASTER_AMPSS_M0, 8, 0, -1, 2,
QCS404_SLAVE_EBI_CH0, QCS404_BIMC_SNOC_SLV);
+DEFINE_QNODE(mas_oxili, QCS404_MASTER_GRAPHICS_3D, 8, 6, -1, 2,
QCS404_SLAVE_EBI_CH0, QCS404_BIMC_SNOC_SLV);
+DEFINE_QNODE(mas_mdp, QCS404_MASTER_MDP_PORT0, 8, 8, -1, 2,
QCS404_SLAVE_EBI_CH0, QCS404_BIMC_SNOC_SLV);
[PATCH 0/3] Add QCS404 interconnect provider driver
Add driver to support scaling of the on-chip interconnects on QCS404-based platforms. Also add the necessary device-tree nodes, so that the driver for each NoC can probe and register as interconnect-provider. Bjorn Andersson (1): interconnect: qcom: Add QCS404 interconnect provider driver Georgi Djakov (2): dt-bindings: interconnect: Add Qualcomm QCS404 DT bindings arm64: dts: qcs404: Add interconnect provider DT nodes .../bindings/interconnect/qcom,qcs404.txt | 45 ++ arch/arm64/boot/dts/qcom/qcs404.dtsi | 25 + drivers/interconnect/qcom/Kconfig | 8 + drivers/interconnect/qcom/Makefile| 2 + drivers/interconnect/qcom/qcs404.c| 488 ++ drivers/interconnect/qcom/qcs404_ids.h| 86 +++ .../dt-bindings/interconnect/qcom,qcs404.h| 88 7 files changed, 742 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt create mode 100644 drivers/interconnect/qcom/qcs404.c create mode 100644 drivers/interconnect/qcom/qcs404_ids.h create mode 100644 include/dt-bindings/interconnect/qcom,qcs404.h
Re: [PATCH v4 4/4] pinctrl: add drive for I2C related pins on MT8183
On Mon, Apr 1, 2019 at 10:35 AM Zhiyong Tao wrote: > This patch provides the advanced drive for I2C used pins on MT8183. > The detail strength specification description of the I2C pin: > When E1=0/E0=0, the strength is 0.125mA. > When E1=0/E0=1, the strength is 0.25mA. > When E1=1/E0=0, the strength is 0.5mA. > When E1=1/E0=1, the strength is 1mA. > For I2C pins, there are existing generic driving setup and the above > specific driving setup. I2C pins can only support 2/4/6/8/10/12/14/16mA > driving adjustment in generic driving setup. But in specific driving > setup, they can support 0.125/0.25/0.5/1mA adjustment. > If we enable specific driving setup for I2C pins, > the existing generic driving setup will be disabled. > For some special features, we need the I2C pins specific driving setup. > The specific driving setup is controlled by E1E0EN. > So we need add extra vendor driving preperty instead of the generic > driving property. We can add "mediatek,drive-strength-adv = ;" > to describe the specific driving setup property. > "XXX" means the value of E1E0EN. So the valid arguments of > "mediatek,drive-strength-adv" are from 0 to 7. > > Signed-off-by: Zhiyong Tao Patch applied tentatively to the pin control tree. If other MTK maintainers have opinions we might need to patch on top or revert it, but it looks OK to me so I put it in. Yours, Linus Walleij
[PATCH] staging: rtl8723bs: add space after enum declaration
Add space between "enum TXDESC_SC" and '{' at line 86.
Fix the following error from checkpatch.pl
WARNING: missing space after enum definition
+enum TXDESC_SC{
Signed-off-by: William Tustumi
---
drivers/staging/rtl8723bs/include/rtw_xmit.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/rtl8723bs/include/rtw_xmit.h
b/drivers/staging/rtl8723bs/include/rtw_xmit.h
index 37f42b2f22f1..ea1396005a13 100644
--- a/drivers/staging/rtl8723bs/include/rtw_xmit.h
+++ b/drivers/staging/rtl8723bs/include/rtw_xmit.h
@@ -83,7 +83,7 @@ do{\
#define TXDESC_OFFSET TXDESC_SIZE
-enum TXDESC_SC{
+enum TXDESC_SC {
SC_DONT_CARE = 0x00,
SC_UPPER = 0x01,
SC_LOWER = 0x02,
--
2.21.0
Re: [PATCH v4 1/4] dt-bindings: pinctrl: mt8183: add binding document
On Mon, Apr 1, 2019 at 10:35 AM Zhiyong Tao wrote: > The commit adds mt8183 compatible node in binding document. > > Signed-off-by: Zhiyong Tao > Signed-off-by: Erin Lo > Reviewed-by: Rob Herring Patch applied to the pinctrl tree. Yours, Linus Walleij
Re: [PATCH v4 3/4] arm64: dts: mt8183: add pinctrl device node
On Mon, Apr 1, 2019 at 10:35 AM Zhiyong Tao wrote: > The commit adds pinctrl device node for mt8183 > > Signed-off-by: Zhiyong Tao > Signed-off-by: Erin Lo Acked-by: Linus Walleij Yours, Linus Walleij
Re: [PATCH v4 2/4] arm64: dts: mt8183: add pinctrl file
On Mon, Apr 1, 2019 at 10:35 AM Zhiyong Tao wrote: > This patch adds pinctrl file for mt8183. Better commit message maybe? But no big deal. > Signed-off-by: Zhiyong Tao > Signed-off-by: Erin Lo > Reviewed-by: Rob Herring Acked-by: Linus Walleij Please merge this through the ARM SoC tree. Yours, Linus Walleij
Re: [PATCH] pinctrl: axp209: Fix NULL pointer dereference after allocation
On Tue, Mar 12, 2019 at 10:19 PM Aditya Pakki wrote: > axp20x_build_funcs_groups allocates groups via devm_kcalloc and tries to > dereference without checking for NULL. This patch avoids such a > scenario. > > Signed-off-by: Aditya Pakki Patch applied. Yours, Linus Walleij
Re: [PATCH v2] drivers: firmware: psci: add support for warm reset
On 2019-04-04 00:21, Aaro Koskinen wrote: From: Aaro Koskinen Add support for warm reset using SYSTEM_RESET2 introduced in PSCI 1.1 specification. There is already a patch sent by Sudeep for this support. - https://lore.kernel.org/lkml/1525257003-8608-1-git-send-email-sudeep.ho...@arm.com/ -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Applied "ASoC: cs42l51: change mic bias DAPM" to the asoc tree
The patch
ASoC: cs42l51: change mic bias DAPM
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From 4110e9a1868332e305f64d5c5b32368597caeb8f Mon Sep 17 00:00:00 2001
From: Olivier Moysan
Date: Wed, 3 Apr 2019 15:23:35 +0200
Subject: [PATCH] ASoC: cs42l51: change mic bias DAPM
Use SND_SOC_DAPM_SUPPLY for mic bias DAPM
instead of deprecated SND_SOC_DAPM_MICBIAS.
Signed-off-by: Olivier Moysan
Signed-off-by: Mark Brown
---
sound/soc/codecs/cs42l51.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/sound/soc/codecs/cs42l51.c b/sound/soc/codecs/cs42l51.c
index 58ece037d944..991e4ebd7a04 100644
--- a/sound/soc/codecs/cs42l51.c
+++ b/sound/soc/codecs/cs42l51.c
@@ -210,7 +210,8 @@ static const struct snd_kcontrol_new
cs42l51_adcr_mux_controls =
SOC_DAPM_ENUM("Route", cs42l51_adcr_mux_enum);
static const struct snd_soc_dapm_widget cs42l51_dapm_widgets[] = {
- SND_SOC_DAPM_MICBIAS("Mic Bias", CS42L51_MIC_POWER_CTL, 1, 1),
+ SND_SOC_DAPM_SUPPLY("Mic Bias", CS42L51_MIC_POWER_CTL, 1, 1, NULL,
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_PGA_E("Left PGA", CS42L51_POWER_CTL1, 3, 1, NULL, 0,
cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
SND_SOC_DAPM_PGA_E("Right PGA", CS42L51_POWER_CTL1, 4, 1, NULL, 0,
--
2.20.1
Applied "spi: tegra114: dump SPI registers during timeout" to the spi tree
The patch
spi: tegra114: dump SPI registers during timeout
has been applied to the spi tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From a0253c8fa18129f423c22f175a83d81423e60715 Mon Sep 17 00:00:00 2001
From: Sowjanya Komatineni
Date: Thu, 4 Apr 2019 17:14:04 -0700
Subject: [PATCH] spi: tegra114: dump SPI registers during timeout
This patch dumps SPI registers on transfer error or timeout for debug
purpose.
Signed-off-by: Sowjanya Komatineni
Signed-off-by: Mark Brown
---
drivers/spi/spi-tegra114.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index 8c33bf056196..99019f6d2d84 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -874,6 +874,20 @@ static void tegra_spi_transfer_end(struct spi_device *spi)
tegra_spi_writel(tspi, tspi->def_command1_reg, SPI_COMMAND1);
}
+static void tegra_spi_dump_regs(struct tegra_spi_data *tspi)
+{
+ dev_dbg(tspi->dev, " SPI REGISTER DUMP \n");
+ dev_dbg(tspi->dev, "Command1:0x%08x | Command2:0x%08x\n",
+ tegra_spi_readl(tspi, SPI_COMMAND1),
+ tegra_spi_readl(tspi, SPI_COMMAND2));
+ dev_dbg(tspi->dev, "DMA_CTL: 0x%08x | DMA_BLK: 0x%08x\n",
+ tegra_spi_readl(tspi, SPI_DMA_CTL),
+ tegra_spi_readl(tspi, SPI_DMA_BLK));
+ dev_dbg(tspi->dev, "TRANS_STAT: 0x%08x | FIFO_STATUS: 0x%08x\n",
+ tegra_spi_readl(tspi, SPI_TRANS_STATUS),
+ tegra_spi_readl(tspi, SPI_FIFO_STATUS));
+}
+
static int tegra_spi_transfer_one_message(struct spi_master *master,
struct spi_message *msg)
{
@@ -920,6 +934,7 @@ static int tegra_spi_transfer_one_message(struct spi_master
*master,
(tspi->cur_direction & DATA_DIR_RX))
dmaengine_terminate_all(tspi->rx_dma_chan);
ret = -EIO;
+ tegra_spi_dump_regs(tspi);
tegra_spi_flush_fifos(tspi);
reset_control_assert(tspi->rst);
udelay(2);
@@ -930,6 +945,7 @@ static int tegra_spi_transfer_one_message(struct spi_master
*master,
if (tspi->tx_status || tspi->rx_status) {
dev_err(tspi->dev, "Error in Transfer\n");
ret = -EIO;
+ tegra_spi_dump_regs(tspi);
goto complete_xfer;
}
msg->actual_length += xfer->len;
@@ -971,6 +987,7 @@ static irqreturn_t handle_cpu_based_xfer(struct
tegra_spi_data *tspi)
tspi->status_reg);
dev_err(tspi->dev, "CpuXfer 0x%08x:0x%08x\n",
tspi->command1_reg, tspi->dma_control_reg);
+ tegra_spi_dump_regs(tspi);
tegra_spi_flush_fifos(tspi);
complete(>xfer_completion);
spin_unlock_irqrestore(>lock, flags);
@@ -1045,6 +1062,7 @@ static irqreturn_t handle_dma_based_xfer(struct
tegra_spi_data *tspi)
tspi->status_reg);
dev_err(tspi->dev, "DmaXfer 0x%08x:0x%08x\n",
tspi->command1_reg, tspi->dma_control_reg);
+ tegra_spi_dump_regs(tspi);
tegra_spi_flush_fifos(tspi);
complete(>xfer_completion);
spin_unlock_irqrestore(>lock, flags);
--
2.20.1
Applied "spi: spi-mem: Add support for Zynq QSPI controller" to the spi tree
The patch spi: spi-mem: Add support for Zynq QSPI controller has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 67dca5e580f1e93a66177389981541cac208c817 Mon Sep 17 00:00:00 2001 From: Naga Sureshkumar Relli Date: Mon, 1 Apr 2019 13:29:13 +0530 Subject: [PATCH] spi: spi-mem: Add support for Zynq QSPI controller Add support for QSPI controller driver used by Xilinx Zynq SOC. Signed-off-by: Naga Sureshkumar Relli Signed-off-by: Mark Brown --- drivers/spi/Kconfig | 10 +- drivers/spi/Makefile| 1 + drivers/spi/spi-zynq-qspi.c | 761 3 files changed, 771 insertions(+), 1 deletion(-) create mode 100644 drivers/spi/spi-zynq-qspi.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 8ce4f7df0ef2..0fba8f400c59 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -848,9 +848,17 @@ config SPI_XTENSA_XTFPGA 16 bit words in SPI mode 0, automatically asserting CS on transfer start and deasserting on end. +config SPI_ZYNQ_QSPI + tristate "Xilinx Zynq QSPI controller" + depends on ARCH_ZYNQ || COMPILE_TEST + help + This enables support for the Zynq Quad SPI controller + in master mode. + This controller only supports SPI memory interface. + config SPI_ZYNQMP_GQSPI tristate "Xilinx ZynqMP GQSPI controller" - depends on SPI_MASTER && HAS_DMA + depends on (SPI_MASTER && HAS_DMA) || COMPILE_TEST help Enables Xilinx GQSPI controller driver for Zynq UltraScale+ MPSoC. diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 369f29a8a6af..f2f78d03dc28 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -119,6 +119,7 @@ obj-$(CONFIG_SPI_XCOMM) += spi-xcomm.o obj-$(CONFIG_SPI_XILINX) += spi-xilinx.o obj-$(CONFIG_SPI_XLP) += spi-xlp.o obj-$(CONFIG_SPI_XTENSA_XTFPGA)+= spi-xtensa-xtfpga.o +obj-$(CONFIG_SPI_ZYNQ_QSPI)+= spi-zynq-qspi.o obj-$(CONFIG_SPI_ZYNQMP_GQSPI) += spi-zynqmp-gqspi.o # SPI slave protocol handlers diff --git a/drivers/spi/spi-zynq-qspi.c b/drivers/spi/spi-zynq-qspi.c new file mode 100644 index ..8079d0062d03 --- /dev/null +++ b/drivers/spi/spi-zynq-qspi.c @@ -0,0 +1,761 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Xilinx, Inc. + * + * Author: Naga Sureshkumar Relli + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Register offset definitions */ +#define ZYNQ_QSPI_CONFIG_OFFSET0x00 /* Configuration Register, RW */ +#define ZYNQ_QSPI_STATUS_OFFSET0x04 /* Interrupt Status Register, RO */ +#define ZYNQ_QSPI_IEN_OFFSET 0x08 /* Interrupt Enable Register, WO */ +#define ZYNQ_QSPI_IDIS_OFFSET 0x0C /* Interrupt Disable Reg, WO */ +#define ZYNQ_QSPI_IMASK_OFFSET 0x10 /* Interrupt Enabled Mask Reg,RO */ +#define ZYNQ_QSPI_ENABLE_OFFSET0x14 /* Enable/Disable Register, RW */ +#define ZYNQ_QSPI_DELAY_OFFSET 0x18 /* Delay Register, RW */ +#define ZYNQ_QSPI_TXD_00_00_OFFSET 0x1C /* Transmit 4-byte inst, WO */ +#define ZYNQ_QSPI_TXD_00_01_OFFSET 0x80 /* Transmit 1-byte inst, WO */ +#define ZYNQ_QSPI_TXD_00_10_OFFSET 0x84 /* Transmit 2-byte inst, WO */ +#define ZYNQ_QSPI_TXD_00_11_OFFSET 0x88 /* Transmit 3-byte inst, WO */ +#define ZYNQ_QSPI_RXD_OFFSET 0x20 /* Data Receive Register, RO */ +#define ZYNQ_QSPI_SIC_OFFSET 0x24 /* Slave Idle Count Register, RW */ +#define ZYNQ_QSPI_TX_THRESH_OFFSET 0x28 /* TX FIFO Watermark Reg, RW */ +#define ZYNQ_QSPI_RX_THRESH_OFFSET 0x2C /* RX FIFO Watermark Reg, RW */ +#define ZYNQ_QSPI_GPIO_OFFSET 0x30 /* GPIO Register, RW */ +#define ZYNQ_QSPI_LINEAR_CFG_OFFSET0xA0 /* Linear Adapter Config Ref, RW */ +#define ZYNQ_QSPI_MOD_ID_OFFSET0xFC /* Module ID Register, RO */ + +/* + * QSPI Configuration Register bit Masks + * + * This register contains various control bits that effect the operation + * of the QSPI
Applied "spi: gpio: Drop unused pdev field in struct spi_gpio" to the spi tree
The patch
spi: gpio: Drop unused pdev field in struct spi_gpio
has been applied to the spi tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From 45f7718ae713e52def029c071cdba19a8045ac52 Mon Sep 17 00:00:00 2001
From: Andrey Smirnov
Date: Tue, 2 Apr 2019 21:01:30 -0700
Subject: [PATCH] spi: gpio: Drop unused pdev field in struct spi_gpio
There's no code using 'pdev' field in struct spi_gpio. Drop it.
Signed-off-by: Andrey Smirnov
Cc: Mark Brown
Cc: Chris Healy
Cc: linux-...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Mark Brown
---
drivers/spi/spi-gpio.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/spi/spi-gpio.c b/drivers/spi/spi-gpio.c
index 4b2a80abf36e..5ac9ae192ddf 100644
--- a/drivers/spi/spi-gpio.c
+++ b/drivers/spi/spi-gpio.c
@@ -41,7 +41,6 @@
struct spi_gpio {
struct spi_bitbang bitbang;
- struct platform_device *pdev;
struct gpio_desc*sck;
struct gpio_desc*miso;
struct gpio_desc*mosi;
@@ -390,8 +389,6 @@ static int spi_gpio_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, spi_gpio);
- spi_gpio->pdev = pdev;
-
status = spi_gpio_request(dev, spi_gpio);
if (status)
return status;
--
2.20.1
Applied "spi: tegra114: de-assert CS before SPI mode change" to the spi tree
The patch
spi: tegra114: de-assert CS before SPI mode change
has been applied to the spi tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From f3e182c33e534f4caeb255a3ab927debc0d222aa Mon Sep 17 00:00:00 2001
From: Sowjanya Komatineni
Date: Thu, 4 Apr 2019 17:14:02 -0700
Subject: [PATCH] spi: tegra114: de-assert CS before SPI mode change
With SW CS, during the transfer completion CS is de-asserted by writing
default command1 register value to SPI_COMMAND1 register. With this both
mode and CS state are set at the same time and if current transfer mode
is different to default SPI mode and if mode change happens prior to CS
de-assert, clock polarity can change while CS is active before transfer
finishes.
This causes Slave to see spurious clock edges resulting in data mismatch.
This patch fixes this by de-asserting CS before writing SPI_COMMAND1 to
its default value so through out the transfer it will be in same SPI mode.
Signed-off-by: Sowjanya Komatineni
Signed-off-by: Mark Brown
---
drivers/spi/spi-tegra114.c | 22 --
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index 09cfae3abce2..8de002fc6943 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -856,6 +856,19 @@ static void tegra_spi_transfer_delay(int delay)
udelay(delay % 1000);
}
+static void tegra_spi_transfer_end(struct spi_device *spi)
+{
+ struct tegra_spi_data *tspi = spi_master_get_devdata(spi->master);
+ int cs_val = (spi->mode & SPI_CS_HIGH) ? 0 : 1;
+
+ if (cs_val)
+ tspi->command1_reg |= SPI_CS_SW_VAL;
+ else
+ tspi->command1_reg &= ~SPI_CS_SW_VAL;
+ tegra_spi_writel(tspi, tspi->command1_reg, SPI_COMMAND1);
+ tegra_spi_writel(tspi, tspi->def_command1_reg, SPI_COMMAND1);
+}
+
static int tegra_spi_transfer_one_message(struct spi_master *master,
struct spi_message *msg)
{
@@ -918,8 +931,7 @@ static int tegra_spi_transfer_one_message(struct spi_master
*master,
complete_xfer:
if (ret < 0 || skip) {
- tegra_spi_writel(tspi, tspi->def_command1_reg,
- SPI_COMMAND1);
+ tegra_spi_transfer_end(spi);
tegra_spi_transfer_delay(xfer->delay_usecs);
goto exit;
} else if (list_is_last(>transfer_list,
@@ -927,13 +939,11 @@ static int tegra_spi_transfer_one_message(struct
spi_master *master,
if (xfer->cs_change)
tspi->cs_control = spi;
else {
- tegra_spi_writel(tspi, tspi->def_command1_reg,
- SPI_COMMAND1);
+ tegra_spi_transfer_end(spi);
tegra_spi_transfer_delay(xfer->delay_usecs);
}
} else if (xfer->cs_change) {
- tegra_spi_writel(tspi, tspi->def_command1_reg,
- SPI_COMMAND1);
+ tegra_spi_transfer_end(spi);
tegra_spi_transfer_delay(xfer->delay_usecs);
}
--
2.20.1
Applied "spi: gpio: Don't request CS GPIO in DT use-case" to the spi tree
The patch
spi: gpio: Don't request CS GPIO in DT use-case
has been applied to the spi tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From 249e2632dcd0509b8f8f296f5aabf4d48dfd6da8 Mon Sep 17 00:00:00 2001
From: Andrey Smirnov
Date: Tue, 2 Apr 2019 21:01:27 -0700
Subject: [PATCH] spi: gpio: Don't request CS GPIO in DT use-case
DT use-case already relies on SPI core to control CS (requested by
of_spi_register_master() and controlled spi_set_cs()), so there's no
need to try to request those GPIO in spi-gpio code. Change the code
such that spi-gpio's CS related code is only used if device is probed
via pdata.
Signed-off-by: Andrey Smirnov
Cc: Mark Brown
Cc: Chris Healy
Cc: linux-...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Mark Brown
---
drivers/spi/spi-gpio.c | 134 ++---
1 file changed, 59 insertions(+), 75 deletions(-)
diff --git a/drivers/spi/spi-gpio.c b/drivers/spi/spi-gpio.c
index c8fe87ebf8c8..3d05c6a71706 100644
--- a/drivers/spi/spi-gpio.c
+++ b/drivers/spi/spi-gpio.c
@@ -46,7 +46,6 @@ struct spi_gpio {
struct gpio_desc*miso;
struct gpio_desc*mosi;
struct gpio_desc**cs_gpios;
- boolhas_cs;
};
/*--*/
@@ -216,7 +215,7 @@ static void spi_gpio_chipselect(struct spi_device *spi, int
is_active)
gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
/* Drive chip select line, if we have one */
- if (spi_gpio->has_cs) {
+ if (spi_gpio->cs_gpios) {
struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
/* SPI chip selects are normally active-low */
@@ -234,10 +233,12 @@ static int spi_gpio_setup(struct spi_device *spi)
* The CS GPIOs have already been
* initialized from the descriptor lookup.
*/
- cs = spi_gpio->cs_gpios[spi->chip_select];
- if (!spi->controller_state && cs)
- status = gpiod_direction_output(cs,
- !(spi->mode & SPI_CS_HIGH));
+ if (spi_gpio->cs_gpios) {
+ cs = spi_gpio->cs_gpios[spi->chip_select];
+ if (!spi->controller_state && cs)
+ status = gpiod_direction_output(cs,
+ !(spi->mode & SPI_CS_HIGH));
+ }
if (!status)
status = spi_bitbang_setup(spi);
@@ -290,11 +291,8 @@ static void spi_gpio_cleanup(struct spi_device *spi)
*/
static int spi_gpio_request(struct device *dev,
struct spi_gpio *spi_gpio,
- unsigned int num_chipselects,
u16 *mflags)
{
- int i;
-
spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
if (IS_ERR(spi_gpio->mosi))
return PTR_ERR(spi_gpio->mosi);
@@ -315,13 +313,6 @@ static int spi_gpio_request(struct device *dev,
if (IS_ERR(spi_gpio->sck))
return PTR_ERR(spi_gpio->sck);
- for (i = 0; i < num_chipselects; i++) {
- spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs",
-i, GPIOD_OUT_HIGH);
- if (IS_ERR(spi_gpio->cs_gpios[i]))
- return PTR_ERR(spi_gpio->cs_gpios[i]);
- }
-
return 0;
}
@@ -332,90 +323,87 @@ static const struct of_device_id spi_gpio_dt_ids[] = {
};
MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
-static int spi_gpio_probe_dt(struct platform_device *pdev)
+static int spi_gpio_probe_dt(struct platform_device *pdev,
+struct spi_master *master)
{
- int ret;
- u32 tmp;
- struct spi_gpio_platform_data *pdata;
- struct device_node *np = pdev->dev.of_node;
- const struct of_device_id *of_id =
- of_match_device(spi_gpio_dt_ids, >dev);
-
- if (!of_id)
- return 0;
+ master->dev.of_node = pdev->dev.of_node;
+
Applied "spi: tegra114: set supported bits per word" to the spi tree
The patch spi: tegra114: set supported bits per word has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From f0a0bc90c6e7060778911c2b55d085105809d6cf Mon Sep 17 00:00:00 2001 From: Sowjanya Komatineni Date: Thu, 4 Apr 2019 17:14:05 -0700 Subject: [PATCH] spi: tegra114: set supported bits per word Tegra SPI supports 4 through 32 bits per word. This patch sets bits_per_word_mask accordingly to support transfer with these bits per word. Signed-off-by: Sowjanya Komatineni Signed-off-by: Mark Brown --- drivers/spi/spi-tegra114.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index 99019f6d2d84..c2ebf1ae632d 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c @@ -1151,6 +1151,7 @@ static int tegra_spi_probe(struct platform_device *pdev) /* the spi->mode bits understood by this driver: */ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST; + master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); master->setup = tegra_spi_setup; master->transfer_one_message = tegra_spi_transfer_one_message; master->num_chipselect = MAX_CHIP_SELECT; -- 2.20.1
Applied "spi: tegra114: avoid reset call in atomic context" to the spi tree
The patch spi: tegra114: avoid reset call in atomic context has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From a026525d4e45e3d9690bffd0b05d018ff5638b5a Mon Sep 17 00:00:00 2001 From: Sowjanya Komatineni Date: Thu, 4 Apr 2019 17:14:03 -0700 Subject: [PATCH] spi: tegra114: avoid reset call in atomic context This patch moves SPI controller reset out of spin lock. Signed-off-by: Sowjanya Komatineni Signed-off-by: Mark Brown --- drivers/spi/spi-tegra114.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index 8de002fc6943..b57f10182fae 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c @@ -967,11 +967,12 @@ static irqreturn_t handle_cpu_based_xfer(struct tegra_spi_data *tspi) dev_err(tspi->dev, "CpuXfer 0x%08x:0x%08x\n", tspi->command1_reg, tspi->dma_control_reg); tegra_spi_flush_fifos(tspi); + complete(>xfer_completion); + spin_unlock_irqrestore(>lock, flags); reset_control_assert(tspi->rst); udelay(2); reset_control_deassert(tspi->rst); - complete(>xfer_completion); - goto exit; + return IRQ_HANDLED; } if (tspi->cur_direction & DATA_DIR_RX) @@ -1040,11 +1041,11 @@ static irqreturn_t handle_dma_based_xfer(struct tegra_spi_data *tspi) dev_err(tspi->dev, "DmaXfer 0x%08x:0x%08x\n", tspi->command1_reg, tspi->dma_control_reg); tegra_spi_flush_fifos(tspi); + complete(>xfer_completion); + spin_unlock_irqrestore(>lock, flags); reset_control_assert(tspi->rst); udelay(2); reset_control_deassert(tspi->rst); - complete(>xfer_completion); - spin_unlock_irqrestore(>lock, flags); return IRQ_HANDLED; } -- 2.20.1
Applied "spi: Don't call spi_get_gpio_descs() before device name is set" to the spi tree
The patch
spi: Don't call spi_get_gpio_descs() before device name is set
has been applied to the spi tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From 0a919ae49223d32ac0e8be3494547fcd1e4aa0aa Mon Sep 17 00:00:00 2001
From: Andrey Smirnov
Date: Tue, 2 Apr 2019 21:01:28 -0700
Subject: [PATCH] spi: Don't call spi_get_gpio_descs() before device name is
set
Move code calling spi_get_gpio_descs() to happen after ctlr->dev's
name is set in order to have proper GPIO consumer names.
Before:
cat /sys/kernel/debug/gpio
gpiochip0: GPIOs 0-31, parent: platform/40049000.gpio, vf610-gpio:
gpio-6 (|regulator-usb0-vbus ) out lo
gpiochip1: GPIOs 32-63, parent: platform/4004a000.gpio, vf610-gpio:
gpio-36 (|scl ) in hi
gpio-37 (|sda ) in hi
gpio-40 (|(null) CS1 ) out lo
gpio-41 (|(null) CS0 ) out lo ACTIVE LOW
gpio-42 (|miso) in hi
gpio-43 (|mosi) in lo
gpio-44 (|sck ) out lo
After:
cat /sys/kernel/debug/gpio
gpiochip0: GPIOs 0-31, parent: platform/40049000.gpio, vf610-gpio:
gpio-6 (|regulator-usb0-vbus ) out lo
gpiochip1: GPIOs 32-63, parent: platform/4004a000.gpio, vf610-gpio:
gpio-36 (|scl ) in hi
gpio-37 (|sda ) in hi
gpio-40 (|spi0 CS1) out lo
gpio-41 (|spi0 CS0) out lo ACTIVE LOW
gpio-42 (|miso) in hi
gpio-43 (|mosi) in lo
gpio-44 (|sck ) out lo
Signed-off-by: Andrey Smirnov
Cc: Mark Brown
Cc: Chris Healy
Cc: linux-...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Mark Brown
---
drivers/spi/spi.c | 37 +++--
1 file changed, 19 insertions(+), 18 deletions(-)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 2ad20c735b61..a83fcddf1dad 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -2281,24 +2281,6 @@ int spi_register_controller(struct spi_controller *ctlr)
if (status)
return status;
- if (!spi_controller_is_slave(ctlr)) {
- if (ctlr->use_gpio_descriptors) {
- status = spi_get_gpio_descs(ctlr);
- if (status)
- return status;
- /*
-* A controller using GPIO descriptors always
-* supports SPI_CS_HIGH if need be.
-*/
- ctlr->mode_bits |= SPI_CS_HIGH;
- } else {
- /* Legacy code path for GPIOs from DT */
- status = of_spi_register_master(ctlr);
- if (status)
- return status;
- }
- }
-
/* even if it's just one always-selected device, there must
* be at least one chipselect
*/
@@ -2355,6 +2337,25 @@ int spi_register_controller(struct spi_controller *ctlr)
* registration fails if the bus ID is in use.
*/
dev_set_name(>dev, "spi%u", ctlr->bus_num);
+
+ if (!spi_controller_is_slave(ctlr)) {
+ if (ctlr->use_gpio_descriptors) {
+ status = spi_get_gpio_descs(ctlr);
+ if (status)
+ return status;
+ /*
+* A controller using GPIO descriptors always
+* supports SPI_CS_HIGH if need be.
+*/
+ ctlr->mode_bits |= SPI_CS_HIGH;
+ } else {
+ /* Legacy code path for GPIOs from DT */
+ status = of_spi_register_master(ctlr);
+ if (status)
+ return status;
+ }
+ }
+
status
Applied "spi: gpio: Drop mflags argument from spi_gpio_request()" to the spi tree
The patch
spi: gpio: Drop mflags argument from spi_gpio_request()
has been applied to the spi tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From 5c8283c172c1597eb7c30b25f186de3ec6ee6cb5 Mon Sep 17 00:00:00 2001
From: Andrey Smirnov
Date: Tue, 2 Apr 2019 21:01:29 -0700
Subject: [PATCH] spi: gpio: Drop mflags argument from spi_gpio_request()
The logic of setting mflags in spi_gpio_request() is very simple and
there isn't much benefit in having it in that function. Move all of
that code outside into spi_gpio_probe() in order to simplify things.
Signed-off-by: Andrey Smirnov
Cc: Mark Brown
Cc: Chris Healy
Cc: linux-...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Mark Brown
---
drivers/spi/spi-gpio.c | 28 +---
1 file changed, 13 insertions(+), 15 deletions(-)
diff --git a/drivers/spi/spi-gpio.c b/drivers/spi/spi-gpio.c
index 3d05c6a71706..4b2a80abf36e 100644
--- a/drivers/spi/spi-gpio.c
+++ b/drivers/spi/spi-gpio.c
@@ -289,25 +289,15 @@ static void spi_gpio_cleanup(struct spi_device *spi)
* floating signals. (A weak pulldown would save power too, but many
* drivers expect to see all-ones data as the no slave "response".)
*/
-static int spi_gpio_request(struct device *dev,
- struct spi_gpio *spi_gpio,
- u16 *mflags)
+static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
{
spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
if (IS_ERR(spi_gpio->mosi))
return PTR_ERR(spi_gpio->mosi);
- if (!spi_gpio->mosi)
- /* HW configuration without MOSI pin */
- *mflags |= SPI_MASTER_NO_TX;
spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
if (IS_ERR(spi_gpio->miso))
return PTR_ERR(spi_gpio->miso);
- /*
-* No setting SPI_MASTER_NO_RX here - if there is only a MOSI
-* pin connected the host can still do RX by changing the
-* direction of the line.
-*/
spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
if (IS_ERR(spi_gpio->sck))
@@ -381,7 +371,6 @@ static int spi_gpio_probe(struct platform_device *pdev)
struct device *dev = >dev;
struct spi_bitbang *bb;
const struct of_device_id *of_id;
- u16 master_flags = 0;
of_id = of_match_device(spi_gpio_dt_ids, >dev);
@@ -403,14 +392,23 @@ static int spi_gpio_probe(struct platform_device *pdev)
spi_gpio->pdev = pdev;
- status = spi_gpio_request(dev, spi_gpio, _flags);
+ status = spi_gpio_request(dev, spi_gpio);
if (status)
return status;
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
SPI_CS_HIGH;
- master->flags = master_flags;
+ if (!spi_gpio->mosi) {
+ /* HW configuration without MOSI pin
+*
+* No setting SPI_MASTER_NO_RX here - if there is only
+* a MOSI pin connected the host can still do RX by
+* changing the direction of the line.
+*/
+ master->flags = SPI_MASTER_NO_TX;
+ }
+
master->bus_num = pdev->id;
master->setup = spi_gpio_setup;
master->cleanup = spi_gpio_cleanup;
@@ -420,7 +418,7 @@ static int spi_gpio_probe(struct platform_device *pdev)
bb->chipselect = spi_gpio_chipselect;
bb->set_line_direction = spi_gpio_set_direction;
- if (master_flags & SPI_MASTER_NO_TX) {
+ if (master->flags & SPI_MASTER_NO_TX) {
bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
--
2.20.1
linux-next: build warning after merge of the scsi tree
Hi James,
After merging the scsi tree, today's linux-next build (powerpc
ppc64_defconfig) produced this warning:
drivers/scsi/lpfc/lpfc_nvme.c:2140:1: warning: 'lpfc_nvme_lport_unreg_wait'
defined but not used [-Wunused-function]
lpfc_nvme_lport_unreg_wait(struct lpfc_vport *vport,
^~
Introduced by commit
3999df75bccb ("scsi: lpfc: Declare local functions static")
It use is guarded by IS_ENABLED(CONFIG_NVME_FC).
--
Cheers,
Stephen Rothwell
pgp3fvlNgGyRV.pgp
Description: OpenPGP digital signature
Re: [PATCH] mm:workingset use real time to judge activity of the file page
On Thu, Apr 04, 2019 at 11:30:17AM +0800, Zhaoyang Huang wrote: > +++ b/mm/workingset.c > @@ -159,7 +159,7 @@ >NODES_SHIFT + \ >MEM_CGROUP_ID_SHIFT) > #define EVICTION_MASK(~0UL >> EVICTION_SHIFT) > - > +#define EVICTION_JIFFIES (BITS_PER_LONG >> 3) > /* > * Eviction timestamps need to be able to cover the full range of > * actionable refaults. However, bits are tight in the radix tree > @@ -175,18 +175,22 @@ static void *pack_shadow(int memcgid, pg_data_t *pgdat, > unsigned long eviction) > eviction >>= bucket_order; > eviction = (eviction << MEM_CGROUP_ID_SHIFT) | memcgid; > eviction = (eviction << NODES_SHIFT) | pgdat->node_id; > + eviction = (eviction << EVICTION_JIFFIES) | (jiffies >> > EVICTION_JIFFIES); > eviction = (eviction << RADIX_TREE_EXCEPTIONAL_SHIFT); ... this isn't against current, or even 5.0. > entry >>= RADIX_TREE_EXCEPTIONAL_SHIFT; > + entry >>= EVICTION_JIFFIES; > + prev_jiff = (entry & ((1UL << EVICTION_JIFFIES) - 1)) << > EVICTION_JIFFIES; These two lines are in the wrong order. So you're getting (effectively) a random answer in your 'prev_jiff', which means your testing isn't thorough enough. I suspect you're only testing cases you're expecting to improve, and you aren't testing to make sure that other cases don't regress.
Re: [PATCH 4.14 000/121] 4.14.111-stable review
On Thu, 4 Apr 2019 at 14:24, Greg Kroah-Hartman wrote: > > This is the start of the stable review cycle for the 4.14.111 release. > There are 121 patches in this series, all will be posted as a response > to this one. If anyone has any issues with these being applied, please > let me know. > > Responses should be made by Sat Apr 6 08:44:23 UTC 2019. > Anything received after that time might be too late. > > The whole patch series can be found in one patch at: > > https://www.kernel.org/pub/linux/kernel/v4.x/stable-review/patch-4.14.111-rc1.gz > or in the git tree and branch at: > > git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git > linux-4.14.y > and the diffstat can be found below. > > thanks, > > greg k-h Results from Linaro’s test farm. No regressions on arm64, arm, x86_64, and i386. Summary kernel: 4.14.111-rc1 git repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git git branch: linux-4.14.y git commit: 4c8aee9c89b14fe8bba63a014b2ec11588683406 git describe: v4.14.110-121-g4c8aee9c89b1 Test details: https://qa-reports.linaro.org/lkft/linux-stable-rc-4.14-oe/build/v4.14.110-121-g4c8aee9c89b1 No regressions (compared to build v4.14.109-230-g662f0922cca4) No fixes (compared to build v4.14.109-230-g662f0922cca4) Ran 23331 total tests in the following environments and test suites. Environments -- - dragonboard-410c - arm64 - hi6220-hikey - arm64 - i386 - juno-r2 - arm64 - qemu_arm - qemu_arm64 - qemu_i386 - qemu_x86_64 - x15 - arm - x86_64 Test Suites --- * boot * install-android-platform-tools-r2600 * kselftest * libhugetlbfs * ltp-cap_bounds-tests * ltp-commands-tests * ltp-containers-tests * ltp-cpuhotplug-tests * ltp-cve-tests * ltp-dio-tests * ltp-fcntl-locktests-tests * ltp-filecaps-tests * ltp-fs-tests * ltp-fs_bind-tests * ltp-fs_perms_simple-tests * ltp-fsx-tests * ltp-hugetlb-tests * ltp-io-tests * ltp-ipc-tests * ltp-math-tests * ltp-mm-tests * ltp-nptl-tests * ltp-pty-tests * ltp-sched-tests * ltp-securebits-tests * ltp-syscalls-tests * ltp-timers-tests * perf * spectre-meltdown-checker-test * v4l2-compliance * ltp-open-posix-tests * kselftest-vsyscall-mode-native * kselftest-vsyscall-mode-none -- Linaro LKFT https://lkft.linaro.org
Re: [PATCH 4.9 00/91] 4.9.168-stable review
On Thu, 4 Apr 2019 at 14:20, Greg Kroah-Hartman wrote: > > This is the start of the stable review cycle for the 4.9.168 release. > There are 91 patches in this series, all will be posted as a response > to this one. If anyone has any issues with these being applied, please > let me know. > > Responses should be made by Sat Apr 6 08:44:27 UTC 2019. > Anything received after that time might be too late. > > The whole patch series can be found in one patch at: > > https://www.kernel.org/pub/linux/kernel/v4.x/stable-review/patch-4.9.168-rc1.gz > or in the git tree and branch at: > > git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git > linux-4.9.y > and the diffstat can be found below. > > thanks, > > greg k-h Results from Linaro’s test farm. No regressions on arm64, arm, x86_64, and i386. Summary kernel: 4.9.168-rc1 git repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git git branch: linux-4.9.y git commit: ba980237d739a2beb8f17095af6ce29de69ef51f git describe: v4.9.167-91-gba980237d739 Test details: https://qa-reports.linaro.org/lkft/linux-stable-rc-4.9-oe/build/v4.9.167-91-gba980237d739 No regressions (compared to build v4.9.166-149-gea283005c82d) No fixes (compared to build v4.9.166-149-gea283005c82d) Ran 22706 total tests in the following environments and test suites. Environments -- - dragonboard-410c - arm64 - hi6220-hikey - arm64 - i386 - juno-r2 - arm64 - qemu_arm - qemu_arm64 - qemu_i386 - qemu_x86_64 - x15 - arm - x86_64 Test Suites --- * boot * install-android-platform-tools-r2600 * kselftest * libhugetlbfs * ltp-cap_bounds-tests * ltp-commands-tests * ltp-containers-tests * ltp-cpuhotplug-tests * ltp-cve-tests * ltp-dio-tests * ltp-fcntl-locktests-tests * ltp-filecaps-tests * ltp-fs-tests * ltp-fs_bind-tests * ltp-fs_perms_simple-tests * ltp-fsx-tests * ltp-hugetlb-tests * ltp-io-tests * ltp-ipc-tests * ltp-math-tests * ltp-mm-tests * ltp-nptl-tests * ltp-pty-tests * ltp-sched-tests * ltp-securebits-tests * ltp-syscalls-tests * ltp-timers-tests * perf * spectre-meltdown-checker-test * ltp-open-posix-tests * kselftest-vsyscall-mode-native * kselftest-vsyscall-mode-none -- Linaro LKFT https://lkft.linaro.org
Re: [PATCH] mm:workingset use real time to judge activity of the file page
resend it via the right mailling list and rewrite the comments by ZY.
On Thu, Apr 4, 2019 at 3:15 PM Michal Hocko wrote:
>
> [Fixup email for Pavel and add Johannes]
>
> On Thu 04-04-19 11:30:17, Zhaoyang Huang wrote:
> > From: Zhaoyang Huang
> >
> > In previous implementation, the number of refault pages is used
> > for judging the refault period of each page, which is not precised as
> > eviction of other files will be affect a lot on current cache.
> > We introduce the timestamp into the workingset's entry and refault ratio
> > to measure the file page's activity. It helps to decrease the affection
> > of other files(average refault ratio can reflect the view of whole system
> > 's memory).
> > The patch is tested on an Android system, which can be described as
> > comparing the launch time of an application between a huge memory
> > consumption. The result is launch time decrease 50% and the page fault
> > during the test decrease 80%.
> >
I don't understand what exactly you're saying here, can you please elaborate?
The reason it's using distances instead of absolute time is because
the ordering of the LRU is relative and not based on absolute time.
E.g. if a page is accessed every 500ms, it depends on all other pages
to determine whether this page is at the head or the tail of the LRU.
So when you refault, in order to determine the relative position of
the refaulted page in the LRU, you have to compare it to how fast that
LRU is moving. The absolute refault time, or the average time between
refaults, is not comparable to what's already in memory.
comment by ZY
For current implementation, it is hard to deal with the evaluation of
refault period under the scenario of huge dropping of file pages
within short time, which maybe caused by a high order allocation or
continues single page allocation in KSWAPD. On the contrary, such page
which having a big refault_distance will be deemed as INACTIVE
wrongly, which will be reclaimed earlier than it should be and lead to
page thrashing. So we introduce 'avg_refault_time' & 'refault_ratio'
to judge if the refault is a accumulated thing or caused by a tight
reclaiming. That is to say, a big refault_distance in a long time
would also be inactive as the result of comparing it with ideal
time(avg_refault_time: avg_refault_time = delta_lru_reclaimed_pages/
avg_refault_retio (refault_ratio = lru->inactive_ages / time).
> > Signed-off-by: Zhaoyang Huang
> > ---
> > include/linux/mmzone.h | 2 ++
> > mm/workingset.c| 24 +---
> > 2 files changed, 19 insertions(+), 7 deletions(-)
> >
> > diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
> > index 32699b2..c38ba0a 100644
> > --- a/include/linux/mmzone.h
> > +++ b/include/linux/mmzone.h
> > @@ -240,6 +240,8 @@ struct lruvec {
> > atomic_long_t inactive_age;
> > /* Refaults at the time of last reclaim cycle */
> > unsigned long refaults;
> > + atomic_long_t refaults_ratio;
> > + atomic_long_t prev_fault;
> > #ifdef CONFIG_MEMCG
> > struct pglist_data *pgdat;
> > #endif
> > diff --git a/mm/workingset.c b/mm/workingset.c
> > index 40ee02c..6361853 100644
> > --- a/mm/workingset.c
> > +++ b/mm/workingset.c
> > @@ -159,7 +159,7 @@
> >NODES_SHIFT + \
> >MEM_CGROUP_ID_SHIFT)
> > #define EVICTION_MASK(~0UL >> EVICTION_SHIFT)
> > -
> > +#define EVICTION_JIFFIES (BITS_PER_LONG >> 3)
> > /*
> > * Eviction timestamps need to be able to cover the full range of
> > * actionable refaults. However, bits are tight in the radix tree
> > @@ -175,18 +175,22 @@ static void *pack_shadow(int memcgid, pg_data_t
> > *pgdat, unsigned long eviction)
> > eviction >>= bucket_order;
> > eviction = (eviction << MEM_CGROUP_ID_SHIFT) | memcgid;
> > eviction = (eviction << NODES_SHIFT) | pgdat->node_id;
> > + eviction = (eviction << EVICTION_JIFFIES) | (jiffies >>
> > EVICTION_JIFFIES);
> > eviction = (eviction << RADIX_TREE_EXCEPTIONAL_SHIFT);
> >
> > return (void *)(eviction | RADIX_TREE_EXCEPTIONAL_ENTRY);
> > }
> >
> > static void unpack_shadow(void *shadow, int *memcgidp, pg_data_t **pgdat,
> > - unsigned long *evictionp)
> > + unsigned long *evictionp, unsigned long *prev_jiffp)
> > {
> > unsigned long entry = (unsigned long)shadow;
> > int memcgid, nid;
> > + unsigned long prev_jiff;
> >
> > entry >>= RADIX_TREE_EXCEPTIONAL_SHIFT;
> > + entry >>= EVICTION_JIFFIES;
> > + prev_jiff = (entry & ((1UL << EVICTION_JIFFIES) - 1)) <<
> > EVICTION_JIFFIES;
> > nid = entry & ((1UL << NODES_SHIFT) - 1);
> > entry >>= NODES_SHIFT;
> > memcgid = entry & ((1UL << MEM_CGROUP_ID_SHIFT) - 1);
> > @@ -195,6 +199,7 @@ static void unpack_shadow(void *shadow, int *memcgidp,
> > pg_data_t **pgdat,
> > *memcgidp =
Re: [PATCH] MT7621-SPI: spi-mt7621: Fix alignment and style problems Fixed Coding function and style issues
Hi!
On Fri, Apr 5, 2019 at 2:53 AM Nilesh Hase wrote:
>
> Fix checkpatch issues: "CHECK: Alignment should match open parenthesis"
>
> Signed-off-by: Nilesh Hase
> ---
> drivers/staging/mt7621-spi/spi-mt7621.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/staging/mt7621-spi/spi-mt7621.c
> b/drivers/staging/mt7621-spi/spi-mt7621.c
> index b509f9fe3346..6fa9876f5a92 100644
> --- a/drivers/staging/mt7621-spi/spi-mt7621.c
> +++ b/drivers/staging/mt7621-spi/spi-mt7621.c
FYI This file doesn't exist now. The driver has been moved into
drivers/spi by this commit:
cbd66c626e16 spi: mt7621: Move SPI driver out of staging
It's in linux-next-20190329 and later tags.
> @@ -303,7 +303,7 @@ static int mt7621_spi_setup(struct spi_device *spi)
> struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);
>
> if ((spi->max_speed_hz == 0) ||
> - (spi->max_speed_hz > (rs->sys_freq / 2)))
> + (spi->max_speed_hz > (rs->sys_freq / 2)))
> spi->max_speed_hz = (rs->sys_freq / 2);
>
> if (spi->max_speed_hz < (rs->sys_freq / 4097)) {
> --
> 2.20.1
>
Regards,
Chuanhong Guo
Applied "ASoC: meson: axg-tdmout: add g12a support" to the asoc tree
The patch
ASoC: meson: axg-tdmout: add g12a support
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From aa191a37b801be6c5abebe77e67dcec7c5c0faee Mon Sep 17 00:00:00 2001
From: Jerome Brunet
Date: Thu, 4 Apr 2019 13:17:33 +0200
Subject: [PATCH] ASoC: meson: axg-tdmout: add g12a support
The axg tdmout driver just need a different skew offset to operate
correctly on the g12a SoC family.
Signed-off-by: Jerome Brunet
Signed-off-by: Mark Brown
---
sound/soc/meson/axg-tdmout.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/sound/soc/meson/axg-tdmout.c b/sound/soc/meson/axg-tdmout.c
index 3984818e2a7c..527bfc4487e0 100644
--- a/sound/soc/meson/axg-tdmout.c
+++ b/sound/soc/meson/axg-tdmout.c
@@ -243,10 +243,23 @@ static const struct axg_tdm_formatter_driver
axg_tdmout_drv = {
},
};
+static const struct axg_tdm_formatter_driver g12a_tdmout_drv = {
+ .component_drv = _tdmout_component_drv,
+ .regmap_cfg = _tdmout_regmap_cfg,
+ .ops= _tdmout_ops,
+ .quirks = &(const struct axg_tdm_formatter_hw) {
+ .invert_sclk = true,
+ .skew_offset = 2,
+ },
+};
+
static const struct of_device_id axg_tdmout_of_match[] = {
{
.compatible = "amlogic,axg-tdmout",
.data = _tdmout_drv,
+ }, {
+ .compatible = "amlogic,g12a-tdmout",
+ .data = _tdmout_drv,
}, {}
};
MODULE_DEVICE_TABLE(of, axg_tdmout_of_match);
--
2.20.1
Applied "ASoC: meson: add g12a compatibles" to the asoc tree
The patch ASoC: meson: add g12a compatibles has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 679f4e6cfd45bcc14bb563576e419ac9e43fad7c Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Thu, 4 Apr 2019 13:17:28 +0200 Subject: [PATCH] ASoC: meson: add g12a compatibles Add new compatible strings for the g12a devices. Audio wise, the g12a is fairly to close to the axg, yet some differences need to be handled. Signed-off-by: Jerome Brunet Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/sound/amlogic,axg-fifo.txt | 4 +++- Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt | 3 ++- .../devicetree/bindings/sound/amlogic,axg-spdifin.txt | 3 ++- .../devicetree/bindings/sound/amlogic,axg-spdifout.txt| 3 ++- .../devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt | 4 +++- 5 files changed, 12 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.txt index 3dfc2515e5c6..4330fc9dca6d 100644 --- a/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.txt +++ b/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.txt @@ -2,7 +2,9 @@ Required properties: - compatible: 'amlogic,axg-toddr' or - 'amlogic,axg-frddr' + 'amlogic,axg-toddr' or + 'amlogic,g12a-frddr' or + 'amlogic,g12a-toddr' - reg: physical base address of the controller and length of memory mapped region. - interrupts: interrupt specifier for the fifo. diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt index 5672d0bc5b16..73f473a9365f 100644 --- a/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt +++ b/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt @@ -1,7 +1,8 @@ * Amlogic Audio PDM input Required properties: -- compatible: 'amlogic,axg-pdm' +- compatible: 'amlogic,axg-pdm' or + 'amlogic,g12a-pdm' - reg: physical base address of the controller and length of memory mapped region. - clocks: list of clock phandle, one for each entry clock-names. diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.txt index 2e6cb7d9b202..0b82504fa419 100644 --- a/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.txt +++ b/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.txt @@ -1,7 +1,8 @@ * Amlogic Audio SPDIF Input Required properties: -- compatible: 'amlogic,axg-spdifin' +- compatible: 'amlogic,axg-spdifin' or + 'amlogic,g12a-spdifin' - interrupts: interrupt specifier for the spdif input. - clocks: list of clock phandle, one for each entry clock-names. - clock-names: should contain the following: diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.txt index 521c38ad89e7..826152730508 100644 --- a/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.txt +++ b/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.txt @@ -1,7 +1,8 @@ * Amlogic Audio SPDIF Output Required properties: -- compatible: 'amlogic,axg-spdifout' +- compatible: 'amlogic,axg-spdifout' or + 'amlogic,g12a-spdifout' - clocks: list of clock phandle, one for each entry clock-names. - clock-names: should contain the following: * "pclk" : peripheral clock. diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt index 1c1b7490554e..3b94a715a0b9 100644 --- a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt +++ b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt @@ -2,7 +2,9 @@ Required properties: - compatible: 'amlogic,axg-tdmin' or - 'amlogic,axg-tdmout' + 'amlogic,axg-tdmout' or + 'amlogic,g12a-tdmin' or + 'amlogic,g12a-tdmout' - reg: physical base address of the controller and
Applied "ASoC: meson: axg-frddr: add g12a support" to the asoc tree
The patch
ASoC: meson: axg-frddr: add g12a support
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From fcced66f208d778aa2dea05910161689503c16bf Mon Sep 17 00:00:00 2001
From: Jerome Brunet
Date: Thu, 4 Apr 2019 13:17:31 +0200
Subject: [PATCH] ASoC: meson: axg-frddr: add g12a support
On the axg, frddr could only be connected to 1 downstream element, so the
playback was possible on 1 interface only at a time.
On the g12a, the frddr may connect and wait for the request of up to 3
downstream elements. With this, it possible for single playback to be
played on several interfaces at the same time.
Like the toddr fifo, the g12a frddr also need to take care of resetting
the read pointer to the initial fifo address when preparing a playback.
Signed-off-by: Jerome Brunet
Signed-off-by: Mark Brown
---
sound/soc/meson/axg-frddr.c | 143 +++-
1 file changed, 140 insertions(+), 3 deletions(-)
diff --git a/sound/soc/meson/axg-frddr.c b/sound/soc/meson/axg-frddr.c
index a6f6f6a2eca8..2b8807737b2b 100644
--- a/sound/soc/meson/axg-frddr.c
+++ b/sound/soc/meson/axg-frddr.c
@@ -3,7 +3,9 @@
// Copyright (c) 2018 BayLibre, SAS.
// Author: Jerome Brunet
-/* This driver implements the frontend playback DAI of AXG based SoCs */
+/*
+ * This driver implements the frontend playback DAI of AXG and G12A based SoCs
+ */
#include
#include
@@ -14,7 +16,29 @@
#include "axg-fifo.h"
-#define CTRL0_FRDDR_PP_MODEBIT(30)
+#define CTRL0_FRDDR_PP_MODEBIT(30)
+#define CTRL0_SEL1_EN_SHIFT3
+#define CTRL0_SEL2_SHIFT 4
+#define CTRL0_SEL2_EN_SHIFT7
+#define CTRL0_SEL3_SHIFT 8
+#define CTRL0_SEL3_EN_SHIFT11
+#define CTRL1_FRDDR_FORCE_FINISH BIT(12)
+
+static int g12a_frddr_dai_prepare(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
+
+ /* Reset the read pointer to the FIFO_INIT_ADDR */
+ regmap_update_bits(fifo->map, FIFO_CTRL1,
+ CTRL1_FRDDR_FORCE_FINISH, 0);
+ regmap_update_bits(fifo->map, FIFO_CTRL1,
+ CTRL1_FRDDR_FORCE_FINISH, CTRL1_FRDDR_FORCE_FINISH);
+ regmap_update_bits(fifo->map, FIFO_CTRL1,
+ CTRL1_FRDDR_FORCE_FINISH, 0);
+
+ return 0;
+}
static int axg_frddr_dai_startup(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
@@ -119,10 +143,123 @@ static const struct axg_fifo_match_data
axg_frddr_match_data = {
.dai_drv= _frddr_dai_drv
};
+static const struct snd_soc_dai_ops g12a_frddr_ops = {
+ .prepare= g12a_frddr_dai_prepare,
+ .startup= axg_frddr_dai_startup,
+ .shutdown = axg_frddr_dai_shutdown,
+};
+
+static struct snd_soc_dai_driver g12a_frddr_dai_drv = {
+ .name = "FRDDR",
+ .playback = {
+ .stream_name= "Playback",
+ .channels_min = 1,
+ .channels_max = AXG_FIFO_CH_MAX,
+ .rates = AXG_FIFO_RATES,
+ .formats= AXG_FIFO_FORMATS,
+ },
+ .ops= _frddr_ops,
+ .pcm_new= axg_frddr_pcm_new,
+};
+
+static const char * const g12a_frddr_sel_texts[] = {
+ "OUT 0", "OUT 1", "OUT 2", "OUT 3", "OUT 4",
+};
+
+static SOC_ENUM_SINGLE_DECL(g12a_frddr_sel1_enum, FIFO_CTRL0, CTRL0_SEL_SHIFT,
+ g12a_frddr_sel_texts);
+static SOC_ENUM_SINGLE_DECL(g12a_frddr_sel2_enum, FIFO_CTRL0, CTRL0_SEL2_SHIFT,
+ g12a_frddr_sel_texts);
+static SOC_ENUM_SINGLE_DECL(g12a_frddr_sel3_enum, FIFO_CTRL0, CTRL0_SEL3_SHIFT,
+ g12a_frddr_sel_texts);
+
+static const struct snd_kcontrol_new g12a_frddr_out1_demux =
+ SOC_DAPM_ENUM("Output Src 1", g12a_frddr_sel1_enum);
+static const struct snd_kcontrol_new g12a_frddr_out2_demux =
+ SOC_DAPM_ENUM("Output Src 2", g12a_frddr_sel2_enum);
+static const struct snd_kcontrol_new g12a_frddr_out3_demux =
+
Applied "regulator: core: Avoid potential deadlock on regulator_unregister" to the regulator tree
The patch
regulator: core: Avoid potential deadlock on regulator_unregister
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From 063773011d33bb36588a90385aa9eb75d13c6d80 Mon Sep 17 00:00:00 2001
From: Charles Keepax
Date: Thu, 4 Apr 2019 16:32:18 +0100
Subject: [PATCH] regulator: core: Avoid potential deadlock on
regulator_unregister
Lockdep reports the following issue on my setup:
Possible unsafe locking scenario:
CPU0CPU1
lock((work_completion)(&(>disable_work)->work));
lock(regulator_list_mutex);
lock((work_completion)(&(>disable_work)->work));
lock(regulator_list_mutex);
The problem is that regulator_unregister takes the
regulator_list_mutex and then calls flush_work on disable_work. But
regulator_disable_work calls regulator_lock_dependent which will
also take the regulator_list_mutex. Resulting in a deadlock if the
flush_work call actually needs to flush the work.
Fix this issue by moving the flush_work outside of the
regulator_list_mutex. The list mutex is not used to guard the point at
which the delayed work is queued, so its use adds no additional safety.
Fixes: f8702f9e4aa7 ("regulator: core: Use ww_mutex for regulators locking")
Signed-off-by: Charles Keepax
Reviewed-by: Dmitry Osipenko
Signed-off-by: Mark Brown
---
drivers/regulator/core.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index 968dcd9d7a07..8573dd0871fd 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -5061,10 +5061,11 @@ void regulator_unregister(struct regulator_dev *rdev)
regulator_put(rdev->supply);
}
+ flush_work(>disable_work.work);
+
mutex_lock(_list_mutex);
debugfs_remove_recursive(rdev->debugfs);
- flush_work(>disable_work.work);
WARN_ON(rdev->open_count);
regulator_remove_coupling(rdev);
unset_regulator_supplies(rdev);
--
2.20.1
Applied "ASoC: meson: axg-fifo: add g12a support" to the asoc tree
The patch
ASoC: meson: axg-fifo: add g12a support
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From 7c02509a8a9981fb2c16b75904423e7ab2f9f43a Mon Sep 17 00:00:00 2001
From: Jerome Brunet
Date: Thu, 4 Apr 2019 13:17:29 +0200
Subject: [PATCH] ASoC: meson: axg-fifo: add g12a support
The g12a fifos gained the ability to set the initial address of the
pointer within the buffer, instead of defaulting to the buffer start
address.
It is not very useful to us (yet) but we need to put a copy the buffer
start address in the related register for the fifo to work properly on the
g12a SoC family
Signed-off-by: Jerome Brunet
Signed-off-by: Mark Brown
---
sound/soc/meson/axg-fifo.c | 34 +++---
sound/soc/meson/axg-fifo.h | 2 ++
2 files changed, 33 insertions(+), 3 deletions(-)
diff --git a/sound/soc/meson/axg-fifo.c b/sound/soc/meson/axg-fifo.c
index 75e5e480fda2..01c1c7db2510 100644
--- a/sound/soc/meson/axg-fifo.c
+++ b/sound/soc/meson/axg-fifo.c
@@ -19,7 +19,7 @@
* This file implements the platform operations common to the playback and
* capture frontend DAI. The logic behind this two types of fifo is very
* similar but some difference exist.
- * These differences the respective DAI drivers
+ * These differences are handled in the respective DAI drivers
*/
static struct snd_pcm_hardware axg_fifo_hw = {
@@ -133,6 +133,23 @@ static int axg_fifo_pcm_hw_params(struct snd_pcm_substream
*ss,
return 0;
}
+static int g12a_fifo_pcm_hw_params(struct snd_pcm_substream *ss,
+ struct snd_pcm_hw_params *params)
+{
+ struct axg_fifo *fifo = axg_fifo_data(ss);
+ struct snd_pcm_runtime *runtime = ss->runtime;
+ int ret;
+
+ ret = axg_fifo_pcm_hw_params(ss, params);
+ if (ret)
+ return ret;
+
+ /* Set the initial memory address of the DMA */
+ regmap_write(fifo->map, FIFO_INIT_ADDR, runtime->dma_addr);
+
+ return 0;
+}
+
static int axg_fifo_pcm_hw_free(struct snd_pcm_substream *ss)
{
struct axg_fifo *fifo = axg_fifo_data(ss);
@@ -262,6 +279,17 @@ const struct snd_pcm_ops axg_fifo_pcm_ops = {
};
EXPORT_SYMBOL_GPL(axg_fifo_pcm_ops);
+const struct snd_pcm_ops g12a_fifo_pcm_ops = {
+ .open = axg_fifo_pcm_open,
+ .close =axg_fifo_pcm_close,
+ .ioctl =snd_pcm_lib_ioctl,
+ .hw_params =g12a_fifo_pcm_hw_params,
+ .hw_free = axg_fifo_pcm_hw_free,
+ .pointer = axg_fifo_pcm_pointer,
+ .trigger = axg_fifo_pcm_trigger,
+};
+EXPORT_SYMBOL_GPL(g12a_fifo_pcm_ops);
+
int axg_fifo_pcm_new(struct snd_soc_pcm_runtime *rtd, unsigned int type)
{
struct snd_card *card = rtd->card->snd_card;
@@ -278,7 +306,7 @@ static const struct regmap_config axg_fifo_regmap_cfg = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
- .max_register = FIFO_STATUS2,
+ .max_register = FIFO_INIT_ADDR,
};
int axg_fifo_probe(struct platform_device *pdev)
@@ -339,6 +367,6 @@ int axg_fifo_probe(struct platform_device *pdev)
}
EXPORT_SYMBOL_GPL(axg_fifo_probe);
-MODULE_DESCRIPTION("Amlogic AXG fifo driver");
+MODULE_DESCRIPTION("Amlogic AXG/G12A fifo driver");
MODULE_AUTHOR("Jerome Brunet ");
MODULE_LICENSE("GPL v2");
diff --git a/sound/soc/meson/axg-fifo.h b/sound/soc/meson/axg-fifo.h
index d9f516cfbeda..5caf81241dfe 100644
--- a/sound/soc/meson/axg-fifo.h
+++ b/sound/soc/meson/axg-fifo.h
@@ -60,6 +60,7 @@ struct snd_soc_pcm_runtime;
#define FIFO_STATUS1 0x14
#define STATUS1_INT_STS(x)((x) << 0)
#define FIFO_STATUS2 0x18
+#define FIFO_INIT_ADDR 0x24
struct axg_fifo {
struct regmap *map;
@@ -74,6 +75,7 @@ struct axg_fifo_match_data {
};
extern const struct snd_pcm_ops axg_fifo_pcm_ops;
+extern const struct snd_pcm_ops g12a_fifo_pcm_ops;
int axg_fifo_pcm_new(struct snd_soc_pcm_runtime *rtd, unsigned int type);
int axg_fifo_probe(struct platform_device *pdev);
--
2.20.1
Applied "ASoC: meson: axg-tdm-formatter: rework quirks settings" to the asoc tree
The patch
ASoC: meson: axg-tdm-formatter: rework quirks settings
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From f01bc67f58fde599b48d2dde5d0f48dccd84c4f1 Mon Sep 17 00:00:00 2001
From: Jerome Brunet
Date: Thu, 4 Apr 2019 13:17:32 +0200
Subject: [PATCH] ASoC: meson: axg-tdm-formatter: rework quirks settings
The g12a tdmout requires a different signal skew offset than the axg.
With this change, the skew offset is added as a parameter of the tdm
formatters to prepare the addition of the g12a support.
Signed-off-by: Jerome Brunet
Signed-off-by: Mark Brown
---
sound/soc/meson/axg-tdm-formatter.c | 6 --
sound/soc/meson/axg-tdm-formatter.h | 11 +--
sound/soc/meson/axg-tdmin.c | 16 +++-
sound/soc/meson/axg-tdmout.c| 16 +++-
4 files changed, 35 insertions(+), 14 deletions(-)
diff --git a/sound/soc/meson/axg-tdm-formatter.c
b/sound/soc/meson/axg-tdm-formatter.c
index 43e390f9358a..0c6cce5c5773 100644
--- a/sound/soc/meson/axg-tdm-formatter.c
+++ b/sound/soc/meson/axg-tdm-formatter.c
@@ -68,7 +68,7 @@ EXPORT_SYMBOL_GPL(axg_tdm_formatter_set_channel_masks);
static int axg_tdm_formatter_enable(struct axg_tdm_formatter *formatter)
{
struct axg_tdm_stream *ts = formatter->stream;
- bool invert = formatter->drv->invert_sclk;
+ bool invert = formatter->drv->quirks->invert_sclk;
int ret;
/* Do nothing if the formatter is already enabled */
@@ -85,7 +85,9 @@ static int axg_tdm_formatter_enable(struct axg_tdm_formatter
*formatter)
return ret;
/* Setup the stream parameter in the formatter */
- ret = formatter->drv->ops->prepare(formatter->map, formatter->stream);
+ ret = formatter->drv->ops->prepare(formatter->map,
+ formatter->drv->quirks,
+ formatter->stream);
if (ret)
return ret;
diff --git a/sound/soc/meson/axg-tdm-formatter.h
b/sound/soc/meson/axg-tdm-formatter.h
index cf947caf3cb1..9ef98e955cb2 100644
--- a/sound/soc/meson/axg-tdm-formatter.h
+++ b/sound/soc/meson/axg-tdm-formatter.h
@@ -14,18 +14,25 @@ struct regmap;
struct snd_soc_dapm_widget;
struct snd_kcontrol;
+struct axg_tdm_formatter_hw {
+ unsigned int skew_offset;
+ bool invert_sclk;
+};
+
struct axg_tdm_formatter_ops {
struct axg_tdm_stream *(*get_stream)(struct snd_soc_dapm_widget *w);
void (*enable)(struct regmap *map);
void (*disable)(struct regmap *map);
- int (*prepare)(struct regmap *map, struct axg_tdm_stream *ts);
+ int (*prepare)(struct regmap *map,
+ const struct axg_tdm_formatter_hw *quirks,
+ struct axg_tdm_stream *ts);
};
struct axg_tdm_formatter_driver {
const struct snd_soc_component_driver *component_drv;
const struct regmap_config *regmap_cfg;
const struct axg_tdm_formatter_ops *ops;
- bool invert_sclk;
+ const struct axg_tdm_formatter_hw *quirks;
};
int axg_tdm_formatter_set_channel_masks(struct regmap *map,
diff --git a/sound/soc/meson/axg-tdmin.c b/sound/soc/meson/axg-tdmin.c
index bbac44c81688..a790f925a4ef 100644
--- a/sound/soc/meson/axg-tdmin.c
+++ b/sound/soc/meson/axg-tdmin.c
@@ -107,21 +107,22 @@ static void axg_tdmin_disable(struct regmap *map)
regmap_update_bits(map, TDMIN_CTRL, TDMIN_CTRL_ENABLE, 0);
}
-static int axg_tdmin_prepare(struct regmap *map, struct axg_tdm_stream *ts)
+static int axg_tdmin_prepare(struct regmap *map,
+const struct axg_tdm_formatter_hw *quirks,
+struct axg_tdm_stream *ts)
{
- unsigned int val = 0;
+ unsigned int val, skew = quirks->skew_offset;
/* Set stream skew */
switch (ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_I2S:
case SND_SOC_DAIFMT_DSP_A:
- val |= TDMIN_CTRL_IN_BIT_SKEW(3);
+ skew += 1;
break;
case SND_SOC_DAIFMT_LEFT_J:
case SND_SOC_DAIFMT_RIGHT_J:
case SND_SOC_DAIFMT_DSP_B:
-
Applied "ASoC: meson: axg-toddr: add g12a support" to the asoc tree
The patch
ASoC: meson: axg-toddr: add g12a support
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From a3c23a8ad4dc07100d916d75ca30c982288b868d Mon Sep 17 00:00:00 2001
From: Jerome Brunet
Date: Thu, 4 Apr 2019 13:17:30 +0200
Subject: [PATCH] ASoC: meson: axg-toddr: add g12a support
Since the g12a SoC fifo can set the fifo initial start address, we must
make sure to actually reset the write pointer to this address when
starting a capture.
Signed-off-by: Jerome Brunet
Signed-off-by: Mark Brown
---
sound/soc/meson/axg-toddr.c | 53 +
1 file changed, 53 insertions(+)
diff --git a/sound/soc/meson/axg-toddr.c b/sound/soc/meson/axg-toddr.c
index 0e9ca3882ae5..4f63e434fad4 100644
--- a/sound/soc/meson/axg-toddr.c
+++ b/sound/soc/meson/axg-toddr.c
@@ -24,6 +24,7 @@
#define CTRL0_TODDR_MSB_POS(x) ((x) << 8)
#define CTRL0_TODDR_LSB_POS_MASK GENMASK(7, 3)
#define CTRL0_TODDR_LSB_POS(x) ((x) << 3)
+#define CTRL1_TODDR_FORCE_FINISH BIT(25)
#define TODDR_MSB_POS 31
@@ -33,6 +34,22 @@ static int axg_toddr_pcm_new(struct snd_soc_pcm_runtime *rtd,
return axg_fifo_pcm_new(rtd, SNDRV_PCM_STREAM_CAPTURE);
}
+static int g12a_toddr_dai_prepare(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
+
+ /* Reset the write pointer to the FIFO_INIT_ADDR */
+ regmap_update_bits(fifo->map, FIFO_CTRL1,
+ CTRL1_TODDR_FORCE_FINISH, 0);
+ regmap_update_bits(fifo->map, FIFO_CTRL1,
+ CTRL1_TODDR_FORCE_FINISH, CTRL1_TODDR_FORCE_FINISH);
+ regmap_update_bits(fifo->map, FIFO_CTRL1,
+ CTRL1_TODDR_FORCE_FINISH, 0);
+
+ return 0;
+}
+
static int axg_toddr_dai_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
@@ -172,10 +189,46 @@ static const struct axg_fifo_match_data
axg_toddr_match_data = {
.dai_drv= _toddr_dai_drv
};
+static const struct snd_soc_dai_ops g12a_toddr_ops = {
+ .prepare= g12a_toddr_dai_prepare,
+ .hw_params = axg_toddr_dai_hw_params,
+ .startup= axg_toddr_dai_startup,
+ .shutdown = axg_toddr_dai_shutdown,
+};
+
+static struct snd_soc_dai_driver g12a_toddr_dai_drv = {
+ .name = "TODDR",
+ .capture = {
+ .stream_name= "Capture",
+ .channels_min = 1,
+ .channels_max = AXG_FIFO_CH_MAX,
+ .rates = AXG_FIFO_RATES,
+ .formats= AXG_FIFO_FORMATS,
+ },
+ .ops= _toddr_ops,
+ .pcm_new= axg_toddr_pcm_new,
+};
+
+static const struct snd_soc_component_driver g12a_toddr_component_drv = {
+ .dapm_widgets = axg_toddr_dapm_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(axg_toddr_dapm_widgets),
+ .dapm_routes= axg_toddr_dapm_routes,
+ .num_dapm_routes= ARRAY_SIZE(axg_toddr_dapm_routes),
+ .ops= _fifo_pcm_ops
+};
+
+static const struct axg_fifo_match_data g12a_toddr_match_data = {
+ .component_drv = _toddr_component_drv,
+ .dai_drv= _toddr_dai_drv
+};
+
static const struct of_device_id axg_toddr_of_match[] = {
{
.compatible = "amlogic,axg-toddr",
.data = _toddr_match_data,
+ }, {
+ .compatible = "amlogic,g12a-toddr",
+ .data = _toddr_match_data,
}, {}
};
MODULE_DEVICE_TABLE(of, axg_toddr_of_match);
--
2.20.1
Re: [PATCH] staging: rtl8192u: ieee80211: add space around '==' and before '('
On 2019/4/5 9:56, Caio Salvador Rohwedder wrote:
> Fix checkpatch coding style errors on rtl819x_TSProc.c
> - space required before the open parenthesis '('
> - spaces required around that '=='
>
> Signed-off-by: Caio Salvador Rohwedder
> ---
> drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c
> b/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c
> index c76715ffa08b..0af1a87a5545 100644
> --- a/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c
> +++ b/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c
> @@ -373,7 +373,7 @@ bool GetTs(
> if(!list_empty(pUnusedList)) {
> (*ppTS) = list_entry(pUnusedList->next, struct
> ts_common_info, list);
> list_del_init(&(*ppTS)->list);
> - if(TxRxSelect==TX_DIR) {
> + if (TxRxSelect == TX_DIR) {
> struct tx_ts_record *tmp =
> container_of(*ppTS, struct tx_ts_record, ts_common_info);
This line seems over 80 characters, may also be fixed.
In fact, this file has so many code style issues, see
./scripts/checkpatch.pl --no-tree -f
drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c
> ResetTxTsEntry(tmp);
> } else {
>
Re: shmem_recalc_inode: unable to handle kernel NULL pointer dereference
On Tue, 2 Apr 2019, Hugh Dickins wrote:
> On Sun, 31 Mar 2019, Hugh Dickins wrote:
> > On Sun, 31 Mar 2019, Alex Xu (Hello71) wrote:
> > > Excerpts from Vineeth Pillai's message of March 25, 2019 6:08 pm:
> > > > On Sun, Mar 24, 2019 at 11:30 AM Alex Xu (Hello71)
> > > > wrote:
> > > >>
> > > >> I get this BUG in 5.1-rc1 sometimes when powering off the machine. I
> > > >> suspect my setup erroneously executes two swapoff+cryptsetup close
> > > >> operations simultaneously, so a race condition is triggered.
> > > >>
> > > >> I am using a single swap on a plain dm-crypt device on a MBR partition
> > > >> on a SATA drive.
> > > >>
> > > >> I think the problem is probably related to
> > > >> b56a2d8af9147a4efe4011b60d93779c0461ca97, so CCing the related people.
> > > >>
> > > > Could you please provide more information on this - stack trace, dmesg
> > > > etc?
> > > > Is it easily reproducible? If yes, please detail the steps so that I
> > > > can try it inhouse.
> > > >
> > > > Thanks,
> > > > Vineeth
> > > >
> > >
> > > Some info from the BUG entry (I didn't bother to type it all,
> > > low-quality image available upon request):
> > >
> > > BUG: unable to handle kernel NULL pointer dereference at
> > > #PF error: [normal kernel read fault]
> > > PGD 0 P4D 0
> > > Oops: [#1] SMP
> > > CPU: 0 Comm: swapoff Not tainted 5.1.0-rc1+ #2
> > > RIP: 0010:shmem_recalc_inode+0x41/0x90
> > >
> > > Call Trace:
> > > ? shmem_undo_range
> > > ? rb_erase_cached
> > > ? set_next_entity
> > > ? __inode_wait_for_writeback
> > > ? shmem_truncate_range
> > > ? shmem_evict_inode
> > > ? evict
> > > ? shmem_unuse
> > > ? try_to_unuse
> > > ? swapcache_free_entries
> > > ? _cond_resched
> > > ? __se_sys_swapoff
> > > ? do_syscall_64
> > > ? entry_SYSCALL_64_after_hwframe
> > >
> > > As I said, it only occurs occasionally on shutdown. I think it is a safe
> > > guess that it can only occur when the swap is not empty, but possibly
> > > other conditions are necessary, so I will test further.
> >
> > Thanks for the update, Alex. I'm looking into a couple of bugs with the
> > 5.1-rc swapoff, but this one doesn't look like anything I know so far.
> > shmem_recalc_inode() is a surprising place to crash: it's as if the
> > igrab() in shmem_unuse() were not working.
> >
> > Yes, please do send Vineeth and me (or the lists) your low-quality image,
> > in case we can extract any more info from it; and also please the
> > disassembly of your kernel's shmem_recalc_inode(), so we can be sure of
> > exactly what it's crashing on (though I expect that will leave me as
> > puzzled as before).
> >
> > If you want to experiment with one of my fixes, not yet written up and
> > posted, just try changing SWAP_UNUSE_MAX_TRIES in mm/swapfile.c from
> > 3 to INT_MAX: I don't see how that issue could manifest as crashing in
> > shmem_recalc_inode(), but I may just be too stupid to see it.
>
> Thanks for the image and disassembly you sent: which showed that the
> 81117351: 48 83 3f 00 cmpq $0x0,(%rdi)
> you are crashing on, is the "if (sbinfo->max_blocks)" in the inlined
> shmem_inode_unacct_blocks(): inode->i_sb->s_fs_info is NULL, which is
> something that shmem_put_super() does.
>
> Eight-year-old memories stirred: I knew when looking at Vineeth's patch,
> that I ought to look back through the history of mm/shmem.c, to check
> some points that Konstantin Khlebnikov had made years ago, that
> surprised me then and were in danger of surprising us again with this
> rework. But I failed to do so: thank you Alex, for reporting this bug
> and pointing us back there.
>
> igrab() protects from eviction but does not protect from unmounting.
> I bet that is what you are hitting, though I've not even read through
> 2.6.39's 778dd893ae785 ("tmpfs: fix race between umount and swapoff")
> again yet, and not begun to think of the fix for it this time around;
> but wanted to let you know that this bug is now (probably) identified.
Hi Alex, could you please give the patch below a try? It fixes a
problem, but I'm not sure that it's your problem - please let us know.
I've not yet written up the commit description, and this should end up
as 4/4 in a series fixing several new swapoff issues: I'll wait to post
the finished series until heard back from you.
I did first try following the suggestion Konstantin had made back then,
for a similar shmem_writepage() case: atomic_inc_not_zero(>s_active).
But it turned out to be difficult to get right in shmem_unuse(), because
of the way that relies on the inode as a cursor in the list - problem
when you've acquired an s_active reference, but fail to acquire inode
reference, and cannot safely release the s_active reference while still
holding the swaplist mutex.
If VFS offered an isgrab(inode), like igrab() but acquiring s_active
reference while holding i_lock, that would drop very easily into the
current shmem_unuse() as a replacement there for igrab(). But the
[PATCH v4 5/6] lib/string: Add strscpy_pad() function
We have a function to copy strings safely and we have a function to copy
strings and zero the tail of the destination (if source string is
shorter than destination buffer) but we do not have a function to do
both at once. This means developers must write this themselves if they
desire this functionality. This is a chore, and also leaves us open to
off by one errors unnecessarily.
Add a function that calls strscpy() then memset()s the tail to zero if
the source string is shorter than the destination buffer.
Acked-by: Kees Cook
Signed-off-by: Tobin C. Harding
---
include/linux/string.h | 4
lib/string.c | 47 +++---
2 files changed, 44 insertions(+), 7 deletions(-)
diff --git a/include/linux/string.h b/include/linux/string.h
index 7927b875f80c..bfe95bf5d07e 100644
--- a/include/linux/string.h
+++ b/include/linux/string.h
@@ -31,6 +31,10 @@ size_t strlcpy(char *, const char *, size_t);
#ifndef __HAVE_ARCH_STRSCPY
ssize_t strscpy(char *, const char *, size_t);
#endif
+
+/* Wraps calls to strscpy()/memset(), no arch specific code required */
+ssize_t strscpy_pad(char *dest, const char *src, size_t count);
+
#ifndef __HAVE_ARCH_STRCAT
extern char * strcat(char *, const char *);
#endif
diff --git a/lib/string.c b/lib/string.c
index 38e4ca08e757..3a3353512184 100644
--- a/lib/string.c
+++ b/lib/string.c
@@ -159,11 +159,9 @@ EXPORT_SYMBOL(strlcpy);
* @src: Where to copy the string from
* @count: Size of destination buffer
*
- * Copy the string, or as much of it as fits, into the dest buffer.
- * The routine returns the number of characters copied (not including
- * the trailing NUL) or -E2BIG if the destination buffer wasn't big enough.
- * The behavior is undefined if the string buffers overlap.
- * The destination buffer is always NUL terminated, unless it's zero-sized.
+ * Copy the string, or as much of it as fits, into the dest buffer. The
+ * behavior is undefined if the string buffers overlap. The destination
+ * buffer is always NUL terminated, unless it's zero-sized.
*
* Preferred to strlcpy() since the API doesn't require reading memory
* from the src string beyond the specified "count" bytes, and since
@@ -173,8 +171,10 @@ EXPORT_SYMBOL(strlcpy);
*
* Preferred to strncpy() since it always returns a valid string, and
* doesn't unnecessarily force the tail of the destination buffer to be
- * zeroed. If the zeroing is desired, it's likely cleaner to use strscpy()
- * with an overflow test, then just memset() the tail of the dest buffer.
+ * zeroed. If zeroing is desired please use strscpy_pad().
+ *
+ * Return: The number of characters copied (not including the trailing
+ * %NUL) or -E2BIG if the destination buffer wasn't big enough.
*/
ssize_t strscpy(char *dest, const char *src, size_t count)
{
@@ -237,6 +237,39 @@ ssize_t strscpy(char *dest, const char *src, size_t count)
EXPORT_SYMBOL(strscpy);
#endif
+/**
+ * strscpy_pad() - Copy a C-string into a sized buffer
+ * @dest: Where to copy the string to
+ * @src: Where to copy the string from
+ * @count: Size of destination buffer
+ *
+ * Copy the string, or as much of it as fits, into the dest buffer. The
+ * behavior is undefined if the string buffers overlap. The destination
+ * buffer is always %NUL terminated, unless it's zero-sized.
+ *
+ * If the source string is shorter than the destination buffer, zeros
+ * the tail of the destination buffer.
+ *
+ * For full explanation of why you may want to consider using the
+ * 'strscpy' functions please see the function docstring for strscpy().
+ *
+ * Return: The number of characters copied (not including the trailing
+ * %NUL) or -E2BIG if the destination buffer wasn't big enough.
+ */
+ssize_t strscpy_pad(char *dest, const char *src, size_t count)
+{
+ ssize_t written;
+
+ written = strscpy(dest, src, count);
+ if (written < 0 || written == count - 1)
+ return written;
+
+ memset(dest + written + 1, 0, count - written - 1);
+
+ return written;
+}
+EXPORT_SYMBOL(strscpy_pad);
+
#ifndef __HAVE_ARCH_STRCAT
/**
* strcat - Append one %NUL-terminated string to another
--
2.21.0
[PATCH v4 6/6] lib: Add test module for strscpy_pad
Add a test module for the new strscpy_pad() function. Tie it into the
kselftest infrastructure for lib/ tests.
Acked-by: Kees Cook
Signed-off-by: Tobin C. Harding
---
lib/Kconfig.debug | 3 +
lib/Makefile | 1 +
lib/test_strscpy.c | 150 +
tools/testing/selftests/lib/Makefile | 2 +-
tools/testing/selftests/lib/config | 1 +
tools/testing/selftests/lib/strscpy.sh | 3 +
6 files changed, 159 insertions(+), 1 deletion(-)
create mode 100644 lib/test_strscpy.c
create mode 100755 tools/testing/selftests/lib/strscpy.sh
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index 0d9e81779e37..4b644ad399dd 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -1769,6 +1769,9 @@ config TEST_HEXDUMP
config TEST_STRING_HELPERS
tristate "Test functions located in the string_helpers module at
runtime"
+config TEST_STRSCPY
+ tristate "Test strscpy*() family of functions at runtime"
+
config TEST_KSTRTOX
tristate "Test kstrto*() family of functions at runtime"
diff --git a/lib/Makefile b/lib/Makefile
index 3b08673e8881..b4e08d6234ba 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -70,6 +70,7 @@ obj-$(CONFIG_TEST_STATIC_KEYS) += test_static_keys.o
obj-$(CONFIG_TEST_STATIC_KEYS) += test_static_key_base.o
obj-$(CONFIG_TEST_PRINTF) += test_printf.o
obj-$(CONFIG_TEST_BITMAP) += test_bitmap.o
+obj-$(CONFIG_TEST_STRSCPY) += test_strscpy.o
obj-$(CONFIG_TEST_BITFIELD) += test_bitfield.o
obj-$(CONFIG_TEST_UUID) += test_uuid.o
obj-$(CONFIG_TEST_XARRAY) += test_xarray.o
diff --git a/lib/test_strscpy.c b/lib/test_strscpy.c
new file mode 100644
index ..a827f94601f5
--- /dev/null
+++ b/lib/test_strscpy.c
@@ -0,0 +1,150 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include
+
+#include "../tools/testing/selftests/kselftest_module.h"
+
+/*
+ * Kernel module for testing 'strscpy' family of functions.
+ */
+
+KSTM_MODULE_GLOBALS();
+
+/*
+ * tc() - Run a specific test case.
+ * @src: Source string, argument to strscpy_pad()
+ * @count: Size of destination buffer, argument to strscpy_pad()
+ * @expected: Expected return value from call to strscpy_pad()
+ * @terminator: 1 if there should be a terminating null byte 0 otherwise.
+ * @chars: Number of characters from the src string expected to be
+ * written to the dst buffer.
+ * @pad: Number of pad characters expected (in the tail of dst buffer).
+ * (@pad does not include the null terminator byte.)
+ *
+ * Calls strscpy_pad() and verifies the return value and state of the
+ * destination buffer after the call returns.
+ */
+static int __init tc(char *src, int count, int expected,
+int chars, int terminator, int pad)
+{
+ int nr_bytes_poison;
+ int max_expected;
+ int max_count;
+ int written;
+ char buf[6];
+ int index, i;
+ const char POISON = 'z';
+
+ total_tests++;
+
+ if (!src) {
+ pr_err("null source string not supported\n");
+ return -1;
+ }
+
+ memset(buf, POISON, sizeof(buf));
+ /* Future proofing test suite, validate args */
+ max_count = sizeof(buf) - 2; /* Space for null and to verify overflow */
+ max_expected = count - 1;/* Space for the null */
+ if (count > max_count) {
+ pr_err("count (%d) is too big (%d) ... aborting", count,
max_count);
+ return -1;
+ }
+ if (expected > max_expected) {
+ pr_warn("expected (%d) is bigger than can possibly be returned
(%d)",
+ expected, max_expected);
+ }
+
+ written = strscpy_pad(buf, src, count);
+ if ((written) != (expected)) {
+ pr_err("%d != %d (written, expected)\n", written, expected);
+ goto fail;
+ }
+
+ if (count && written == -E2BIG) {
+ if (strncmp(buf, src, count - 1) != 0) {
+ pr_err("buffer state invalid for -E2BIG\n");
+ goto fail;
+ }
+ if (buf[count - 1] != '\0') {
+ pr_err("too big string is not null terminated
correctly\n");
+ goto fail;
+ }
+ }
+
+ for (i = 0; i < chars; i++) {
+ if (buf[i] != src[i]) {
+ pr_err("buf[i]==%c != src[i]==%c\n", buf[i], src[i]);
+ goto fail;
+ }
+ }
+
+ if (terminator) {
+ if (buf[count - 1] != '\0') {
+ pr_err("string is not null terminated correctly\n");
+ goto fail;
+ }
+ }
+
+ for (i = 0; i < pad; i++) {
+ index = chars + terminator + i;
+ if (buf[index] != '\0') {
+ pr_err("padding missing at index: %d\n", i);
+
[PATCH v4 4/6] lib: Use new kselftest header
We just added a new C header file for use with test modules that are
intended to be run with kselftest. We can reduce code duplication by
using this header.
Use new kselftest header to reduce code duplication in test_printf and
test_bitmap test modules.
Acked-by: Kees Cook
Signed-off-by: Tobin C. Harding
---
lib/test_bitmap.c | 20
lib/test_printf.c | 23 +--
2 files changed, 9 insertions(+), 34 deletions(-)
diff --git a/lib/test_bitmap.c b/lib/test_bitmap.c
index 6cd7d0740005..792d90608052 100644
--- a/lib/test_bitmap.c
+++ b/lib/test_bitmap.c
@@ -12,6 +12,8 @@
#include
#include
+#include "../tools/testing/selftests/kselftest_module.h"
+
static unsigned total_tests __initdata;
static unsigned failed_tests __initdata;
@@ -361,7 +363,7 @@ static void noinline __init test_mem_optimisations(void)
}
}
-static int __init test_bitmap_init(void)
+static void __init selftest(void)
{
test_zero_clear();
test_fill_set();
@@ -369,22 +371,8 @@ static int __init test_bitmap_init(void)
test_bitmap_arr32();
test_bitmap_parselist();
test_mem_optimisations();
-
- if (failed_tests == 0)
- pr_info("all %u tests passed\n", total_tests);
- else
- pr_warn("failed %u out of %u tests\n",
- failed_tests, total_tests);
-
- return failed_tests ? -EINVAL : 0;
}
-static void __exit test_bitmap_cleanup(void)
-{
-}
-
-module_init(test_bitmap_init);
-module_exit(test_bitmap_cleanup);
-
+KSTM_MODULE_LOADERS(test_bitmap);
MODULE_AUTHOR("david decotigny ");
MODULE_LICENSE("GPL");
diff --git a/lib/test_printf.c b/lib/test_printf.c
index 601e8519319a..f4fcc1c43739 100644
--- a/lib/test_printf.c
+++ b/lib/test_printf.c
@@ -21,6 +21,8 @@
#include
#include
+#include "../tools/testing/selftests/kselftest_module.h"
+
#define BUF_SIZE 256
#define PAD_SIZE 16
#define FILL_CHAR '$'
@@ -590,12 +592,11 @@ test_pointer(void)
flags();
}
-static int __init
-test_printf_init(void)
+static void __init selftest(void)
{
alloced_buffer = kmalloc(BUF_SIZE + 2*PAD_SIZE, GFP_KERNEL);
if (!alloced_buffer)
- return -ENOMEM;
+ return;
test_buffer = alloced_buffer + PAD_SIZE;
test_basic();
@@ -604,22 +605,8 @@ test_printf_init(void)
test_pointer();
kfree(alloced_buffer);
-
- if (failed_tests == 0)
- pr_info("all %u tests passed\n", total_tests);
- else
- pr_warn("failed %u out of %u tests\n", failed_tests,
total_tests);
-
- return failed_tests ? -EINVAL : 0;
}
-module_init(test_printf_init);
-
-static void __exit test_printf_exit(void)
-{
-}
-
-module_exit(test_printf_exit);
-
+KSTM_MODULE_LOADERS(test_printf);
MODULE_AUTHOR("Rasmus Villemoes ");
MODULE_LICENSE("GPL");
--
2.21.0
[PATCH v4 3/6] kselftest: Add test module framework header
kselftest runs as a userspace process. Sometimes we need to test things
from kernel space. One way of doing this is by creating a test module.
Currently doing so requires developers to write a bunch of boiler plate
in the module if kselftest is to be used to run the tests. This means
we currently have a load of duplicate code to achieve these ends. If we
have a uniform method for implementing test modules then we can reduce
code duplication, ensure uniformity in the test framework, ease code
maintenance, and reduce the work required to create tests. This all
helps to encourage developers to write and run tests.
Add a C header file that can be included in test modules. This provides
a single point for common test functions/macros. Implement a few macros
that make up the start of the test framework.
Add documentation for new kselftest header to kselftest documentation.
Acked-by: Kees Cook
Signed-off-by: Tobin C. Harding
---
Documentation/dev-tools/kselftest.rst | 94 +-
tools/testing/selftests/kselftest_module.h | 48 +++
2 files changed, 140 insertions(+), 2 deletions(-)
create mode 100644 tools/testing/selftests/kselftest_module.h
diff --git a/Documentation/dev-tools/kselftest.rst
b/Documentation/dev-tools/kselftest.rst
index 7756f7a7c23b..c8c03388b9de 100644
--- a/Documentation/dev-tools/kselftest.rst
+++ b/Documentation/dev-tools/kselftest.rst
@@ -14,6 +14,10 @@ in safe mode with a limited scope. In limited mode,
cpu-hotplug test is
run on a single cpu as opposed to all hotplug capable cpus, and memory
hotplug test is run on 2% of hotplug capable memory instead of 10%.
+kselftest runs as a userspace process. Tests that can be written/run in
+userspace may wish to use the `Test Harness`_. Tests that need to be
+run in kernel space may wish to use a `Test Module`_.
+
Running the selftests (hotplug tests are run in limited mode)
=
@@ -161,11 +165,97 @@ Contributing new tests (details)
e.g: tools/testing/selftests/android/config
+Test Module
+===
+
+Kselftest tests the kernel from userspace. Sometimes things need
+testing from within the kernel, one method of doing this is to create a
+test module. We can tie the module into the kselftest framework by
+using a shell script test runner. ``kselftest_module.sh`` is designed
+to facilitate this process. There is also a header file provided to
+assist writing kernel modules that are for use with kselftest:
+
+- ``tools/testing/kselftest/kselftest_module.h``
+- ``tools/testing/kselftest/kselftest_module.sh``
+
+How to use
+--
+
+Here we show the typical steps to create a test module and tie it into
+kselftest. We use kselftests for lib/ as an example.
+
+1. Create the test module
+
+2. Create the test script that will run (load/unload) the module
+ e.g. ``tools/testing/selftests/lib/printf.sh``
+
+3. Add line to config file e.g. ``tools/testing/selftests/lib/config``
+
+4. Add test script to makefile e.g. ``tools/testing/selftests/lib/Makefile``
+
+5. Verify it works:
+
+.. code-block:: sh
+
+ # Assumes you have booted a fresh build of this kernel tree
+ cd /path/to/linux/tree
+ make kselftest-merge
+ make modules
+ sudo make modules_install
+ make TARGETS=lib kselftest
+
+Example Module
+--
+
+A bare bones test module might look like this:
+
+.. code-block:: c
+
+ // SPDX-License-Identifier: GPL-2.0+
+
+ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+ #include "../tools/testing/selftests/kselftest_module.h"
+
+ KSTM_MODULE_GLOBALS();
+
+ /*
+* Kernel module for testing the foobinator
+*/
+
+ static int __init test_function()
+ {
+ ...
+ }
+
+ static void __init selftest(void)
+ {
+ KSTM_CHECK_ZERO(do_test_case("", 0));
+ }
+
+ KSTM_MODULE_LOADERS(test_foo);
+ MODULE_AUTHOR("John Developer ");
+ MODULE_LICENSE("GPL");
+
+Example test script
+---
+
+.. code-block:: sh
+
+#!/bin/bash
+# SPDX-License-Identifier: GPL-2.0+
+$(dirname $0)/../kselftest_module.sh "foo" test_foo
+
+
Test Harness
-The kselftest_harness.h file contains useful helpers to build tests. The tests
-from tools/testing/selftests/seccomp/seccomp_bpf.c can be used as example.
+The kselftest_harness.h file contains useful helpers to build tests. The
+test harness is for userspace testing, for kernel space testing see `Test
+Module`_ above.
+
+The tests from tools/testing/selftests/seccomp/seccomp_bpf.c can be used as
+example.
Example
---
diff --git a/tools/testing/selftests/kselftest_module.h
b/tools/testing/selftests/kselftest_module.h
new file mode 100644
index ..e8eafaf0941a
--- /dev/null
+++ b/tools/testing/selftests/kselftest_module.h
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+#ifndef __KSELFTEST_MODULE_H
+#define __KSELFTEST_MODULE_H
+
+#include
+
+/*
+ * Test framework for writing
[PATCH v4 1/6] lib/test_printf: Add empty module_exit function
Currently the test_printf module does not have an exit function, this
prevents the module from being unloaded. If we cannot unload the
module we cannot run the tests a second time.
Add an empty exit function.
Acked-by: Kees Cook
Signed-off-by: Tobin C. Harding
---
lib/test_printf.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/lib/test_printf.c b/lib/test_printf.c
index 659b6cc0d483..601e8519319a 100644
--- a/lib/test_printf.c
+++ b/lib/test_printf.c
@@ -615,5 +615,11 @@ test_printf_init(void)
module_init(test_printf_init);
+static void __exit test_printf_exit(void)
+{
+}
+
+module_exit(test_printf_exit);
+
MODULE_AUTHOR("Rasmus Villemoes ");
MODULE_LICENSE("GPL");
--
2.21.0
[PATCH v4 2/6] kselftest: Add test runner creation script
Currently if we wish to use kselftest to run tests within a kernel
module we write a small script to load/unload and do error reporting.
There are a bunch of these under tools/testing/selftests/lib/ that are
all identical except for the test name. We can reduce code duplication
and improve maintainability if we have one version of this. However
kselftest requires an executable for each test. We can move all the
script logic to a central script then have each individual test script
call the main script.
Oneliner to call kselftest_module.sh courtesy of Kees, thanks!
Add test runner creation script. Convert
tools/testing/selftests/lib/*.sh to use new test creation script.
Testing
---
Configure kselftests for lib/ then build and boot kernel. Then run
kselftests as follows:
$ cd /path/to/kernel/tree
$ sudo make O=$output_path -C tools/testing/selftests TARGETS="lib" run_tests
and also
$ cd /path/to/kernel/tree
$ cd tools/testing/selftests
$ sudo make O=$output_path TARGETS="lib" run_tests
and also
$ cd /path/to/kernel/tree
$ cd tools/testing/selftests
$ sudo make TARGETS="lib" run_tests
Acked-by: Kees Cook
Signed-off-by: Tobin C. Harding
---
tools/testing/selftests/kselftest_module.sh | 84
tools/testing/selftests/lib/bitmap.sh| 18 +
tools/testing/selftests/lib/prime_numbers.sh | 17 +---
tools/testing/selftests/lib/printf.sh| 19 +
4 files changed, 88 insertions(+), 50 deletions(-)
create mode 100755 tools/testing/selftests/kselftest_module.sh
diff --git a/tools/testing/selftests/kselftest_module.sh
b/tools/testing/selftests/kselftest_module.sh
new file mode 100755
index ..18e1c7992d30
--- /dev/null
+++ b/tools/testing/selftests/kselftest_module.sh
@@ -0,0 +1,84 @@
+#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0+
+
+#
+# Runs an individual test module.
+#
+# kselftest expects a separate executable for each test, this can be
+# created by adding a script like this:
+#
+# #!/bin/sh
+# SPDX-License-Identifier: GPL-2.0+
+# $(dirname $0)/../kselftest_module.sh "description" module_name
+#
+# Example: tools/testing/selftests/lib/printf.sh
+
+desc=""# Output prefix.
+module="" # Filename (without the .ko).
+args=""# modprobe arguments.
+
+modprobe="/sbin/modprobe"
+
+main() {
+parse_args "$@"
+assert_root
+assert_have_module
+run_module
+}
+
+parse_args() {
+script=${0##*/}
+
+if [ $# -lt 2 ]; then
+ echo "Usage: $script [FAIL]"
+ exit 1
+fi
+
+desc="$1"
+shift || true
+module="$1"
+shift || true
+args="$@"
+}
+
+assert_root() {
+if [ ! -w /dev ]; then
+ skip "please run as root"
+fi
+}
+
+assert_have_module() {
+if ! $modprobe -q -n $module; then
+ skip "module $module is not found"
+fi
+}
+
+run_module() {
+if $modprobe -q $module $args; then
+ $modprobe -q -r $module
+ say "ok"
+else
+ fail ""
+fi
+}
+
+say() {
+echo "$desc: $1"
+}
+
+
+fail() {
+say "$1 [FAIL]" >&2
+exit 1
+}
+
+skip() {
+say "$1 [SKIP]" >&2
+# Kselftest framework requirement - SKIP code is 4.
+exit 4
+}
+
+#
+# Main script
+#
+main "$@"
diff --git a/tools/testing/selftests/lib/bitmap.sh
b/tools/testing/selftests/lib/bitmap.sh
index 5a90006d1aea..5511dddc5c2d 100755
--- a/tools/testing/selftests/lib/bitmap.sh
+++ b/tools/testing/selftests/lib/bitmap.sh
@@ -1,19 +1,3 @@
#!/bin/sh
# SPDX-License-Identifier: GPL-2.0
-
-# Kselftest framework requirement - SKIP code is 4.
-ksft_skip=4
-
-# Runs bitmap infrastructure tests using test_bitmap kernel module
-if ! /sbin/modprobe -q -n test_bitmap; then
- echo "bitmap: module test_bitmap is not found [SKIP]"
- exit $ksft_skip
-fi
-
-if /sbin/modprobe -q test_bitmap; then
- /sbin/modprobe -q -r test_bitmap
- echo "bitmap: ok"
-else
- echo "bitmap: [FAIL]"
- exit 1
-fi
+$(dirname $0)/../kselftest_module.sh "bitmap" test_bitmap
diff --git a/tools/testing/selftests/lib/prime_numbers.sh
b/tools/testing/selftests/lib/prime_numbers.sh
index 78e7483c8d60..43b28f24e453 100755
--- a/tools/testing/selftests/lib/prime_numbers.sh
+++ b/tools/testing/selftests/lib/prime_numbers.sh
@@ -1,19 +1,4 @@
#!/bin/sh
# SPDX-License-Identifier: GPL-2.0
# Checks fast/slow prime_number generation for inconsistencies
-
-# Kselftest framework requirement - SKIP code is 4.
-ksft_skip=4
-
-if ! /sbin/modprobe -q -n prime_numbers; then
- echo "prime_numbers: module prime_numbers is not found [SKIP]"
- exit $ksft_skip
-fi
-
-if /sbin/modprobe -q prime_numbers selftest=65536; then
- /sbin/modprobe -q -r prime_numbers
- echo "prime_numbers: ok"
-else
- echo "prime_numbers: [FAIL]"
- exit 1
-fi
+$(dirname $0)/../kselftest_module.sh "prime numbers" prime_numbers
selftest=65536
diff --git a/tools/testing/selftests/lib/printf.sh
[PATCH v4 0/6] lib/string: Add strscpy_pad() function
Hi Shua, Here is the set with cleanup as suggested by Kees on v3. Configured, built, and tested all modules loaded by tools/testing/selftests/lib/*.sh >From previous cover letters ... While doing the testing for strscpy_pad() it was noticed that there is duplication in how test modules are being fed to kselftest and also in the test modules themselves. This set makes an attempt at adding a framework to kselftest for writing kernel test modules. It also adds a script for use in creating script test runners for kselftest. My macro-foo is not great, all criticism and suggestions very much appreciated. The design is based on test modules lib/test_printf.c, lib/test_bitmap.c, lib/test_xarray.c. Changes since last version: - Remove dependency on Bash (thanks Kees) - Use oneliner to implement kselftest test runners (thanks Kees) - Squash patch that adds kselftest script creator script with patch that uses it. - Fix typos (thanks Randy) - Add Kees' Acked-by tags to all patches thanks, Tobin. Tobin C. Harding (6): lib/test_printf: Add empty module_exit function kselftest: Add test runner creation script kselftest: Add test module framework header lib: Use new kselftest header lib/string: Add strscpy_pad() function lib: Add test module for strscpy_pad Documentation/dev-tools/kselftest.rst| 94 +++- include/linux/string.h | 4 + lib/Kconfig.debug| 3 + lib/Makefile | 1 + lib/string.c | 47 +- lib/test_bitmap.c| 20 +-- lib/test_printf.c| 17 +-- lib/test_strscpy.c | 150 +++ tools/testing/selftests/kselftest_module.h | 48 ++ tools/testing/selftests/kselftest_module.sh | 84 +++ tools/testing/selftests/lib/Makefile | 2 +- tools/testing/selftests/lib/bitmap.sh| 18 +-- tools/testing/selftests/lib/config | 1 + tools/testing/selftests/lib/prime_numbers.sh | 17 +-- tools/testing/selftests/lib/printf.sh| 19 +-- tools/testing/selftests/lib/strscpy.sh | 3 + 16 files changed, 440 insertions(+), 88 deletions(-) create mode 100644 lib/test_strscpy.c create mode 100644 tools/testing/selftests/kselftest_module.h create mode 100755 tools/testing/selftests/kselftest_module.sh create mode 100755 tools/testing/selftests/lib/strscpy.sh -- 2.21.0
[PATCH v3] ubsan: Avoid unnecessary 128-bit shifts
If CONFIG_ARCH_SUPPORTS_INT128, s_max is 128 bits, and variable
sign-extending shifts of such a double-word data type are a non-trivial
amount of code and complexity. Do a single-word sign-extension *before*
the cast to (s_max), greatly simplifying the object code.
Rasmus Villemoes suggested using sign_extend* from .
On s390 (and perhaps some other arches), gcc implements variable
128-bit shifts using an __ashrti3 helper function which the kernel
doesn't provide, causing a link error. In that case, this patch is
a prerequisite for enabling INT128 support. Andrey Ryabinin has gven
permission for any arch that needs it to cherry-pick it so they don't
have to wait for ubsan to be merged into Linus' tree.
We *could*, alternatively, implement __ashrti3, but that becomes dead as
soon as this patch is merged, so it seems like a waste of time and its
absence discourages people from adding inefficient code. Note that the
shifts in (unsigned, and by a compile-time constant amount)
are simpler and generated inline.
Signed-off-by: George Spelvin
Acked-By: Andrey Ryabinin
Feedback-from: Rasmus Villemoes
Cc: linux-s...@vger.kernel.org
Cc: Heiko Carstens
---
include/linux/bitops.h | 7 +++
lib/ubsan.c| 13 +
2 files changed, 12 insertions(+), 8 deletions(-)
v3: Added sign_extend_long() to sign_extend{32,64} in .
Used sign_extend_long rather than hand-rolling sign extension.
Changed to more uniform if ... else if ... else ... structure.
v2: Eliminated redundant cast to (s_max).
Rewrote commit message without "is this the right thing to do?"
verbiage.
Incorporated ack from Andrey Ryabinin.
diff --git a/include/linux/bitops.h b/include/linux/bitops.h
index 705f7c442691..8d33c2bfe6c5 100644
--- a/include/linux/bitops.h
+++ b/include/linux/bitops.h
@@ -157,6 +157,13 @@ static inline __s64 sign_extend64(__u64 value, int index)
return (__s64)(value << shift) >> shift;
}
+static inline long sign_extend_long(unsigned long value, int index)
+{
+ if (sizeof(value) == 4)
+ return sign_extend32(value);
+ return sign_extend64(value);
+}
+
static inline unsigned fls_long(unsigned long l)
{
if (sizeof(l) == 4)
diff --git a/lib/ubsan.c b/lib/ubsan.c
index e4162f59a81c..24d4920317e4 100644
--- a/lib/ubsan.c
+++ b/lib/ubsan.c
@@ -88,15 +88,12 @@ static bool is_inline_int(struct type_descriptor *type)
static s_max get_signed_val(struct type_descriptor *type, unsigned long val)
{
- if (is_inline_int(type)) {
- unsigned extra_bits = sizeof(s_max)*8 - type_bit_width(type);
- return ((s_max)val) << extra_bits >> extra_bits;
- }
+ if (is_inline_int(type))
+ return sign_extend_long(val, type_bit_width(type) - 1);
-
- if (type_bit_width(type) == 64)
+ else if (type_bit_width(type) == 64)
return *(s64 *)val;
-
- return *(s_max *)val;
+ else
+ return *(s_max *)val;
}
static bool val_is_negative(struct type_descriptor *type, unsigned long val)
--
2.20.1
[PATCH] staging: rtl8192u: ieee80211: add space around '==' and before '('
Fix checkpatch coding style errors on rtl819x_TSProc.c
- space required before the open parenthesis '('
- spaces required around that '=='
Signed-off-by: Caio Salvador Rohwedder
---
drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c
b/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c
index c76715ffa08b..0af1a87a5545 100644
--- a/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c
+++ b/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c
@@ -373,7 +373,7 @@ bool GetTs(
if(!list_empty(pUnusedList)) {
(*ppTS) = list_entry(pUnusedList->next, struct
ts_common_info, list);
list_del_init(&(*ppTS)->list);
- if(TxRxSelect==TX_DIR) {
+ if (TxRxSelect == TX_DIR) {
struct tx_ts_record *tmp =
container_of(*ppTS, struct tx_ts_record, ts_common_info);
ResetTxTsEntry(tmp);
} else {
--
2.21.0
Re: [GIT PULL] MFD fixes for v5.1
The pull request you sent on Thu, 4 Apr 2019 10:37:47 +0100: > git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git tags/mfd-fixes-5.1 has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/9db6ce4ecefb03698cb2875c1a46b9513303a9bf Thank you! -- Deet-doot-dot, I am a bot. https://korg.wiki.kernel.org/userdoc/prtracker
Re: [GIT PULL] Power management material for v5.1-rc3
The pull request you sent on Thu, 4 Apr 2019 22:32:04 +0200: > git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git pm-5.1-rc4 has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/20ad549488d53cb6742770b49e324a3396022da2 Thank you! -- Deet-doot-dot, I am a bot. https://korg.wiki.kernel.org/userdoc/prtracker
Re: [GIT PULL] ACPI fix for v5.1-rc4
The pull request you sent on Thu, 4 Apr 2019 22:30:24 +0200: > git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git acpi-5.1-rc4 has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/b512f71221d0bcb07ab32f3e958a84e164c85881 Thank you! -- Deet-doot-dot, I am a bot. https://korg.wiki.kernel.org/userdoc/prtracker
Re: [GIT PULL] RISC-V Patches for 5.1-rc4
The pull request you sent on Thu, 04 Apr 2019 16:29:44 -0700 (PDT): > git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux.git > tags/riscv-for-linus-5.1-rc4 has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/8e22ba96d44c4ad5f9970565c54ab1876448a5ca Thank you! -- Deet-doot-dot, I am a bot. https://korg.wiki.kernel.org/userdoc/prtracker
Re: [RFC][PATCH 03/16] sched: Wrap rq::lock access
We tried to comment those lines and it doesn’t seem to get rid of the
performance regression we are seeing.
Can you elaborate a bit more about the test you are performing, what kind of
resources it uses ?
I am running 1 and 2 Oracle DB instances each running TPC-C workload. The
clients driving the instances also run in same node. Each server client
pair is put in each cpu group and tagged.
Can you also try to replicate our test and see if you see the same problem ?
cgcreate -g cpu,cpuset:set1
cat /sys/devices/system/cpu/cpu{0,2,4,6}/topology/thread_siblings_list
0,36
2,38
4,40
6,42
echo "0,2,4,6,36,38,40,42" | sudo tee /sys/fs/cgroup/cpuset/set1/cpuset.cpus
echo 0 | sudo tee /sys/fs/cgroup/cpuset/set1/cpuset.mems
echo 1 | sudo tee /sys/fs/cgroup/cpu,cpuacct/set1/cpu.tag
sysbench --test=fileio prepare
cgexec -g cpu,cpuset:set1 sysbench --threads=4 --test=fileio \
--file-test-mode=seqwr run
The reason we create a cpuset is to narrow down the investigation to just 4
cores on a highly powerful machine. It might not be needed if testing on a
smaller machine.
With this sysbench test I am not seeing any improvement with removing the
condition. Also with hackbench I found it makes no difference but that has
much lower regression to begin with (18%)
Julien
Re: [PATCH 0/6 v3] sycalls: Remove args i and n from syscall_get_arguments()
On Thu, Apr 4, 2019 at 3:28 AM Steven Rostedt wrote: > > Is this something that can go into this -rc release or would you want > me to wait till the next merge window? > > The reason I ask, is that there's two arch patches in this series that > have stable tags attached to them. But I moved things around such that > they are applied before the global arch patches are and can be applied > independently. > > Should I move those two patches up front and just add those to this > release cycle, or would you like the entire series now? I think I can take the entire series. It's removing code and fixing a couple of bugs in the process. Even if not all changes are pure fixes, it looks good to me. I assume you've actually used this and can trace system calls with arguments properly, so that it's all tested at least on x86-64? Linus
[rcu:dev.2019.04.02a 35/52] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c:45: undefined reference to `kfd_processes_srcu'
tree: https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git
dev.2019.04.02a
head: 82d94d0c3c616bba12f1f2a7f2ea48a3363893c8
commit: 7950d16b08477aee3ea9aa77fb99a8650bc9378d [35/52] drivers/gpu/drm/amd:
Dynamically allocate kfd_processes_srcu
config: i386-randconfig-m1-04050455 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
git checkout 7950d16b08477aee3ea9aa77fb99a8650bc9378d
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.o: In function `amdgpu_amdkfd_init':
>> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c:45: undefined reference to
>> `kfd_processes_srcu'
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.o: In function `amdgpu_amdkfd_fini':
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c:64: undefined reference to
`kfd_processes_srcu'
vim +45 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
39
40 int amdgpu_amdkfd_init(void)
41 {
42 struct sysinfo si;
43 int ret;
44
> 45 ret = init_srcu_struct(_processes_srcu);
46 WARN_ON(ret);
47 si_meminfo();
48 amdgpu_amdkfd_total_mem_size = si.totalram - si.totalhigh;
49 amdgpu_amdkfd_total_mem_size *= si.mem_unit;
50
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
[GIT PULL] extcon fixes for v5.1-rc4
Dear Greg, This is extcon-fixes pull request for v5.1-rc4. I add detailed description of this pull request on below. Please pull extcon with following updates. Best Regards, Chanwoo Choi The following changes since commit 79a3aaa7b82e3106be97842dedfd8429248896e6: Linux 5.1-rc3 (2019-03-31 14:39:29 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon.git tags/extcon-fixes-for-5.1-rc4 for you to fetch changes up to 86baf800de84eb89615c138d368b14bff5ee7d8a: extcon: ptn5150: fix COMPILE_TEST dependencies (2019-04-05 10:08:37 +0900) Arnd Bergmann (1): extcon: ptn5150: fix COMPILE_TEST dependencies drivers/extcon/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
[PATCH 6/6] Input: hv: Remove dependencies on PAGE_SIZE for ring buffer
Define the ring buffer size as a constant expression because it should
not depend on the guest page size.
Signed-off-by: Maya Nakamura
---
drivers/input/serio/hyperv-keyboard.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/input/serio/hyperv-keyboard.c
b/drivers/input/serio/hyperv-keyboard.c
index a8b9be3e28db..e1b0feeaeb91 100644
--- a/drivers/input/serio/hyperv-keyboard.c
+++ b/drivers/input/serio/hyperv-keyboard.c
@@ -83,8 +83,8 @@ struct synth_kbd_keystroke {
#define HK_MAXIMUM_MESSAGE_SIZE 256
-#define KBD_VSC_SEND_RING_BUFFER_SIZE (10 * PAGE_SIZE)
-#define KBD_VSC_RECV_RING_BUFFER_SIZE (10 * PAGE_SIZE)
+#define KBD_VSC_SEND_RING_BUFFER_SIZE (40 * 1024)
+#define KBD_VSC_RECV_RING_BUFFER_SIZE (40 * 1024)
#define XTKBD_EMUL0 0xe0
#define XTKBD_EMUL1 0xe1
--
2.17.1
[PATCH 5/6] HID: hv: Remove dependencies on PAGE_SIZE for ring buffer
Define the ring buffer size as a constant expression because it should
not depend on the guest page size.
Signed-off-by: Maya Nakamura
---
drivers/hid/hid-hyperv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/hid/hid-hyperv.c b/drivers/hid/hid-hyperv.c
index 704049e62d58..4d0b63bf8b33 100644
--- a/drivers/hid/hid-hyperv.c
+++ b/drivers/hid/hid-hyperv.c
@@ -112,8 +112,8 @@ struct synthhid_input_report {
#pragma pack(pop)
-#define INPUTVSC_SEND_RING_BUFFER_SIZE (10*PAGE_SIZE)
-#define INPUTVSC_RECV_RING_BUFFER_SIZE (10*PAGE_SIZE)
+#define INPUTVSC_SEND_RING_BUFFER_SIZE (40 * 1024)
+#define INPUTVSC_RECV_RING_BUFFER_SIZE (40 * 1024)
enum pipe_prot_msg_type {
--
2.17.1
[PATCH 4/6] x86: hv: mmu.c: Replace page definitions with Hyper-V specific ones
Replace PAGE_SHIFT, PAGE_SIZE, and PAGE_MASK with HV_HYP_PAGE_SHIFT,
HV_HYP_PAGE_SIZE, and HV_HYP_PAGE_MASK, respectively, because the guest
page size and hypervisor page size concepts are different, even though
they happen to be the same value on x86.
Signed-off-by: Maya Nakamura
---
arch/x86/hyperv/mmu.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/arch/x86/hyperv/mmu.c b/arch/x86/hyperv/mmu.c
index e65d7fe6489f..175f6dcc7362 100644
--- a/arch/x86/hyperv/mmu.c
+++ b/arch/x86/hyperv/mmu.c
@@ -15,7 +15,7 @@
#include
/* Each gva in gva_list encodes up to 4096 pages to flush */
-#define HV_TLB_FLUSH_UNIT (4096 * PAGE_SIZE)
+#define HV_TLB_FLUSH_UNIT (4096 * HV_HYP_PAGE_SIZE)
static u64 hyperv_flush_tlb_others_ex(const struct cpumask *cpus,
const struct flush_tlb_info *info);
@@ -32,15 +32,15 @@ static inline int fill_gva_list(u64 gva_list[], int offset,
do {
diff = end > cur ? end - cur : 0;
- gva_list[gva_n] = cur & PAGE_MASK;
+ gva_list[gva_n] = cur & HV_HYP_PAGE_MASK;
/*
* Lower 12 bits encode the number of additional
* pages to flush (in addition to the 'cur' page).
*/
if (diff >= HV_TLB_FLUSH_UNIT)
- gva_list[gva_n] |= ~PAGE_MASK;
+ gva_list[gva_n] |= ~HV_HYP_PAGE_MASK;
else if (diff)
- gva_list[gva_n] |= (diff - 1) >> PAGE_SHIFT;
+ gva_list[gva_n] |= (diff - 1) >> HV_HYP_PAGE_SHIFT;
cur += HV_TLB_FLUSH_UNIT;
gva_n++;
@@ -129,7 +129,8 @@ static void hyperv_flush_tlb_others(const struct cpumask
*cpus,
* We can flush not more than max_gvas with one hypercall. Flush the
* whole address space if we were asked to do more.
*/
- max_gvas = (PAGE_SIZE - sizeof(*flush)) / sizeof(flush->gva_list[0]);
+ max_gvas = (HV_HYP_PAGE_SIZE - sizeof(*flush)) /
+ sizeof(flush->gva_list[0]);
if (info->end == TLB_FLUSH_ALL) {
flush->flags |= HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY;
@@ -200,9 +201,9 @@ static u64 hyperv_flush_tlb_others_ex(const struct cpumask
*cpus,
* whole address space if we were asked to do more.
*/
max_gvas =
- (PAGE_SIZE - sizeof(*flush) - nr_bank *
+ (HV_HYP_PAGE_SIZE - sizeof(*flush) - nr_bank *
sizeof(flush->hv_vp_set.bank_contents[0])) /
- sizeof(flush->gva_list[0]);
+sizeof(flush->gva_list[0]);
if (info->end == TLB_FLUSH_ALL) {
flush->flags |= HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY;
--
2.17.1
[PATCH 3/6] hv: vmbus: Replace page definition with Hyper-V specific one
Replace PAGE_SIZE with HV_HYP_PAGE_SIZE because the guest page size may not be 4096 on all architectures and Hyper-V always runs with a page size of 4096. Signed-off-by: Maya Nakamura --- drivers/hv/hyperv_vmbus.h | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/hv/hyperv_vmbus.h b/drivers/hv/hyperv_vmbus.h index a94aab94e0b5..00ad573870e9 100644 --- a/drivers/hv/hyperv_vmbus.h +++ b/drivers/hv/hyperv_vmbus.h @@ -207,11 +207,11 @@ int hv_ringbuffer_read(struct vmbus_channel *channel, u64 *requestid, bool raw); /* - * Maximum channels is determined by the size of the interrupt page - * which is PAGE_SIZE. 1/2 of PAGE_SIZE is for send endpoint interrupt - * and the other is receive endpoint interrupt + * Maximum channels, 16348, is determined by the size of the interrupt page, + * which is HV_HYP_PAGE_SIZE. 1/2 of HV_HYP_PAGE_SIZE is to send endpoint + * interrupt, and the other is to receive endpoint interrupt. */ -#define MAX_NUM_CHANNELS ((PAGE_SIZE >> 1) << 3) /* 16348 channels */ +#define MAX_NUM_CHANNELS ((HV_HYP_PAGE_SIZE >> 1) << 3) /* The value here must be in multiple of 32 */ /* TODO: Need to make this configurable */ -- 2.17.1
[PATCH 2/6] x86: hv: hv_init.c: Replace alloc_page() with kmem_cache_alloc()
Switch from the function that allocates a single Linux guest page to a
different one to use a Hyper-V page because the guest page size and
hypervisor page size concepts are different, even though they happen to
be the same value on x86.
Signed-off-by: Maya Nakamura
---
arch/x86/hyperv/hv_init.c | 38 +++---
1 file changed, 27 insertions(+), 11 deletions(-)
diff --git a/arch/x86/hyperv/hv_init.c b/arch/x86/hyperv/hv_init.c
index e4ba467a9fc6..5f946135aa18 100644
--- a/arch/x86/hyperv/hv_init.c
+++ b/arch/x86/hyperv/hv_init.c
@@ -31,6 +31,7 @@
#include
#include
#include
+#include
#ifdef CONFIG_HYPERV_TSCPAGE
@@ -98,18 +99,20 @@ EXPORT_SYMBOL_GPL(hyperv_pcpu_input_arg);
u32 hv_max_vp_index;
EXPORT_SYMBOL_GPL(hv_max_vp_index);
+struct kmem_cache *cachep;
+EXPORT_SYMBOL_GPL(cachep);
+
static int hv_cpu_init(unsigned int cpu)
{
u64 msr_vp_index;
struct hv_vp_assist_page **hvp = _vp_assist_page[smp_processor_id()];
void **input_arg;
- struct page *pg;
input_arg = (void **)this_cpu_ptr(hyperv_pcpu_input_arg);
- pg = alloc_page(GFP_KERNEL);
- if (unlikely(!pg))
+ *input_arg = kmem_cache_alloc(cachep, GFP_KERNEL);
+
+ if (unlikely(!*input_arg))
return -ENOMEM;
- *input_arg = page_address(pg);
hv_get_vp_index(msr_vp_index);
@@ -122,14 +125,12 @@ static int hv_cpu_init(unsigned int cpu)
return 0;
if (!*hvp)
- *hvp = __vmalloc(PAGE_SIZE, GFP_KERNEL, PAGE_KERNEL);
+ *hvp = kmem_cache_alloc(cachep, GFP_KERNEL);
if (*hvp) {
u64 val;
- val = vmalloc_to_pfn(*hvp);
- val = (val << HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT) |
- HV_X64_MSR_VP_ASSIST_PAGE_ENABLE;
+ val = virt_to_phys(*hvp) | HV_X64_MSR_VP_ASSIST_PAGE_ENABLE;
wrmsrl(HV_X64_MSR_VP_ASSIST_PAGE, val);
}
@@ -233,17 +234,22 @@ static int hv_cpu_die(unsigned int cpu)
unsigned long flags;
void **input_arg;
void *input_pg = NULL;
+ struct hv_vp_assist_page **hvp = _vp_assist_page[cpu];
local_irq_save(flags);
input_arg = (void **)this_cpu_ptr(hyperv_pcpu_input_arg);
input_pg = *input_arg;
*input_arg = NULL;
local_irq_restore(flags);
- free_page((unsigned long)input_pg);
+ kmem_cache_free(cachep, input_pg);
+ input_pg = NULL;
if (hv_vp_assist_page && hv_vp_assist_page[cpu])
wrmsrl(HV_X64_MSR_VP_ASSIST_PAGE, 0);
+ kmem_cache_free(cachep, *hvp);
+ *hvp = NULL;
+
if (hv_reenlightenment_cb == NULL)
return 0;
@@ -325,6 +331,11 @@ void __init hyperv_init(void)
goto free_vp_index;
}
+ cachep = kmem_cache_create("hyperv_pages", HV_HYP_PAGE_SIZE,
+ HV_HYP_PAGE_SIZE, 0, NULL);
+ if (!cachep)
+ goto free_vp_assist_page;
+
cpuhp = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/hyperv_init:online",
hv_cpu_init, hv_cpu_die);
if (cpuhp < 0)
@@ -338,7 +349,10 @@ void __init hyperv_init(void)
guest_id = generate_guest_id(0, LINUX_VERSION_CODE, 0);
wrmsrl(HV_X64_MSR_GUEST_OS_ID, guest_id);
- hv_hypercall_pg = __vmalloc(PAGE_SIZE, GFP_KERNEL, PAGE_KERNEL_RX);
+ hv_hypercall_pg = kmem_cache_alloc(cachep, GFP_KERNEL);
+ if (hv_hypercall_pg)
+ set_memory_x((unsigned long)hv_hypercall_pg, 1);
+
if (hv_hypercall_pg == NULL) {
wrmsrl(HV_X64_MSR_GUEST_OS_ID, 0);
goto remove_cpuhp_state;
@@ -346,7 +360,8 @@ void __init hyperv_init(void)
rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
hypercall_msr.enable = 1;
- hypercall_msr.guest_physical_address = vmalloc_to_pfn(hv_hypercall_pg);
+ hypercall_msr.guest_physical_address = virt_to_phys(hv_hypercall_pg) >>
+ HV_HYP_PAGE_SHIFT;
wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
hv_apic_init();
@@ -416,6 +431,7 @@ void hyperv_cleanup(void)
* let hypercall operations fail safely rather than
* panic the kernel for using invalid hypercall page
*/
+ kmem_cache_free(cachep, hv_hypercall_pg);
hv_hypercall_pg = NULL;
/* Reset the hypercall page */
--
2.17.1
[PATCH 1/6] x86: hv: hyperv-tlfs.h: Create and use Hyper-V page definitions
Define HV_HYP_PAGE_SHIFT, HV_HYP_PAGE_SIZE, and HV_HYP_PAGE_MASK because
the Linux guest page size and hypervisor page size concepts are
different, even though they happen to be the same value on x86.
Also, replace PAGE_SIZE with HV_HYP_PAGE_SIZE.
Signed-off-by: Maya Nakamura
---
arch/x86/include/asm/hyperv-tlfs.h | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/hyperv-tlfs.h
b/arch/x86/include/asm/hyperv-tlfs.h
index cdf44aa9a501..44bd68aefd00 100644
--- a/arch/x86/include/asm/hyperv-tlfs.h
+++ b/arch/x86/include/asm/hyperv-tlfs.h
@@ -12,6 +12,16 @@
#include
#include
+/*
+ * While not explicitly listed in the TLFS, Hyper-V always runs with a page
size
+ * of 4096. These definitions are used when communicating with Hyper-V using
+ * guest physical pages and guest physical page addresses, since the guest page
+ * size may not be 4096 on all architectures.
+ */
+#define HV_HYP_PAGE_SHIFT 12
+#define HV_HYP_PAGE_SIZE BIT(HV_HYP_PAGE_SHIFT)
+#define HV_HYP_PAGE_MASK (~(HV_HYP_PAGE_SIZE - 1))
+
/*
* The below CPUID leaves are present if VersionAndFeatures.HypervisorPresent
* is set by CPUID(HvCpuIdFunctionVersionAndFeatures).
@@ -841,7 +851,7 @@ union hv_gpa_page_range {
* count is equal with how many entries of union hv_gpa_page_range can
* be populated into the input parameter page.
*/
-#define HV_MAX_FLUSH_REP_COUNT ((PAGE_SIZE - 2 * sizeof(u64)) /\
+#define HV_MAX_FLUSH_REP_COUNT ((HV_HYP_PAGE_SIZE - 2 * sizeof(u64)) / \
sizeof(union hv_gpa_page_range))
struct hv_guest_mapping_flush_list {
--
2.17.1
Re: [PATCH v3 03/25] dt-bindings: leds: Add LED_COLOR_ID definitions
Jacek On 3/31/19 12:54 PM, Jacek Anaszewski wrote: > Add common LED color identifiers for use in Device Tree. > > Signed-off-by: Jacek Anaszewski > Cc: Baolin Wang > Cc: Pavel Machek > Cc: Dan Murphy > Cc: Daniel Mack > Cc: Linus Walleij > Cc: Oleh Kravchenko > Cc: Sakari Ailus > Cc: Simon Shields > --- > include/dt-bindings/leds/common.h | 11 +++ > 1 file changed, 11 insertions(+) > > diff --git a/include/dt-bindings/leds/common.h > b/include/dt-bindings/leds/common.h > index 0325db5b4208..c95f39b3a254 100644 > --- a/include/dt-bindings/leds/common.h > +++ b/include/dt-bindings/leds/common.h > @@ -55,4 +55,15 @@ > #define LED_FUNCTION_WLAN "wlan" > #define LED_FUNCTION_WPS "wps" > > +/* Standard LED colors */ > +#define LED_COLOR_ID_WHITE 0 > +#define LED_COLOR_ID_RED 1 > +#define LED_COLOR_ID_GREEN 2 > +#define LED_COLOR_ID_BLUE3 > +#define LED_COLOR_ID_AMBER 4 > +#define LED_COLOR_ID_VIOLET 5 > +#define LED_COLOR_ID_YELLOW 6 > +#define LED_COLOR_ID_IR 7 > +#define LED_COLOR_ID_COUNT 8 > + > #endif /* __DT_BINDINGS_LEDS_H */ > Reviewed-by: Dan Murphy -- -- Dan Murphy
[PATCH 0/6] hv: Remove dependencies on guest page size
The Linux guest page size and hypervisor page size concepts are different, even though they happen to be the same value on x86. Hyper-V code mixes up the two, so this patchset begins to address that by creating and using a set of Hyper-V specific page definitions. A major benefit of those new definitions is that they support non-x86 architectures, such as ARM64, that use different page sizes. On ARM64, the guest page size may not be 4096, and Hyper-V always runs with a page size of 4096. In this patchset, the first two patches lay the foundation for the others, creating definitions and preparing for memory allocations of Hyper-V pages. Subsequent patches apply the definitions where the guest VM and Hyper-V communicate, and where the code intends to use the Hyper-V page size. The last two patches set the ring buffer size to a fixed value, removing the dependencies on the guest page size. This is the initial set of changes to the Hyper-V code, and future patches will make additional changes using the same foundation, for example, replace __vmalloc() and related functions when Hyper-V pages are intended. Maya Nakamura (6): x86: hv: hyperv-tlfs.h: Create and use Hyper-V page definitions x86: hv: hv_init.c: Replace alloc_page() with kmem_cache_alloc() hv: vmbus: Replace page definition with Hyper-V specific one x86: hv: mmu.c: Replace page definitions with Hyper-V specific ones HID: hv: Remove dependencies on PAGE_SIZE for ring buffer Input: hv: Remove dependencies on PAGE_SIZE for ring buffer arch/x86/hyperv/hv_init.c | 38 +++ arch/x86/hyperv/mmu.c | 15 ++- arch/x86/include/asm/hyperv-tlfs.h| 12 - drivers/hid/hid-hyperv.c | 4 +-- drivers/hv/hyperv_vmbus.h | 8 +++--- drivers/input/serio/hyperv-keyboard.c | 4 +-- 6 files changed, 54 insertions(+), 27 deletions(-) -- 2.17.1
Re: [PATCH v3 02/25] dt-bindings: leds: Add LED_FUNCTION definitions
On 3/31/19 12:54 PM, Jacek Anaszewski wrote: > Add initial set of common LED function definitions for use in Device Tree. > > Signed-off-by: Jacek Anaszewski > Cc: Baolin Wang > Cc: Pavel Machek > Cc: Dan Murphy > Cc: Daniel Mack > Cc: Linus Walleij > Cc: Oleh Kravchenko > Cc: Sakari Ailus > Cc: Simon Shields > --- > include/dt-bindings/leds/common.h | 36 > 1 file changed, 36 insertions(+) > > diff --git a/include/dt-bindings/leds/common.h > b/include/dt-bindings/leds/common.h > index e171d0a6beb2..0325db5b4208 100644 > --- a/include/dt-bindings/leds/common.h > +++ b/include/dt-bindings/leds/common.h > @@ -19,4 +19,40 @@ > #define LEDS_BOOST_ADAPTIVE 1 > #define LEDS_BOOST_FIXED 2 > > +/* Standard LED functions */ > +#define LED_FUNCTION_ACTIVITY "activity" > +#define LED_FUNCTION_ALARM "alarm" > +#define LED_FUNCTION_BACKLIGHT "backlight" > +#define LED_FUNCTION_BLUETOOTH "bluetooth" > +#define LED_FUNCTION_BOOT "boot" > +#define LED_FUNCTION_CHARGE "charge" > +#define LED_FUNCTION_DEBUG "debug" > +#define LED_FUNCTION_DISK "disk" > +#define LED_FUNCTION_DISK_ERR "disk-err" > +#define LED_FUNCTION_DISK_READ "disk-read" > +#define LED_FUNCTION_DISK_WRITE "disk-write" > +#define LED_FUNCTION_FAULT "fault" > +#define LED_FUNCTION_FLASH "flash" > +#define LED_FUNCTION_HEARTBEAT "heartbeat" > +#define LED_FUNCTION_INDICATOR "indicator" > +#define LED_FUNCTION_KEYBOARD "keyboard" > +#define LED_FUNCTION_KEYPAD "keypad" > +#define LED_FUNCTION_LAN "lan" > +#define LED_FUNCTION_MMC "mmc" > +#define LED_FUNCTION_NAND "nand" > +#define LED_FUNCTION_ON "on" > +#define LED_FUNCTION_PROGRAMMING "programming" > +#define LED_FUNCTION_POWER "power" > +#define LED_FUNCTION_RX "rx" > +#define LED_FUNCTION_SD "sd" > +#define LED_FUNCTION_STANDBY "standby" > +#define LED_FUNCTION_STATUS "status" > +#define LED_FUNCTION_TORCH "torch" > +#define LED_FUNCTION_TV "tv" > +#define LED_FUNCTION_TX "tx" > +#define LED_FUNCTION_USB "usb" > +#define LED_FUNCTION_WAN "wan" > +#define LED_FUNCTION_WLAN "wlan" > +#define LED_FUNCTION_WPS "wps" > + > #endif /* __DT_BINDINGS_LEDS_H */ > Reviewed-by: Dan Murphy -- -- Dan Murphy
Re: [RFC PATCH 00/25] Accelerate page migration and use memcg for PMEM management
On 4/3/19 7:00 PM, Zi Yan wrote: From: Zi Yan Thanks to Dave Hansen's patches, which make PMEM as part of memory as NUMA nodes. How to use PMEM along with normal DRAM remains an open problem. There are several patchsets posted on the mailing list, proposing to use page migration to move pages between PMEM and DRAM using Linux page replacement policy [1,2,3]. There are some important problems not addressed in these patches: 1. The page migration in Linux does not provide high enough throughput for us to fully exploit PMEM or other use cases. 2. Linux page replacement is running too infrequent to distinguish hot and cold pages. I am trying to attack the problems with this patch series. This is not a final solution, but I would like to gather more feedback and comments from the mailing list. Page migration throughput problem For example, in my recent email [4], I gave the page migration throughput numbers for different page migrations, none of which can achieve > 2.5GB/s throughput (the throughput is measured around kernel functions: migrate_pages() and migrate_page_copy()): | migrate_pages() |migrate_page_copy() migrating single 4KB page: | 0.312GB/s | 1.385GB/s migrating 512 4KB pages: | 0.854GB/s | 1.983GB/s migrating single 2MB THP:| 2.387GB/s | 2.481GB/s In reality, microbenchmarks show that Intel PMEM can provide ~65GB/s read throughput and ~16GB/s write throughput [5], which are much higher than the throughput achieved by Linux page migration. In addition, it is also desirable to use page migration to move data between high-bandwidth memory and DRAM, like IBM Summit, which exposes high-performance GPU memories as NUMA nodes [6]. This requires even higher page migration throughput. In this patch series, I propose four different ways of improving page migration throughput (mostly on 2MB THP migration): 1. multi-threaded page migration: Patch 03 to 06. 2. DMA-based (using Intel IOAT DMA) page migration: Patch 07 and 08. 3. concurrent (batched) page migration: Patch 09, 10, and 11. 4. exchange pages: Patch 12 to 17. (This is a repost of part of [7]) Here are some throughput numbers showing clear throughput improvements on a two-socket NUMA machine with two Xeon E5-2650 v3 @ 2.30GHz and a 19.2GB/s bandwidth QPI link (the same machine as mentioned in [4]): | migrate_pages() | migrate_page_copy() => migrating single 2MB THP | 2.387GB/s | 2.481GB/s 2-thread single THP migration | 3.478GB/s | 3.704GB/s 4-thread single THP migration | 5.474GB/s | 6.054GB/s 8-thread single THP migration | 7.846GB/s | 9.029GB/s 16-thread single THP migration | 7.423GB/s | 8.464GB/s 16-ch. DMA single THP migration | 4.322GB/s | 4.536GB/s 2-thread 16-THP migration | 3.610GB/s | 3.838GB/s 2-thread 16-THP batched migration | 4.138GB/s | 4.344GB/s 4-thread 16-THP migration | 6.385GB/s | 7.031GB/s 4-thread 16-THP batched migration | 7.382GB/s | 8.072GB/s 8-thread 16-THP migration | 8.039GB/s | 9.029GB/s 8-thread 16-THP batched migration | 9.023GB/s | 10.056GB/s 16-thread 16-THP migration | 8.137GB/s | 9.137GB/s 16-thread 16-THP batched migration | 9.907GB/s | 11.175GB/s 1-thread 16-THP exchange | 4.135GB/s | 4.225GB/s 2-thread 16-THP batched exchange | 7.061GB/s | 7.325GB/s 4-thread 16-THP batched exchange | 9.729GB/s | 10.237GB/s 8-thread 16-THP batched exchange | 9.992GB/s | 10.533GB/s 16-thread 16-THP batched exchange | 9.520GB/s | 10.056GB/s => migrating 512 4KB pages | 0.854GB/s | 1.983GB/s 1-thread 512-4KB batched exchange | 1.271GB/s | 3.433GB/s 2-thread 512-4KB batched exchange | 1.240GB/s | 3.190GB/s 4-thread 512-4KB batched exchange | 1.255GB/s | 3.823GB/s 8-thread 512-4KB batched exchange | 1.336GB/s | 3.921GB/s 16-thread 512-4KB batched exchange | 1.334GB/s | 3.897GB/s Concerns were raised on how to avoid CPU resource competition between page migration and user applications and have power awareness. Daniel Jordan recently posted a multi-threaded ktask patch series could be a solution [8]. Infrequent page list update problem Current page lists are updated by calling shrink_list() when memory pressure comes, which might not be frequent enough to keep track of hot and cold pages. Because all pages are on active lists at the first time shrink_list() is called and the reference bit on the pages might not reflect the up to date access status of these pages. But we also do not want to periodically shrink the global page lists, which adds unnecessary overheads to the whole system. So I propose to actively shrink page lists on the
[PATCH V2 03/20] spi: tegra114: de-assert CS before SPI mode change
With SW CS, during the transfer completion CS is de-asserted by writing
default command1 register value to SPI_COMMAND1 register. With this both
mode and CS state are set at the same time and if current transfer mode
is different to default SPI mode and if mode change happens prior to CS
de-assert, clock polarity can change while CS is active before transfer
finishes.
This causes Slave to see spurious clock edges resulting in data mismatch.
This patch fixes this by de-asserting CS before writing SPI_COMMAND1 to
its default value so through out the transfer it will be in same SPI mode.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 22 --
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index 3042521c3785..c60e40cab0a0 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -863,6 +863,19 @@ static void tegra_spi_transfer_delay(int delay)
udelay(delay % 1000);
}
+static void tegra_spi_transfer_end(struct spi_device *spi)
+{
+ struct tegra_spi_data *tspi = spi_master_get_devdata(spi->master);
+ int cs_val = (spi->mode & SPI_CS_HIGH) ? 0 : 1;
+
+ if (cs_val)
+ tspi->command1_reg |= SPI_CS_SW_VAL;
+ else
+ tspi->command1_reg &= ~SPI_CS_SW_VAL;
+ tegra_spi_writel(tspi, tspi->command1_reg, SPI_COMMAND1);
+ tegra_spi_writel(tspi, tspi->def_command1_reg, SPI_COMMAND1);
+}
+
static int tegra_spi_transfer_one_message(struct spi_master *master,
struct spi_message *msg)
{
@@ -925,8 +938,7 @@ static int tegra_spi_transfer_one_message(struct spi_master
*master,
complete_xfer:
if (ret < 0 || skip) {
- tegra_spi_writel(tspi, tspi->def_command1_reg,
- SPI_COMMAND1);
+ tegra_spi_transfer_end(spi);
tegra_spi_transfer_delay(xfer->delay_usecs);
goto exit;
} else if (list_is_last(>transfer_list,
@@ -934,13 +946,11 @@ static int tegra_spi_transfer_one_message(struct
spi_master *master,
if (xfer->cs_change)
tspi->cs_control = spi;
else {
- tegra_spi_writel(tspi, tspi->def_command1_reg,
- SPI_COMMAND1);
+ tegra_spi_transfer_end(spi);
tegra_spi_transfer_delay(xfer->delay_usecs);
}
} else if (xfer->cs_change) {
- tegra_spi_writel(tspi, tspi->def_command1_reg,
- SPI_COMMAND1);
+ tegra_spi_transfer_end(spi);
tegra_spi_transfer_delay(xfer->delay_usecs);
}
--
2.7.4
[PATCH V2 04/20] spi: tegra114: avoid reset call in atomic context
This patch moves SPI controller reset out of spin lock. Signed-off-by: Sowjanya Komatineni --- drivers/spi/spi-tegra114.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index c60e40cab0a0..d928a2c92a3d 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c @@ -974,11 +974,12 @@ static irqreturn_t handle_cpu_based_xfer(struct tegra_spi_data *tspi) dev_err(tspi->dev, "CpuXfer 0x%08x:0x%08x\n", tspi->command1_reg, tspi->dma_control_reg); tegra_spi_flush_fifos(tspi); + complete(>xfer_completion); + spin_unlock_irqrestore(>lock, flags); reset_control_assert(tspi->rst); udelay(2); reset_control_deassert(tspi->rst); - complete(>xfer_completion); - goto exit; + return IRQ_HANDLED; } if (tspi->cur_direction & DATA_DIR_RX) @@ -1047,11 +1048,11 @@ static irqreturn_t handle_dma_based_xfer(struct tegra_spi_data *tspi) dev_err(tspi->dev, "DmaXfer 0x%08x:0x%08x\n", tspi->command1_reg, tspi->dma_control_reg); tegra_spi_flush_fifos(tspi); + complete(>xfer_completion); + spin_unlock_irqrestore(>lock, flags); reset_control_assert(tspi->rst); udelay(2); reset_control_deassert(tspi->rst); - complete(>xfer_completion); - spin_unlock_irqrestore(>lock, flags); return IRQ_HANDLED; } -- 2.7.4
[PATCH V2 10/20] Documentation: devicetree: spi: add spi-lsbyte-first propery
spi-lsbyte-first optional property allows SPI slaves to choose byte order of little endian for transfers. Signed-off-by: Sowjanya Komatineni --- Documentation/devicetree/bindings/spi/spi-bus.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt index 1f6e86f787ef..b455c24a80df 100644 --- a/Documentation/devicetree/bindings/spi/spi-bus.txt +++ b/Documentation/devicetree/bindings/spi/spi-bus.txt @@ -71,6 +71,7 @@ All slave nodes can contain the following optional properties: active high. - spi-3wire - Empty property indicating device requires 3-wire mode. - spi-lsb-first - Empty property indicating device requires LSB first mode. +- spi-lsbyte-first - Empty property indicating device requires LSByte first mode. - spi-tx-bus-width - The bus width (number of data wires) that is used for MOSI. Defaults to 1 if not present. - spi-rx-bus-width - The bus width (number of data wires) that is used for MISO. -- 2.7.4
[PATCH V2 07/20] spi: tegra114: set bus number based on id
This patch sets SPI device id from the device tree as the bus number.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index 191233eae149..58f5059b339f 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -1138,6 +1138,7 @@ static int tegra_spi_probe(struct platform_device *pdev)
struct tegra_spi_data *tspi;
struct resource *r;
int ret, spi_irq;
+ int bus_num;
master = spi_alloc_master(>dev, sizeof(*tspi));
if (!master) {
@@ -1158,6 +1159,9 @@ static int tegra_spi_probe(struct platform_device *pdev)
master->transfer_one_message = tegra_spi_transfer_one_message;
master->num_chipselect = MAX_CHIP_SELECT;
master->auto_runtime_pm = true;
+ bus_num = of_alias_get_id(pdev->dev.of_node, "spi");
+ if (bus_num >= 0)
+ master->bus_num = bus_num;
tspi->master = master;
tspi->dev = >dev;
--
2.7.4
[PATCH V2 02/20] spi: tegra114: use unpacked mode for below 4 bytes
Packed mode expects minimum transfer length of 4 bytes.
This patch fixes this by using unpacked mode for transfers less
than 4 bytes.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index ba1639310282..3042521c3785 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -259,7 +259,8 @@ static unsigned tegra_spi_calculate_curr_xfer_param(
tspi->bytes_per_word = DIV_ROUND_UP(bits_per_word, 8);
- if (bits_per_word == 8 || bits_per_word == 16 || bits_per_word == 32) {
+ if ((bits_per_word == 8 || bits_per_word == 16 ||
+bits_per_word == 32) && t->len > 3) {
tspi->is_packed = 1;
tspi->words_per_32bit = 32/bits_per_word;
} else {
--
2.7.4
[PATCH V2 12/20] spi: tegra114: add support for LSBYTE_FIRST
Some SPI devices expects SPI transfers to be in Least significant byte first order and some devices expect Most significant byte first order. This patch adds SPI_LSBYTE_FIRST to the supported SPI mode list and also configures Tegra SPI controller accordingly. Signed-off-by: Sowjanya Komatineni --- drivers/spi/spi-tegra114.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index 212bb90aa0cb..d3b95bba2361 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c @@ -755,6 +755,11 @@ static u32 tegra_spi_setup_transfer_one(struct spi_device *spi, else command1 &= ~SPI_LSBIT_FE; + if (spi->mode & SPI_LSBYTE_FIRST) + command1 |= SPI_LSBYTE_FE; + else + command1 &= ~SPI_LSBYTE_FE; + if (spi->mode & SPI_3WIRE) command1 |= SPI_BIDIROE; else @@ -1164,7 +1169,8 @@ static int tegra_spi_probe(struct platform_device *pdev) /* the spi->mode bits understood by this driver: */ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST | - SPI_TX_DUAL | SPI_RX_DUAL | SPI_3WIRE; + SPI_TX_DUAL | SPI_RX_DUAL | SPI_3WIRE | + SPI_LSBYTE_FIRST; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); master->setup = tegra_spi_setup; master->transfer_one_message = tegra_spi_transfer_one_message; -- 2.7.4
[PATCH V2 11/20] spi: expand mode support and add LSBYTE_FIRST mode
Some SPI Master controllers support configuring Least significant byte
first or Most significant byte first order for transfers. Also some SPI
slave devices expect bytes to be in Least significant first order and
some devices expect Most significant first order.
SPI driver declares mode and mode_bits as u16 and all bits are used.
This patch changes mode and mode_bits to be u32 to allow for more mode
configurations.
This patch also creates SPI_LSBYTE_FIRST mode to allow SPI clients to
choose LSByte order or MSByte order through the device tree property
spi-lsbyte-first.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi.c | 5 -
include/linux/spi/spi.h | 7 ---
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index bd2a424672df..97ce047a776b 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1638,6 +1638,8 @@ static int of_spi_parse_dt(struct spi_controller *ctlr,
struct spi_device *spi,
spi->mode |= SPI_3WIRE;
if (of_property_read_bool(nc, "spi-lsb-first"))
spi->mode |= SPI_LSB_FIRST;
+ if (of_property_read_bool(nc, "spi-lsbyte-first"))
+ spi->mode |= SPI_LSBYTE_FIRST;
/*
* For descriptors associated with the device, polarity inversion is
@@ -2979,10 +2981,11 @@ int spi_setup(struct spi_device *spi)
spi_set_cs(spi, false);
- dev_dbg(>dev, "setup mode %d, %s%s%s%s%u bits/w, %u Hz max -->
%d\n",
+ dev_dbg(>dev, "setup mode %d, %s%s%s%s%s%u bits/w, %u Hz max -->
%d\n",
(int) (spi->mode & (SPI_CPOL | SPI_CPHA)),
(spi->mode & SPI_CS_HIGH) ? "cs_high, " : "",
(spi->mode & SPI_LSB_FIRST) ? "lsb, " : "",
+ (spi->mode & SPI_LSBYTE_FIRST) ? "lsbyte, " : "",
(spi->mode & SPI_3WIRE) ? "3wire, " : "",
(spi->mode & SPI_LOOP) ? "loopback, " : "",
spi->bits_per_word, spi->max_speed_hz,
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index a0975cf76cf6..d5c86b763f43 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -143,7 +143,7 @@ struct spi_device {
u32 max_speed_hz;
u8 chip_select;
u8 bits_per_word;
- u16 mode;
+ u32 mode;
#defineSPI_CPHA0x01/* clock phase */
#defineSPI_CPOL0x02/* clock polarity */
#defineSPI_MODE_0 (0|0) /* (original MicroWire)
*/
@@ -164,6 +164,7 @@ struct spi_device {
#defineSPI_TX_OCTAL0x2000 /* transmit with 8
wires */
#defineSPI_RX_OCTAL0x4000 /* receive with 8 wires
*/
#defineSPI_3WIRE_HIZ 0x8000 /* high impedance
turnaround */
+#define SPI_LSBYTE_FIRST 0x1 /* per-word bytes-on-wire */
int irq;
void*controller_state;
void*controller_data;
@@ -439,7 +440,7 @@ struct spi_controller {
u16 dma_alignment;
/* spi_device.mode flags understood by this controller driver */
- u16 mode_bits;
+ u32 mode_bits;
/* bitmask of supported bits_per_word for transfers */
u32 bits_per_word_mask;
@@ -1276,7 +1277,7 @@ struct spi_board_info {
/* mode becomes spi_device.mode, and is essential for chips
* where the default of SPI_CS_HIGH = 0 is wrong.
*/
- u16 mode;
+ u32 mode;
/* ... may need additional spi_device chip config data here.
* avoid stuff protocol drivers can set; but include stuff
--
2.7.4
[PATCH V2 13/20] spi: tegra114: add support for interrupt mask
This patch creates tegra_spi_soc_data structure to maintain and implement
SPI HW feature differences between different Tegra chips and also creates
a separate compatible string for T124/T210.
Tegra210 and later has a separate interrupt mask register SPI_INTR_MASK
for enabling or disabling interrupts while Tegra124 and prior uses
interrupt enable bits in SPI_DMA_CTL register.
This patch creates flag has_intr_mask_reg in tegra_spi_soc_data to
identify this and implements accordingly.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 53 +-
1 file changed, 48 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index d3b95bba2361..f4e39eb3857c 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -149,6 +149,8 @@
#define SPI_TX_FIFO0x108
#define SPI_RX_FIFO0x188
+#define SPI_INTR_MASK 0x18c
+#define SPI_INTR_ALL_MASK (0x1fUL << 25)
#define MAX_CHIP_SELECT4
#define SPI_FIFO_DEPTH 64
#define DATA_DIR_TX(1 << 0)
@@ -161,6 +163,10 @@
#define MAX_HOLD_CYCLES16
#define SPI_DEFAULT_SPEED 2500
+struct tegra_spi_soc_data {
+ bool has_intr_mask_reg;
+};
+
struct tegra_spi_data {
struct device *dev;
struct spi_master *master;
@@ -211,6 +217,7 @@ struct tegra_spi_data {
u32 *tx_dma_buf;
dma_addr_t tx_dma_phys;
struct dma_async_tx_descriptor *tx_dma_desc;
+ const struct tegra_spi_soc_data *soc_data;
};
static int tegra_spi_runtime_suspend(struct device *dev);
@@ -554,11 +561,13 @@ static int tegra_spi_start_dma_based_transfer(
dma_burst = 8;
}
- if (tspi->cur_direction & DATA_DIR_TX)
- val |= SPI_IE_TX;
+ if (!tspi->soc_data->has_intr_mask_reg) {
+ if (tspi->cur_direction & DATA_DIR_TX)
+ val |= SPI_IE_TX;
- if (tspi->cur_direction & DATA_DIR_RX)
- val |= SPI_IE_RX;
+ if (tspi->cur_direction & DATA_DIR_RX)
+ val |= SPI_IE_RX;
+ }
tegra_spi_writel(tspi, val, SPI_DMA_CTL);
tspi->dma_control_reg = val;
@@ -853,6 +862,12 @@ static int tegra_spi_setup(struct spi_device *spi)
return ret;
}
+ if (tspi->soc_data->has_intr_mask_reg) {
+ val = tegra_spi_readl(tspi, SPI_INTR_MASK);
+ val &= ~SPI_INTR_ALL_MASK;
+ tegra_spi_writel(tspi, val, SPI_INTR_MASK);
+ }
+
spin_lock_irqsave(>lock, flags);
val = tspi->def_command1_reg;
if (spi->mode & SPI_CS_HIGH)
@@ -1141,8 +1156,29 @@ static irqreturn_t tegra_spi_isr(int irq, void
*context_data)
return IRQ_WAKE_THREAD;
}
+static struct tegra_spi_soc_data tegra114_spi_soc_data = {
+ .has_intr_mask_reg = false,
+};
+
+static struct tegra_spi_soc_data tegra124_spi_soc_data = {
+ .has_intr_mask_reg = false,
+};
+
+static struct tegra_spi_soc_data tegra210_spi_soc_data = {
+ .has_intr_mask_reg = true,
+};
+
static const struct of_device_id tegra_spi_of_match[] = {
- { .compatible = "nvidia,tegra114-spi", },
+ {
+ .compatible = "nvidia,tegra114-spi",
+ .data = _spi_soc_data,
+ }, {
+ .compatible = "nvidia,tegra124-spi",
+ .data = _spi_soc_data,
+ }, {
+ .compatible = "nvidia,tegra210-spi",
+ .data = _spi_soc_data,
+ },
{}
};
MODULE_DEVICE_TABLE(of, tegra_spi_of_match);
@@ -1184,6 +1220,13 @@ static int tegra_spi_probe(struct platform_device *pdev)
tspi->dev = >dev;
spin_lock_init(>lock);
+ tspi->soc_data = of_device_get_match_data(>dev);
+ if (!tspi->soc_data) {
+ dev_err(>dev, "unsupported tegra\n");
+ ret = -ENODEV;
+ goto exit_free_master;
+ }
+
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
tspi->base = devm_ioremap_resource(>dev, r);
if (IS_ERR(tspi->base)) {
--
2.7.4
[PATCH V2 16/20] spi-summary: document set_cs_timing
This patch documents set_cs_timing SPI master method. Signed-off-by: Sowjanya Komatineni --- Documentation/spi/spi-summary | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/spi/spi-summary b/Documentation/spi/spi-summary index 1721c1b570c3..1a63194b74d7 100644 --- a/Documentation/spi/spi-summary +++ b/Documentation/spi/spi-summary @@ -572,6 +572,12 @@ SPI MASTER METHODS 0: transfer is finished 1: transfer is still in progress +master->set_cs_timing(struct spi_device *spi, u8 setup_clk_cycles, + u8 hold_clk_cycles, u8 inactive_clk_cycles) + This method allows SPI client drivers to request SPI master controller + for configuring device specific CS setup, hold and inactive timing + requirements. + DEPRECATED METHODS master->transfer(struct spi_device *spi, struct spi_message *message) -- 2.7.4
[PATCH V2 14/20] spi: tegra114: add support for gpio based cs
This patch adds supports for chip select control using GPIO if valid
CS gpio exists.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 59 ++
1 file changed, 59 insertions(+)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index f4e39eb3857c..209ec05a349f 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -23,6 +23,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -167,6 +168,10 @@ struct tegra_spi_soc_data {
bool has_intr_mask_reg;
};
+struct tegra_spi_client_state {
+ bool cs_gpio_valid;
+};
+
struct tegra_spi_data {
struct device *dev;
struct spi_master *master;
@@ -726,6 +731,7 @@ static u32 tegra_spi_setup_transfer_one(struct spi_device
*spi,
struct spi_transfer *t, bool is_first_of_msg)
{
struct tegra_spi_data *tspi = spi_master_get_devdata(spi->master);
+ struct tegra_spi_client_state *cstate = spi->controller_state;
u32 speed = t->speed_hz;
u8 bits_per_word = t->bits_per_word;
u32 command1;
@@ -787,6 +793,12 @@ static u32 tegra_spi_setup_transfer_one(struct spi_device
*spi,
else
command1 &= ~SPI_CS_SW_VAL;
+ if (cstate->cs_gpio_valid) {
+ int val = (spi->mode & SPI_CS_HIGH) ? 1 : 0;
+
+ gpio_set_value(spi->cs_gpio, val);
+ }
+
tegra_spi_writel(tspi, 0, SPI_COMMAND2);
} else {
command1 = tspi->command1_reg;
@@ -843,9 +855,20 @@ static int tegra_spi_start_transfer_one(struct spi_device
*spi,
return ret;
}
+static void tegra_spi_cleanup(struct spi_device *spi)
+{
+ struct tegra_spi_client_state *cstate = spi->controller_state;
+
+ spi->controller_state = NULL;
+ if (cstate && cstate->cs_gpio_valid)
+ gpio_free(spi->cs_gpio);
+ kfree(cstate);
+}
+
static int tegra_spi_setup(struct spi_device *spi)
{
struct tegra_spi_data *tspi = spi_master_get_devdata(spi->master);
+ struct tegra_spi_client_state *cstate = spi->controller_state;
u32 val;
unsigned long flags;
int ret;
@@ -856,9 +879,40 @@ static int tegra_spi_setup(struct spi_device *spi)
spi->mode & SPI_CPHA ? "" : "~",
spi->max_speed_hz);
+ if (!cstate) {
+ cstate = kzalloc(sizeof(*cstate), GFP_KERNEL);
+ if (!cstate)
+ return -ENOMEM;
+ spi->controller_state = cstate;
+ }
+
+ if (spi->master->cs_gpios && gpio_is_valid(spi->cs_gpio)) {
+ if (!cstate->cs_gpio_valid) {
+ int gpio_flag = GPIOF_OUT_INIT_HIGH;
+
+ if (spi->mode & SPI_CS_HIGH)
+ gpio_flag = GPIOF_OUT_INIT_LOW;
+
+ ret = gpio_request_one(spi->cs_gpio, gpio_flag,
+ "cs_gpio");
+ if (ret < 0) {
+ dev_err(>dev,
+ "GPIO request failed: %d\n", ret);
+ tegra_spi_cleanup(spi);
+ return ret;
+ }
+ cstate->cs_gpio_valid = true;
+ } else {
+ int val = (spi->mode & SPI_CS_HIGH) ? 0 : 1;
+
+ gpio_set_value(spi->cs_gpio, val);
+ }
+ }
+
ret = pm_runtime_get_sync(tspi->dev);
if (ret < 0) {
dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret);
+ tegra_spi_cleanup(spi);
return ret;
}
@@ -896,8 +950,12 @@ static void tegra_spi_transfer_delay(int delay)
static void tegra_spi_transfer_end(struct spi_device *spi)
{
struct tegra_spi_data *tspi = spi_master_get_devdata(spi->master);
+ struct tegra_spi_client_state *cstate = spi->controller_state;
int cs_val = (spi->mode & SPI_CS_HIGH) ? 0 : 1;
+ if (cstate->cs_gpio_valid)
+ gpio_set_value(spi->cs_gpio, cs_val);
+
if (cs_val)
tspi->command1_reg |= SPI_CS_SW_VAL;
else
@@ -1209,6 +1267,7 @@ static int tegra_spi_probe(struct platform_device *pdev)
SPI_LSBYTE_FIRST;
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
master->setup = tegra_spi_setup;
+ master->cleanup = tegra_spi_cleanup;
master->transfer_one_message = tegra_spi_transfer_one_message;
master->num_chipselect = MAX_CHIP_SELECT;
master->auto_runtime_pm = true;
--
2.7.4
[PATCH V2 09/20] spi: tegra114: add 3 wire transfer mode support
This patch adds 3 wire transfer support to SPI mode list along with
its implementation.
3 wire or Bi-directional mode uses only one serial data pin for the
transfer. SPI in master mode uses MOSI data line only and MISO data
line is not used.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index 239fb0c8c31f..212bb90aa0cb 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -755,6 +755,11 @@ static u32 tegra_spi_setup_transfer_one(struct spi_device
*spi,
else
command1 &= ~SPI_LSBIT_FE;
+ if (spi->mode & SPI_3WIRE)
+ command1 |= SPI_BIDIROE;
+ else
+ command1 &= ~SPI_BIDIROE;
+
if (tspi->cs_control) {
if (tspi->cs_control != spi)
tegra_spi_writel(tspi, command1, SPI_COMMAND1);
@@ -1159,7 +1164,7 @@ static int tegra_spi_probe(struct platform_device *pdev)
/* the spi->mode bits understood by this driver: */
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST |
- SPI_TX_DUAL | SPI_RX_DUAL;
+ SPI_TX_DUAL | SPI_RX_DUAL | SPI_3WIRE;
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
master->setup = tegra_spi_setup;
master->transfer_one_message = tegra_spi_transfer_one_message;
--
2.7.4
[PATCH V2 18/20] spi: tegra114: add support for HW CS timing
This patch implements set_cs_timing SPI controller method to allow
SPI client driver to configure device specific SPI CS timings.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 48 --
1 file changed, 46 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index 5cc347b345b1..34dee28554ef 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -96,8 +96,10 @@
(reg = (((val) & 0x1) << ((cs) * 8 + 5)) | \
((reg) & ~(1 << ((cs) * 8 + 5
#define SPI_SET_CYCLES_BETWEEN_PACKETS(reg, cs, val) \
- (reg = (((val) & 0xF) << ((cs) * 8)) | \
- ((reg) & ~(0xF << ((cs) * 8
+ (reg = (((val) & 0x1F) << ((cs) * 8)) | \
+ ((reg) & ~(0x1F << ((cs) * 8
+#define MAX_SETUP_HOLD_CYCLES 16
+#define MAX_INACTIVE_CYCLES32
#define SPI_TRANS_STATUS 0x010
#define SPI_BLK_CNT(val) (((val) >> 0) & 0x)
@@ -211,6 +213,8 @@ struct tegra_spi_data {
u32 command1_reg;
u32 dma_control_reg;
u32 def_command1_reg;
+ u32 spi_cs_timing1;
+ u32 spi_cs_timing2;
struct completion xfer_completion;
struct spi_transfer *curr_xfer;
@@ -728,6 +732,43 @@ static void tegra_spi_deinit_dma_param(struct
tegra_spi_data *tspi,
dma_release_channel(dma_chan);
}
+static void tegra_spi_set_hw_cs_timing(struct spi_device *spi, u8 setup_dly,
+ u8 hold_dly, u8 inactive_dly)
+{
+ struct tegra_spi_data *tspi = spi_master_get_devdata(spi->master);
+ u32 setup_hold;
+ u32 spi_cs_timing;
+ u32 inactive_cycles;
+ u8 cs_state;
+
+ setup_dly = min_t(u8, setup_dly, MAX_SETUP_HOLD_CYCLES);
+ hold_dly = min_t(u8, hold_dly, MAX_SETUP_HOLD_CYCLES);
+ if (setup_dly && hold_dly) {
+ setup_hold = SPI_SETUP_HOLD(setup_dly - 1, hold_dly - 1);
+ spi_cs_timing = SPI_CS_SETUP_HOLD(tspi->spi_cs_timing1,
+ spi->chip_select,
+ setup_hold);
+ if (tspi->spi_cs_timing1 != spi_cs_timing) {
+ tspi->spi_cs_timing1 = spi_cs_timing;
+ tegra_spi_writel(tspi, spi_cs_timing, SPI_CS_TIMING1);
+ }
+ }
+
+ inactive_cycles = min_t(u8, inactive_dly, MAX_INACTIVE_CYCLES);
+ if (inactive_cycles)
+ inactive_cycles--;
+ cs_state = inactive_cycles ? 0 : 1;
+ spi_cs_timing = tspi->spi_cs_timing2;
+ SPI_SET_CS_ACTIVE_BETWEEN_PACKETS(spi_cs_timing, spi->chip_select,
+ cs_state);
+ SPI_SET_CYCLES_BETWEEN_PACKETS(spi_cs_timing, spi->chip_select,
+ inactive_cycles);
+ if (tspi->spi_cs_timing2 != spi_cs_timing) {
+ tspi->spi_cs_timing2 = spi_cs_timing;
+ tegra_spi_writel(tspi, spi_cs_timing, SPI_CS_TIMING2);
+ }
+}
+
static u32 tegra_spi_setup_transfer_one(struct spi_device *spi,
struct spi_transfer *t, bool is_first_of_msg,
bool is_single_xfer)
@@ -1283,6 +1324,7 @@ static int tegra_spi_probe(struct platform_device *pdev)
master->setup = tegra_spi_setup;
master->cleanup = tegra_spi_cleanup;
master->transfer_one_message = tegra_spi_transfer_one_message;
+ master->set_cs_timing = tegra_spi_set_hw_cs_timing;
master->num_chipselect = MAX_CHIP_SELECT;
master->auto_runtime_pm = true;
bus_num = of_alias_get_id(pdev->dev.of_node, "spi");
@@ -1358,6 +1400,8 @@ static int tegra_spi_probe(struct platform_device *pdev)
reset_control_deassert(tspi->rst);
tspi->def_command1_reg = SPI_M_S;
tegra_spi_writel(tspi, tspi->def_command1_reg, SPI_COMMAND1);
+ tspi->spi_cs_timing1 = tegra_spi_readl(tspi, SPI_CS_TIMING1);
+ tspi->spi_cs_timing2 = tegra_spi_readl(tspi, SPI_CS_TIMING2);
pm_runtime_put(>dev);
ret = request_threaded_irq(tspi->irq, tegra_spi_isr,
tegra_spi_isr_thread, IRQF_ONESHOT,
--
2.7.4
[PATCH V2 17/20] spi: add a method for configuring CS timing
This patch creates set_cs_timing SPI master optional method for
SPI masters to implement configuring CS timing if applicable.
This patch also creates spi_cs_timing accessory for SPI clients to
use for requesting SPI master controllers to configure device requested
CS setup time, hold time and inactive delay.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi.c | 15 +++
include/linux/spi/spi.h | 15 +++
2 files changed, 30 insertions(+)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 97ce047a776b..0f92329e990f 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -2995,6 +2995,21 @@ int spi_setup(struct spi_device *spi)
}
EXPORT_SYMBOL_GPL(spi_setup);
+/**
+ * spi_set_cs_timing - configure CS setup, hold, and inactive delays
+ * @spi: the device that requires specific CS timing configuration
+ * @setup: CS setup time in terms of clock count
+ * @hold: CS hold time in terms of clock count
+ * @inactive_dly: CS inactive delay between transfers in terms of clock count
+ */
+void spi_set_cs_timing(struct spi_device *spi, u8 setup, u8 hold,
+ u8 inactive_dly)
+{
+ if (spi->controller->set_cs_timing)
+ spi->controller->set_cs_timing(spi, setup, hold, inactive_dly);
+}
+EXPORT_SYMBOL_GPL(spi_set_cs_timing);
+
static int __spi_validate(struct spi_device *spi, struct spi_message *message)
{
struct spi_controller *ctlr = spi->controller;
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index d5c86b763f43..fc4d21b4c2e4 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -331,6 +331,9 @@ static inline void spi_unregister_driver(struct spi_driver
*sdrv)
* must fail if an unrecognized or unsupported mode is requested.
* It's always safe to call this unless transfers are pending on
* the device whose settings are being modified.
+ * @set_cs_timing: optional hook for SPI devices to request SPI master
+ * controller for configuring specific CS setup time, hold time and inactive
+ * delay interms of clock counts
* @transfer: adds a message to the controller's transfer queue.
* @cleanup: frees controller-specific state
* @can_dma: determine whether this controller supports DMA
@@ -364,6 +367,7 @@ static inline void spi_unregister_driver(struct spi_driver
*sdrv)
* @unprepare_transfer_hardware: there are currently no more messages on the
* queue so the subsystem notifies the driver that it may relax the
* hardware by issuing this call
+ *
* @set_cs: set the logic level of the chip select line. May be called
* from interrupt context.
* @prepare_message: set up the controller to transfer a single message,
@@ -489,6 +493,17 @@ struct spi_controller {
*/
int (*setup)(struct spi_device *spi);
+ /*
+* set_cs_timing() method is for SPI controllers that supports
+* configuring CS timing.
+*
+* This hook allows SPI client drivers to request SPI controllers
+* to configure specific CS timing through spi_set_cs_timing() after
+* spi_setup().
+*/
+ void (*set_cs_timing)(struct spi_device *spi, u8 setup_clk_cycles,
+ u8 hold_clk_cycles, u8 inactive_clk_cycles);
+
/* bidirectional bulk transfers
*
* + The transfer() method may not sleep; its main role is
--
2.7.4
[PATCH V2 20/20] spi: tegra114: add support for tuning TX and RX trimmers
Tegra SPI controller has TX_CLK_TAP_DELAY and RX_CLK_TAP_DELAY in
COMMAND2 register to tune the delay of the clock going out to external
device during transmit and also for the clock coming in from external
device during receive.
TX/RX clock tap delays may vary based on the trace lengths of the
platform design for each of the slaves on the SPI bus.
This patch adds support for configuring TX/RX clock delays specified
through device tree properties.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 63 +-
1 file changed, 62 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index 34dee28554ef..9854e6fbddff 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -170,6 +170,11 @@ struct tegra_spi_soc_data {
bool has_intr_mask_reg;
};
+struct tegra_spi_client_data {
+ int tx_clk_tap_delay;
+ int rx_clk_tap_delay;
+};
+
struct tegra_spi_client_state {
bool cs_gpio_valid;
};
@@ -213,8 +218,10 @@ struct tegra_spi_data {
u32 command1_reg;
u32 dma_control_reg;
u32 def_command1_reg;
+ u32 def_command2_reg;
u32 spi_cs_timing1;
u32 spi_cs_timing2;
+ u8 last_used_cs;
struct completion xfer_completion;
struct spi_transfer *curr_xfer;
@@ -774,11 +781,13 @@ static u32 tegra_spi_setup_transfer_one(struct spi_device
*spi,
bool is_single_xfer)
{
struct tegra_spi_data *tspi = spi_master_get_devdata(spi->master);
+ struct tegra_spi_client_data *cdata = spi->controller_data;
struct tegra_spi_client_state *cstate = spi->controller_state;
u32 speed = t->speed_hz;
u8 bits_per_word = t->bits_per_word;
- u32 command1;
+ u32 command1, command2;
int req_mode;
+ u32 tx_tap = 0, rx_tap = 0;
if (speed != tspi->cur_speed) {
clk_set_rate(tspi->clk, speed);
@@ -848,6 +857,18 @@ static u32 tegra_spi_setup_transfer_one(struct spi_device
*spi,
gpio_set_value(spi->cs_gpio, val);
}
+ if (tspi->last_used_cs != spi->chip_select) {
+ if (cdata && cdata->tx_clk_tap_delay)
+ tx_tap = cdata->tx_clk_tap_delay;
+ if (cdata && cdata->rx_clk_tap_delay)
+ rx_tap = cdata->rx_clk_tap_delay;
+ command2 = SPI_TX_TAP_DELAY(tx_tap) |
+ SPI_RX_TAP_DELAY(rx_tap);
+ if (command2 != tspi->def_command2_reg)
+ tegra_spi_writel(tspi, command2, SPI_COMMAND2);
+ tspi->last_used_cs = spi->chip_select;
+ }
+
tegra_spi_writel(tspi, 0, SPI_COMMAND2);
} else {
command1 = tspi->command1_reg;
@@ -904,19 +925,47 @@ static int tegra_spi_start_transfer_one(struct spi_device
*spi,
return ret;
}
+static struct tegra_spi_client_data
+ *tegra_spi_parse_cdata_dt(struct spi_device *spi)
+{
+ struct tegra_spi_client_data *cdata;
+ struct device_node *slave_np;
+
+ slave_np = spi->dev.of_node;
+ if (!slave_np) {
+ dev_dbg(>dev, "device node not found\n");
+ return NULL;
+ }
+
+ cdata = kzalloc(sizeof(*cdata), GFP_KERNEL);
+ if (!cdata)
+ return NULL;
+
+ of_property_read_u32(slave_np, "nvidia,tx-clk-tap-delay",
+>tx_clk_tap_delay);
+ of_property_read_u32(slave_np, "nvidia,rx-clk-tap-delay",
+>rx_clk_tap_delay);
+ return cdata;
+}
+
static void tegra_spi_cleanup(struct spi_device *spi)
{
struct tegra_spi_client_state *cstate = spi->controller_state;
+ struct tegra_spi_client_data *cdata = spi->controller_data;
spi->controller_state = NULL;
if (cstate && cstate->cs_gpio_valid)
gpio_free(spi->cs_gpio);
kfree(cstate);
+ spi->controller_data = NULL;
+ if (spi->dev.of_node)
+ kfree(cdata);
}
static int tegra_spi_setup(struct spi_device *spi)
{
struct tegra_spi_data *tspi = spi_master_get_devdata(spi->master);
+ struct tegra_spi_client_data *cdata = spi->controller_data;
struct tegra_spi_client_state *cstate = spi->controller_state;
u32 val;
unsigned long flags;
@@ -935,6 +984,11 @@ static int tegra_spi_setup(struct spi_device *spi)
spi->controller_state = cstate;
}
+ if (!cdata) {
+
[PATCH V2 19/20] DT bindings: spi: document tx/rx clock delay properties
Tegra SPI controller has TX and RX trimmers to tuning the delay of
SPI master clock with respect to the data.
TX and RX tap values are based on the platform validation across the
PVT and the trimmer values vary based on the trace lengths to the
corresponding SPI devices.
Signed-off-by: Sowjanya Komatineni
---
.../devicetree/bindings/spi/nvidia,tegra114-spi.txt | 20
1 file changed, 20 insertions(+)
diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
index 9ba7c5a273b4..db8e0d71c5bc 100644
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
@@ -23,6 +23,18 @@ Required properties:
Recommended properties:
- spi-max-frequency: Definition as per
Documentation/devicetree/bindings/spi/spi-bus.txt
+Optional properties:
+- nvidia,tx-clk-tap-delay: Delays the clock going out to the external device
+ with this tap value. This property is used to tune the outgoing data from
+ Tegra SPI master with respect to outgoing Tegra SPI master clock.
+ Tap values vary based on the platform design trace lengths from Tegra SPI
+ to corresponding slave devices. Valid tap values are from 0 thru 63.
+- nvidia,rx-clk-tap-delay: Delays the clock coming in from the external device
+ with this tap value. This property is used to adjust the Tegra SPI master
+ clock with respect to the data from the SPI slave device.
+ Tap values vary based on the platform design trace lengths from Tegra SPI
+ to corresponding slave devices. Valid tap values are from 0 thru 63.
+
Example:
spi@7000d600 {
@@ -38,4 +50,12 @@ spi@7000d600 {
reset-names = "spi";
dmas = < 16>, < 16>;
dma-names = "rx", "tx";
+ @ {
+ ...
+ ...
+ nvidia,rx-clk-tap-delay = <0>;
+ nvidia,tx-clk-tap-delay = <16>;
+ ...
+ };
+
};
--
2.7.4
[PATCH V2 01/20] spi: tegra114: fix PIO transfer
This patch fixes PIO mode transfer to use PIO bit in SPI_COMMAND1 register. Current driver uses DMA_EN instead of PIO bit. Signed-off-by: Sowjanya Komatineni --- drivers/spi/spi-tegra114.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index 6bb40e46da91..ba1639310282 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c @@ -641,8 +641,9 @@ static int tegra_spi_start_cpu_based_transfer( tspi->is_curr_dma_xfer = false; - val |= SPI_DMA_EN; - tegra_spi_writel(tspi, val, SPI_DMA_CTL); + val = tspi->command1_reg; + val |= SPI_PIO; + tegra_spi_writel(tspi, val, SPI_COMMAND1); return 0; } -- 2.7.4
[PATCH V2 06/20] spi: tegra114: set supported bits per word
Tegra SPI supports 4 through 32 bits per word. This patch sets bits_per_word_mask accordingly to support transfer with these bits per word. Signed-off-by: Sowjanya Komatineni --- drivers/spi/spi-tegra114.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index e0f20fad5df2..191233eae149 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c @@ -1153,6 +1153,7 @@ static int tegra_spi_probe(struct platform_device *pdev) /* the spi->mode bits understood by this driver: */ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST; + master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); master->setup = tegra_spi_setup; master->transfer_one_message = tegra_spi_transfer_one_message; master->num_chipselect = MAX_CHIP_SELECT; -- 2.7.4
[PATCH V2 15/20] spi: tegra114: add support for hw based cs
Tegra SPI controller supports both HW and SW based CS control
for SPI transfers.
This patch adds support for HW based CS control where CS is driven
to active state during the transfer and is driven inactive at the
end of the transfer directly by the HW.
This patch enables the use of HW based CS only for single transfers
without cs_change request.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 38 ++
1 file changed, 26 insertions(+), 12 deletions(-)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index 209ec05a349f..5cc347b345b1 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -198,6 +198,7 @@ struct tegra_spi_data {
unsigneddma_buf_size;
unsignedmax_buf_size;
boolis_curr_dma_xfer;
+ booluse_hw_based_cs;
struct completion rx_dma_complete;
struct completion tx_dma_complete;
@@ -728,7 +729,8 @@ static void tegra_spi_deinit_dma_param(struct
tegra_spi_data *tspi,
}
static u32 tegra_spi_setup_transfer_one(struct spi_device *spi,
- struct spi_transfer *t, bool is_first_of_msg)
+ struct spi_transfer *t, bool is_first_of_msg,
+ bool is_single_xfer)
{
struct tegra_spi_data *tspi = spi_master_get_devdata(spi->master);
struct tegra_spi_client_state *cstate = spi->controller_state;
@@ -787,11 +789,17 @@ static u32 tegra_spi_setup_transfer_one(struct spi_device
*spi,
} else
tegra_spi_writel(tspi, command1, SPI_COMMAND1);
- command1 |= SPI_CS_SW_HW;
- if (spi->mode & SPI_CS_HIGH)
- command1 |= SPI_CS_SW_VAL;
- else
- command1 &= ~SPI_CS_SW_VAL;
+ if (is_single_xfer && !(t->cs_change)) {
+ tspi->use_hw_based_cs = true;
+ command1 &= ~(SPI_CS_SW_HW | SPI_CS_SW_VAL);
+ } else {
+ tspi->use_hw_based_cs = false;
+ command1 |= SPI_CS_SW_HW;
+ if (spi->mode & SPI_CS_HIGH)
+ command1 |= SPI_CS_SW_VAL;
+ else
+ command1 &= ~SPI_CS_SW_VAL;
+ }
if (cstate->cs_gpio_valid) {
int val = (spi->mode & SPI_CS_HIGH) ? 1 : 0;
@@ -956,11 +964,14 @@ static void tegra_spi_transfer_end(struct spi_device *spi)
if (cstate->cs_gpio_valid)
gpio_set_value(spi->cs_gpio, cs_val);
- if (cs_val)
- tspi->command1_reg |= SPI_CS_SW_VAL;
- else
- tspi->command1_reg &= ~SPI_CS_SW_VAL;
- tegra_spi_writel(tspi, tspi->command1_reg, SPI_COMMAND1);
+ if (!tspi->use_hw_based_cs) {
+ if (cs_val)
+ tspi->command1_reg |= SPI_CS_SW_VAL;
+ else
+ tspi->command1_reg &= ~SPI_CS_SW_VAL;
+ tegra_spi_writel(tspi, tspi->command1_reg, SPI_COMMAND1);
+ }
+
tegra_spi_writel(tspi, tspi->def_command1_reg, SPI_COMMAND1);
}
@@ -987,16 +998,19 @@ static int tegra_spi_transfer_one_message(struct
spi_master *master,
struct spi_device *spi = msg->spi;
int ret;
bool skip = false;
+ int single_xfer;
msg->status = 0;
msg->actual_length = 0;
+ single_xfer = list_is_singular(>transfers);
list_for_each_entry(xfer, >transfers, transfer_list) {
u32 cmd1;
reinit_completion(>xfer_completion);
- cmd1 = tegra_spi_setup_transfer_one(spi, xfer, is_first_msg);
+ cmd1 = tegra_spi_setup_transfer_one(spi, xfer, is_first_msg,
+ single_xfer);
if (!xfer->len) {
ret = 0;
--
2.7.4
[PATCH V2 08/20] spi: tegra114: add dual mode support
This patch adds support for dual mode SPI transfer. Dual mode uses both MOSI and MISO lines in parallel where the data is interleaved on MOSI and MISO lines increasing the throughput. Packet from Tx FIFO is transmitted on both MOSI and MISO lines and packet to Rx FIFO is received from both MOSI and MISO lines. Even bits are transmitted or received on the MOSI data line and odd bits are transmitted or received on the MISO data line. Signed-off-by: Sowjanya Komatineni --- drivers/spi/spi-tegra114.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index 58f5059b339f..239fb0c8c31f 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c @@ -787,6 +787,11 @@ static int tegra_spi_start_transfer_one(struct spi_device *spi, total_fifo_words = tegra_spi_calculate_curr_xfer_param(spi, tspi, t); + if (t->rx_nbits == SPI_NBITS_DUAL || t->tx_nbits == SPI_NBITS_DUAL) + command1 |= SPI_BOTH_EN_BIT; + else + command1 &= ~SPI_BOTH_EN_BIT; + if (tspi->is_packed) command1 |= SPI_PACKED; else @@ -1153,7 +1158,8 @@ static int tegra_spi_probe(struct platform_device *pdev) master->max_speed_hz = 2500; /* 25MHz */ /* the spi->mode bits understood by this driver: */ - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST; + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST | + SPI_TX_DUAL | SPI_RX_DUAL; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); master->setup = tegra_spi_setup; master->transfer_one_message = tegra_spi_transfer_one_message; -- 2.7.4
