[PATCH 5/7] ARM: dts: stm32: Enable USB HS on stm32f746-disco

2017-08-17 Thread Amelie Delaunay
This patch enables USB HS on stm32f746-disco (Host mode).

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32f746-disco.dts | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f746-disco.dts 
b/arch/arm/boot/dts/stm32f746-disco.dts
index 18f6560..0d38e9a 100644
--- a/arch/arm/boot/dts/stm32f746-disco.dts
+++ b/arch/arm/boot/dts/stm32f746-disco.dts
@@ -61,6 +61,12 @@
serial0 = &usart1;
};
 
+   usbotg_hs_phy: usbphy {
+   #phy-cells = <0>;
+   compatible = "usb-nop-xceiv";
+   clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHSULPI)>;
+   clock-names = "main_clk";
+   };
 };
 
 &clk_hse {
@@ -72,3 +78,12 @@
pinctrl-names = "default";
status = "okay";
 };
+
+&usbotg_hs {
+   dr_mode = "host";
+   phys = <&usbotg_hs_phy>;
+   phy-names = "usb2-phy";
+   pinctrl-0 = <&usbotg_hs_pins_b>;
+   pinctrl-names = "default";
+   status = "okay";
+};
-- 
2.7.4



[PATCH 4/7] ARM: dts: stm32: Enable USB HS on stm32746g-eval

2017-08-17 Thread Amelie Delaunay
This patch enables USB HS on stm32746g-eval (Host mode).

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32746g-eval.dts | 16 
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/stm32746g-eval.dts 
b/arch/arm/boot/dts/stm32746g-eval.dts
index 69a9579..944501d 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -83,6 +83,13 @@
gpios = <&gpioc 13 0>;
};
};
+
+   usbotg_hs_phy: usbphy {
+   #phy-cells = <0>;
+   compatible = "usb-nop-xceiv";
+   clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHSULPI)>;
+   clock-names = "main_clk";
+   };
 };
 
 &clk_hse {
@@ -102,3 +109,12 @@
pinctrl-names = "default";
status = "okay";
 };
+
+&usbotg_hs {
+   dr_mode = "host";
+   phys = <&usbotg_hs_phy>;
+   phy-names = "usb2-phy";
+   pinctrl-0 = <&usbotg_hs_pins_a>;
+   pinctrl-names = "default";
+   status = "okay";
+};
-- 
2.7.4



[PATCH 3/7] ARM: dts: stm32: Add USB HS support for STM32F746 MCU

2017-08-17 Thread Amelie Delaunay
This patch adds the USB pins and nodes for USB HS core on STM32F746 SoC.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32f746.dtsi | 49 
 1 file changed, 49 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index 5633860..fcfe5a6 100644
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -379,6 +379,46 @@
bias-disable;
};
};
+
+   usbotg_hs_pins_a: usbotg_hs@0 {
+   pins {
+   pinmux = 
,
+
,
+
,
+
,
+
,
+
,
+
,
+
,
+
,
+
,
+
,
+
;
+   bias-disable;
+   drive-push-pull;
+   slew-rate = <2>;
+   };
+   };
+
+   usbotg_hs_pins_b: usbotg_hs@1 {
+   pins {
+   pinmux = 
,
+
,
+
,
+
,
+
,
+
,
+
,
+
,
+
,
+
,
+
,
+
;
+   bias-disable;
+   drive-push-pull;
+   slew-rate = <2>;
+   };
+   };
};
 
crc: crc@40023000 {
@@ -431,6 +471,15 @@
st,mem2mem;
status = "disabled";
};
+
+   usbotg_hs: usb@4004 {
+   compatible = "st,stm32f7xx-hsotg";
+   reg = <0x4004 0x4>;
+   interrupts = <77>;
+   clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHS)>;
+   clock-names = "otg";
+   status = "disabled";
+   };
};
 };
 
-- 
2.7.4



[PATCH 7/7] ARM: dts: stm32: Enable USB FS on stm32f746-disco

2017-08-17 Thread Amelie Delaunay
This patch enables USB FS on stm32f746-disco (Host mode) with 5V VBUS
enable.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32f746-disco.dts | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f746-disco.dts 
b/arch/arm/boot/dts/stm32f746-disco.dts
index 0d38e9a..c683040 100644
--- a/arch/arm/boot/dts/stm32f746-disco.dts
+++ b/arch/arm/boot/dts/stm32f746-disco.dts
@@ -67,6 +67,14 @@
clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHSULPI)>;
clock-names = "main_clk";
};
+
+   /* This turns on vbus for otg fs for host mode (dwc2) */
+   vcc5v_otg_fs: vcc5v-otg-fs-regulator {
+   compatible = "regulator-fixed";
+   gpio = <&gpiod 5 0>;
+   regulator-name = "vcc5_host1";
+   regulator-always-on;
+   };
 };
 
 &clk_hse {
@@ -87,3 +95,10 @@
pinctrl-names = "default";
status = "okay";
 };
+
+&usbotg_fs {
+   dr_mode = "host";
+   pinctrl-0 = <&usbotg_fs_pins_a>;
+   pinctrl-names = "default";
+   status = "okay";
+};
-- 
2.7.4



[PATCH 6/7] ARM: dts: stm32: Add USB FS support for STM32F746 MCU

2017-08-17 Thread Amelie Delaunay
This patch adds the USB pins and nodes for USB FS core on STM32F746 SoC.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32f746.dtsi | 31 +++
 1 file changed, 31 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index fcfe5a6..a9476ea 100644
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -419,6 +419,28 @@
slew-rate = <2>;
};
};
+
+   usbotg_fs_pins_a: usbotg_fs@0 {
+   pins {
+   pinmux = 
,
+
,
+
;
+   bias-disable;
+   drive-push-pull;
+   slew-rate = <2>;
+   };
+   };
+
+   usbotg_fs_pins_b: usbotg_fs@1 {
+   pins {
+   pinmux = 
,
+
,
+
;
+   bias-disable;
+   drive-push-pull;
+   slew-rate = <2>;
+   };
+   };
};
 
crc: crc@40023000 {
@@ -480,6 +502,15 @@
clock-names = "otg";
status = "disabled";
};
+
+   usbotg_fs: usb@5000 {
+   compatible = "st,stm32f4x9-fsotg";
+   reg = <0x5000 0x4>;
+   interrupts = <67>;
+   clocks = <&rcc 0 STM32F7_AHB2_CLOCK(OTGFS)>;
+   clock-names = "otg";
+   status = "disabled";
+   };
};
 };
 
-- 
2.7.4



[PATCH 1/7] dt-bindings: usb: Document the STM32F7xx DWC2 USB OTG HS core binding

2017-08-17 Thread Amelie Delaunay
This patch adds binding documentation for DWC2 controller in HS mode found
on STMicroelectronics STM32F7xx SoC.

Signed-off-by: Amelie Delaunay 
---
 Documentation/devicetree/bindings/usb/dwc2.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt 
b/Documentation/devicetree/bindings/usb/dwc2.txt
index fcf199b..e64d903 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.txt
+++ b/Documentation/devicetree/bindings/usb/dwc2.txt
@@ -19,6 +19,8 @@ Required properties:
   configured in FS mode;
   - "st,stm32f4x9-hsotg": The DWC2 USB HS controller instance in STM32F4x9 SoCs
   configured in HS mode;
+  - "st,stm32f7xx-hsotg": The DWC2 USB HS controller instance in STM32F7xx SoCs
+configured in HS mode;
 - reg : Should contain 1 register range (address and length)
 - interrupts : Should contain 1 interrupt
 - clocks: clock provider specifier
-- 
2.7.4



[PATCH 0/7] Add support for USB OTG on STM32F7xx

2017-08-17 Thread Amelie Delaunay
The STM32F7xx MCU family embeds two DWC2 USB OTG cores. One core is USB
OTG FS and the other is USB OTG HS. The USB FS core only works with its
internal phy whilst the USB HS core can work in HS with external ULPI phy
or in FS/LS with the on-chip FS phy.

Amelie Delaunay (7):
  dt-bindings: usb: Document the STM32F7xx DWC2 USB OTG HS core binding
  usb: dwc2: add support for STM32F7xx USB OTG HS
  ARM: dts: stm32: Add USB HS support for STM32F746 MCU
  ARM: dts: stm32: Enable USB HS on stm32746g-eval
  ARM: dts: stm32: Enable USB HS on stm32f746-disco
  ARM: dts: stm32: Add USB FS support for STM32F746 MCU
  ARM: dts: stm32: Enable USB FS on stm32f746-disco

 Documentation/devicetree/bindings/usb/dwc2.txt |  2 +
 arch/arm/boot/dts/stm32746g-eval.dts   | 16 ++
 arch/arm/boot/dts/stm32f746-disco.dts  | 30 ++
 arch/arm/boot/dts/stm32f746.dtsi   | 80 ++
 drivers/usb/dwc2/params.c  | 11 
 5 files changed, 139 insertions(+)

-- 
2.7.4



[PATCH 2/7] usb: dwc2: add support for STM32F7xx USB OTG HS

2017-08-17 Thread Amelie Delaunay
This patch adds the dwc2_set_params function for STM32F7xx USB OTG HS.

Signed-off-by: Amelie Delaunay 
---
 drivers/usb/dwc2/params.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index a3ffe97..015d23e 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -136,6 +136,15 @@ static void dwc2_set_stm32f4x9_fsotg_params(struct 
dwc2_hsotg *hsotg)
p->activate_stm_fs_transceiver = true;
 }
 
+static void dwc2_set_stm32f7xx_hsotg_params(struct dwc2_hsotg *hsotg)
+{
+   struct dwc2_core_params *p = &hsotg->params;
+
+   p->host_rx_fifo_size = 622;
+   p->host_nperio_tx_fifo_size = 128;
+   p->host_perio_tx_fifo_size = 256;
+}
+
 const struct of_device_id dwc2_of_match_table[] = {
{ .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params },
{ .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params  },
@@ -154,6 +163,8 @@ const struct of_device_id dwc2_of_match_table[] = {
{ .compatible = "st,stm32f4x9-fsotg",
  .data = dwc2_set_stm32f4x9_fsotg_params },
{ .compatible = "st,stm32f4x9-hsotg" },
+   { .compatible = "st,stm32f7xx-hsotg",
+ .data = dwc2_set_stm32f7xx_hsotg_params },
{},
 };
 MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
-- 
2.7.4



Re: [PATCH 4/7] ARM: dts: stm32: Enable USB HS on stm32746g-eval

2017-08-17 Thread Amelie DELAUNAY
Hi!

On 08/17/2017 12:44 PM, Sergei Shtylyov wrote:
> Hello!
> 
> On 8/17/2017 12:33 PM, Amelie Delaunay wrote:
> 
>> This patch enables USB HS on stm32746g-eval (Host mode).
>>
>> Signed-off-by: Amelie Delaunay 
>> ---
>>   arch/arm/boot/dts/stm32746g-eval.dts | 16 
>>   1 file changed, 16 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/stm32746g-eval.dts 
>> b/arch/arm/boot/dts/stm32746g-eval.dts
>> index 69a9579..944501d 100644
>> --- a/arch/arm/boot/dts/stm32746g-eval.dts
>> +++ b/arch/arm/boot/dts/stm32746g-eval.dts
>> @@ -83,6 +83,13 @@
>>   gpios = <&gpioc 13 0>;
>>   };
>>   };
>> +
>> +usbotg_hs_phy: usbphy {
> 
> Name it "usb-phy" please, tpo be m,ore in line with the DT spec.
OK, will be fixed in v2. Thanks!
> 
> [...]
> 
> MBR, Sergei

Regards,
Amelie

Re: [PATCH 6/7] ARM: dts: stm32: Add USB FS support for STM32F746 MCU

2017-08-17 Thread Amelie DELAUNAY
On 08/17/2017 12:47 PM, Sergei Shtylyov wrote:
> On 8/17/2017 12:33 PM, Amelie Delaunay wrote:
> 
>> This patch adds the USB pins and nodes for USB FS core on STM32F746 SoC.
>>
>> Signed-off-by: Amelie Delaunay 
>> ---
>>   arch/arm/boot/dts/stm32f746.dtsi | 31 +++
>>   1 file changed, 31 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/stm32f746.dtsi 
>> b/arch/arm/boot/dts/stm32f746.dtsi
>> index fcfe5a6..a9476ea 100644
>> --- a/arch/arm/boot/dts/stm32f746.dtsi
>> +++ b/arch/arm/boot/dts/stm32f746.dtsi
>> @@ -419,6 +419,28 @@
>>   slew-rate = <2>;
>>   };
>>   };
>> +
>> +usbotg_fs_pins_a: usbotg_fs@0 {
> 
> Dashes are preferred to underlines in the node names.
You're right. I'll fix it in v2. Thanks.
> 
> [...]
> 
> MBR, Sergei

Regards,
Amelie

[PATCH 1/2] dt-bindings: spi: Document the STM32 SPI bindings

2017-06-21 Thread Amelie Delaunay
This patch adds the documentation of device tree bindings
for the STM32 SPI controller.

Signed-off-by: Amelie Delaunay 
---
 .../devicetree/bindings/spi/spi-stm32.txt  | 60 ++
 1 file changed, 60 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-stm32.txt

diff --git a/Documentation/devicetree/bindings/spi/spi-stm32.txt 
b/Documentation/devicetree/bindings/spi/spi-stm32.txt
new file mode 100644
index 000..3958bf6
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-stm32.txt
@@ -0,0 +1,60 @@
+STMicroelectronics STM32 SPI Controller
+
+The STM32 SPI controller is used to communicate with external devices using
+the Serial Peripheral Interface. It supports full-duplex, half-duplex and
+simplex synchronous serial communication with external devices. It supports
+from 4 to 32-bit data size. Although it can be configured as master or slave,
+only master is supported by the driver.
+
+Required properties:
+- compatible: Must be "st,stm32-spi".
+- reg: Offset and length of the device's register set.
+- interrupts: Must contain the interrupt id.
+- clocks: Must contain an entry for spiclk (which feeds the internal clock
+ generator).
+- #address-cells:  Number of cells required to define a chip select address.
+- #size-cells: Should be zero.
+
+Optional properties:
+- resets: Must contain the phandle to the reset controller.
+- A pinctrl state named "default" may be defined to set pins in mode of
+  operation for SPI transfer.
+- dmas: DMA specifiers for tx and rx dma. DMA fifo mode must be used. See the
+  STM32 DMA bindings, Documentation/devicetree/bindings/dma/stm32-dma.txt.
+- dma-names: DMA request names should include "tx" and "rx" if present.
+- cs-gpios: list of GPIO chip selects. See the SPI bus bindings,
+  Documentation/devicetree/bindings/spi/spi-bus.txt
+
+
+Child nodes represent devices on the SPI bus
+  See ../spi/spi-bus.txt
+
+Optional properties:
+- st,spi-midi-ns: (Master Inter-Data Idleness) minimum time delay in
+ nanoseconds inserted between two consecutive data frames.
+
+
+Example:
+   spi2: spi@40003800 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "st,stm32-spi";
+   reg = <0x40003800 0x400>;
+   interrupts = <36>;
+   clocks = <&rcc SPI2_CK>;
+   resets = <&rcc 1166>;
+   dmas = <&dmamux1 0 39 0x400 0x01>,
+  <&dmamux1 1 40 0x400 0x01>;
+   dma-names = "rx", "tx";
+   pinctrl-0 = <&spi2_pins_b>;
+   pinctrl-names = "default";
+   status = "okay";
+   cs-gpios = <&gpioa 11 0>;
+
+   spidev@0 {
+   compatible = "spidev";
+   reg = <0>;
+   spi-max-frequency = <400>;
+   st,spi-midi = <4000>;
+   };
+   };
-- 
1.9.1



[PATCH 2/2] spi: add driver for STM32 SPI controller

2017-06-21 Thread Amelie Delaunay
The STM32 Serial Peripheral Interface (SPI) can be used to communicate
with external devices while using the specific synchronous protocol. It
supports a half-duplex, full-duplex and simplex synchronous, serial
communication with external devices with 4-bit to 16/32-bit per word. It
has two 8x/16x 8-bit embedded Rx and TxFIFOs with DMA capability. It can
operate in master or slave mode.

Signed-off-by: Amelie Delaunay 
---
 drivers/spi/Kconfig |   10 +
 drivers/spi/Makefile|1 +
 drivers/spi/spi-stm32.c | 1266 +++
 3 files changed, 1277 insertions(+)
 create mode 100644 drivers/spi/spi-stm32.c

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index fd1b4fd..9b31351 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -627,6 +627,16 @@ config SPI_SIRF
help
  SPI driver for CSR SiRFprimaII SoCs
 
+config SPI_STM32
+   tristate "STMicroelectronics STM32 SPI controller"
+   depends on ARCH_STM32 || COMPILE_TEST
+   help
+ SPI driver for STMicroelectonics STM32 SoCs.
+
+ STM32 SPI controller supports DMA and PIO modes. When DMA
+ is not available, the driver automatically falls back to
+ PIO mode.
+
 config SPI_ST_SSC4
tristate "STMicroelectronics SPI SSC-based driver"
depends on ARCH_STI || COMPILE_TEST
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 31dccfb..a3ae2b7 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -90,6 +90,7 @@ obj-$(CONFIG_SPI_SH_HSPI) += spi-sh-hspi.o
 obj-$(CONFIG_SPI_SH_MSIOF) += spi-sh-msiof.o
 obj-$(CONFIG_SPI_SH_SCI)   += spi-sh-sci.o
 obj-$(CONFIG_SPI_SIRF) += spi-sirf.o
+obj-$(CONFIG_SPI_STM32)+= spi-stm32.o
 obj-$(CONFIG_SPI_ST_SSC4)  += spi-st-ssc4.o
 obj-$(CONFIG_SPI_SUN4I)+= spi-sun4i.o
 obj-$(CONFIG_SPI_SUN6I)+= spi-sun6i.o
diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
new file mode 100644
index 000..0553f61
--- /dev/null
+++ b/drivers/spi/spi-stm32.c
@@ -0,0 +1,1266 @@
+/*
+ * STMicroelectronics STM32 SPI Controller driver (master mode only)
+ *
+ * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
+ * Author(s): Amelie Delaunay  for STMicroelectronics.
+ *
+ * License terms: GPL V2.0.
+ *
+ * spi_stm32 driver is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * spi_stm32 driver is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 
or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 
more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * spi_stm32 driver. If not, see <http://www.gnu.org/licenses/>.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DRIVER_NAME "spi_stm32"
+
+/* STM32 SPI registers */
+#define STM32_SPI_CR1  0x00
+#define STM32_SPI_CR2  0x04
+#define STM32_SPI_CFG1 0x08
+#define STM32_SPI_CFG2 0x0C
+#define STM32_SPI_IER  0x10
+#define STM32_SPI_SR   0x14
+#define STM32_SPI_IFCR 0x18
+#define STM32_SPI_TXDR 0x20
+#define STM32_SPI_RXDR 0x30
+#define STM32_SPI_I2SCFGR  0x50
+
+/* STM32_SPI_CR1 bit fields */
+#define SPI_CR1_SPEBIT(0)
+#define SPI_CR1_MASRX  BIT(8)
+#define SPI_CR1_CSTART BIT(9)
+#define SPI_CR1_CSUSP  BIT(10)
+#define SPI_CR1_HDDIR  BIT(11)
+#define SPI_CR1_SSIBIT(12)
+
+/* STM32_SPI_CR2 bit fields */
+#define SPI_CR2_TSIZE_SHIFT0
+#define SPI_CR2_TSIZE  GENMASK(15, 0)
+
+/* STM32_SPI_CFG1 bit fields */
+#define SPI_CFG1_DSIZE_SHIFT   0
+#define SPI_CFG1_DSIZE GENMASK(4, 0)
+#define SPI_CFG1_FTHLV_SHIFT   5
+#define SPI_CFG1_FTHLV GENMASK(8, 5)
+#define SPI_CFG1_RXDMAEN   BIT(14)
+#define SPI_CFG1_TXDMAEN   BIT(15)
+#define SPI_CFG1_MBR_SHIFT 28
+#define SPI_CFG1_MBR   GENMASK(30, 28)
+#define SPI_CFG1_MBR_MIN   0
+#define SPI_CFG1_MBR_MAX   (GENMASK(30, 28) >> 28)
+
+/* STM32_SPI_CFG2 bit fields */
+#define SPI_CFG2_MIDI_SHIFT4
+#define SPI_CFG2_MIDI  GENMASK(7, 4)
+#define SPI_CFG2_COMM_SHIFT17
+#define SPI_CFG2_COMM  GENMASK(18, 17)
+#define SPI_CFG2_SP_SHIFT  19
+#define SPI_CFG2_SPGENMASK(21, 19)
+#define SPI_CFG2_MASTERBIT(22)
+#define SPI_CFG2_LSBFRST   BIT(23)
+#define SPI_CFG2_CPHA  BIT(24)
+#define SPI_CFG2_CPOL  BIT(25)
+#define SPI_CFG2_SSM   BIT(26)
+#define SPI_CFG2_AFCNTRBIT(31)
+
+/* STM32_SPI_IER bit field

[PATCH 0/2] Add support for STM32 SPI

2017-06-21 Thread Amelie Delaunay
This patchset adds support for the STM32 Serial Peripheral Interface (SPI).

It applies to STM32 platforms implementing version 2 of SPI/I2S interface
like STM32H7 series.

It supports a half-duplex, full-duplex and simplex synchronous serial
communication with external devices with 4-bit to 16/32-bit per word.
It has two 8x/16x 8-bit embedded Rx and TxFIFOs with DMA capability.
It can operate in master or slave mode, but here, only master mode is
supported.

Amelie Delaunay (2):
  dt-bindings: spi: Document the STM32 SPI bindings
  spi: add driver for STM32 SPI controller

 .../devicetree/bindings/spi/spi-stm32.txt  |   60 +
 drivers/spi/Kconfig|   10 +
 drivers/spi/Makefile   |1 +
 drivers/spi/spi-stm32.c| 1266 
 4 files changed, 1337 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-stm32.txt
 create mode 100644 drivers/spi/spi-stm32.c

-- 
1.9.1



Re: [PATCH 2/2] spi: add driver for STM32 SPI controller

2017-06-22 Thread Amelie DELAUNAY

Hi Mark,

Thanks for your review.

On 06/21/2017 05:13 PM, Mark Brown wrote:

On Wed, Jun 21, 2017 at 04:32:06PM +0200, Amelie Delaunay wrote:

A few minor stylistic things but overall this looks really nice, please
send followup patches fixing these style things.


+   /* Determine the first power of 2 greater than or equal to div */
+   mbrdiv = (div & (div - 1)) ? fls(div) : fls(div) - 1;


Please write normal conditional statements, it makes things much easier
to read.
OK, I'll fix it in v2.



+static bool stm32_spi_can_dma(struct spi_master *master,
+ struct spi_device *spi_dev,
+ struct spi_transfer *transfer)
+{
+   struct stm32_spi *spi = spi_master_get_devdata(master);
+
+   dev_dbg(spi->dev, "%s: %s\n", __func__,
+   (!!(transfer->len > spi->fifo_size)) ? "true" : "false");
+
+   return !!(transfer->len > spi->fifo_size);


This !! is redundant, you're converting a boolean value into a boolean
value.


You're right.


+   buswidth = (spi->cur_bpw <= 8) ? DMA_SLAVE_BUSWIDTH_1_BYTE :
+  (spi->cur_bpw <= 16) ? DMA_SLAVE_BUSWIDTH_2_BYTES :
+  DMA_SLAVE_BUSWIDTH_4_BYTES;
+
+   /* Valid for DMA Half or Full Fifo threshold */
+   maxburst = (spi->cur_fthlv == 2) ? 1 : spi->cur_fthlv;


Again, please use normal conditional statements - people have to read
things.


OK.

+static int stm32_spi_suspend(struct device *dev)
+{
+   struct spi_master *master = dev_get_drvdata(dev);
+   struct stm32_spi *spi = spi_master_get_devdata(master);
+   int ret;
+
+   ret = spi_master_suspend(master);
+   if (ret)
+   return ret;
+
+   clk_disable_unprepare(spi->clk);


It'd be good to also have the clock disabled by runtime PM, that will
save a little more power.  There's support for enabling and disabling
the device in the core so it should just be adding callbacks.  Not
essential though.


OK I'll have a look.

Regards,
Amelie


Re: [PATCH 1/2] dt-bindings: spi: Document the STM32 SPI bindings

2017-06-22 Thread Amelie DELAUNAY



On 06/21/2017 05:20 PM, Neil Armstrong wrote:

On 06/21/2017 04:32 PM, Amelie Delaunay wrote:

This patch adds the documentation of device tree bindings
for the STM32 SPI controller.

Signed-off-by: Amelie Delaunay 
---
  .../devicetree/bindings/spi/spi-stm32.txt  | 60 ++
  1 file changed, 60 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/spi/spi-stm32.txt

diff --git a/Documentation/devicetree/bindings/spi/spi-stm32.txt 
b/Documentation/devicetree/bindings/spi/spi-stm32.txt
new file mode 100644
index 000..3958bf6
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-stm32.txt
@@ -0,0 +1,60 @@
+STMicroelectronics STM32 SPI Controller
+
+The STM32 SPI controller is used to communicate with external devices using
+the Serial Peripheral Interface. It supports full-duplex, half-duplex and
+simplex synchronous serial communication with external devices. It supports
+from 4 to 32-bit data size. Although it can be configured as master or slave,
+only master is supported by the driver.
+
+Required properties:
+- compatible: Must be "st,stm32-spi".


Hi Amelie,

What about the gen1 SPI devices like the F4 ?

It should have been better to use SoC specific compatible, or specify the SPI 
HW gen like gen1 or gen2.

Neil



Hi Neil,

The gen1 SPI controller embedded on F4/F7 is different from gen2 
embedded on H7 and just to illustrate this, there are 5 main registers 
(16-bit) on gen1 versus 10 main registers on gen2 (32-bit)! Their 
operating modes are different, fifo management and so on... Moreover, I 
know that the community is working on an SPI driver for F4.


I agree with you on the fact that it would be better to use a SoC 
specific compatible: I will send a v2 with "st,stm32h7-spi". This way, 
this will be aligned with what have been done for the I2S part of this 
controller: https://patchwork.kernel.org/patch/9737799/


By the way, I also noticed that my optional property "st,spi-midi-ns" 
doesn't fit with the example "st,spi-midi". I will fix that in the v2 
and keep "st,spi-midi-ns".


Regards,
Amelie


+- reg: Offset and length of the device's register set.
+- interrupts: Must contain the interrupt id.
+- clocks: Must contain an entry for spiclk (which feeds the internal clock
+ generator).
+- #address-cells:  Number of cells required to define a chip select address.
+- #size-cells: Should be zero.
+
+Optional properties:
+- resets: Must contain the phandle to the reset controller.
+- A pinctrl state named "default" may be defined to set pins in mode of
+  operation for SPI transfer.
+- dmas: DMA specifiers for tx and rx dma. DMA fifo mode must be used. See the
+  STM32 DMA bindings, Documentation/devicetree/bindings/dma/stm32-dma.txt.
+- dma-names: DMA request names should include "tx" and "rx" if present.
+- cs-gpios: list of GPIO chip selects. See the SPI bus bindings,
+  Documentation/devicetree/bindings/spi/spi-bus.txt
+
+
+Child nodes represent devices on the SPI bus
+  See ../spi/spi-bus.txt
+
+Optional properties:
+- st,spi-midi-ns: (Master Inter-Data Idleness) minimum time delay in
+ nanoseconds inserted between two consecutive data frames.
+
+
+Example:
+   spi2: spi@40003800 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "st,stm32-spi";
+   reg = <0x40003800 0x400>;
+   interrupts = <36>;
+   clocks = <&rcc SPI2_CK>;
+   resets = <&rcc 1166>;
+   dmas = <&dmamux1 0 39 0x400 0x01>,
+  <&dmamux1 1 40 0x400 0x01>;
+   dma-names = "rx", "tx";
+   pinctrl-0 = <&spi2_pins_b>;
+   pinctrl-names = "default";
+   status = "okay";
+   cs-gpios = <&gpioa 11 0>;
+
+   spidev@0 {
+   compatible = "spidev";
+   reg = <0>;
+   spi-max-frequency = <400>;
+   st,spi-midi = <4000>;
+   };
+   };





[PATCH] ARM: dts: stm32: update rtc st,syscfg property on stm32h743

2018-08-22 Thread Amelie Delaunay
To fit with latest rtc driver updates, rtc st,syscfg property must contain
the control register offset of pwrcfg and the mask corresponding to the
DBP (Disable Backup Protection) bit.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32h743.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index 637beff..cbdd69c 100644
--- a/arch/arm/boot/dts/stm32h743.dtsi
+++ b/arch/arm/boot/dts/stm32h743.dtsi
@@ -472,7 +472,7 @@
interrupt-parent = <&exti>;
interrupts = <17 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "alarm";
-   st,syscfg = <&pwrcfg>;
+   st,syscfg = <&pwrcfg 0x00 0x100>;
status = "disabled";
};
 
-- 
2.7.4



[PATCH v2] ARM: multi_v7_defconfig: enable STM32 SPI

2018-08-22 Thread Amelie Delaunay
Enable the STM32 SPI driver, implemented on STM32MP1 SoC.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/configs/multi_v7_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/multi_v7_defconfig 
b/arch/arm/configs/multi_v7_defconfig
index b749d1e..4cdb622 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -417,6 +417,7 @@ CONFIG_SPI_S3C64XX=m
 CONFIG_SPI_SH_MSIOF=m
 CONFIG_SPI_SH_HSPI=y
 CONFIG_SPI_SIRF=y
+CONFIG_SPI_STM32=m
 CONFIG_SPI_SUN4I=y
 CONFIG_SPI_SUN6I=y
 CONFIG_SPI_TEGRA114=y
-- 
2.7.4



Re: [PATCH v4] usb: dwc2: dwc2_vbus_supply_init: fix error check

2018-03-26 Thread Amelie DELAUNAY
Hi,

On 03/26/2018 11:00 AM, Tomeu Vizoso wrote:
> devm_regulator_get_optional returns -ENODEV if the regulator isn't
> there, so if that's the case we have to make sure not to leave -ENODEV
> in the regulator pointer.
> 
> Also, make sure we return 0 in that case, but correctly propagate any
> other errors. Also propagate the error from _dwc2_hcd_start.
> 
> Fixes: 531ef5ebea96 ("usb: dwc2: add support for host mode external vbus 
> supply")
> Cc: Amelie Delaunay 
> Signed-off-by: Tomeu Vizoso 
> 
> ---
> 
> v2: Only overwrite the error in the pointer after checking it (Heiko
>  Stübner )
> v3: Remove hunks that shouldn't be in this patch
> v4: Don't overwrite the error code before returning it (kbuild test
>  robot )
> ---
>   drivers/usb/dwc2/hcd.c | 13 -
>   1 file changed, 8 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
> index 190f95964000..c51b73b3e048 100644
> --- a/drivers/usb/dwc2/hcd.c
> +++ b/drivers/usb/dwc2/hcd.c
> @@ -358,9 +358,14 @@ static void dwc2_gusbcfg_init(struct dwc2_hsotg *hsotg)
>   
>   static int dwc2_vbus_supply_init(struct dwc2_hsotg *hsotg)
>   {
> + int ret;
> +
>   hsotg->vbus_supply = devm_regulator_get_optional(hsotg->dev, "vbus");
> - if (IS_ERR(hsotg->vbus_supply))
> - return 0;
> + if (IS_ERR(hsotg->vbus_supply)) {
> + ret = PTR_ERR(hsotg->vbus_supply);
> + hsotg->vbus_supply = NULL;
> + return ret == -ENODEV ? 0 : ret;
> + }
>   
>   return regulator_enable(hsotg->vbus_supply);
>   }
> @@ -4342,9 +4347,7 @@ static int _dwc2_hcd_start(struct usb_hcd *hcd)
>   
>   spin_unlock_irqrestore(&hsotg->lock, flags);
>   
> - dwc2_vbus_supply_init(hsotg);
> -
> - return 0;
> + return dwc2_vbus_supply_init(hsotg);
>   }
>   
>   /*
> 

Reviewed-by: Amelie Delaunay 

Thanks,
Amelie

[PATCH 5/5] ARM: dts: stm32: add joystick support on stm32746g-eval

2018-04-11 Thread Amelie Delaunay
The joystick (B3) on stm32746g-eval uses gpios on STMFX gpio expander.
These gpios need a pin configuration (push-pull and bias-pull-up),
described under stmfxpinctrl node.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32746g-eval.dts | 44 
 1 file changed, 44 insertions(+)

diff --git a/arch/arm/boot/dts/stm32746g-eval.dts 
b/arch/arm/boot/dts/stm32746g-eval.dts
index fd03f54..ee9ec55 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -90,6 +90,44 @@
};
};
 
+   joystick {
+   compatible = "gpio-keys";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   pinctrl-0 = <&joystick_pins>;
+   pinctrl-names = "default";
+   button@0 {
+   label = "JoySel";
+   linux,code = ;
+   interrupt-parent = <&stmfxgpio>;
+   interrupts = <0 2>;
+   };
+   button@1 {
+   label = "JoyDown";
+   linux,code = ;
+   interrupt-parent = <&stmfxgpio>;
+   interrupts = <1 2>;
+   };
+   button@2 {
+   label = "JoyLeft";
+   linux,code = ;
+   interrupt-parent = <&stmfxgpio>;
+   interrupts = <2 2>;
+   };
+   button@3 {
+   label = "JoyRight";
+   linux,code = ;
+   interrupt-parent = <&stmfxgpio>;
+   interrupts = <3 2>;
+   };
+   button@4 {
+   label = "JoyUp";
+   linux,code = ;
+   interrupt-parent = <&stmfxgpio>;
+   interrupts = <4 2>;
+   };
+   };
+
usbotg_hs_phy: usb-phy {
#phy-cells = <0>;
compatible = "usb-nop-xceiv";
@@ -127,6 +165,12 @@
interrupt-controller;
status = "okay";
};
+
+   joystick_pins: joystick@0 {
+   pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4";
+   drive-push-pull;
+   bias-pull-up;
+   };
};
 };
 
-- 
2.7.4



[PATCH 0/5] Introduce STMFX I2C GPIO expander

2018-04-11 Thread Amelie Delaunay
This series adds support for STMicroelectronics Multi-Function eXpander
(STMFX) GPIO expander, used on some STM32 discovery and evaluation boards.

STMFX is an STM32L152 based I2C slave controller, whose firmware embeds an
I/O expansion feature, offering 24 GPIOs.

STMFX pinctrl/GPIO driver provides a GPIO interface supporting inputs and
outputs, and a pinctrl interface supporting push-pull and open-drain
configuration.
STMFX GPIO expander can also be used as interrupt controller.

Previous series [1], based on MFD and GPIO frameworks, is abandoned and
completely reworked.

[1] https://lkml.org/lkml/2018/2/8/300

Amelie Delaunay (5):
  dt-bindings: pinctrl: document the STMFX pinctrl bindings
  pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver
  ARM: dts: stm32: add STMFX pinctrl/gpio expander support on
stm32746g-eval
  ARM: dts: stm32: add orange and blue leds on stm32746g-eval
  ARM: dts: stm32: add joystick support on stm32746g-eval

 .../devicetree/bindings/pinctrl/pinctrl-stmfx.txt  | 118 +++
 arch/arm/boot/dts/stm32746g-eval.dts   |  66 ++
 drivers/pinctrl/Kconfig|  13 +
 drivers/pinctrl/Makefile   |   1 +
 drivers/pinctrl/pinctrl-stmfx.c| 985 +
 5 files changed, 1183 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt
 create mode 100644 drivers/pinctrl/pinctrl-stmfx.c

-- 
2.7.4



[PATCH 2/5] pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver

2018-04-11 Thread Amelie Delaunay
This patch adds pinctrl/GPIO driver for STMicroelectronics
Multi-Function eXpander (STMFX) GPIO expander.
STMFX is an I2C slave controller, offering up to 24 GPIOs.
The driver relies on generic pin config interface to configure the GPIOs.

Signed-off-by: Amelie Delaunay 
---
 drivers/pinctrl/Kconfig |  13 +
 drivers/pinctrl/Makefile|   1 +
 drivers/pinctrl/pinctrl-stmfx.c | 985 
 3 files changed, 999 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-stmfx.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 0f254b3..4ab07aa 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -263,6 +263,19 @@ config PINCTRL_ST
select PINCONF
select GPIOLIB_IRQCHIP
 
+config PINCTRL_STMFX
+   tristate "STMicroelectronics STMFX I2C GPIO expander pinctrl driver"
+   depends on GPIOLIB && I2C=y
+   select GENERIC_PINCONF
+   select GPIOLIB_IRQCHIP
+   select REGMAP_I2C
+   help
+ I2C driver for STMicroelectronics Multi-Function eXpander (STMFX)
+ GPIO expander.
+ This provides a GPIO interface supporting inputs and outputs,
+ and configuring push-pull, open-drain, and can also be used as
+ interrupt-controller.
+
 config PINCTRL_TZ1090
bool "Toumaz Xenif TZ1090 pin control driver"
depends on SOC_TZ1090
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index d369263..271c464 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_PINCTRL_LANTIQ)  += pinctrl-lantiq.o
 obj-$(CONFIG_PINCTRL_LPC18XX)  += pinctrl-lpc18xx.o
 obj-$(CONFIG_PINCTRL_TB10X)+= pinctrl-tb10x.o
 obj-$(CONFIG_PINCTRL_ST)   += pinctrl-st.o
+obj-$(CONFIG_PINCTRL_STMFX)+= pinctrl-stmfx.o
 obj-$(CONFIG_PINCTRL_ZYNQ) += pinctrl-zynq.o
 obj-$(CONFIG_PINCTRL_INGENIC)  += pinctrl-ingenic.o
 obj-$(CONFIG_PINCTRL_RK805)+= pinctrl-rk805.o
diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drivers/pinctrl/pinctrl-stmfx.c
new file mode 100644
index 000..d59a7bc
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-stmfx.c
@@ -0,0 +1,985 @@
+// SPDX-Licence-Identifier: GPL-2.0
+/*
+ * Driver for STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander
+ *
+ * Copyright (C) 2018 STMicroelectronics
+ * Author(s): Amelie Delaunay .
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "core.h"
+#include "pinctrl-utils.h"
+
+/* General */
+#define STMFX_REG_CHIP_ID  0x00 /* R */
+#define STMFX_REG_FW_VERSION_MSB   0x01 /* R */
+#define STMFX_REG_FW_VERSION_LSB   0x02 /* R */
+#define STMFX_REG_SYS_CTRL 0x40 /* RW */
+/* IRQ output management */
+#define STMFX_REG_IRQ_OUT_PIN  0x41 /* RW */
+#define STMFX_REG_IRQ_SRC_EN   0x42 /* RW */
+#define STMFX_REG_IRQ_PENDING  0x08 /* R */
+#define STMFX_REG_IRQ_ACK  0x44 /* RW */
+
+/* MFX boot time is around 10ms, so after reset, we have to wait this delay */
+#define STMFX_BOOT_TIME_MS 10
+
+/* GPIOs expander */
+/* GPIO_STATE1 0x10, GPIO_STATE2 0x11, GPIO_STATE3 0x12 */
+#define STMFX_REG_GPIO_STATE   0x10 /* R */
+/* GPIO_DIR1 0x60, GPIO_DIR2 0x61, GPIO_DIR3 0x63 */
+#define STMFX_REG_GPIO_DIR 0x60 /* RW */
+/* GPIO_TYPE1 0x64, GPIO_TYPE2 0x65, GPIO_TYPE3 0x66 */
+#define STMFX_REG_GPIO_TYPE0x64 /* RW */
+/* GPIO_PUPD1 0x68, GPIO_PUPD2 0x69, GPIO_PUPD3 0x6A */
+#define STMFX_REG_GPIO_PUPD0x68 /* RW */
+/* GPO_SET1 0x6C, GPO_SET2 0x6D, GPO_SET3 0x6E */
+#define STMFX_REG_GPO_SET  0x6C /* RW */
+/* GPO_CLR1 0x70, GPO_CLR2 0x71, GPO_CLR3 0x72 */
+#define STMFX_REG_GPO_CLR  0x70 /* RW */
+/* IRQ_GPI_SRC1 0x48, IRQ_GPI_SRC2 0x49, IRQ_GPI_SRC3 0x4A */
+#define STMFX_REG_IRQ_GPI_SRC  0x48 /* RW */
+/* IRQ_GPI_EVT1 0x4C, IRQ_GPI_EVT2 0x4D, IRQ_GPI_EVT3 0x4E */
+#define STMFX_REG_IRQ_GPI_EVT  0x4C /* RW */
+/* IRQ_GPI_TYPE1 0x50, IRQ_GPI_TYPE2 0x51, IRQ_GPI_TYPE3 0x52 */
+#define STMFX_REG_IRQ_GPI_TYPE 0x50 /* RW */
+/* IRQ_GPI_PENDING1 0x0C, IRQ_GPI_PENDING2 0x0D, IRQ_GPI_PENDING3 0x0E*/
+#define STMFX_REG_IRQ_GPI_PENDING  0x0C /* R */
+/* IRQ_GPI_ACK1 0x54, IRQ_GPI_ACK2 0x55, IRQ_GPI_ACK3 0x56 */
+#define STMFX_REG_IRQ_GPI_ACK  0x54 /* RW */
+
+/* STMFX_REG_CHIP_ID bitfields */
+#define STMFX_REG_CHIP_ID_MASK GENMASK(7, 0)
+
+/* STMFX_REG_SYS_CTRL bitfields */
+#define STMFX_REG_SYS_CTRL_GPIO_EN BIT(0)
+#define STMFX_REG_SYS_CTRL_ALTGPIO_EN  BIT(3)
+#define STMFX_REG_SYS_CTRL_SWRST   BIT(7)
+
+/* STMFX_REG_IRQ_OUT_PIN bitfields */
+#define STMFX_REG_IRQ_OUT_PIN_TYPE BIT(0) /* 0-OD 1-PP */
+#define STMFX_REG_IRQ_OUT_PIN_POL  BIT(1) /* 0-active LOW 1-active HIGH */
+
+/* STMFX_REG_IRQ_SRC_EN bitfields */
+#define STMFX_REG_IRQ_SRC_EN_GPIO  BIT(0)
+

[PATCH 1/5] dt-bindings: pinctrl: document the STMFX pinctrl bindings

2018-04-11 Thread Amelie Delaunay
This patch adds documentation of device tree bindings for the
STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander.

Signed-off-by: Amelie Delaunay 
---
 .../devicetree/bindings/pinctrl/pinctrl-stmfx.txt  | 118 +
 1 file changed, 118 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt 
b/Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt
new file mode 100644
index 000..4d8941de
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt
@@ -0,0 +1,118 @@
+STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander bindings
+
+ST Multi-Function eXpander (STMFX) is a slave controller using I2C for
+communication with the main MCU. It offers up to 24 GPIOs expansion.
+
+Required properties:
+- compatible: should be "st,stmfx-0300".
+- reg: I2C slave address of the device.
+- interrupt-parent: phandle of the STMFX parent interrupt controller.
+- interrutps: interrupt specifier triggered by MFX_IRQ_OUT signal.
+
+Optional property:
+- drive-open-drain: configure MFX_IRQ_OUT as open drain.
+- vdd-supply: phandle of the regulator supplying STMFX.
+
+Required properties for gpio controller sub-node:
+- #gpio-cells: should be <2>, the first cell is the GPIO number and the second
+  cell is the gpio flags in accordance with .
+- gpio-controller: marks the device as a GPIO controller.
+Please refer to ../gpio/gpio.txt.
+
+Optional properties for gpio controller sub-node:
+- #interrupt-cells: should be <2>, the first cell is the GPIO number and the
+  second cell is the interrupt flags in accordance with
+  .
+- interrupt-controller: marks the device as an interrupt controller.
+
+Please refer to pinctrl-bindings.txt for pin configuration.
+
+Required properties for pin configuration sub-nodes:
+- pins: list of pins to which the configuration applies.
+
+Optional properties for pin configuration sub-nodes (pinconf-generic ones):
+- bias-disable: disable any bias on the pin.
+- bias-pull-up: the pin will be pulled up.
+- bias-pull-pin-default: use the pin-default pull state.
+- bias-pull-down: the pin will be pulled down.
+- drive-open-drain: the pin will be driven with open drain.
+- drive-push-pull: the pin will be driven actively high and low.
+- output-high: the pin will be configured as an output driving high level.
+- output-low: the pin will be configured as an output driving low level.
+
+Note that STMFX pins[15:0] are called "gpio[15:0]", and STMFX pins[23:16] are
+called "agpio[7:0]". Example, to refer to pin 18 of STMFX, use "agpio2".
+
+Example:
+
+   stmfxpinctrl: stmfx@42 {
+   compatible = "st,stmfx-0300";
+   reg = <0x42>;
+   interrupt-parent = <&gpioi>;
+   interrupts = <8 IRQ_TYPE_EDGE_RISING>;
+   vdd-supply = <&v3v3>;
+   status = "okay";
+
+   stmfxgpio: gpio {
+   #gpio-cells = <2>;
+   #interrupt-cells = <2>;
+   gpio-controller;
+   interrupt-controller;
+   status = "okay";
+   };
+
+   joystick_pins: joystick@0 {
+   pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4";
+   drive-push-pull;
+   bias-pull-down;
+   };
+   };
+
+   joystick {
+   compatible = "gpio-keys";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   pinctrl-0 = <&joystick_pins>;
+   pinctrl-names = "default";
+   button@0 {
+   label = "JoySel";
+   linux,code = ;
+   interrupt-parent = <&stmfxgpio>;
+   interrupts = <0 IRQ_TYPE_EDGE_RISING>;
+   };
+   button@1 {
+   label = "JoyDown";
+   linux,code = ;
+   interrupt-parent = <&stmfxgpio>;
+   interrupts = <1 IRQ_TYPE_EDGE_RISING>;
+   };
+   button@2 {
+   label = "JoyLeft";
+   linux,code = ;
+   interrupt-parent = <&stmfxgpio>;
+   interrupts = <2 IRQ_TYPE_EDGE_RISING>;
+   };
+   button@3 {
+   label = "JoyRight";
+   linux,code = ;
+   interrupt-parent = <&stmfxgpio>;
+   interrupts = <3 IRQ_TYPE_EDGE_RISING>;
+ 

[PATCH 4/5] ARM: dts: stm32: add orange and blue leds on stm32746g-eval

2018-04-11 Thread Amelie Delaunay
Orange (LD2) and blue (LD4) leds on stm32746g-eval are connected on
STMFX gpio expander, offset 17 and 19.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32746g-eval.dts | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/stm32746g-eval.dts 
b/arch/arm/boot/dts/stm32746g-eval.dts
index bd9a33d..fd03f54 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -67,9 +67,15 @@
gpios = <&gpiof 10 1>;
linux,default-trigger = "heartbeat";
};
+   orange {
+   gpios = <&stmfxgpio 17 1>;
+   };
red {
gpios = <&gpiob 7 1>;
};
+   blue {
+   gpios = <&stmfxgpio 19 1>;
+   };
};
 
gpio_keys {
-- 
2.7.4



[PATCH 3/5] ARM: dts: stm32: add STMFX pinctrl/gpio expander support on stm32746g-eval

2018-04-11 Thread Amelie Delaunay
This patch adds support for STMicroelectronics Multi-Function eXpander
pinctrl/gpio expander on stm32746g-eval. It is connected on I2C1.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32746g-eval.dts | 16 
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/stm32746g-eval.dts 
b/arch/arm/boot/dts/stm32746g-eval.dts
index 2d4e717..bd9a33d 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -106,6 +106,22 @@
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
+
+   stmfxpinctrl: stmfx@42 {
+   compatible = "st,stmfx-0300";
+   reg = <0x42>;
+   interrupt-parent = <&gpioi>;
+   interrupts = <8 1>;
+   status = "okay";
+
+   stmfxgpio: gpio-expander {
+   #gpio-cells = <2>;
+   #interrupt-cells = <2>;
+   gpio-controller;
+   interrupt-controller;
+   status = "okay";
+   };
+   };
 };
 
 &rtc {
-- 
2.7.4



Re: [PATCH v4 1/2] dt-bindings: usb: ehci: add optional external vbus supply property

2018-03-20 Thread Amelie DELAUNAY


On 03/06/2018 03:40 PM, Rob Herring wrote:
> On Tue, Mar 6, 2018 at 8:09 AM, Robin Murphy  wrote:
>> On 06/03/18 01:57, Rob Herring wrote:
>>>
>>> On Thu, Mar 01, 2018 at 10:51:38AM +0100, Amelie Delaunay wrote:
>>>>
>>>> On some boards, especially when vbus supply requires large current,
>>>> and the charge pump on the PHY isn't enough, an external vbus power
>>>> switch
>>>> per port may be used.
>>>> Add portN_vbus-supply property to usb-ehci bindings. As the number of
>>>> ports
>>>> depends on the ehci controller, and the port on which an external vbus
>>>> supply depends on the platform,  is used to make it generic.
>>>>
>>>> Signed-off-by: Amelie Delaunay 
>>>> ---
>>>>Documentation/devicetree/bindings/usb/usb-ehci.txt | 1 +
>>>>1 file changed, 1 insertion(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/usb/usb-ehci.txt
>>>> b/Documentation/devicetree/bindings/usb/usb-ehci.txt
>>>> index 3efde12..cd576db 100644
>>>> --- a/Documentation/devicetree/bindings/usb/usb-ehci.txt
>>>> +++ b/Documentation/devicetree/bindings/usb/usb-ehci.txt
>>>> @@ -19,6 +19,7 @@ Optional properties:
>>>> - phys : phandle + phy specifier pair
>>>> - phy-names : "usb"
>>>> - resets : phandle + reset specifier pair
>>>> + - portN_vbus-supply : phandle of regulator supplying vbus for port N
>>>
>>>
>>> Just make this an array with the index being the port (and drop
>>> "portN_").
>>
>>
>> Does that still work if there is an external supply for port 1 but none for
>> port 0? I believe that was brought up as a possibility before.
> 
> Yes, if you use 0 or -1 to skip over an index.
> 
> Really, this should go in the connector node instead because Vbus is
> supplied to the connector, not the host controller. The connector
> binding is on its way into mainline.
> 
> Rob
> 

Not sure to catch what you mean by "make this an array" because 
regulator framework imposes -supply: phandle to the regulator node.

I may have missed something around regulator consumers management ?

Do you meant something like
vbus-supply = <®_port0 ®_port1>;
or in case there is an external supply for port 1 but none for port 0
vbus-supply = <-1 ®_port1>;
?
If yes, a new API is needed in regulator framework to get an array of 
regulators ?


Regards,
Amelie

[PATCH -next] phy: stm32: fix usbphyc static checker and checkpatch warnings

2018-03-20 Thread Amelie Delaunay
This patch fixes the following issues:
* warning reported by checkpatch:
WARNING: line over 80 characters
#87: FILE: drivers/phy/st/phy-stm32-usbphyc.c:87:
+static void stm32_usbphyc_get_pll_params(u32 clk_rate, struct pll_params 
*pll_params)

* bug reported by static checker (Dan Carpenter):
drivers/phy/st/phy-stm32-usbphyc.c:371 stm32_usbphyc_probe()
error: uninitialized symbol 'i'.

* unused stm32_usbphyc structure member: bool pll_enabled.

* unnecessary extra line in stm32_usbphyc_of_xlate

Fixes: 94c358da3a05 "phy: stm32: add support for STM32 USB PHY Controller 
(USBPHYC)"
Signed-off-by: Amelie Delaunay 
---
 drivers/phy/st/phy-stm32-usbphyc.c | 9 -
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/phy/st/phy-stm32-usbphyc.c 
b/drivers/phy/st/phy-stm32-usbphyc.c
index bc4e78a..1255cd1 100644
--- a/drivers/phy/st/phy-stm32-usbphyc.c
+++ b/drivers/phy/st/phy-stm32-usbphyc.c
@@ -71,7 +71,6 @@ struct stm32_usbphyc {
struct stm32_usbphyc_phy **phys;
int nphys;
int switch_setup;
-   bool pll_enabled;
 };
 
 static inline void stm32_usbphyc_set_bits(void __iomem *reg, u32 bits)
@@ -84,7 +83,8 @@ static inline void stm32_usbphyc_clr_bits(void __iomem *reg, 
u32 bits)
writel_relaxed(readl_relaxed(reg) & ~bits, reg);
 }
 
-static void stm32_usbphyc_get_pll_params(u32 clk_rate, struct pll_params 
*pll_params)
+static void stm32_usbphyc_get_pll_params(u32 clk_rate,
+struct pll_params *pll_params)
 {
unsigned long long fvco, ndiv, frac;
 
@@ -271,7 +271,6 @@ static struct phy *stm32_usbphyc_of_xlate(struct device 
*dev,
struct stm32_usbphyc *usbphyc = dev_get_drvdata(dev);
struct stm32_usbphyc_phy *usbphyc_phy = NULL;
struct device_node *phynode = args->np;
-
int port = 0;
 
for (port = 0; port < usbphyc->nphys; port++) {
@@ -367,8 +366,8 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
if (IS_ERR(phy)) {
ret = PTR_ERR(phy);
if (ret != -EPROBE_DEFER)
-   dev_err(dev,
-   "failed to create phy%d: %d\n", i, ret);
+   dev_err(dev, "failed to create phy%d: %d\n",
+   port, ret);
goto put_child;
}
 
-- 
2.7.4



Re: [PATCH -next] phy: stm32: fix using 0 as NULL pointer warnings

2018-03-20 Thread Amelie DELAUNAY


On 03/20/2018 02:19 PM, Wei Yongjun wrote:
> Fixes the following sparse warnings:
> 
> drivers/phy/st/phy-stm32-usbphyc.c:331:42: warning:
>   Using plain integer as NULL pointer
> drivers/phy/st/phy-stm32-usbphyc.c:344:52: warning:
>   Using plain integer as NULL pointer
> 
> Signed-off-by: Wei Yongjun 
> ---
>   drivers/phy/st/phy-stm32-usbphyc.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/phy/st/phy-stm32-usbphyc.c 
> b/drivers/phy/st/phy-stm32-usbphyc.c
> index bc4e78a..48d4086 100644
> --- a/drivers/phy/st/phy-stm32-usbphyc.c
> +++ b/drivers/phy/st/phy-stm32-usbphyc.c
> @@ -328,7 +328,7 @@ static int stm32_usbphyc_probe(struct platform_device 
> *pdev)
>   if (IS_ERR(usbphyc->base))
>   return PTR_ERR(usbphyc->base);
>   
> - usbphyc->clk = devm_clk_get(dev, 0);
> + usbphyc->clk = devm_clk_get(dev, NULL);
>   if (IS_ERR(usbphyc->clk)) {
>   ret = PTR_ERR(usbphyc->clk);
>   dev_err(dev, "clk get failed: %d\n", ret);
> @@ -341,7 +341,7 @@ static int stm32_usbphyc_probe(struct platform_device 
> *pdev)
>   return ret;
>   }
>   
> - usbphyc->rst = devm_reset_control_get(dev, 0);
> + usbphyc->rst = devm_reset_control_get(dev, NULL);
>   if (!IS_ERR(usbphyc->rst)) {
>   reset_control_assert(usbphyc->rst);
>   udelay(2);
> 

Reviewed-by: Amelie Delaunay 

Thanks,
Amelie

Re: [PATCH] usb: dwc2: dwc2_vbus_supply_init: fix error check

2018-03-22 Thread Amelie DELAUNAY
Hi Heiko,
Hi Tomeu,

On 03/22/2018 12:41 PM, Heiko Stübner wrote:
> Hi Tomeu,
> 
> Am Donnerstag, 22. März 2018, 12:39:13 CET schrieb Heiko Stübner:
>> Am Donnerstag, 22. März 2018, 10:39:43 CET schrieb Tomeu Vizoso:
>>> devm_regulator_get_optional returns -ENODEV if the regulator isn't
>>> there, so if that's the case we have to make sure not to leave -ENODEV
>>> in the regulator pointer.
>>>
>>> Also, make sure we return 0 in that case, but correctly propagate any
>>> other errors. Also propagate the error from _dwc2_hcd_start.
>>>
>>> Fixes: 531ef5ebea96 ("usb: dwc2: add support for host mode external vbus
>>> supply") Cc: Amelie Delaunay 
>>> Signed-off-by: Tomeu Vizoso 
>>
>> Thanks for catching that oops in your tests.
>> Reviewed-by: Heiko Stuebner 
> 
> I take that back :-)
> see below
> 
>>> ---
>>>
>>>   drivers/usb/dwc2/hcd.c | 13 -
>>>   1 file changed, 8 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
>>> index dcfda5eb4cac..4ae211f65e85 100644
>>> --- a/drivers/usb/dwc2/hcd.c
>>> +++ b/drivers/usb/dwc2/hcd.c
>>> @@ -359,8 +359,13 @@ static void dwc2_gusbcfg_init(struct dwc2_hsotg
>>> *hsotg) static int dwc2_vbus_supply_init(struct dwc2_hsotg *hsotg)
>>>
>>>   {
>>>   
>>> hsotg->vbus_supply = devm_regulator_get_optional(hsotg->dev, "vbus");
>>>
>>> -   if (IS_ERR(hsotg->vbus_supply))
>>> -   return 0;
>>> +   if (IS_ERR(hsotg->vbus_supply)) {
>>> +   hsotg->vbus_supply = NULL;
>>> +   if (PTR_ERR(hsotg->vbus_supply) == -ENODEV)
> 
> hsotg->vbus_supply is already NULL here
> 

Tomeu is right, here, hsotg->vbus_supply = ERR_PTR(-ENODEV).
/**
  * regulator_get_optional - obtain optional access to a regulator.
  * ...
  * Returns a struct regulator corresponding to the regulator producer,
  * or IS_ERR() condition containing errno.
  * ...
  */

You can add my Reviewed-by: Amelie Delaunay 

Thanks for the fix,
Amelie

[PATCH v3 2/7] mfd: Add ST Multi-Function eXpander (STMFX) core driver

2018-09-27 Thread Amelie Delaunay
STMicroelectronics Multi-Function eXpander (STMFX) is a slave controller
using I2C for communication with the main MCU. Main features are:
- 16 fast GPIOs individually configurable in input/output
- 8 alternate GPIOs individually configurable in input/output when other
STMFX functions are not used
- Main MCU IDD measurement
- Resistive touchscreen controller

Signed-off-by: Amelie Delaunay 
Reviewed-by: Linus Walleij 
---
 drivers/mfd/Kconfig   |  14 ++
 drivers/mfd/Makefile  |   2 +-
 drivers/mfd/stmfx.c   | 626 ++
 include/linux/mfd/stmfx.h |  27 ++
 4 files changed, 668 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mfd/stmfx.c
 create mode 100644 include/linux/mfd/stmfx.h

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index f3a5f8d..8c41342 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -1862,6 +1862,20 @@ config MFD_STM32_TIMERS
  for PWM and IIO Timer. This driver allow to share the
  registers between the others drivers.
 
+config MFD_STMFX
+   tristate "Support for STMicroelectronics Multi-Function eXpander 
(STMFX)"
+   depends on I2C
+   depends on OF || COMPILE_TEST
+   select MFD_CORE
+   select REGMAP_I2C
+   help
+ Support for the STMicroelectronics Multi-Function eXpander.
+
+ This driver provides common support for accessing the device,
+ additional drivers must be enabled in order to use the functionality
+ of the device.
+
+
 menu "Multimedia Capabilities Port drivers"
depends on ARCH_SA1100
 
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 5856a94..282323b 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -240,4 +240,4 @@ obj-$(CONFIG_MFD_MXS_LRADC) += mxs-lradc.o
 obj-$(CONFIG_MFD_SC27XX_PMIC)  += sprd-sc27xx-spi.o
 obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o
 obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o
-
+obj-$(CONFIG_MFD_STMFX)+= stmfx.o
diff --git a/drivers/mfd/stmfx.c b/drivers/mfd/stmfx.c
new file mode 100644
index 000..cfd4fca
--- /dev/null
+++ b/drivers/mfd/stmfx.c
@@ -0,0 +1,626 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Driver for STMicroelectronics Multi-Function eXpander (STMFX) core
+ *
+ * Copyright (C) 2018 STMicroelectronics
+ * Author(s): Amelie Delaunay .
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* General */
+#define STMFX_REG_CHIP_ID  0x00 /* R */
+#define STMFX_REG_FW_VERSION_MSB   0x01 /* R */
+#define STMFX_REG_FW_VERSION_LSB   0x02 /* R */
+#define STMFX_REG_SYS_CTRL 0x40 /* RW */
+/* IRQ output management */
+#define STMFX_REG_IRQ_OUT_PIN  0x41 /* RW */
+#define STMFX_REG_IRQ_SRC_EN   0x42 /* RW */
+#define STMFX_REG_IRQ_PENDING  0x08 /* R */
+#define STMFX_REG_IRQ_ACK  0x44 /* RW */
+/* GPIO management */
+#define STMFX_REG_IRQ_GPI_PENDING1 0x0C /* R */
+#define STMFX_REG_IRQ_GPI_PENDING2 0x0D /* R */
+#define STMFX_REG_IRQ_GPI_PENDING3 0x0E /* R */
+#define STMFX_REG_GPIO_STATE1  0x10 /* R */
+#define STMFX_REG_GPIO_STATE2  0x11 /* R */
+#define STMFX_REG_GPIO_STATE3  0x12 /* R */
+#define STMFX_REG_IRQ_GPI_SRC1 0x48 /* RW */
+#define STMFX_REG_IRQ_GPI_SRC2 0x49 /* RW */
+#define STMFX_REG_IRQ_GPI_SRC3 0x4A /* RW */
+#define STMFX_REG_GPO_SET1 0x6C /* RW */
+#define STMFX_REG_GPO_SET2 0x6D /* RW */
+#define STMFX_REG_GPO_SET3 0x6E /* RW */
+#define STMFX_REG_GPO_CLR1 0x70 /* RW */
+#define STMFX_REG_GPO_CLR2 0x71 /* RW */
+#define STMFX_REG_GPO_CLR3 0x72 /* RW */
+
+#define STMFX_REG_MAX  0xB0
+
+/* MFX boot time is around 10ms, so after reset, we have to wait this delay */
+#define STMFX_BOOT_TIME_MS 10
+
+/* STMFX_REG_CHIP_ID bitfields */
+#define STMFX_REG_CHIP_ID_MASK GENMASK(7, 0)
+
+/* STMFX_REG_SYS_CTRL bitfields */
+#define STMFX_REG_SYS_CTRL_GPIO_EN BIT(0)
+#define STMFX_REG_SYS_CTRL_TS_EN   BIT(1)
+#define STMFX_REG_SYS_CTRL_IDD_EN  BIT(2)
+#define STMFX_REG_SYS_CTRL_ALTGPIO_EN  BIT(3)
+#define STMFX_REG_SYS_CTRL_SWRST   BIT(7)
+
+/* STMFX_REG_IRQ_OUT_PIN bitfields */
+#define STMFX_REG_IRQ_OUT_PIN_TYPE BIT(0) /* 0-OD 1-PP */
+#define STMFX_REG_IRQ_OUT_PIN_POL  BIT(1) /* 0-active LOW 1-active HIGH */
+
+/* STMFX_REG_IRQ_(SRC_EN/PENDING/ACK) bit shift */
+enum stmfx_irqs {
+   STMFX_REG_IRQ_SRC_EN_GPIO = 0,
+   STMFX_REG_IRQ_SRC_EN_IDD,
+   STMFX_REG_IRQ_SRC_EN_ERROR,
+   STMFX_REG_IRQ_SRC_EN_TS_DET,
+   STMFX_REG_IRQ_SRC_EN_TS_NE,
+   STMFX_REG_IRQ_SRC_EN_TS_TH,
+   STMFX_REG_IRQ_SRC_EN_TS_FULL,
+   STMFX_REG_IRQ_SRC_EN_TS_OVF,
+   STMFX_REG_IRQ_SRC_MAX,
+};
+
+/**
+ * struct stmfx_ddata - STMFX MFD private structure
+ * @stmfx: state holder with device for l

[PATCH v3 5/7] ARM: dts: stm32: add STMFX support on stm32746g-eval

2018-09-27 Thread Amelie Delaunay
This patch adds support for STMicroelectronics Multi-Function eXpander
(STMFX) on stm32746g-eval. It is connected on i2c1.

Signed-off-by: Amelie Delaunay 
Acked-by: Linus Walleij 
---
 arch/arm/boot/dts/stm32746g-eval.dts | 17 +
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/boot/dts/stm32746g-eval.dts 
b/arch/arm/boot/dts/stm32746g-eval.dts
index 8c081ea..203faf0 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -44,6 +44,7 @@
 #include "stm32f746.dtsi"
 #include "stm32f746-pinctrl.dtsi"
 #include 
+#include 
 
 / {
model = "STMicroelectronics STM32746g-EVAL board";
@@ -114,6 +115,22 @@
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
+
+   stmfx: stmfx@42 {
+   compatible = "st,stmfx-0300";
+   reg = <0x42>;
+   interrupts = <8 IRQ_TYPE_EDGE_RISING>;
+   interrupt-parent = <&gpioi>;
+
+   stmfx_pinctrl: stmfx-pin-controller {
+   compatible = "st,stmfx-0300-pinctrl";
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+   };
+   };
 };
 
 &rtc {
-- 
2.7.4



[PATCH v3 3/7] dt-bindings: pinctrl: document the STMFX pinctrl bindings

2018-09-27 Thread Amelie Delaunay
This patch adds documentation of device tree bindings for the
STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander.

Signed-off-by: Amelie Delaunay 
Reviewed-by: Linus Walleij 
Reviewed-by: Rob Herring 
---
 .../devicetree/bindings/pinctrl/pinctrl-stmfx.txt  | 116 +
 1 file changed, 116 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt 
b/Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt
new file mode 100644
index 000..c1b4c18
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt
@@ -0,0 +1,116 @@
+STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander bindings
+
+ST Multi-Function eXpander (STMFX) offers up to 24 GPIOs expansion.
+Please refer to ../mfd/stmfx.txt for STMFX Core bindings.
+
+Required properties:
+- compatible: should be "st,stmfx-0300-pinctrl".
+- #gpio-cells: should be <2>, the first cell is the GPIO number and the second
+  cell is the gpio flags in accordance with .
+- gpio-controller: marks the device as a GPIO controller.
+- #interrupt-cells: should be <2>, the first cell is the GPIO number and the
+  second cell is the interrupt flags in accordance with
+  .
+- interrupt-controller: marks the device as an interrupt controller.
+- gpio-ranges: specifies the mapping between gpio controller and pin
+  controller pins. Check "Concerning gpio-ranges property" below.
+Please refer to ../gpio/gpio.txt.
+
+Please refer to pinctrl-bindings.txt for pin configuration.
+
+Required properties for pin configuration sub-nodes:
+- pins: list of pins to which the configuration applies.
+
+Optional properties for pin configuration sub-nodes (pinconf-generic ones):
+- bias-disable: disable any bias on the pin.
+- bias-pull-up: the pin will be pulled up.
+- bias-pull-pin-default: use the pin-default pull state.
+- bias-pull-down: the pin will be pulled down.
+- drive-open-drain: the pin will be driven with open drain.
+- drive-push-pull: the pin will be driven actively high and low.
+- output-high: the pin will be configured as an output driving high level.
+- output-low: the pin will be configured as an output driving low level.
+
+Note that STMFX pins[15:0] are called "gpio[15:0]", and STMFX pins[23:16] are
+called "agpio[7:0]". Example, to refer to pin 18 of STMFX, use "agpio2".
+
+Concerning gpio-ranges property:
+- if all STMFX pins[24:0] are available (no other STMFX function in use), you
+  should use gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+- if agpio[3:0] are not available (STMFX Touchscreen function in use), you
+  should use gpio-ranges = <&stmfx_pinctrl 0 0 16>, <&stmfx_pinctrl 20 20 4>;
+- if agpio[7:4] are not available (STMFX IDD function in use), you
+  should use gpio-ranges = <&stmfx_pinctrl 0 0 20>;
+
+
+Example:
+
+   stmfx: stmfx@42 {
+   ...
+
+   stmfx_pinctrl: stmfx-pin-controller {
+   compatible = "st,stmfx-0300-pinctrl";
+   #gpio-cells = <2>;
+   #interrupt-cells = <2>;
+   gpio-controller;
+   interrupt-controller;
+   gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+
+   joystick_pins: joystick {
+   pins = "gpio0", "gpio1", "gpio2", "gpio3", 
"gpio4";
+   drive-push-pull;
+   bias-pull-up;
+   };
+   };
+   };
+
+Example of STMFX GPIO consumers:
+
+   joystick {
+   compatible = "gpio-keys";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   pinctrl-0 = <&joystick_pins>;
+   pinctrl-names = "default";
+   button-0 {
+   label = "JoySel";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <0 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-1 {
+   label = "JoyDown";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <1 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-2 {
+   label = "JoyLeft";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <2 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-3 {
+   label = "JoyRight";
+  

[PATCH v3 6/7] ARM: dts: stm32: add joystick support on stm32746g-eval

2018-09-27 Thread Amelie Delaunay
The joystick (B3) on stm32746g-eval uses gpios on STMFX gpio expander.
These gpios need a pin configuration (push-pull and bias-pull-up),
described under stmfx_pinctrl node.

Signed-off-by: Amelie Delaunay 
Acked-by: Linus Walleij 
---
 arch/arm/boot/dts/stm32746g-eval.dts | 43 
 1 file changed, 43 insertions(+)

diff --git a/arch/arm/boot/dts/stm32746g-eval.dts 
b/arch/arm/boot/dts/stm32746g-eval.dts
index 203faf0..b86ad83 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -86,6 +86,43 @@
};
};
 
+   joystick {
+   compatible = "gpio-keys";
+   #size-cells = <0>;
+   pinctrl-0 = <&joystick_pins>;
+   pinctrl-names = "default";
+   button-0 {
+   label = "JoySel";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
+   };
+   button-1 {
+   label = "JoyDown";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+   };
+   button-2 {
+   label = "JoyLeft";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+   };
+   button-3 {
+   label = "JoyRight";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+   };
+   button-4 {
+   label = "JoyUp";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+   };
+   };
+
usbotg_hs_phy: usb-phy {
#phy-cells = <0>;
compatible = "usb-nop-xceiv";
@@ -129,6 +166,12 @@
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+
+   joystick_pins: joystick {
+   pins = "gpio0", "gpio1", "gpio2", "gpio3", 
"gpio4";
+   drive-push-pull;
+   bias-pull-up;
+   };
};
};
 };
-- 
2.7.4



[PATCH v3 0/7] Introduce STMFX I2C Multi-Function eXpander

2018-09-27 Thread Amelie Delaunay
This series adds support for STMicroelectronics Multi-Function eXpander
(STMFX), used on some STM32 discovery and evaluation boards.

STMFX is an STM32L152 slave controller whose firmware embeds the following
features:
- I/O expander (16 GPIOs + 8 extra if the other features are not enabled),
- resistive touchscreen controller,
- IDD measurement.

I2C stuff and chip initialization is based on an MFD parent driver, which
registers a pinctrl MFD child.

---
Changes in v3:
- fix MFD interrupt bindings
- fix drivers/mfd/stmfx.c:103:8: warning: 'mask' may be used uninitialized
  in this function
Changes in v2:
- move to MFD parent driver for i2c stuff and chip initialization
- improve regmap configuration
- take advantage of the use of gpio-ranges


Amelie Delaunay (7):
  dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings
  mfd: Add ST Multi-Function eXpander (STMFX) core driver
  dt-bindings: pinctrl: document the STMFX pinctrl bindings
  pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver
  ARM: dts: stm32: add STMFX support on stm32746g-eval
  ARM: dts: stm32: add joystick support on stm32746g-eval
  ARM: dts: stm32: add orange and blue leds on stm32746g-eval

 Documentation/devicetree/bindings/mfd/stmfx.txt|  28 +
 .../devicetree/bindings/pinctrl/pinctrl-stmfx.txt  | 116 +++
 arch/arm/boot/dts/stm32746g-eval.dts   |  66 ++
 drivers/mfd/Kconfig|  14 +
 drivers/mfd/Makefile   |   2 +-
 drivers/mfd/stmfx.c| 626 
 drivers/pinctrl/Kconfig|  12 +
 drivers/pinctrl/Makefile   |   1 +
 drivers/pinctrl/pinctrl-stmfx.c| 821 +
 include/linux/mfd/stmfx.h  |  27 +
 10 files changed, 1712 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/mfd/stmfx.txt
 create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt
 create mode 100644 drivers/mfd/stmfx.c
 create mode 100644 drivers/pinctrl/pinctrl-stmfx.c
 create mode 100644 include/linux/mfd/stmfx.h

-- 
2.7.4



[PATCH v3 4/7] pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver

2018-09-27 Thread Amelie Delaunay
This patch adds pinctrl/GPIO driver for STMicroelectronics
Multi-Function eXpander (STMFX) GPIO expander.
STMFX is an I2C slave controller, offering up to 24 GPIOs.
The driver relies on generic pin config interface to configure the GPIOs.

Signed-off-by: Amelie Delaunay 
Reviewed-by: Linus Walleij 
---
 drivers/pinctrl/Kconfig |  12 +
 drivers/pinctrl/Makefile|   1 +
 drivers/pinctrl/pinctrl-stmfx.c | 821 
 3 files changed, 834 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-stmfx.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index e86752b..bbd3908 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -244,6 +244,18 @@ config PINCTRL_ST
select PINCONF
select GPIOLIB_IRQCHIP
 
+config PINCTRL_STMFX
+   tristate "STMicroelectronics STMFX GPIO expander pinctrl driver"
+   select GENERIC_PINCONF
+   select GPIOLIB_IRQCHIP
+   select MFD_STMFX
+   help
+ Driver for STMicroelectronics Multi-Function eXpander (STMFX)
+ GPIO expander.
+ This provides a GPIO interface supporting inputs and outputs,
+ and configuring push-pull, open-drain, and can also be used as
+ interrupt-controller.
+
 config PINCTRL_U300
bool "U300 pin controller driver"
depends on ARCH_U300
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 46ef9bd..9abcaa59 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_PINCTRL_LANTIQ)  += pinctrl-lantiq.o
 obj-$(CONFIG_PINCTRL_LPC18XX)  += pinctrl-lpc18xx.o
 obj-$(CONFIG_PINCTRL_TB10X)+= pinctrl-tb10x.o
 obj-$(CONFIG_PINCTRL_ST)   += pinctrl-st.o
+obj-$(CONFIG_PINCTRL_STMFX)+= pinctrl-stmfx.o
 obj-$(CONFIG_PINCTRL_ZYNQ) += pinctrl-zynq.o
 obj-$(CONFIG_PINCTRL_INGENIC)  += pinctrl-ingenic.o
 obj-$(CONFIG_PINCTRL_RK805)+= pinctrl-rk805.o
diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drivers/pinctrl/pinctrl-stmfx.c
new file mode 100644
index 000..e253ed1
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-stmfx.c
@@ -0,0 +1,821 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Driver for STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander
+ *
+ * Copyright (C) 2018 STMicroelectronics
+ * Author(s): Amelie Delaunay .
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "core.h"
+#include "pinctrl-utils.h"
+
+/* GPIOs expander */
+/* GPIO_STATE1 0x10, GPIO_STATE2 0x11, GPIO_STATE3 0x12 */
+#define STMFX_REG_GPIO_STATE   0x10 /* R */
+/* GPIO_DIR1 0x60, GPIO_DIR2 0x61, GPIO_DIR3 0x63 */
+#define STMFX_REG_GPIO_DIR 0x60 /* RW */
+/* GPIO_TYPE1 0x64, GPIO_TYPE2 0x65, GPIO_TYPE3 0x66 */
+#define STMFX_REG_GPIO_TYPE0x64 /* RW */
+/* GPIO_PUPD1 0x68, GPIO_PUPD2 0x69, GPIO_PUPD3 0x6A */
+#define STMFX_REG_GPIO_PUPD0x68 /* RW */
+/* GPO_SET1 0x6C, GPO_SET2 0x6D, GPO_SET3 0x6E */
+#define STMFX_REG_GPO_SET  0x6C /* RW */
+/* GPO_CLR1 0x70, GPO_CLR2 0x71, GPO_CLR3 0x72 */
+#define STMFX_REG_GPO_CLR  0x70 /* RW */
+/* IRQ_GPI_SRC1 0x48, IRQ_GPI_SRC2 0x49, IRQ_GPI_SRC3 0x4A */
+#define STMFX_REG_IRQ_GPI_SRC  0x48 /* RW */
+/* IRQ_GPI_EVT1 0x4C, IRQ_GPI_EVT2 0x4D, IRQ_GPI_EVT3 0x4E */
+#define STMFX_REG_IRQ_GPI_EVT  0x4C /* RW */
+/* IRQ_GPI_TYPE1 0x50, IRQ_GPI_TYPE2 0x51, IRQ_GPI_TYPE3 0x52 */
+#define STMFX_REG_IRQ_GPI_TYPE 0x50 /* RW */
+/* IRQ_GPI_PENDING1 0x0C, IRQ_GPI_PENDING2 0x0D, IRQ_GPI_PENDING3 0x0E*/
+#define STMFX_REG_IRQ_GPI_PENDING  0x0C /* R */
+/* IRQ_GPI_ACK1 0x54, IRQ_GPI_ACK2 0x55, IRQ_GPI_ACK3 0x56 */
+#define STMFX_REG_IRQ_GPI_ACK  0x54 /* RW */
+
+/* STMFX_REG_IRQ_PENDING bitfields */
+#define STMFX_REG_IRQ_PENDING_GPIO BIT(0)
+
+#define NR_GPIO_REGS   3
+#define NR_GPIOS_PER_REG   8
+#define get_reg(offset)((offset) / NR_GPIOS_PER_REG)
+#define get_shift(offset)  ((offset) % NR_GPIOS_PER_REG)
+#define get_mask(offset)   (BIT(get_shift(offset)))
+
+/*
+ * STMFX pinctrl can have up to 24 pins if STMFX other functions are not used.
+ * Pins availability is managed thanks to gpio-ranges property.
+ */
+static const struct pinctrl_pin_desc stmfx_pins[] = {
+   PINCTRL_PIN(0, "gpio0"),
+   PINCTRL_PIN(1, "gpio1"),
+   PINCTRL_PIN(2, "gpio2"),
+   PINCTRL_PIN(3, "gpio3"),
+   PINCTRL_PIN(4, "gpio4"),
+   PINCTRL_PIN(5, "gpio5"),
+   PINCTRL_PIN(6, "gpio6"),
+   PINCTRL_PIN(7, "gpio7"),
+   PINCTRL_PIN(8, "gpio8"),
+   PINCTRL_PIN(9, "gpio9"),
+   PINCTRL_PIN(10, "gpio10"),
+   PINCTRL_PIN(11, "gpio11"),
+   PINCTRL_PIN(12, "gpio12"),
+   PINCTRL_PIN(13, "gpio13

[PATCH v3 7/7] ARM: dts: stm32: add orange and blue leds on stm32746g-eval

2018-09-27 Thread Amelie Delaunay
Orange (LD2) and blue (LD4) leds on stm32746g-eval are connected on
STMFX gpio expander, offset 17 and 19.

Signed-off-by: Amelie Delaunay 
Acked-by: Linus Walleij 
---
 arch/arm/boot/dts/stm32746g-eval.dts | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/stm32746g-eval.dts 
b/arch/arm/boot/dts/stm32746g-eval.dts
index b86ad83..a5fa73f 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -69,9 +69,15 @@
gpios = <&gpiof 10 1>;
linux,default-trigger = "heartbeat";
};
+   orange {
+   gpios = <&stmfx_pinctrl 17 1>;
+   };
red {
gpios = <&gpiob 7 1>;
};
+   blue {
+   gpios = <&stmfx_pinctrl 19 1>;
+   };
};
 
gpio_keys {
-- 
2.7.4



[PATCH v3 1/7] dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings

2018-09-27 Thread Amelie Delaunay
This patch adds documentation of device tree bindings for the
STMicroelectronics Multi-Function eXpander (STMFX) MFD core.

Signed-off-by: Amelie Delaunay 
Reviewed-by: Linus Walleij 
---
 Documentation/devicetree/bindings/mfd/stmfx.txt | 28 +
 1 file changed, 28 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/stmfx.txt

diff --git a/Documentation/devicetree/bindings/mfd/stmfx.txt 
b/Documentation/devicetree/bindings/mfd/stmfx.txt
new file mode 100644
index 000..f0c2f7f
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/stmfx.txt
@@ -0,0 +1,28 @@
+STMicroelectonics Multi-Function eXpander (STMFX) Core bindings
+
+ST Multi-Function eXpander (STMFX) is a slave controller using I2C for
+communication with the main MCU. Its main features are GPIO expansion, main
+MCU IDD measurement (IDD is the amount of current that flows through VDD) and
+resistive touchscreen controller.
+
+Required properties:
+- compatible: should be "st,stmfx-0300".
+- reg: I2C slave address of the device.
+- interrupts: interrupt specifier triggered by MFX_IRQ_OUT signal.
+  Please refer to ../interrupt-controller/interrupt.txt
+
+Optional properties:
+- drive-open-drain: configure MFX_IRQ_OUT as open drain.
+- vdd-supply: phandle of the regulator supplying STMFX.
+
+Example:
+
+   stmfx: stmfx@42 {
+   compatible = "st,stmfx-0300";
+   reg = <0x42>;
+   interrupts = <8 IRQ_TYPE_EDGE_RISING>;
+   interrupt-parent = <&gpioi>;
+   vdd-supply = <&v3v3>;
+   };
+
+Please refer to ../pinctrl/pinctrl-stmfx.txt for STMFX GPIO expander function 
bindings.
-- 
2.7.4



Re: [PATCH 3/3] ARM: multi_v7_defconfig: enable STM32 SPI

2018-06-26 Thread Amelie DELAUNAY
Hi Alex

On 06/26/2018 10:44 AM, Alexandre Torgue wrote:
> Hi Amélie
> 
> On 05/17/2018 04:21 PM, Amelie Delaunay wrote:
>> Enable the STM32 SPI driver, implemented on STM32MP1 SoC.
>>
>> Signed-off-by: Amelie Delaunay 
>> ---
>>   arch/arm/configs/multi_v7_defconfig | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm/configs/multi_v7_defconfig 
>> b/arch/arm/configs/multi_v7_defconfig
>> index 89167cd..f990335 100644
>> --- a/arch/arm/configs/multi_v7_defconfig
>> +++ b/arch/arm/configs/multi_v7_defconfig
>> @@ -411,6 +411,7 @@ CONFIG_SPI_S3C64XX=m
>>   CONFIG_SPI_SH_MSIOF=m
>>   CONFIG_SPI_SH_HSPI=y
>>   CONFIG_SPI_SIRF=y
>> +CONFIG_SPI_STM32=y
>>   CONFIG_SPI_SUN4I=y
>>   CONFIG_SPI_SUN6I=y
>>   CONFIG_SPI_TEGRA114=y
>>
> 
> Driver which are are not "vital" to boot STM32 platform should be 
> defined as module. It's the case for this one. Isn't ?
> 

You're right. I'll send v2 with CONFIG_SPI_STM32=m ASAP. Should I resend 
the whole patchset (with DT), or just this patch and you take the DT 
patches as they are ?

Regards,
Amelie

Re: [PATCH v2 1/3] rtc: stm32: rework register management to prepare other version of RTC

2018-05-17 Thread Amelie DELAUNAY
Hi,

On 05/16/2018 10:25 PM, Alexandre Belloni wrote:
> Hi,
> 
> On 09/05/2018 17:46:08+0200, Amelie Delaunay wrote:
>>   static void stm32_rtc_wpr_unlock(struct stm32_rtc *rtc)
>>   {
>> -writel_relaxed(RTC_WPR_1ST_KEY, rtc->base + STM32_RTC_WPR);
>> -writel_relaxed(RTC_WPR_2ND_KEY, rtc->base + STM32_RTC_WPR);
>> +struct stm32_rtc_registers regs = rtc->data->regs;
> 
> regs should probably be a pointer to ensure that no copy is made. I've
> actually checked and it doesn't make a difference because gcc is smart
> enough to not make the copy.
> 

...

>>   static irqreturn_t stm32_rtc_alarm_irq(int irq, void *dev_id)
>>   {
>>  struct stm32_rtc *rtc = (struct stm32_rtc *)dev_id;
>> -unsigned int isr, cr;
>> +struct stm32_rtc_registers regs = rtc->data->regs;
>> +struct stm32_rtc_events evts = rtc->data->events;
> 
> Ditto for evts.
>

I prepare a v3 with const struct stm32_rtc_registers *regs and const 
struct stm32_rtc_events *evts.

>> +unsigned int status, cr;
>>   
>>  mutex_lock(&rtc->rtc_dev->ops_lock);
>>   
>> -isr = readl_relaxed(rtc->base + STM32_RTC_ISR);
>> -cr = readl_relaxed(rtc->base + STM32_RTC_CR);
>> +status = readl_relaxed(rtc->base + regs.isr);
>> +cr = readl_relaxed(rtc->base + regs.cr);
>>   
>> -if ((isr & STM32_RTC_ISR_ALRAF) &&
>> +if ((status & evts.alra) &&
>>  (cr & STM32_RTC_CR_ALRAIE)) {
>>  /* Alarm A flag - Alarm interrupt */
>>  dev_dbg(&rtc->rtc_dev->dev, "Alarm occurred\n");
> 
> ...
> 
>> @@ -641,7 +710,7 @@ static int stm32_rtc_probe(struct platform_device *pdev)
>>   
>>  /*
>>   * After a system reset, RTC_ISR.INITS flag can be read to check if
>> - * the calendar has been initalized or not. INITS flag is reset by a
>> + * the calendar has been initialized or not. INITS flag is reset by a
>>   * power-on reset (no vbat, no power-supply). It is not reset if
>>   * rtc_ck parent clock has changed (so RTC prescalers need to be
>>   * changed). That's why we cannot rely on this flag to know if RTC
>> @@ -666,7 +735,7 @@ static int stm32_rtc_probe(struct platform_device *pdev)
>>   "alarm won't be able to wake up the system");
>>   
>>  rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, pdev->name,
>> -&stm32_rtc_ops, THIS_MODULE);
>> +&stm32_rtc_ops, THIS_MODULE);
>>  if (IS_ERR(rtc->rtc_dev)) {
>>  ret = PTR_ERR(rtc->rtc_dev);
>>  dev_err(&pdev->dev, "rtc device registration failed, err=%d\n",
> 
> Those two changes should go into a separate cleanup patch.
> 

OK, new patch for these two changes in v3.

Thanks for reviewing,
Amelie

Re: [PATCH v2 3/3] rtc: stm32: add stm32mp1 rtc support

2018-05-17 Thread Amelie DELAUNAY
On 05/16/2018 10:32 PM, Alexandre Belloni wrote:
> On 09/05/2018 17:46:10+0200, Amelie Delaunay wrote:
>>   struct stm32_rtc_registers {
>> @@ -86,6 +98,9 @@ struct stm32_rtc_registers {
>>  u8 prer;
>>  u8 alrmar;
>>  u8 wpr;
>> +u8 sr;
>> +u8 scr;
>> +u16 verr;
> 
> All those offsets should probably be u16 or u32...
>

OK, those offsets will be all u16 in v3, the maximum STM32 RTC register 
offset value being 0x3FC.

>> +if (regs.verr != UNDEF_REG) {
> 
> ...else, this is not working, as reported by kbuild
> 

Yes, in v3, UNDEF_REG will be the maximum u16 value (0x) instead of ~0.

>> +u32 ver = readl_relaxed(rtc->base + regs.verr);
>> +
>> +dev_info(&pdev->dev, "registered rev:%d.%d\n",
>> + (ver >> STM32_RTC_VERR_MAJREV_SHIFT) & 0xF,
>> + (ver >> STM32_RTC_VERR_MINREV_SHIFT) & 0xF);
>> +}
>> +
> 

Thanks,
Amelie

[PATCH v3 1/4] rtc: stm32: fix misspelling and misalignment issues

2018-05-17 Thread Amelie Delaunay
This patch cleans the following checkpatch complaints:

CHECK: 'initalized' may be misspelled - perhaps 'initialized'?
#644: FILE: drivers/rtc/rtc-stm32.c:644:
+* the calendar has been initalized or not. INITS flag is reset by a

CHECK: Alignment should match open parenthesis
#669: FILE: drivers/rtc/rtc-stm32.c:669:
+   rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, pdev->name,
+   &stm32_rtc_ops, THIS_MODULE);

Signed-off-by: Amelie Delaunay 
---
 drivers/rtc/rtc-stm32.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/rtc/rtc-stm32.c b/drivers/rtc/rtc-stm32.c
index de49b5b..d41f804 100644
--- a/drivers/rtc/rtc-stm32.c
+++ b/drivers/rtc/rtc-stm32.c
@@ -641,7 +641,7 @@ static int stm32_rtc_probe(struct platform_device *pdev)
 
/*
 * After a system reset, RTC_ISR.INITS flag can be read to check if
-* the calendar has been initalized or not. INITS flag is reset by a
+* the calendar has been initialized or not. INITS flag is reset by a
 * power-on reset (no vbat, no power-supply). It is not reset if
 * rtc_ck parent clock has changed (so RTC prescalers need to be
 * changed). That's why we cannot rely on this flag to know if RTC
@@ -666,7 +666,7 @@ static int stm32_rtc_probe(struct platform_device *pdev)
 "alarm won't be able to wake up the system");
 
rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, pdev->name,
-   &stm32_rtc_ops, THIS_MODULE);
+   &stm32_rtc_ops, THIS_MODULE);
if (IS_ERR(rtc->rtc_dev)) {
ret = PTR_ERR(rtc->rtc_dev);
dev_err(&pdev->dev, "rtc device registration failed, err=%d\n",
-- 
2.7.4



[PATCH v3 3/4] dt-bindings: rtc: update stm32-rtc documentation for stm32mp1 rtc

2018-05-17 Thread Amelie Delaunay
RTC embedded in stm32mp1 SoC is slightly different from stm32h7 one, it
doesn't require to disable backup domain write protection, and rtc_ck
parent clock assignment isn't allowed.
To sum up, stm32mp1 RTC requires 2 clocks, pclk and rtc_ck, and an RTC
alarm interrupt.

Signed-off-by: Amelie Delaunay 
---
 .../devicetree/bindings/rtc/st,stm32-rtc.txt   | 27 --
 1 file changed, 20 insertions(+), 7 deletions(-)

diff --git a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt 
b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
index 00f8b5d..c920e27 100644
--- a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
+++ b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
@@ -1,25 +1,29 @@
 STM32 Real Time Clock
 
 Required properties:
-- compatible: can be either "st,stm32-rtc" or "st,stm32h7-rtc", depending on
-  the device is compatible with stm32(f4/f7) or stm32h7.
+- compatible: can be one of the following:
+  - "st,stm32-rtc" for devices compatible with stm32(f4/f7).
+  - "st,stm32h7-rtc" for devices compatible with stm32h7.
+  - "st,stm32mp1-rtc" for devices compatible with stm32mp1.
 - reg: address range of rtc register set.
 - clocks: can use up to two clocks, depending on part used:
   - "rtc_ck": RTC clock source.
-It is required on stm32(f4/f7) and stm32h7.
   - "pclk": RTC APB interface clock.
 It is not present on stm32(f4/f7).
-It is required on stm32h7.
+It is required on stm32(h7/mp1).
 - clock-names: must be "rtc_ck" and "pclk".
-It is required only on stm32h7.
+It is required on stm32(h7/mp1).
 - interrupt-parent: phandle for the interrupt controller.
-- interrupts: rtc alarm interrupt.
+It is required on stm32(f4/f7/h7).
+- interrupts: rtc alarm interrupt. On stm32mp1, a second interrupt is required
+  for rtc alarm wakeup interrupt.
 - st,syscfg: phandle/offset/mask triplet. The phandle to pwrcfg used to
   access control register at offset, and change the dbp (Disable Backup
   Protection) bit represented by the mask, mandatory to disable/enable backup
   domain (RTC registers) write protection.
+It is required on stm32(f4/f7/h7).
 
-Optional properties (to override default rtc_ck parent clock):
+Optional properties (to override default rtc_ck parent clock on 
stm32(f4/f7/h7):
 - assigned-clocks: reference to the rtc_ck clock entry.
 - assigned-clock-parents: phandle of the new parent clock of rtc_ck.
 
@@ -48,3 +52,12 @@ Example:
interrupt-names = "alarm";
st,syscfg = <&pwrcfg 0x00 0x100>;
};
+
+   rtc: rtc@5c004000 {
+   compatible = "st,stm32mp1-rtc";
+   reg = <0x5c004000 0x400>;
+   clocks = <&rcc RTCAPB>, <&rcc RTC>;
+   clock-names = "pclk", "rtc_ck";
+   interrupts-extended = <&intc GIC_SPI 3 IRQ_TYPE_NONE>,
+ <&exti 19 1>;
+   };
-- 
2.7.4



[PATCH v3 0/4] Introduce STM32MP1 RTC

2018-05-17 Thread Amelie Delaunay
This series introduces STM32MP1 RTC.
On STM32MP1:
- two clocks are needed, plck and rtc_ck;
- to wakeup the system, a wakeup alarm interrupt is needed;
- some registers or bits have moved, but the operation is the same;
- the Backup Domain Protection (DBP) is not managed by RTC driver.

---
Changes in v3:
* Move cleanup changes in a separate patch
* Replace regs and evts by pointers to ensure no copy is made
* Set all registers offset as u16 instead of u8 and u16
* Fix Kbuild smatch warning:
  drivers/rtc/rtc-stm32.c:827 stm32_rtc_probe()
  warn: always true condition '(regs.verr != ~0) => (0-u16max != (-1))'

Changes in v2:
* One compatible per line in bindings file
* Remove unnecessary comment under rtc_ck as this clock is required for all
* Remove interrupts-extended and add stm32mp1 rtc alarm wakeup interrupt in
  interrupts property description

Amelie Delaunay (4):
  rtc: stm32: fix misspelling and misalignment issues
  rtc: stm32: rework register management to prepare other version of RTC
  dt-bindings: rtc: update stm32-rtc documentation for stm32mp1 rtc
  rtc: stm32: add stm32mp1 rtc support

 .../devicetree/bindings/rtc/st,stm32-rtc.txt   |  27 +-
 drivers/rtc/rtc-stm32.c| 273 -
 2 files changed, 229 insertions(+), 71 deletions(-)

-- 
2.7.4



[PATCH v3 4/4] rtc: stm32: add stm32mp1 rtc support

2018-05-17 Thread Amelie Delaunay
This patch adds support for stm32mp1 RTC.
Some common registers with previous RTC version have a different offset.
It is the case for Control Register (CR) and ALaRMA Register (ALRMAR).
There are also new registers regarding event flags: now, Alarm event flag
is in Status Register (SR) and write 1 in Status Clear Register (SCR) is
required to clear the event.

Signed-off-by: Amelie Delaunay 
---
 drivers/rtc/rtc-stm32.c | 103 +---
 1 file changed, 89 insertions(+), 14 deletions(-)

diff --git a/drivers/rtc/rtc-stm32.c b/drivers/rtc/rtc-stm32.c
index 8254e38..c5908cf 100644
--- a/drivers/rtc/rtc-stm32.c
+++ b/drivers/rtc/rtc-stm32.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -39,7 +40,7 @@
 #define STM32_RTC_CR_ALRAE BIT(8)
 #define STM32_RTC_CR_ALRAIEBIT(12)
 
-/* STM32_RTC_ISR bit fields */
+/* STM32_RTC_ISR/STM32_RTC_ICSR bit fields */
 #define STM32_RTC_ISR_ALRAWF   BIT(0)
 #define STM32_RTC_ISR_INITSBIT(4)
 #define STM32_RTC_ISR_RSF  BIT(5)
@@ -71,21 +72,36 @@
 #define STM32_RTC_ALRMXR_WDAY  GENMASK(27, 24)
 #define STM32_RTC_ALRMXR_DATE_MASK BIT(31)
 
+/* STM32_RTC_SR/_SCR bit fields */
+#define STM32_RTC_SR_ALRA  BIT(0)
+
+/* STM32_RTC_VERR bit fields */
+#define STM32_RTC_VERR_MINREV_SHIFT0
+#define STM32_RTC_VERR_MINREV  GENMASK(3, 0)
+#define STM32_RTC_VERR_MAJREV_SHIFT4
+#define STM32_RTC_VERR_MAJREV  GENMASK(7, 4)
+
 /* STM32_RTC_WPR key constants */
 #define RTC_WPR_1ST_KEY0xCA
 #define RTC_WPR_2ND_KEY0x53
 #define RTC_WPR_WRONG_KEY  0xFF
 
+/* Max STM32 RTC register offset is 0x3FC */
+#define UNDEF_REG  0x
+
 struct stm32_rtc;
 
 struct stm32_rtc_registers {
-   u8 tr;
-   u8 dr;
-   u8 cr;
-   u8 isr;
-   u8 prer;
-   u8 alrmar;
-   u8 wpr;
+   u16 tr;
+   u16 dr;
+   u16 cr;
+   u16 isr;
+   u16 prer;
+   u16 alrmar;
+   u16 wpr;
+   u16 sr;
+   u16 scr;
+   u16 verr;
 };
 
 struct stm32_rtc_events {
@@ -98,6 +114,7 @@ struct stm32_rtc_data {
void (*clear_events)(struct stm32_rtc *rtc, unsigned int flags);
bool has_pclk;
bool need_dbp;
+   bool has_wakeirq;
 };
 
 struct stm32_rtc {
@@ -110,6 +127,7 @@ struct stm32_rtc {
struct clk *rtc_ck;
const struct stm32_rtc_data *data;
int irq_alarm;
+   int wakeirq_alarm;
 };
 
 static void stm32_rtc_wpr_unlock(struct stm32_rtc *rtc)
@@ -193,7 +211,7 @@ static irqreturn_t stm32_rtc_alarm_irq(int irq, void 
*dev_id)
 
mutex_lock(&rtc->rtc_dev->ops_lock);
 
-   status = readl_relaxed(rtc->base + regs->isr);
+   status = readl_relaxed(rtc->base + regs->sr);
cr = readl_relaxed(rtc->base + regs->cr);
 
if ((status & evts->alra) &&
@@ -325,7 +343,7 @@ static int stm32_rtc_read_alarm(struct device *dev, struct 
rtc_wkalrm *alrm)
 
alrmar = readl_relaxed(rtc->base + regs->alrmar);
cr = readl_relaxed(rtc->base + regs->cr);
-   status = readl_relaxed(rtc->base + regs->isr);
+   status = readl_relaxed(rtc->base + regs->sr);
 
if (alrmar & STM32_RTC_ALRMXR_DATE_MASK) {
/*
@@ -533,6 +551,7 @@ static void stm32_rtc_clear_events(struct stm32_rtc *rtc,
 static const struct stm32_rtc_data stm32_rtc_data = {
.has_pclk = false,
.need_dbp = true,
+   .has_wakeirq = false,
.regs = {
.tr = 0x00,
.dr = 0x04,
@@ -541,6 +560,9 @@ static const struct stm32_rtc_data stm32_rtc_data = {
.prer = 0x10,
.alrmar = 0x1C,
.wpr = 0x24,
+   .sr = 0x0C, /* set to ISR offset to ease alarm management */
+   .scr = UNDEF_REG,
+   .verr = UNDEF_REG,
},
.events = {
.alra = STM32_RTC_ISR_ALRAF,
@@ -551,6 +573,7 @@ static const struct stm32_rtc_data stm32_rtc_data = {
 static const struct stm32_rtc_data stm32h7_rtc_data = {
.has_pclk = true,
.need_dbp = true,
+   .has_wakeirq = false,
.regs = {
.tr = 0x00,
.dr = 0x04,
@@ -559,6 +582,9 @@ static const struct stm32_rtc_data stm32h7_rtc_data = {
.prer = 0x10,
.alrmar = 0x1C,
.wpr = 0x24,
+   .sr = 0x0C, /* set to ISR offset to ease alarm management */
+   .scr = UNDEF_REG,
+   .verr = UNDEF_REG,
},
.events = {
.alra = STM32_RTC_ISR_ALRAF,
@@ -566,9 +592,41 @@ static const struct stm32_rtc_data stm32h7_rtc_data = {
.clear_events = stm32_rtc_clear_events,
 };
 
+static void stm32mp1_rtc_clear_events(struct stm32_rtc *rtc,
+

[PATCH v3 2/4] rtc: stm32: rework register management to prepare other version of RTC

2018-05-17 Thread Amelie Delaunay
This patch reworks register/bits management because next version of RTC
uses the same way of working but with different register's offset or bits
moved in new registers.

Signed-off-by: Amelie Delaunay 
---
 drivers/rtc/rtc-stm32.c | 184 +---
 1 file changed, 127 insertions(+), 57 deletions(-)

diff --git a/drivers/rtc/rtc-stm32.c b/drivers/rtc/rtc-stm32.c
index d41f804..8254e38 100644
--- a/drivers/rtc/rtc-stm32.c
+++ b/drivers/rtc/rtc-stm32.c
@@ -16,15 +16,6 @@
 
 #define DRIVER_NAME "stm32_rtc"
 
-/* STM32 RTC registers */
-#define STM32_RTC_TR   0x00
-#define STM32_RTC_DR   0x04
-#define STM32_RTC_CR   0x08
-#define STM32_RTC_ISR  0x0C
-#define STM32_RTC_PRER 0x10
-#define STM32_RTC_ALRMAR   0x1C
-#define STM32_RTC_WPR  0x24
-
 /* STM32_RTC_TR bit fields  */
 #define STM32_RTC_TR_SEC_SHIFT 0
 #define STM32_RTC_TR_SEC   GENMASK(6, 0)
@@ -85,7 +76,26 @@
 #define RTC_WPR_2ND_KEY0x53
 #define RTC_WPR_WRONG_KEY  0xFF
 
+struct stm32_rtc;
+
+struct stm32_rtc_registers {
+   u8 tr;
+   u8 dr;
+   u8 cr;
+   u8 isr;
+   u8 prer;
+   u8 alrmar;
+   u8 wpr;
+};
+
+struct stm32_rtc_events {
+   u32 alra;
+};
+
 struct stm32_rtc_data {
+   const struct stm32_rtc_registers regs;
+   const struct stm32_rtc_events events;
+   void (*clear_events)(struct stm32_rtc *rtc, unsigned int flags);
bool has_pclk;
bool need_dbp;
 };
@@ -96,30 +106,35 @@ struct stm32_rtc {
struct regmap *dbp;
unsigned int dbp_reg;
unsigned int dbp_mask;
-   struct stm32_rtc_data *data;
struct clk *pclk;
struct clk *rtc_ck;
+   const struct stm32_rtc_data *data;
int irq_alarm;
 };
 
 static void stm32_rtc_wpr_unlock(struct stm32_rtc *rtc)
 {
-   writel_relaxed(RTC_WPR_1ST_KEY, rtc->base + STM32_RTC_WPR);
-   writel_relaxed(RTC_WPR_2ND_KEY, rtc->base + STM32_RTC_WPR);
+   const struct stm32_rtc_registers *regs = &rtc->data->regs;
+
+   writel_relaxed(RTC_WPR_1ST_KEY, rtc->base + regs->wpr);
+   writel_relaxed(RTC_WPR_2ND_KEY, rtc->base + regs->wpr);
 }
 
 static void stm32_rtc_wpr_lock(struct stm32_rtc *rtc)
 {
-   writel_relaxed(RTC_WPR_WRONG_KEY, rtc->base + STM32_RTC_WPR);
+   const struct stm32_rtc_registers *regs = &rtc->data->regs;
+
+   writel_relaxed(RTC_WPR_WRONG_KEY, rtc->base + regs->wpr);
 }
 
 static int stm32_rtc_enter_init_mode(struct stm32_rtc *rtc)
 {
-   unsigned int isr = readl_relaxed(rtc->base + STM32_RTC_ISR);
+   const struct stm32_rtc_registers *regs = &rtc->data->regs;
+   unsigned int isr = readl_relaxed(rtc->base + regs->isr);
 
if (!(isr & STM32_RTC_ISR_INITF)) {
isr |= STM32_RTC_ISR_INIT;
-   writel_relaxed(isr, rtc->base + STM32_RTC_ISR);
+   writel_relaxed(isr, rtc->base + regs->isr);
 
/*
 * It takes around 2 rtc_ck clock cycles to enter in
@@ -128,7 +143,7 @@ static int stm32_rtc_enter_init_mode(struct stm32_rtc *rtc)
 * 1MHz, we poll every 10 us with a timeout of 100ms.
 */
return readl_relaxed_poll_timeout_atomic(
-   rtc->base + STM32_RTC_ISR,
+   rtc->base + regs->isr,
isr, (isr & STM32_RTC_ISR_INITF),
10, 10);
}
@@ -138,40 +153,50 @@ static int stm32_rtc_enter_init_mode(struct stm32_rtc 
*rtc)
 
 static void stm32_rtc_exit_init_mode(struct stm32_rtc *rtc)
 {
-   unsigned int isr = readl_relaxed(rtc->base + STM32_RTC_ISR);
+   const struct stm32_rtc_registers *regs = &rtc->data->regs;
+   unsigned int isr = readl_relaxed(rtc->base + regs->isr);
 
isr &= ~STM32_RTC_ISR_INIT;
-   writel_relaxed(isr, rtc->base + STM32_RTC_ISR);
+   writel_relaxed(isr, rtc->base + regs->isr);
 }
 
 static int stm32_rtc_wait_sync(struct stm32_rtc *rtc)
 {
-   unsigned int isr = readl_relaxed(rtc->base + STM32_RTC_ISR);
+   const struct stm32_rtc_registers *regs = &rtc->data->regs;
+   unsigned int isr = readl_relaxed(rtc->base + regs->isr);
 
isr &= ~STM32_RTC_ISR_RSF;
-   writel_relaxed(isr, rtc->base + STM32_RTC_ISR);
+   writel_relaxed(isr, rtc->base + regs->isr);
 
/*
 * Wait for RSF to be set to ensure the calendar registers are
 * synchronised, it takes around 2 rtc_ck clock cycles
 */
-   return readl_relaxed_poll_timeout_atomic(rtc->base + STM32_RTC_ISR,
+   return readl_relaxed_poll_timeout_atomic(rtc->base + regs->isr,
 

[PATCH v2 0/3] Add STM32 RTC to stm32mp157c

2018-05-17 Thread Amelie Delaunay
This series adds support for STM32 RTC to stm32mp157c SoC and enables it
on stm32mp157c-ed1 board.

---
Changes in v2:
* Enable STM32 RTC in multi_v7_defconfig

Amelie Delaunay (3):
  ARM: dts: stm32: add RTC support to stm32mp157c
  ARM: dts: stm32: enable RTC on stm32mp157c-ed1
  ARM: multi_v7_defconfig: enable STM32 RTC

 arch/arm/boot/dts/stm32mp157c-ed1.dts | 4 
 arch/arm/boot/dts/stm32mp157c.dtsi| 9 +
 arch/arm/configs/multi_v7_defconfig   | 1 +
 3 files changed, 14 insertions(+)

-- 
2.7.4



[PATCH v2 2/3] ARM: dts: stm32: enable RTC on stm32mp157c-ed1

2018-05-17 Thread Amelie Delaunay
Enable RTC (Real Time Clock) on stm32mp157c-ed1 board.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32mp157c-ed1.dts | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts 
b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index ae33653..050c30d 100644
--- a/arch/arm/boot/dts/stm32mp157c-ed1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ed1.dts
@@ -68,6 +68,10 @@
status = "okay";
 };
 
+&rtc {
+   status = "okay";
+};
+
 &uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_a>;
-- 
2.7.4



[PATCH v2 1/3] ARM: dts: stm32: add RTC support to stm32mp157c

2018-05-17 Thread Amelie Delaunay
Add support for RTC (Real Time Clock) to STM32MP157C SoC.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32mp157c.dtsi | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi 
b/arch/arm/boot/dts/stm32mp157c.dtsi
index b66f673..df2d874 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -818,6 +818,15 @@
status = "disabled";
};
 
+   rtc: rtc@5c004000 {
+   compatible = "st,stm32mp1-rtc";
+   reg = <0x5c004000 0x400>;
+   clocks = <&rcc RTCAPB>, <&rcc RTC>;
+   clock-names = "pclk", "rtc_ck";
+   interrupts = ;
+   status = "disabled";
+   };
+
i2c6: i2c@5c009000 {
compatible = "st,stm32f7-i2c";
reg = <0x5c009000 0x400>;
-- 
2.7.4



[PATCH v2 3/3] ARM: multi_v7_defconfig: enable STM32 RTC

2018-05-17 Thread Amelie Delaunay
Enable the STM32 Real Time Clock (RTC) driver, implemented on STM32MP1 SoC.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/configs/multi_v7_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/multi_v7_defconfig 
b/arch/arm/configs/multi_v7_defconfig
index 89167cd..8e02f86 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -863,6 +863,7 @@ CONFIG_RTC_DRV_SUN6I=y
 CONFIG_RTC_DRV_SUNXI=y
 CONFIG_RTC_DRV_MV=y
 CONFIG_RTC_DRV_TEGRA=y
+CONFIG_RTC_DRV_STM32=y
 CONFIG_RTC_DRV_CPCAP=m
 CONFIG_DMADEVICES=y
 CONFIG_DW_DMAC=y
-- 
2.7.4



[PATCH 1/3] ARM: dts: stm32: add STM32 SPI support on stm32mp157c

2018-05-17 Thread Amelie Delaunay
This patch adds all STM32 SPI instances on stm32mp157c.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32mp157c.dtsi | 84 ++
 1 file changed, 84 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi 
b/arch/arm/boot/dts/stm32mp157c.dtsi
index b66f673..49ce7f0 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -311,6 +311,34 @@
};
};
 
+   spi2: spi@4000b000 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "st,stm32h7-spi";
+   reg = <0x4000b000 0x400>;
+   interrupts = ;
+   clocks = <&rcc SPI2_K>;
+   resets = <&rcc SPI2_R>;
+   dmas = <&dmamux1 39 0x400 0x05>,
+  <&dmamux1 40 0x400 0x05>;
+   dma-names = "rx", "tx";
+   status = "disabled";
+   };
+
+   spi3: spi@4000c000 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "st,stm32h7-spi";
+   reg = <0x4000c000 0x400>;
+   interrupts = ;
+   clocks = <&rcc SPI3_K>;
+   resets = <&rcc SPI3_R>;
+   dmas = <&dmamux1 61 0x400 0x05>,
+  <&dmamux1 62 0x400 0x05>;
+   dma-names = "rx", "tx";
+   status = "disabled";
+   };
+
usart2: serial@4000e000 {
compatible = "st,stm32h7-uart";
reg = <0x4000e000 0x400>;
@@ -494,6 +522,34 @@
status = "disabled";
};
 
+   spi1: spi@44004000 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "st,stm32h7-spi";
+   reg = <0x44004000 0x400>;
+   interrupts = ;
+   clocks = <&rcc SPI1_K>;
+   resets = <&rcc SPI1_R>;
+   dmas = <&dmamux1 37 0x400 0x05>,
+  <&dmamux1 38 0x400 0x05>;
+   dma-names = "rx", "tx";
+   status = "disabled";
+   };
+
+   spi4: spi@44005000 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "st,stm32h7-spi";
+   reg = <0x44005000 0x400>;
+   interrupts = ;
+   clocks = <&rcc SPI4_K>;
+   resets = <&rcc SPI4_R>;
+   dmas = <&dmamux1 83 0x400 0x05>,
+  <&dmamux1 84 0x400 0x05>;
+   dma-names = "rx", "tx";
+   status = "disabled";
+   };
+
timers15: timer@44006000 {
#address-cells = <1>;
#size-cells = <0>;
@@ -556,6 +612,20 @@
};
};
 
+   spi5: spi@44009000 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "st,stm32h7-spi";
+   reg = <0x44009000 0x400>;
+   interrupts = ;
+   clocks = <&rcc SPI5_K>;
+   resets = <&rcc SPI5_R>;
+   dmas = <&dmamux1 85 0x400 0x05>,
+  <&dmamux1 86 0x400 0x05>;
+   dma-names = "rx", "tx";
+   status = "disabled";
+   };
+
dma1: dma@4800 {
compatible = "st,stm32-dma";
reg = <0x4800 0x400>;
@@ -805,6 +875,20 @@
status = "disabled";
};
 
+   spi6: spi@5c001000 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "st,stm32h7-spi";
+   reg = <0x5c001000 0x400>;
+   interrupts = ;
+   clocks = <&rcc SPI6_K>;
+   resets = <&rcc SPI6_R>;
+   dmas = <&mdma1 34 0x0 0x40008 0x0 0x0 0>,
+  <&mdma1 35 0x0 0x40002 0x0 0x0 0>;
+   dma-names = "rx", "tx";
+   status = "disabled";
+   };
+
i2c4: i2c@5c002000 {
compatible = "st,stm32f7-i2c";
reg = <0x5c002000 0x400>;
-- 
2.7.4



[PATCH 0/3] Add STM32 SPI support on stm32mp157c

2018-05-17 Thread Amelie Delaunay
This patch adds STM32 SPI support on stm32mp157c SoC.
SPI1, available on GPIO expansion connector, is kept disabled, so these
pins can be used as GPIOs by default.

Amelie Delaunay (3):
  ARM: dts: stm32: add STM32 SPI support on stm32mp157c
  ARM: dts: stm32: add SPI1 support on stm32mp157c-ev1
  ARM: multi_v7_defconfig: enable STM32 SPI

 arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 16 +-
 arch/arm/boot/dts/stm32mp157c-ev1.dts |  6 +++
 arch/arm/boot/dts/stm32mp157c.dtsi| 84 +++
 arch/arm/configs/multi_v7_defconfig   |  1 +
 4 files changed, 106 insertions(+), 1 deletion(-)

-- 
2.7.4



[PATCH 2/3] ARM: dts: stm32: add SPI1 support on stm32mp157c-ev1

2018-05-17 Thread Amelie Delaunay
This patch adds SPI1 support on stm32mp157c-ev1 board.
SPI1 is available on GPIO expansion connector but kept disabled
so these pins can be used as GPIOs by default.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 16 +++-
 arch/arm/boot/dts/stm32mp157c-ev1.dts |  6 ++
 2 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi 
b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index 88e9133..b35f151 100644
--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
@@ -277,7 +277,6 @@
compatible = "st,stm32mp157-z-pinctrl";
ranges = <0 0x54004000 0x400>;
pins-are-numbered;
-   status = "disabled";
 
gpioz: gpio@54004000 {
gpio-controller;
@@ -301,6 +300,21 @@
slew-rate = <0>;
};
};
+
+   spi1_pins_a: spi1-0 {
+   pins1 {
+   pinmux = , 
/* SPI1_SCK */
+; 
/* SPI1_MOSI */
+   bias-disable;
+   drive-push-pull;
+   slew-rate = <1>;
+   };
+
+   pins2 {
+   pinmux = ; 
/* SPI1_MISO */
+   bias-disable;
+   };
+   };
};
};
 };
diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts 
b/arch/arm/boot/dts/stm32mp157c-ev1.dts
index 9382d80..7584e1f 100644
--- a/arch/arm/boot/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts
@@ -67,6 +67,12 @@
};
 };
 
+&spi1 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&spi1_pins_a>;
+   status = "disabled";
+};
+
 &timers2 {
status = "disabled";
pwm {
-- 
2.7.4



[PATCH 3/3] ARM: multi_v7_defconfig: enable STM32 SPI

2018-05-17 Thread Amelie Delaunay
Enable the STM32 SPI driver, implemented on STM32MP1 SoC.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/configs/multi_v7_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/multi_v7_defconfig 
b/arch/arm/configs/multi_v7_defconfig
index 89167cd..f990335 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -411,6 +411,7 @@ CONFIG_SPI_S3C64XX=m
 CONFIG_SPI_SH_MSIOF=m
 CONFIG_SPI_SH_HSPI=y
 CONFIG_SPI_SIRF=y
+CONFIG_SPI_STM32=y
 CONFIG_SPI_SUN4I=y
 CONFIG_SPI_SUN6I=y
 CONFIG_SPI_TEGRA114=y
-- 
2.7.4



[PATCH] ARM: dts: stm32: enable USB Host (USBH) EHCI controller on stm32mp157c-ev1

2018-05-17 Thread Amelie Delaunay
This patch enables USB Host (USBH) EHCI controller on stm32mp157c-ev1.
As a hub is used between USBH and USB connectors, no need to enable
USBH OHCI controller: all low- and full-speed traffic is managed by the
hub.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32mp157c-ev1.dts | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts 
b/arch/arm/boot/dts/stm32mp157c-ev1.dts
index 9382d80..933036b 100644
--- a/arch/arm/boot/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts
@@ -103,6 +103,12 @@
};
 };
 
+&usbh_ehci {
+   phys = <&usbphyc_port0>;
+   phy-names = "usb";
+   status = "okay";
+};
+
 &usbphyc {
status = "okay";
 };
-- 
2.7.4



[PATCH 2/2] ARM: dts: stm32: enable USB OTG HS on stm32mp157c-ev1

2018-05-17 Thread Amelie Delaunay
This patch enables USB OTG HS on stm32mp157c-ev1 in Peripheral mode.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32mp157c-ev1.dts | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts 
b/arch/arm/boot/dts/stm32mp157c-ev1.dts
index 9382d80..5a0b77e 100644
--- a/arch/arm/boot/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts
@@ -103,6 +103,13 @@
};
 };
 
+&usbotg_hs {
+   dr_mode = "peripheral";
+   phys = <&usbphyc_port1 0>;
+   phy-names = "usb2-phy";
+   status = "okay";
+};
+
 &usbphyc {
status = "okay";
 };
-- 
2.7.4



[PATCH 0/2] Add USB OTG HS support on stm32mp157c

2018-05-17 Thread Amelie Delaunay
This patchset adds support for USB OTG HS on stm32mp157c SoC.
It also enables USB OTG HS on stm32mp157c-ev1 board in Peripheral mode.

Amelie Delaunay (2):
  ARM: dts: stm32: add USB OTG HS support for stm32mp157c SoC
  ARM: dts: stm32: enable USB OTG HS on stm32mp157c-ev1

 arch/arm/boot/dts/stm32mp157c-ev1.dts |  7 +++
 arch/arm/boot/dts/stm32mp157c.dtsi| 15 +++
 2 files changed, 22 insertions(+)

-- 
2.7.4



[PATCH 1/2] ARM: dts: stm32: add USB OTG HS support for stm32mp157c SoC

2018-05-17 Thread Amelie Delaunay
This patch adds support for USB OTG HS on STM32MP157C SoC.
USB OTG HS controller is based on DWC2 controller.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32mp157c.dtsi | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi 
b/arch/arm/boot/dts/stm32mp157c.dtsi
index b66f673..6c3815f 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -600,6 +600,21 @@
clocks = <&rcc DMAMUX>;
};
 
+   usbotg_hs: usb-otg@4900 {
+   compatible = "snps,dwc2";
+   reg = <0x4900 0x1>;
+   clocks = <&rcc USBO_K>;
+   clock-names = "otg";
+   resets = <&rcc USBO_R>;
+   reset-names = "dwc2";
+   interrupts = ;
+   g-rx-fifo-size = <256>;
+   g-np-tx-fifo-size = <32>;
+   g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
+   dr_mode = "otg";
+   status = "disabled";
+   };
+
rcc: rcc@5000 {
compatible = "st,stm32mp1-rcc", "syscon";
reg = <0x5000 0x1000>;
-- 
2.7.4



Re: [PATCH 1/5] dt-bindings: pinctrl: document the STMFX pinctrl bindings

2018-05-18 Thread Amelie DELAUNAY
On 05/17/2018 08:36 AM, Lee Jones wrote:
> On Wed, 16 May 2018, Amelie DELAUNAY wrote:
> 
>>
>>
>> On 05/16/2018 04:20 PM, Linus Walleij wrote:
>>> On Wed, May 9, 2018 at 9:56 AM, Amelie DELAUNAY  
>>> wrote:
>>>
>>>> Indeed, stmfx has other functions than GPIO. But, after comments done
>>>> here: [1] and there: [2], it has been decided to move MFD parent/GPIO
>>>> child drivers into a single PINCTRL/GPIO driver because of the following
>>>> reasons:
>>>> - Other stmfx functions (IDD measurement and TouchScreen controller) are
>>>> not used on any of the boards using an stmfx and supported by Linux, so
>>>> no way to test these functions, and no need to maintain them while they
>>>> are not being used.
>>>> - But, in the case a new board will use more than GPIO function on
>>>> stmfx, the actual implementation allow to easily extract common init
>>>> part of stmfx and put it in an MFD driver.
>>>>
>>>> So I could remove gpio sub-node and put its contents in stmfx node and
>>>> keep single PINCTRL/GPIO driver for the time being.
>>>> Please advise,
>>>
>>> I would normally advice to use the right modeling from the start, create
>>> the MFD driver and spawn the devices from there. It is confusing
>>> if the layout of the driver(s) doesn't really match the layout of the
>>> hardware.
>>>
>>> I understand that it is a pain to write new MFD drivers to get your
>>> things going and it would be "nice to get this working really quick
>>> now" but in my experience it is better to do it right from the start.
>>>
>>
>> Hi Linus,
>>
>> Thanks for your advice. I understand the point.
>> So, the right modeling would be to:
>> - create an MFD driver with the common init part of stmfx
>> - remove all common init part of stmfx-pinctrl driver and keep only all
>> gpio/pinctrl functions.
>>
>> I will not develop the other stmfx functions (IDD measurement driver and
>> TouchScreen controller driver) because, as explained ealier, they are
>> not used on any of the boards using an stmfx and supported by Linux, so
>> no way to test these functions, and no need to maintain them while they
>> are not being used.
>>
>> Lee, are you OK with that ?
> 
> I missed a lot of this conversation I think, but from what I've read,
> it sounds fine.
> 

I summarize the situation:
- I still don't have an official datasheet for STMFX device which could 
justify the use of an MFD driver;
- the MFD driver will contain the STMFX chip initialization stuff such 
as regmap initialization (regmap structure will be shared with the 
child), chip initialization, global interrupt management;
- there will be only one child (GPIO/PINCTRL node) for the time being.

So, is "MFD driver + GPIO/PINCTRL driver" the right modeling, and does 
it still sound fine after this summary ? :)

Thanks,
Amelie


Re: [PATCH 1/5] dt-bindings: pinctrl: document the STMFX pinctrl bindings

2018-05-18 Thread Amelie DELAUNAY
On 05/18/2018 03:52 PM, Lee Jones wrote:
> On Fri, 18 May 2018, Amelie DELAUNAY wrote:
> 
>> On 05/17/2018 08:36 AM, Lee Jones wrote:
>>> On Wed, 16 May 2018, Amelie DELAUNAY wrote:
>>>
>>>>
>>>>
>>>> On 05/16/2018 04:20 PM, Linus Walleij wrote:
>>>>> On Wed, May 9, 2018 at 9:56 AM, Amelie DELAUNAY  
>>>>> wrote:
>>>>>
>>>>>> Indeed, stmfx has other functions than GPIO. But, after comments done
>>>>>> here: [1] and there: [2], it has been decided to move MFD parent/GPIO
>>>>>> child drivers into a single PINCTRL/GPIO driver because of the following
>>>>>> reasons:
>>>>>> - Other stmfx functions (IDD measurement and TouchScreen controller) are
>>>>>> not used on any of the boards using an stmfx and supported by Linux, so
>>>>>> no way to test these functions, and no need to maintain them while they
>>>>>> are not being used.
>>>>>> - But, in the case a new board will use more than GPIO function on
>>>>>> stmfx, the actual implementation allow to easily extract common init
>>>>>> part of stmfx and put it in an MFD driver.
>>>>>>
>>>>>> So I could remove gpio sub-node and put its contents in stmfx node and
>>>>>> keep single PINCTRL/GPIO driver for the time being.
>>>>>> Please advise,
>>>>>
>>>>> I would normally advice to use the right modeling from the start, create
>>>>> the MFD driver and spawn the devices from there. It is confusing
>>>>> if the layout of the driver(s) doesn't really match the layout of the
>>>>> hardware.
>>>>>
>>>>> I understand that it is a pain to write new MFD drivers to get your
>>>>> things going and it would be "nice to get this working really quick
>>>>> now" but in my experience it is better to do it right from the start.
>>>>>
>>>>
>>>> Hi Linus,
>>>>
>>>> Thanks for your advice. I understand the point.
>>>> So, the right modeling would be to:
>>>> - create an MFD driver with the common init part of stmfx
>>>> - remove all common init part of stmfx-pinctrl driver and keep only all
>>>> gpio/pinctrl functions.
>>>>
>>>> I will not develop the other stmfx functions (IDD measurement driver and
>>>> TouchScreen controller driver) because, as explained ealier, they are
>>>> not used on any of the boards using an stmfx and supported by Linux, so
>>>> no way to test these functions, and no need to maintain them while they
>>>> are not being used.
>>>>
>>>> Lee, are you OK with that ?
>>>
>>> I missed a lot of this conversation I think, but from what I've read,
>>> it sounds fine.
>>>
>>
>> I summarize the situation:
>> - I still don't have an official datasheet for STMFX device which could
>> justify the use of an MFD driver;
>> - the MFD driver will contain the STMFX chip initialization stuff such
>> as regmap initialization (regmap structure will be shared with the
>> child), chip initialization, global interrupt management;
>> - there will be only one child (GPIO/PINCTRL node) for the time being.
>>
>> So, is "MFD driver + GPIO/PINCTRL driver" the right modeling, and does
>> it still sound fine after this summary ? :)
> 
> It is starting to sound like there will only ever be one child device,
> which starts to cross the line into "this is not an MFD" (M = Multi)
> territory.
> 

... for the time being. So, Linus, Lee, is it possible to find common 
ground ?

Re: [PATCH 0/5] Add support for STM32F4 SPI

2018-12-17 Thread Amelie DELAUNAY
Hi Cezary,

On 12/10/18 8:05 PM, Cezary Gapiński wrote:
> Hi Amelie,
> 
> On Mon, 2018-12-10 at 12:37 +0000, Amelie DELAUNAY wrote:
>> Hi Cezary,
>>
>> On 12/9/18 2:53 PM, cezary.gapin...@gmail.com wrote:
>>>
>>> From: Cezary Gapinski 
>>>
>>> This series of patches adds support for first generation of SPI
>>> interface
>>> for STM32F4 family.
>>>
>> First of all, thanks for adding STM32F4 SPI support.
> 
> Thanks for your answer and hints for correct approach to this driver.
> 
>>>
>>> This version of driver is mostly different to STM32H7 one. Based on
>>> linux
>>> kernel I2C drivers for STM32 where drivers were splited into
>>> STM32F4 and
>>> STM32F7 family the same approach seems to be sufficient for SPI
>>> STM32
>>> drivers. Therefore STM32H7 driver was moved to spi-stm32h7.c file
>>> and
>>> register and functions were renamed to be more specific to STM32H7.
>>>
>> You're right, STM32F4 SPI is slightly different from STM32H7 one:
>> register map/bits offsets are different and STM32H7 has an RX and TX
>> FIFO.
>> But if you have a look on STM32F7 SPI [1], you'll see that STM32F7
>> SPI
>> is based on STM32F4 SPI with new features (data frames & FIFOs) also
>> available on STM32H7 SPI.
>>
>> That's why STM32H7 SPI driver was called spi-stm32. The goal was to
>> use
>> compatible & match data to differentiate each STM32Fx specificities.
>>
>> You can have a look on how it is managed in drivers/rtc/rtc-stm32.c
>> (the
>> same driver covers 2 HW version of STM32 RTC), or in
>> drivers/iio/dac/stm32-dac-core.c and stm32-dac.c (the same driver
>> also
>> covers 2 HW version of STM32 DAC).
>> As your spi-stm32f4.c file is highly based on the existing spi-
>> stm32.c
>> file, I think that common code could be factored and specificities
>> could
>> be handled with compatible and match data.
> 
> I have seen these drivers before. I have been trying to do this for my
> previous approach and it is still on my second branch. There was not
> too much common parts and I have stuck with complex compatible data
> configurations. I thought that was too verbose, therefore I resigned
> for it and have gone into idea with two totally different files. I
> think I need to get down again to idea you proposed.
> 
> It seems to be more difficult approach and it is gonna take a while
> before I send second version of these patches.
> 
> Regards,
> Cezary
> 

Sure it isn't the easiest approach but it will be less difficult to add 
STM32F7 SPI support then!

I could test your second version when it will be available, on 
STM32H743i-eval if you don't have one.

Regards,
Amelie

>> Regards,
>> Amelie
>> [1]
>> https://www.st.com/content/ccc/resource/technical/document/reference_
>> manual/c5/cf/ef/52/c0/f1/4b/fa/DM00124865.pdf/files/DM00124865.pdf/jc
>> r:content/translations/en.DM00124865.pdf
>>
>>>
>>> For current version master mode with full-duplex and 8/16 bit data
>>> frame
>>> format are supported. There is no TX and RX FIFOs like in STM32H7.
>>> DMA capabilility is supported for messages longer than arbitrary
>>> number
>>> of bytes (that is set already to 16 bytes) when TX and RX channels
>>> are
>>> set at the same time.
>>>
>>> Cezary Gapinski (5):
>>>     spi: stm32: rename STM32 SPI registers and functions to STM32H7
>>>     spi: stm32: rename spi-stm32 to spi-stm32h7
>>>     spi: stm32: add driver for STM32F4 controller
>>>     ARM: dts: stm32: add SPI support on STM32F429 SoC
>>>     spi: stm32: add description about STM32F4 bindings
>>>
>>>    .../devicetree/bindings/spi/spi-stm32.txt  |9 +-
>>>    arch/arm/boot/dts/stm32f429.dtsi   |   60 +
>>>    drivers/spi/Kconfig|   18 +-
>>>    drivers/spi/Makefile   |3 +-
>>>    drivers/spi/spi-stm32.c| 1322 -
>>> --
>>>    drivers/spi/spi-stm32f4.c  | 1002
>>> +++
>>>    drivers/spi/spi-stm32h7.c  | 1340
>>> 
>>>    7 files changed, 2424 insertions(+), 1330 deletions(-)
>>>    delete mode 100644 drivers/spi/spi-stm32.c
>>>    create mode 100644 drivers/spi/spi-stm32f4.c
>>>    create mode 100644 drivers/spi/spi-stm32h7.c

Re: [PATCH 0/5] Add support for STM32F4 SPI

2018-12-10 Thread Amelie DELAUNAY
Hi Cezary,

On 12/9/18 2:53 PM, cezary.gapin...@gmail.com wrote:
> From: Cezary Gapinski 
> 
> This series of patches adds support for first generation of SPI interface
> for STM32F4 family.
> 

First of all, thanks for adding STM32F4 SPI support.

> This version of driver is mostly different to STM32H7 one. Based on linux
> kernel I2C drivers for STM32 where drivers were splited into STM32F4 and
> STM32F7 family the same approach seems to be sufficient for SPI STM32
> drivers. Therefore STM32H7 driver was moved to spi-stm32h7.c file and
> register and functions were renamed to be more specific to STM32H7.
> 

You're right, STM32F4 SPI is slightly different from STM32H7 one: 
register map/bits offsets are different and STM32H7 has an RX and TX FIFO.
But if you have a look on STM32F7 SPI [1], you'll see that STM32F7 SPI 
is based on STM32F4 SPI with new features (data frames & FIFOs) also 
available on STM32H7 SPI.

That's why STM32H7 SPI driver was called spi-stm32. The goal was to use 
compatible & match data to differentiate each STM32Fx specificities.

You can have a look on how it is managed in drivers/rtc/rtc-stm32.c (the 
same driver covers 2 HW version of STM32 RTC), or in 
drivers/iio/dac/stm32-dac-core.c and stm32-dac.c (the same driver also 
covers 2 HW version of STM32 DAC).

As your spi-stm32f4.c file is highly based on the existing spi-stm32.c 
file, I think that common code could be factored and specificities could 
be handled with compatible and match data.

Regards,
Amelie


[1] 
https://www.st.com/content/ccc/resource/technical/document/reference_manual/c5/cf/ef/52/c0/f1/4b/fa/DM00124865.pdf/files/DM00124865.pdf/jcr:content/translations/en.DM00124865.pdf

> For current version master mode with full-duplex and 8/16 bit data frame
> format are supported. There is no TX and RX FIFOs like in STM32H7.
> DMA capabilility is supported for messages longer than arbitrary number
> of bytes (that is set already to 16 bytes) when TX and RX channels are
> set at the same time.
> 
> Cezary Gapinski (5):
>spi: stm32: rename STM32 SPI registers and functions to STM32H7
>spi: stm32: rename spi-stm32 to spi-stm32h7
>spi: stm32: add driver for STM32F4 controller
>ARM: dts: stm32: add SPI support on STM32F429 SoC
>spi: stm32: add description about STM32F4 bindings
> 
>   .../devicetree/bindings/spi/spi-stm32.txt  |9 +-
>   arch/arm/boot/dts/stm32f429.dtsi   |   60 +
>   drivers/spi/Kconfig|   18 +-
>   drivers/spi/Makefile   |3 +-
>   drivers/spi/spi-stm32.c| 1322 
> ---
>   drivers/spi/spi-stm32f4.c  | 1002 +++
>   drivers/spi/spi-stm32h7.c  | 1340 
> 
>   7 files changed, 2424 insertions(+), 1330 deletions(-)
>   delete mode 100644 drivers/spi/spi-stm32.c
>   create mode 100644 drivers/spi/spi-stm32f4.c
>   create mode 100644 drivers/spi/spi-stm32h7.c
>

[PATCH] ARM: dts: stm32: update SPI6 dmas property on stm32mp157c

2018-09-17 Thread Amelie Delaunay
Remove unused parameter from SPI6 dmas property on stm32mp157c SoC.

Fixes: dc3f8c86c10d ("ARM: dts: stm32: add SPI support on stm32mp157c")
Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32mp157c.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi 
b/arch/arm/boot/dts/stm32mp157c.dtsi
index 661be94..185541a 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -1078,8 +1078,8 @@
interrupts = ;
clocks = <&rcc SPI6_K>;
resets = <&rcc SPI6_R>;
-   dmas = <&mdma1 34 0x0 0x40008 0x0 0x0 0>,
-  <&mdma1 35 0x0 0x40002 0x0 0x0 0>;
+   dmas = <&mdma1 34 0x0 0x40008 0x0 0x0>,
+  <&mdma1 35 0x0 0x40002 0x0 0x0>;
dma-names = "rx", "tx";
status = "disabled";
};
-- 
2.7.4



[PATCH] ARM: dts: stm32: add SPI support on STM32H743 SoC

2018-02-28 Thread Amelie Delaunay
This patch adds all SPI instances of the STM32H743 SoC.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32h743.dtsi | 61 
 1 file changed, 61 insertions(+)

diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index 3a28cd2..2bb103e 100644
--- a/arch/arm/boot/dts/stm32h743.dtsi
+++ b/arch/arm/boot/dts/stm32h743.dtsi
@@ -101,6 +101,27 @@
};
};
 
+   spi2: spi@40003800 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "st,stm32h7-spi";
+   reg = <0x40003800 0x400>;
+   interrupts = <36>;
+   clocks = <&rcc SPI2_CK>;
+   status = "disabled";
+
+   };
+
+   spi3: spi@40003c00 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "st,stm32h7-spi";
+   reg = <0x40003c00 0x400>;
+   interrupts = <51>;
+   clocks = <&rcc SPI3_CK>;
+   status = "disabled";
+   };
+
usart2: serial@40004400 {
compatible = "st,stm32f7-uart";
reg = <0x40004400 0x400>;
@@ -141,6 +162,36 @@
clocks = <&rcc USART1_CK>;
};
 
+   spi1: spi@40013000 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "st,stm32h7-spi";
+   reg = <0x40013000 0x400>;
+   interrupts = <35>;
+   clocks = <&rcc SPI1_CK>;
+   status = "disabled";
+   };
+
+   spi4: spi@40013400 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "st,stm32h7-spi";
+   reg = <0x40013400 0x400>;
+   interrupts = <84>;
+   clocks = <&rcc SPI4_CK>;
+   status = "disabled";
+   };
+
+   spi5: spi@40015000 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "st,stm32h7-spi";
+   reg = <0x40015000 0x400>;
+   interrupts = <85>;
+   clocks = <&rcc SPI5_CK>;
+   status = "disabled";
+   };
+
dma1: dma@4002 {
compatible = "st,stm32-dma";
reg = <0x4002 0x400>;
@@ -262,6 +313,16 @@
reg = <0x58000400 0x400>;
};
 
+   spi6: spi@58001400 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "st,stm32h7-spi";
+   reg = <0x58001400 0x400>;
+   interrupts = <86>;
+   clocks = <&rcc SPI6_CK>;
+   status = "disabled";
+   };
+
lptimer2: timer@58002400 {
#address-cells = <1>;
#size-cells = <0>;
-- 
2.7.4



Re: [PATCH v3] usb: host: ehci-platform: add support for optional external vbus supply

2018-03-01 Thread Amelie DELAUNAY
Hi Roger,

On 02/28/2018 12:01 PM, Roger Quadros wrote:
> Hi Amelie,
> 
> On 23/02/18 15:46, Amelie Delaunay wrote:
>> On some boards, especially when vbus supply requires large current,
>> and the charge pump on the PHY isn't enough, an external vbus power switch
>> may be used.
>> Add support for optional external vbus supply per port in ehci-platform.
>>
>> Signed-off-by: Amelie Delaunay 
>>
>> ---
>> Changes in v3:
>>   * Address Felipe Balbi comments: reduce indentation in
>> ehci_platform_port_power.
>>   * Address Roger Quadros and Alan Stern comments: platforms can have one
>> external vbus supply per port, so add support to get as many optional
>> regulator as implemented ports on the host controller.
>>
>> Changes in v2:
>>   * Address Roger Quadros comments: move regulator_enable/disable from
>> ehci_platform_power_on/off to ehci_platform_port_power.
>> ---
>>   Documentation/devicetree/bindings/usb/usb-ehci.txt |  1 +
>>   drivers/usb/host/ehci-platform.c   | 52 
>> +-
>>   2 files changed, 52 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/usb/usb-ehci.txt 
>> b/Documentation/devicetree/bindings/usb/usb-ehci.txt
>> index 3efde12..cd576db 100644
>> --- a/Documentation/devicetree/bindings/usb/usb-ehci.txt
>> +++ b/Documentation/devicetree/bindings/usb/usb-ehci.txt
>> @@ -19,6 +19,7 @@ Optional properties:
>>- phys : phandle + phy specifier pair
>>- phy-names : "usb"
>>- resets : phandle + reset specifier pair
>> + - portN_vbus-supply : phandle of regulator supplying vbus for port N
>>   
>>   Example (Sequoia 440EPx):
>>   ehci@e300 {
> 
> Sorry for not pointing this out earlier but I think patch to DT bindings
> should come separately (before the driver changes) with the following subject.
> 
> "dt-bindings: usb: ehci: "
> 
> 

Ok, I prepare a v4 with this split. Thanks!

>> diff --git a/drivers/usb/host/ehci-platform.c 
>> b/drivers/usb/host/ehci-platform.c
>> index b065a96..8e9f201 100644
>> --- a/drivers/usb/host/ehci-platform.c
>> +++ b/drivers/usb/host/ehci-platform.c
>> @@ -29,6 +29,7 @@
>>   #include 
>>   #include 
>>   #include 
>> +#include 
>>   #include 
>>   #include 
>>   #include 
>> @@ -46,6 +47,7 @@ struct ehci_platform_priv {
>>  struct reset_control *rsts;
>>  struct phy **phys;
>>  int num_phys;
>> +struct regulator **vbus_supplies;
>>  bool reset_on_resume;
>>   };
>>   
>> @@ -56,7 +58,8 @@ static int ehci_platform_reset(struct usb_hcd *hcd)
>>  struct platform_device *pdev = to_platform_device(hcd->self.controller);
>>  struct usb_ehci_pdata *pdata = dev_get_platdata(&pdev->dev);
>>  struct ehci_hcd *ehci = hcd_to_ehci(hcd);
>> -int retval;
>> +struct ehci_platform_priv *priv = hcd_to_ehci_priv(hcd);
>> +int portnum, n_ports, retval;
>>   
>>  ehci->has_synopsys_hc_bug = pdata->has_synopsys_hc_bug;
>>   
>> @@ -71,11 +74,57 @@ static int ehci_platform_reset(struct usb_hcd *hcd)
>>  if (retval)
>>  return retval;
>>   
>> +n_ports = HCS_N_PORTS(ehci->hcs_params);
>> +priv->vbus_supplies = devm_kcalloc(&pdev->dev, n_ports,
>> +   sizeof(struct regulator *),
>> +   GFP_KERNEL);
>> +if (!priv->vbus_supplies)
>> +return -ENOMEM;
>> +
>> +for (portnum = 0; portnum < n_ports; portnum++) {
>> +struct regulator *vbus_supply;
>> +char id[20];
>> +
>> +sprintf(id, "port%d_vbus", portnum);
>> +
>> +vbus_supply = devm_regulator_get_optional(&pdev->dev, id);
>> +if (IS_ERR(vbus_supply)) {
>> +retval = PTR_ERR(vbus_supply);
>> +if (retval == -ENODEV)
>> +priv->vbus_supplies[portnum] = NULL;
>> +else
>> +return retval;
>> +} else {
>> +priv->vbus_supplies[portnum] = vbus_supply;
>> +}
>> +}
>> +
>>  if (pdata->no_io_watchdog)
>>  ehci->need_io_watchdog = 0;
>>  return 0;
>>   }
>>   
>> +static int ehci_platform_port_power(struct usb_hcd *hcd, int portnum,
&g

Re: [PATCH v3] usb: host: ehci-platform: add support for optional external vbus supply

2018-03-01 Thread Amelie DELAUNAY
Hi Robin,

On 02/28/2018 02:33 PM, Robin Murphy wrote:
> Hi Amelie,
> 
> Just a couple of drive-by coding style comments...
> 
> On 23/02/18 13:46, Amelie Delaunay wrote:
>> On some boards, especially when vbus supply requires large current,
>> and the charge pump on the PHY isn't enough, an external vbus power switch
>> may be used.
>> Add support for optional external vbus supply per port in ehci-platform.
>>
>> Signed-off-by: Amelie Delaunay 
>>
>> ---
>> Changes in v3:
>>* Address Felipe Balbi comments: reduce indentation in
>>  ehci_platform_port_power.
>>* Address Roger Quadros and Alan Stern comments: platforms can have one
>>  external vbus supply per port, so add support to get as many optional
>>  regulator as implemented ports on the host controller.
>>
>> Changes in v2:
>>* Address Roger Quadros comments: move regulator_enable/disable from
>>  ehci_platform_power_on/off to ehci_platform_port_power.
>> ---
>>Documentation/devicetree/bindings/usb/usb-ehci.txt |  1 +
>>drivers/usb/host/ehci-platform.c   | 52 
>> +-
>>2 files changed, 52 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/usb/usb-ehci.txt 
>> b/Documentation/devicetree/bindings/usb/usb-ehci.txt
>> index 3efde12..cd576db 100644
>> --- a/Documentation/devicetree/bindings/usb/usb-ehci.txt
>> +++ b/Documentation/devicetree/bindings/usb/usb-ehci.txt
>> @@ -19,6 +19,7 @@ Optional properties:
>> - phys : phandle + phy specifier pair
>> - phy-names : "usb"
>> - resets : phandle + reset specifier pair
>> + - portN_vbus-supply : phandle of regulator supplying vbus for port N
>>
>>Example (Sequoia 440EPx):
>>ehci@e300 {
>> diff --git a/drivers/usb/host/ehci-platform.c 
>> b/drivers/usb/host/ehci-platform.c
>> index b065a96..8e9f201 100644
>> --- a/drivers/usb/host/ehci-platform.c
>> +++ b/drivers/usb/host/ehci-platform.c
>> @@ -29,6 +29,7 @@
>>#include 
>>#include 
>>#include 
>> +#include 
>>#include 
>>#include 
>>#include 
>> @@ -46,6 +47,7 @@ struct ehci_platform_priv {
>>  struct reset_control *rsts;
>>  struct phy **phys;
>>  int num_phys;
>> +struct regulator **vbus_supplies;
>>  bool reset_on_resume;
>>};
>>
>> @@ -56,7 +58,8 @@ static int ehci_platform_reset(struct usb_hcd *hcd)
>>  struct platform_device *pdev = to_platform_device(hcd->self.controller);
>>  struct usb_ehci_pdata *pdata = dev_get_platdata(&pdev->dev);
>>  struct ehci_hcd *ehci = hcd_to_ehci(hcd);
>> -int retval;
>> +struct ehci_platform_priv *priv = hcd_to_ehci_priv(hcd);
>> +int portnum, n_ports, retval;
>>
>>  ehci->has_synopsys_hc_bug = pdata->has_synopsys_hc_bug;
>>
>> @@ -71,11 +74,57 @@ static int ehci_platform_reset(struct usb_hcd *hcd)
>>  if (retval)
>>  return retval;
>>
>> +n_ports = HCS_N_PORTS(ehci->hcs_params);
>> +priv->vbus_supplies = devm_kcalloc(&pdev->dev, n_ports,
>> +   sizeof(struct regulator *),
> 
> Using "sizeof(*priv->vbus_supplies)" here will prevent people sending
> annoying cleanup patches later.
> 

OK, I will fix it in v4.

>> +   GFP_KERNEL);
>> +if (!priv->vbus_supplies)
>> +return -ENOMEM;
>> +
>> +for (portnum = 0; portnum < n_ports; portnum++) {
>> +struct regulator *vbus_supply;
>> +char id[20];
>> +
>> +sprintf(id, "port%d_vbus", portnum);
>> +
>> +vbus_supply = devm_regulator_get_optional(&pdev->dev, id);
>> +if (IS_ERR(vbus_supply)) {
>> +retval = PTR_ERR(vbus_supply);
>> +if (retval == -ENODEV)
>> +priv->vbus_supplies[portnum] = NULL;
> 
> The array element here hasn't yet been assigned to since kcalloc()
> initially zeroed it, so this is entirely redundant - you can simply make
> the comparison a "!=" and remove the "else" case.
> 
> Robin.
> 

Thanks for spotting this! Fix in v4.

Amelie

>> +else
>> +return retval;
>> +} else {
>> +priv->vbus_supplies[portnum] = vbus

[PATCH v4 0/2] usb: host: ehci-platform: add support for optional external vbus supply

2018-03-01 Thread Amelie Delaunay
This patchset adds support for optional external vbus supply per port in
ehci-platform.

On some boards, especially when vbus supply requires large current,
and the charge pump on the PHY isn't enough, an external vbus power switch
per port may be used.

---
Changes in v4:
 * Address Roger Quadros comments: split dt-bindings and driver changes.
 * Address Robin Murphy comments: simplify vbus_spplies initialization.

Changes in v3:
 * Address Felipe Balbi comments: reduce indentation in
   ehci_platform_port_power.
 * Address Roger Quadros and Alan Stern comments: platforms can have one
   external vbus supply per port, so add support to get as many optional
   regulator as implemented ports on the host controller.

Changes in v2:
 * Address Roger Quadros comments: move regulator_enable/disable from
   ehci_platform_power_on/off to ehci_platform_port_power.

Amelie Delaunay (2):
  dt-bindings: usb: ehci: add optional external vbus supply property
  usb: host: ehci-platform: add support for optional external vbus
supply

 Documentation/devicetree/bindings/usb/usb-ehci.txt |  1 +
 drivers/usb/host/ehci-platform.c   | 51 +-
 2 files changed, 51 insertions(+), 1 deletion(-)

-- 
2.7.4



[PATCH v4 1/2] dt-bindings: usb: ehci: add optional external vbus supply property

2018-03-01 Thread Amelie Delaunay
On some boards, especially when vbus supply requires large current,
and the charge pump on the PHY isn't enough, an external vbus power switch
per port may be used.
Add portN_vbus-supply property to usb-ehci bindings. As the number of ports
depends on the ehci controller, and the port on which an external vbus
supply depends on the platform,  is used to make it generic.

Signed-off-by: Amelie Delaunay 
---
 Documentation/devicetree/bindings/usb/usb-ehci.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/usb/usb-ehci.txt 
b/Documentation/devicetree/bindings/usb/usb-ehci.txt
index 3efde12..cd576db 100644
--- a/Documentation/devicetree/bindings/usb/usb-ehci.txt
+++ b/Documentation/devicetree/bindings/usb/usb-ehci.txt
@@ -19,6 +19,7 @@ Optional properties:
  - phys : phandle + phy specifier pair
  - phy-names : "usb"
  - resets : phandle + reset specifier pair
+ - portN_vbus-supply : phandle of regulator supplying vbus for port N
 
 Example (Sequoia 440EPx):
 ehci@e300 {
-- 
2.7.4



[PATCH v4 2/2] usb: host: ehci-platform: add support for optional external vbus supply

2018-03-01 Thread Amelie Delaunay
On some boards, especially when vbus supply requires large current,
and the charge pump on the PHY isn't enough, an external vbus power switch
may be used.
Add support for optional external vbus supply per port in ehci-platform.

Signed-off-by: Amelie Delaunay 
Reviewed-by: Roger Quadros 
---
 drivers/usb/host/ehci-platform.c | 51 +++-
 1 file changed, 50 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/host/ehci-platform.c b/drivers/usb/host/ehci-platform.c
index b065a96..e0dace7 100644
--- a/drivers/usb/host/ehci-platform.c
+++ b/drivers/usb/host/ehci-platform.c
@@ -29,6 +29,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -46,6 +47,7 @@ struct ehci_platform_priv {
struct reset_control *rsts;
struct phy **phys;
int num_phys;
+   struct regulator **vbus_supplies;
bool reset_on_resume;
 };
 
@@ -56,7 +58,8 @@ static int ehci_platform_reset(struct usb_hcd *hcd)
struct platform_device *pdev = to_platform_device(hcd->self.controller);
struct usb_ehci_pdata *pdata = dev_get_platdata(&pdev->dev);
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
-   int retval;
+   struct ehci_platform_priv *priv = hcd_to_ehci_priv(hcd);
+   int portnum, n_ports, retval;
 
ehci->has_synopsys_hc_bug = pdata->has_synopsys_hc_bug;
 
@@ -71,11 +74,56 @@ static int ehci_platform_reset(struct usb_hcd *hcd)
if (retval)
return retval;
 
+   n_ports = HCS_N_PORTS(ehci->hcs_params);
+   priv->vbus_supplies = devm_kcalloc(&pdev->dev, n_ports,
+  sizeof(*priv->vbus_supplies),
+  GFP_KERNEL);
+   if (!priv->vbus_supplies)
+   return -ENOMEM;
+
+   for (portnum = 0; portnum < n_ports; portnum++) {
+   struct regulator *vbus_supply;
+   char id[20];
+
+   sprintf(id, "port%d_vbus", portnum);
+
+   vbus_supply = devm_regulator_get_optional(&pdev->dev, id);
+   if (IS_ERR(vbus_supply)) {
+   retval = PTR_ERR(vbus_supply);
+   if (retval != ENODEV)
+   return retval;
+   } else {
+   priv->vbus_supplies[portnum] = vbus_supply;
+   }
+   }
+
if (pdata->no_io_watchdog)
ehci->need_io_watchdog = 0;
return 0;
 }
 
+static int ehci_platform_port_power(struct usb_hcd *hcd, int portnum,
+   bool enable)
+{
+   struct ehci_platform_priv *priv = hcd_to_ehci_priv(hcd);
+   int ret;
+
+   if (!priv->vbus_supplies[portnum])
+   return 0;
+
+   if (enable)
+   ret = regulator_enable(priv->vbus_supplies[portnum]);
+   else
+   ret = regulator_disable(priv->vbus_supplies[portnum]);
+
+   if (ret)
+   dev_err(hcd->self.controller,
+   "failed to %s vbus supply for port %d: %d\n",
+   enable ? "enable" : "disable", portnum, ret);
+
+   return ret;
+}
+
 static int ehci_platform_power_on(struct platform_device *dev)
 {
struct usb_hcd *hcd = platform_get_drvdata(dev);
@@ -134,6 +182,7 @@ static struct hc_driver __read_mostly 
ehci_platform_hc_driver;
 static const struct ehci_driver_overrides platform_overrides __initconst = {
.reset =ehci_platform_reset,
.extra_priv_size =  sizeof(struct ehci_platform_priv),
+   .port_power =   ehci_platform_port_power,
 };
 
 static struct usb_ehci_pdata ehci_platform_defaults = {
-- 
2.7.4



[PATCH RESEND 2/2] usb: dwc2: fix STM32F7 USB OTG HS compatible

2018-03-01 Thread Amelie Delaunay
This patch fixes compatible for STM32F7 USB OTG HS and consistently rename
dw2_set_params function.
The v2 former patch [1] had been acked by Paul Young, but v1 was merged.

[1] https://patchwork.kernel.org/patch/9925573/

Fixes: d8fae8b93682 ("usb: dwc2: add support for STM32F7xx USB OTG HS")
Signed-off-by: Amelie Delaunay 
---
 drivers/usb/dwc2/params.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index 03fd20f..c4a4749 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -137,7 +137,7 @@ static void dwc2_set_stm32f4x9_fsotg_params(struct 
dwc2_hsotg *hsotg)
p->activate_stm_fs_transceiver = true;
 }
 
-static void dwc2_set_stm32f7xx_hsotg_params(struct dwc2_hsotg *hsotg)
+static void dwc2_set_stm32f7_hsotg_params(struct dwc2_hsotg *hsotg)
 {
struct dwc2_core_params *p = &hsotg->params;
 
@@ -164,8 +164,8 @@ const struct of_device_id dwc2_of_match_table[] = {
{ .compatible = "st,stm32f4x9-fsotg",
  .data = dwc2_set_stm32f4x9_fsotg_params },
{ .compatible = "st,stm32f4x9-hsotg" },
-   { .compatible = "st,stm32f7xx-hsotg",
- .data = dwc2_set_stm32f7xx_hsotg_params },
+   { .compatible = "st,stm32f7-hsotg",
+ .data = dwc2_set_stm32f7_hsotg_params },
{},
 };
 MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
-- 
2.7.4



[PATCH RESEND 1/2] dt-bindings: usb: fix the STM32F7 DWC2 OTG HS core binding

2018-03-01 Thread Amelie Delaunay
This patch fixes binding documentation for DWC2 controller in HS mode
found on STMicroelectronics STM32F7 SoC.
The v2 former patch [1] had been acked by Rob Herring, but v1 was merged.

[1] https://patchwork.kernel.org/patch/9925575/

Fixes: 000777dadc7e ("dt-bindings: usb: Document the STM32F7xx DWC2 ...")
Signed-off-by: Amelie Delaunay 
Reviewed-by: Rob Herring 
---
 Documentation/devicetree/bindings/usb/dwc2.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt 
b/Documentation/devicetree/bindings/usb/dwc2.txt
index e64d903..46da5f1 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.txt
+++ b/Documentation/devicetree/bindings/usb/dwc2.txt
@@ -19,7 +19,7 @@ Required properties:
   configured in FS mode;
   - "st,stm32f4x9-hsotg": The DWC2 USB HS controller instance in STM32F4x9 SoCs
   configured in HS mode;
-  - "st,stm32f7xx-hsotg": The DWC2 USB HS controller instance in STM32F7xx SoCs
+  - "st,stm32f7-hsotg": The DWC2 USB HS controller instance in STM32F7 SoCs
 configured in HS mode;
 - reg : Should contain 1 register range (address and length)
 - interrupts : Should contain 1 interrupt
-- 
2.7.4



[PATCH RESEND 0/2] Fix STM32F7 DWC2 OTG HS binding

2018-03-01 Thread Amelie Delaunay
This patchset fixes STM32F7 DWC2 OTG HS binding. It actually
re-applies the v2 former patches adding STM32F7 DWC2 OTG HS support.
Bindings reviewed by Rob Herring.

Amelie Delaunay (2):
  dt-bindings: usb: fix the STM32F7 DWC2 OTG HS core binding
  usb: dwc2: fix STM32F7 USB OTG HS compatible

 Documentation/devicetree/bindings/usb/dwc2.txt | 2 +-
 drivers/usb/dwc2/params.c  | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

-- 
2.7.4



[PATCH v2 0/2] Introduce STM32 USB PHY Controller driver

2018-03-01 Thread Amelie Delaunay
This patchset adds support for STMicroelectronics STM32 USB PHY Controller
(USBPHYC) which is embedded in STM32MP1 SoC.
The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
switch that selects either USB OTG controller or USB Host controller for the
second PHY port.

---
Changes in v2:
* Update diagram to better describe the context.
* Change boolean dt propery st,port2-switch-to-host into u32 st,utmi-switch.
* Silent phy creation failure in case of -EPROBE_DEFER.


Amelie Delaunay (2):
  dt-bindings: phy: add support for STM32 USB PHY Controller (USBPHYC)
  phy: stm32: add support for STM32 USB PHY Controller (USBPHYC)

 .../devicetree/bindings/phy/phy-stm32-usbphyc.txt  |  46 +++
 drivers/phy/st/Kconfig |  14 +
 drivers/phy/st/Makefile|   1 +
 drivers/phy/st/phy-stm32-usbphyc.c | 382 +
 4 files changed, 443 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.txt
 create mode 100644 drivers/phy/st/phy-stm32-usbphyc.c

-- 
2.7.4



[PATCH v2 2/2] phy: stm32: add support for STM32 USB PHY Controller (USBPHYC)

2018-03-01 Thread Amelie Delaunay
This patch adds phy transceiver driver for STM32 USB PHY Controller
(USBPHYC) that provides dual port High-Speed phy for OTG (single port)
and EHCI/OHCI host controller (two ports).
One port of the phy is shared between the two USB controllers through
a UTMI+ switch.

Signed-off-by: Amelie Delaunay 
---
 drivers/phy/st/Kconfig |  14 ++
 drivers/phy/st/Makefile|   1 +
 drivers/phy/st/phy-stm32-usbphyc.c | 382 +
 3 files changed, 397 insertions(+)
 create mode 100644 drivers/phy/st/phy-stm32-usbphyc.c

diff --git a/drivers/phy/st/Kconfig b/drivers/phy/st/Kconfig
index 0814d3f..609719b 100644
--- a/drivers/phy/st/Kconfig
+++ b/drivers/phy/st/Kconfig
@@ -31,3 +31,17 @@ config PHY_STIH407_USB
help
  Enable this support to enable the picoPHY device used by USB2
  and USB3 controllers on STMicroelectronics STiH407 SoC families.
+
+config PHY_STM32_USBPHYC
+   tristate "STMicroelectronics STM32 USB HS PHY Controller driver"
+   depends on ARCH_STM32 || COMPILE_TEST
+   select GENERIC_PHY
+   help
+ Enable this to support the High-Speed USB transceivers that are part
+ of some STMicroelectronics STM32 SoCs.
+
+ This driver controls the entire USB PHY block: the USB PHY controller
+ (USBPHYC) and the two 8-bit wide UTMI+ interfaces. First interface is
+ used by an HS USB Host controller, and the second one is shared
+ between an HS USB OTG controller and an HS USB Host controller,
+ selected by a USB switch.
diff --git a/drivers/phy/st/Makefile b/drivers/phy/st/Makefile
index e2adfe2..c0091ad 100644
--- a/drivers/phy/st/Makefile
+++ b/drivers/phy/st/Makefile
@@ -2,3 +2,4 @@ obj-$(CONFIG_PHY_MIPHY28LP) += phy-miphy28lp.o
 obj-$(CONFIG_PHY_ST_SPEAR1310_MIPHY)   += phy-spear1310-miphy.o
 obj-$(CONFIG_PHY_ST_SPEAR1340_MIPHY)   += phy-spear1340-miphy.o
 obj-$(CONFIG_PHY_STIH407_USB)  += phy-stih407-usb.o
+obj-$(CONFIG_PHY_STM32_USBPHYC)+= phy-stm32-usbphyc.o
diff --git a/drivers/phy/st/phy-stm32-usbphyc.c 
b/drivers/phy/st/phy-stm32-usbphyc.c
new file mode 100644
index 000..e1179ce
--- /dev/null
+++ b/drivers/phy/st/phy-stm32-usbphyc.c
@@ -0,0 +1,382 @@
+// SPDX-Licence-Identifier: GPL-2.0
+/*
+ * STMicroelectronics STM32 USB PHY Controller driver
+ *
+ * Copyright (C) 2018 STMicroelectronics
+ * Author(s): Amelie Delaunay .
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define STM32_USBPHYC_PLL  0x0
+#define STM32_USBPHYC_MISC 0x8
+#define STM32_USBPHYC_VERSION  0x3F4
+
+/* STM32_USBPHYC_PLL bit fields */
+#define PLLNDIVGENMASK(6, 0)
+#define PLLFRACIN  GENMASK(25, 10)
+#define PLLEN  BIT(26)
+#define PLLSTRBBIT(27)
+#define PLLSTRBYP  BIT(28)
+#define PLLFRACCTL BIT(29)
+#define PLLDITHEN0 BIT(30)
+#define PLLDITHEN1 BIT(31)
+
+/* STM32_USBPHYC_MISC bit fields */
+#define SWITHOST   BIT(0)
+
+/* STM32_USBPHYC_VERSION bit fields */
+#define MINREV GENMASK(3, 0)
+#define MAJREV GENMASK(7, 4)
+
+#define MAX_PHYS   2
+
+static const char * const stm32_usbphyc_supply_names[] = {
+   "vdda1v1",  /* 1V1 */
+   "vdda1v8",  /* 1V8 */
+};
+
+#define NUM_SUPPLIES   ARRAY_SIZE(stm32_usbphyc_supply_names)
+
+#define PLL_LOCK_TIME_US   100
+#define PLL_PWR_DOWN_TIME_US   5
+#define PLL_FVCO   2880 /* in MHz */
+#define PLL_INFF_MIN_RATE  1920 /* in Hz */
+#define PLL_INFF_MAX_RATE  3840 /* in Hz */
+
+struct pll_params {
+   u8 ndiv;
+   u16 frac;
+};
+
+struct stm32_usbphyc {
+   struct device *dev;
+   void __iomem *base;
+   struct clk *clk;
+   struct reset_control *rst;
+   struct regulator_bulk_data supplies[NUM_SUPPLIES];
+   struct stm32_usbphyc_phy {
+   struct phy *phy;
+   int index;
+   bool init;
+   } phys[MAX_PHYS];
+};
+
+static inline struct stm32_usbphyc *
+to_usbphyc(struct stm32_usbphyc_phy *usbphyc_phy)
+{
+   return container_of(usbphyc_phy, struct stm32_usbphyc,
+   phys[usbphyc_phy->index]);
+}
+
+static inline void stm32_usbphyc_set_bits(void __iomem *reg, u32 bits)
+{
+   writel_relaxed(readl_relaxed(reg) | bits, reg);
+}
+
+static inline void stm32_usbphyc_clr_bits(void __iomem *reg, u32 bits)
+{
+   writel_relaxed(readl_relaxed(reg) & ~bits, reg);
+}
+
+void stm32_usbphyc_get_pll_params(u32 clk_rate, struct pll_params *pll_params)
+{
+   unsigned long long fvco, ndiv, frac;
+
+   /*_
+*   | FVCO = INFF*2*(NDIV + FRACT/2^16) when DITHER_DISABLE[1] = 1
+*   | FVCO = 2880MHz
+*  <
+*   | NDIV = integer part of input bits to set the LD

[PATCH v2 1/2] dt-bindings: phy: add support for STM32 USB PHY Controller (USBPHYC)

2018-03-01 Thread Amelie Delaunay
This patch adds the device tree bindings description for STM32 USBPHYC
(USB PHY Controller).

Signed-off-by: Amelie Delaunay 
---
 .../devicetree/bindings/phy/phy-stm32-usbphyc.txt  | 46 ++
 1 file changed, 46 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.txt

diff --git a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.txt 
b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.txt
new file mode 100644
index 000..1ad3893
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.txt
@@ -0,0 +1,46 @@
+STMicroelectronics STM32 USB HS PHY controller
+
+The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
+switch. It controls PHY configuration and status, and the UTMI+ switch that
+selects either OTG or HOST controller for the second PHY port. It also sets
+PLL configuration.
+
+USBPHYC
+  |_ PLL
+  |
+  |_ PHY port#1 _ HOST controller
+  |_ |
+  |  / 1||
+  |_ PHY port#2 |   |
+  |  \_0||
+  |_ UTMI switch___|  OTG controller
+
+
+Required properties:
+- compatible: must be "st,stm32mp1-usbphyc"
+- reg: address and length of the usb phy control register set
+- clocks: phandle + clock specifier for the PLL phy clock
+- phy-supply: from the generic phy bindings, phandle to the regulator
+  providing 3V3 power to the PHY, see phy-bindings.txt
+- vdda1v1-supply: phandle to the regulator providing 1V1 power to the PHY
+- vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY
+
+Optional properties:
+- assigned-clocks: phandle + clock specifier for the PLL phy clock
+- assigned-clock-parents: the PLL phy clock parent
+- resets: phandle + reset specifier
+- st,utmi-switch: should be <0> or <1>, to select USB controller for PHY
+  port#2. If not specified, 0 is the default selection.
+
+
+Example:
+   usbphyc: usb-phy@5a006000 {
+   compatible = "st,stm32mp1-usbphyc";
+   reg = <0x5a006000 0x1000>;
+   clocks = <&rcc_clk USBPHY_K>;
+   resets = <&rcc_rst USBPHY_R>;
+   st,utmi-switch = <1>;
+   phy-supply = <&vdd_usb>;
+   vdda1v1-supply = <®11>;
+   vdda1v8-supply = <®18>
+   };
-- 
2.7.4



RE: [PATCH] phy: stm32: Fix printing of wrong uninitialized port number

2018-04-05 Thread Amelie DELAUNAY
Hi Geert,

Just to let you know, this warning is already fixed by a pending patch I've 
sent two weeks ago: https://lkml.org/lkml/2018/3/20/424.

Thanks,
Amelie

> -Original Message-
> From: Geert Uytterhoeven [mailto:ge...@linux-m68k.org]
> Sent: jeudi 5 avril 2018 11:47
> To: Kishon Vijay Abraham I ; Maxime Coquelin
> ; Alexandre TORGUE
> ; Amelie DELAUNAY 
> Cc: linux-arm-ker...@lists.infradead.org; linux-kernel@vger.kernel.org;
> Geert Uytterhoeven 
> Subject: [PATCH] phy: stm32: Fix printing of wrong uninitialized port number
> 
> drivers/phy/st/phy-stm32-usbphyc.c: In function ‘stm32_usbphyc_probe’:
> drivers/phy/st/phy-stm32-usbphyc.c:364: warning: ‘i’ may be used
> uninitialized in this function
> 
> Indeed, during the first loop iteration, "i" is uninitialized.
> However, "i" does not represent the intended PHY instance number to print.
> 
> Fix this by printing the correct variable instead.
> 
> Fixes: 94c358da3a054520 ("phy: stm32: add support for STM32 USB PHY
> Controller (USBPHYC)")
> Signed-off-by: Geert Uytterhoeven 
> ---
>  drivers/phy/st/phy-stm32-usbphyc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/phy/st/phy-stm32-usbphyc.c b/drivers/phy/st/phy-
> stm32-usbphyc.c
> index bc4e78a19c913dc9..1f682c176fd6239e 100644
> --- a/drivers/phy/st/phy-stm32-usbphyc.c
> +++ b/drivers/phy/st/phy-stm32-usbphyc.c
> @@ -367,8 +367,8 @@ static int stm32_usbphyc_probe(struct
> platform_device *pdev)
>   if (IS_ERR(phy)) {
>   ret = PTR_ERR(phy);
>   if (ret != -EPROBE_DEFER)
> - dev_err(dev,
> - "failed to create phy%d: %d\n", i, ret);
> + dev_err(dev, "failed to create phy%d: %d\n",
> + port, ret);
>   goto put_child;
>   }
> 
> --
> 2.7.4



Re: [PATCH 1/5] dt-bindings: pinctrl: document the STMFX pinctrl bindings

2018-05-28 Thread Amelie DELAUNAY
On 05/24/2018 09:13 AM, Linus Walleij wrote:
> On Fri, May 18, 2018 at 9:29 AM, Amelie DELAUNAY  
> wrote:
>> On 05/17/2018 08:36 AM, Lee Jones wrote:
>>> On Wed, 16 May 2018, Amelie DELAUNAY wrote:
>>>> On 05/16/2018 04:20 PM, Linus Walleij wrote:
>>>>> On Wed, May 9, 2018 at 9:56 AM, Amelie DELAUNAY  
>>>>> wrote:
>>>>>
>>>>>> Indeed, stmfx has other functions than GPIO. But, after comments done
>>>>>> here: [1] and there: [2], it has been decided to move MFD parent/GPIO
>>>>>> child drivers into a single PINCTRL/GPIO driver because of the following
>>>>>> reasons:
>>>>>> - Other stmfx functions (IDD measurement and TouchScreen controller) are
>>>>>> not used on any of the boards using an stmfx and supported by Linux, so
>>>>>> no way to test these functions, and no need to maintain them while they
>>>>>> are not being used.
>>>>>> - But, in the case a new board will use more than GPIO function on
>>>>>> stmfx, the actual implementation allow to easily extract common init
>>>>>> part of stmfx and put it in an MFD driver.
>>>>>>
>>>>>> So I could remove gpio sub-node and put its contents in stmfx node and
>>>>>> keep single PINCTRL/GPIO driver for the time being.
>>>>>> Please advise,
>>>>>
>>>>> I would normally advice to use the right modeling from the start, create
>>>>> the MFD driver and spawn the devices from there. It is confusing
>>>>> if the layout of the driver(s) doesn't really match the layout of the
>>>>> hardware.
>>>>>
>>>>> I understand that it is a pain to write new MFD drivers to get your
>>>>> things going and it would be "nice to get this working really quick
>>>>> now" but in my experience it is better to do it right from the start.
>>>>>
>>>>
>>>> Hi Linus,
>>>>
>>>> Thanks for your advice. I understand the point.
>>>> So, the right modeling would be to:
>>>> - create an MFD driver with the common init part of stmfx
>>>> - remove all common init part of stmfx-pinctrl driver and keep only all
>>>> gpio/pinctrl functions.
>>>>
>>>> I will not develop the other stmfx functions (IDD measurement driver and
>>>> TouchScreen controller driver) because, as explained ealier, they are
>>>> not used on any of the boards using an stmfx and supported by Linux, so
>>>> no way to test these functions, and no need to maintain them while they
>>>> are not being used.
>>>>
>>>> Lee, are you OK with that ?
>>>
>>> I missed a lot of this conversation I think, but from what I've read,
>>> it sounds fine.
>>>
>>
>> I summarize the situation:
>> - I still don't have an official datasheet for STMFX device which could
>> justify the use of an MFD driver;
>> - the MFD driver will contain the STMFX chip initialization stuff such
>> as regmap initialization (regmap structure will be shared with the
>> child), chip initialization, global interrupt management;
>> - there will be only one child (GPIO/PINCTRL node) for the time being.
> 
> But there will be more devices in it. And they will invariably be put
> to use later, and there will be new versions of the chip as well, and
> then you will be happy about doing the MFD core, which makes it
> easy to add new variants with different subdevices.
> 
>> So, is "MFD driver + GPIO/PINCTRL driver" the right modeling, and does
>> it still sound fine after this summary ? :)
> 
> No I think it should use an MFD core.
> 
> Mainly because of device tree concerns.
> 
> The main reason is that the device tree bindings will be different if
> you add an MFD core later, the GPIO and pinctrl driver will
> move to a child node, making old device trees incompatible.
> 
> We could have a single driver in GPIO+pin control if it is a child
> of an MFD node in the device tree, but it doesn't make much
> sense as the I2C device need to be probing to the MFD core.
> 

I agree with you Linus, and that's why all STMFX chip initialization 
stuff was decorrelated in pinctrl-stmfx. This shows that this stuff 
needs to be in an MFD core.

But as there is only one child for now (due to the reasons mentioned 
earlier), it can suggest that it is not a Multi-Function Device.

I'm not able to target when IDD or TS functions will be required on a 
Linux product, but it still makes sense to consider that these functions 
will be used on a Linux product.

So, I think MFD core + GPIO/pinctrl driver is the right modeling, but I 
wanted to be sure that this is okay for everyone. I don't want to spend 
time on something that will not be accepted due to its modeling.

Regards,
Amelie

Re: [PATCH 1/5] dt-bindings: pinctrl: document the STMFX pinctrl bindings

2018-05-16 Thread Amelie DELAUNAY


On 05/16/2018 04:20 PM, Linus Walleij wrote:
> On Wed, May 9, 2018 at 9:56 AM, Amelie DELAUNAY  
> wrote:
> 
>> Indeed, stmfx has other functions than GPIO. But, after comments done
>> here: [1] and there: [2], it has been decided to move MFD parent/GPIO
>> child drivers into a single PINCTRL/GPIO driver because of the following
>> reasons:
>> - Other stmfx functions (IDD measurement and TouchScreen controller) are
>> not used on any of the boards using an stmfx and supported by Linux, so
>> no way to test these functions, and no need to maintain them while they
>> are not being used.
>> - But, in the case a new board will use more than GPIO function on
>> stmfx, the actual implementation allow to easily extract common init
>> part of stmfx and put it in an MFD driver.
>>
>> So I could remove gpio sub-node and put its contents in stmfx node and
>> keep single PINCTRL/GPIO driver for the time being.
>> Please advise,
> 
> I would normally advice to use the right modeling from the start, create
> the MFD driver and spawn the devices from there. It is confusing
> if the layout of the driver(s) doesn't really match the layout of the
> hardware.
> 
> I understand that it is a pain to write new MFD drivers to get your
> things going and it would be "nice to get this working really quick
> now" but in my experience it is better to do it right from the start.
> 

Hi Linus,

Thanks for your advice. I understand the point.
So, the right modeling would be to:
- create an MFD driver with the common init part of stmfx
- remove all common init part of stmfx-pinctrl driver and keep only all 
gpio/pinctrl functions.

I will not develop the other stmfx functions (IDD measurement driver and 
TouchScreen controller driver) because, as explained ealier, they are 
not used on any of the boards using an stmfx and supported by Linux, so 
no way to test these functions, and no need to maintain them while they 
are not being used.

Lee, are you OK with that ?

Regards,
Amelie

Re: [PATCH v4 1/9] dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings

2019-02-28 Thread Amelie DELAUNAY
On 2/28/19 12:55 AM, Rob Herring wrote:
> On Wed, 27 Feb 2019 10:34:46 +0100, Amelie Delaunay wrote:
>> This patch adds documentation of device tree bindings for the
>> STMicroelectronics Multi-Function eXpander (STMFX) MFD core.
>>
>> Signed-off-by: Amelie Delaunay 
>> Reviewed-by: Linus Walleij 
>> Acked-for-MFD-by: Lee Jones 
>> ---
>>   Documentation/devicetree/bindings/mfd/stmfx.txt | 28 
>> +
>>   1 file changed, 28 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/mfd/stmfx.txt
>>
> 
> Please add Acked-by/Reviewed-by tags when posting new versions. However,
> there's no need to repost patches *only* to add the tags. The upstream
> maintainer will do that for acks received on the version they apply.
> 
> If a tag was not added on purpose, please state why and what changed.
> 

I'm sorry Rob, I forgot to add your Reviewed-by on this patch, which is 
identical to v3.

I reposted the whole series, due to changes in MFD driver with side 
effect in pinctrl driver, but bindings (MFD and pinctrl) didn't change 
between the two versions. I stated the changes in cover letter.

Should I have removed the bindings patches from the series ?

Re: [PATCH v4 1/9] dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings

2019-02-28 Thread Amelie DELAUNAY
On 2/28/19 3:41 PM, Rob Herring wrote:
> On Thu, Feb 28, 2019 at 2:54 AM Amelie DELAUNAY  
> wrote:
>>
>> On 2/28/19 12:55 AM, Rob Herring wrote:
>>> On Wed, 27 Feb 2019 10:34:46 +0100, Amelie Delaunay wrote:
>>>> This patch adds documentation of device tree bindings for the
>>>> STMicroelectronics Multi-Function eXpander (STMFX) MFD core.
>>>>
>>>> Signed-off-by: Amelie Delaunay 
>>>> Reviewed-by: Linus Walleij 
>>>> Acked-for-MFD-by: Lee Jones 
>>>> ---
>>>>Documentation/devicetree/bindings/mfd/stmfx.txt | 28 
>>>> +
>>>>1 file changed, 28 insertions(+)
>>>>create mode 100644 Documentation/devicetree/bindings/mfd/stmfx.txt
>>>>
>>>
>>> Please add Acked-by/Reviewed-by tags when posting new versions. However,
>>> there's no need to repost patches *only* to add the tags. The upstream
>>> maintainer will do that for acks received on the version they apply.
>>>
>>> If a tag was not added on purpose, please state why and what changed.
>>>
>>
>> I'm sorry Rob, I forgot to add your Reviewed-by on this patch, which is
>> identical to v3.
>>
>> I reposted the whole series, due to changes in MFD driver with side
>> effect in pinctrl driver, but bindings (MFD and pinctrl) didn't change
>> between the two versions. I stated the changes in cover letter.
>>
>> Should I have removed the bindings patches from the series ?
> 
> No, as the series should be applied together. You just need to add the
> Reviewed-by so I can ignore it.
> 
> Rob
> 

Noted. I will ensure not to forget any tag next time.

Regards,
Amelie

Re: [PATCH] rtc: stm32: manage the get_irq probe defer case

2019-04-24 Thread Amelie DELAUNAY
On 4/24/19 2:26 PM, Fabien Dessenne wrote:
> Manage the -EPROBE_DEFER error case for the wake IRQ.
> 
> Signed-off-by: Fabien Dessenne 

Acked-by: Amelie Delaunay 

> ---
>   drivers/rtc/rtc-stm32.c | 9 ++---
>   1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/rtc/rtc-stm32.c b/drivers/rtc/rtc-stm32.c
> index c5908cf..8e6c9b3 100644
> --- a/drivers/rtc/rtc-stm32.c
> +++ b/drivers/rtc/rtc-stm32.c
> @@ -788,11 +788,14 @@ static int stm32_rtc_probe(struct platform_device *pdev)
>   ret = device_init_wakeup(&pdev->dev, true);
>   if (rtc->data->has_wakeirq) {
>   rtc->wakeirq_alarm = platform_get_irq(pdev, 1);
> - if (rtc->wakeirq_alarm <= 0)
> - ret = rtc->wakeirq_alarm;
> - else
> + if (rtc->wakeirq_alarm > 0) {
>   ret = dev_pm_set_dedicated_wake_irq(&pdev->dev,
>   rtc->wakeirq_alarm);
> + } else {
> + ret = rtc->wakeirq_alarm;
> + if (rtc->wakeirq_alarm == -EPROBE_DEFER)
> + goto err;
> + }
>   }
>   if (ret)
>   dev_warn(&pdev->dev, "alarm can't wake up the system: %d", ret);
> 

Re: [PATCH] spi: stm32: return the get_irq error

2019-04-24 Thread Amelie DELAUNAY
On 4/24/19 2:38 PM, Fabien Dessenne wrote:
> During probe, return the "get_irq" error value instead of -ENOENT. This
> allows the driver to be defer probed if needed.
> 
> Signed-off-by: Fabien Dessenne 

Acked-by: Amelie Delaunay 

> ---
>   drivers/spi/spi-stm32.c | 5 +++--
>   1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
> index 4186ed2..b222ce8 100644
> --- a/drivers/spi/spi-stm32.c
> +++ b/drivers/spi/spi-stm32.c
> @@ -1839,8 +1839,9 @@ static int stm32_spi_probe(struct platform_device *pdev)
>   
>   spi->irq = platform_get_irq(pdev, 0);
>   if (spi->irq <= 0) {
> - dev_err(&pdev->dev, "no irq: %d\n", spi->irq);
> - ret = -ENOENT;
> + ret = spi->irq;
> + if (ret != -EPROBE_DEFER)
> + dev_err(&pdev->dev, "failed to get irq: %d\n", ret);
>   goto err_master_put;
>   }
>   ret = devm_request_threaded_irq(&pdev->dev, spi->irq,
> 

[PATCH v5 0/9] Introduce STMFX I2C Multi-Function eXpander

2019-04-09 Thread Amelie Delaunay
This series adds support for STMicroelectronics Multi-Function eXpander
(STMFX), used on some STM32 discovery and evaluation boards.

STMFX is an STM32L152 slave controller whose firmware embeds the following
features:
- I/O expander (16 GPIOs + 8 extra if the other features are not enabled),
- resistive touchscreen controller,
- IDD measurement.

I2C stuff and chip initialization is based on an MFD parent driver, which
registers STMFX features MFD children.

---
Changes in v5:
- mfd: fix Lee's comments (reorder struct declaration, drop mfd cells
  platform data initialization, typos)
- pinctrl: get stmfx struct through dev_get_drvdata(pdev->dev.parent)
  instead of dev_get_platdata(&pdev->dev);
Changes in v4:
- mfd: move registers #define into the header
- mfd: merge stmfx and stmfx_ddata structures into one stmfx structure
- mfd: change stmfx_chip_init/exit and stmfx_irq_init/exit args: use
  i2c_client struct and i2c_get_clientdata
- mfd: fix typos
- mfd: add MFD cells for IDD and TS features
- pinctrl: rework registers #define
- dts: add STMFX support on stm32mp157c-ev1
Changes in v3:
- fix MFD interrupt bindings
- fix drivers/mfd/stmfx.c:103:8: warning: 'mask' may be used uninitialized
  in this function
Changes in v2:
- move to MFD parent driver for i2c stuff and chip initialization
- improve regmap configuration
- take advantage of the use of gpio-ranges

Amelie Delaunay (9):
  dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings
  mfd: Add ST Multi-Function eXpander (STMFX) core driver
  dt-bindings: pinctrl: document the STMFX pinctrl bindings
  pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver
  ARM: dts: stm32: add STMFX support on stm32746g-eval
  ARM: dts: stm32: add joystick support on stm32746g-eval
  ARM: dts: stm32: add orange and blue leds on stm32746g-eval
  ARM: dts: stm32: add STMFX support on stm32mp157c-ev1
  ARM: dts: stm32: add joystick support on stm32mp157c-ev1

 Documentation/devicetree/bindings/mfd/stmfx.txt|  28 +
 .../devicetree/bindings/pinctrl/pinctrl-stmfx.txt  | 116 +++
 arch/arm/boot/dts/stm32746g-eval.dts   |  66 ++
 arch/arm/boot/dts/stm32mp157c-ev1.dts  |  60 ++
 drivers/mfd/Kconfig|  13 +
 drivers/mfd/Makefile   |   2 +-
 drivers/mfd/stmfx.c| 566 ++
 drivers/pinctrl/Kconfig|  12 +
 drivers/pinctrl/Makefile   |   1 +
 drivers/pinctrl/pinctrl-stmfx.c| 820 +
 include/linux/mfd/stmfx.h  | 123 
 11 files changed, 1806 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/mfd/stmfx.txt
 create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt
 create mode 100644 drivers/mfd/stmfx.c
 create mode 100644 drivers/pinctrl/pinctrl-stmfx.c
 create mode 100644 include/linux/mfd/stmfx.h

-- 
2.7.4



[PATCH v5 8/9] ARM: dts: stm32: add STMFX support on stm32mp157c-ev1

2019-04-09 Thread Amelie Delaunay
This patch adds support for STMicroelectronics Multi-Function eXpander
(STMFX) on stm32mp157c-ev1. It is connected on i2c2.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32mp157c-ev1.dts | 16 
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts 
b/arch/arm/boot/dts/stm32mp157c-ev1.dts
index b6aca40..eec3c79 100644
--- a/arch/arm/boot/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts
@@ -99,6 +99,22 @@
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
+
+   stmfx: stmfx@42 {
+   compatible = "st,stmfx-0300";
+   reg = <0x42>;
+   interrupts = <8 IRQ_TYPE_EDGE_RISING>;
+   interrupt-parent = <&gpioi>;
+
+   stmfx_pinctrl: stmfx-pin-controller {
+   compatible = "st,stmfx-0300-pinctrl";
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+   };
+   };
 };
 
 &i2c5 {
-- 
2.7.4



[PATCH v5 9/9] ARM: dts: stm32: add joystick support on stm32mp157c-ev1

2019-04-09 Thread Amelie Delaunay
The joystick (B1) on stm32mp157c-ev1 uses gpios on STMFX gpio expander.
These gpios need a pin configuration (push-pull and bias-pull-down),
described under stmfx_pinctrl node.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32mp157c-ev1.dts | 44 +++
 1 file changed, 44 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts 
b/arch/arm/boot/dts/stm32mp157c-ev1.dts
index eec3c79..009f9d6 100644
--- a/arch/arm/boot/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts
@@ -7,6 +7,7 @@
 
 #include "stm32mp157c-ed1.dts"
 #include 
+#include 
 
 / {
model = "STMicroelectronics STM32MP157C eval daughter on eval mother";
@@ -21,6 +22,43 @@
ethernet0 = ðernet0;
};
 
+   joystick {
+   compatible = "gpio-keys";
+   #size-cells = <0>;
+   pinctrl-0 = <&joystick_pins>;
+   pinctrl-names = "default";
+   button-0 {
+   label = "JoySel";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <0 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-1 {
+   label = "JoyDown";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <1 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-2 {
+   label = "JoyLeft";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <2 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-3 {
+   label = "JoyRight";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <3 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-4 {
+   label = "JoyUp";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <4 IRQ_TYPE_EDGE_RISING>;
+   };
+   };
+
panel_backlight: panel-backlight {
compatible = "gpio-backlight";
gpios = <&gpiod 13 GPIO_ACTIVE_LOW>;
@@ -113,6 +151,12 @@
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+
+   joystick_pins: joystick {
+   pins = "gpio0", "gpio1", "gpio2", "gpio3", 
"gpio4";
+   drive-push-pull;
+   bias-pull-down;
+   };
};
};
 };
-- 
2.7.4



[PATCH v5 4/9] pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver

2019-04-09 Thread Amelie Delaunay
This patch adds pinctrl/GPIO driver for STMicroelectronics
Multi-Function eXpander (STMFX) GPIO expander.
STMFX is an I2C slave controller, offering up to 24 GPIOs.
The driver relies on generic pin config interface to configure the GPIOs.

Signed-off-by: Amelie Delaunay 
---
 drivers/pinctrl/Kconfig |  12 +
 drivers/pinctrl/Makefile|   1 +
 drivers/pinctrl/pinctrl-stmfx.c | 820 
 3 files changed, 833 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-stmfx.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 2764d71..ab2eab7 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -265,6 +265,18 @@ config PINCTRL_ST
select PINCONF
select GPIOLIB_IRQCHIP
 
+config PINCTRL_STMFX
+   tristate "STMicroelectronics STMFX GPIO expander pinctrl driver"
+   select GENERIC_PINCONF
+   select GPIOLIB_IRQCHIP
+   select MFD_STMFX
+   help
+ Driver for STMicroelectronics Multi-Function eXpander (STMFX)
+ GPIO expander.
+ This provides a GPIO interface supporting inputs and outputs,
+ and configuring push-pull, open-drain, and can also be used as
+ interrupt-controller.
+
 config PINCTRL_U300
bool "U300 pin controller driver"
depends on ARCH_U300
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 712184b..c188e0f 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -40,6 +40,7 @@ obj-$(CONFIG_PINCTRL_LANTIQ)  += pinctrl-lantiq.o
 obj-$(CONFIG_PINCTRL_LPC18XX)  += pinctrl-lpc18xx.o
 obj-$(CONFIG_PINCTRL_TB10X)+= pinctrl-tb10x.o
 obj-$(CONFIG_PINCTRL_ST)   += pinctrl-st.o
+obj-$(CONFIG_PINCTRL_STMFX)+= pinctrl-stmfx.o
 obj-$(CONFIG_PINCTRL_ZYNQ) += pinctrl-zynq.o
 obj-$(CONFIG_PINCTRL_INGENIC)  += pinctrl-ingenic.o
 obj-$(CONFIG_PINCTRL_RK805)+= pinctrl-rk805.o
diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drivers/pinctrl/pinctrl-stmfx.c
new file mode 100644
index 000..bcd8126
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-stmfx.c
@@ -0,0 +1,820 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Driver for STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander
+ *
+ * Copyright (C) 2019 STMicroelectronics
+ * Author(s): Amelie Delaunay .
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "core.h"
+#include "pinctrl-utils.h"
+
+/* GPIOs expander */
+/* GPIO_STATE1 0x10, GPIO_STATE2 0x11, GPIO_STATE3 0x12 */
+#define STMFX_REG_GPIO_STATE   STMFX_REG_GPIO_STATE1 /* R */
+/* GPIO_DIR1 0x60, GPIO_DIR2 0x61, GPIO_DIR3 0x63 */
+#define STMFX_REG_GPIO_DIR STMFX_REG_GPIO_DIR1 /* RW */
+/* GPIO_TYPE1 0x64, GPIO_TYPE2 0x65, GPIO_TYPE3 0x66 */
+#define STMFX_REG_GPIO_TYPESTMFX_REG_GPIO_TYPE1 /* RW */
+/* GPIO_PUPD1 0x68, GPIO_PUPD2 0x69, GPIO_PUPD3 0x6A */
+#define STMFX_REG_GPIO_PUPDSTMFX_REG_GPIO_PUPD1 /* RW */
+/* GPO_SET1 0x6C, GPO_SET2 0x6D, GPO_SET3 0x6E */
+#define STMFX_REG_GPO_SET  STMFX_REG_GPO_SET1 /* RW */
+/* GPO_CLR1 0x70, GPO_CLR2 0x71, GPO_CLR3 0x72 */
+#define STMFX_REG_GPO_CLR  STMFX_REG_GPO_CLR1 /* RW */
+/* IRQ_GPI_SRC1 0x48, IRQ_GPI_SRC2 0x49, IRQ_GPI_SRC3 0x4A */
+#define STMFX_REG_IRQ_GPI_SRC  STMFX_REG_IRQ_GPI_SRC1 /* RW */
+/* IRQ_GPI_EVT1 0x4C, IRQ_GPI_EVT2 0x4D, IRQ_GPI_EVT3 0x4E */
+#define STMFX_REG_IRQ_GPI_EVT  STMFX_REG_IRQ_GPI_EVT1 /* RW */
+/* IRQ_GPI_TYPE1 0x50, IRQ_GPI_TYPE2 0x51, IRQ_GPI_TYPE3 0x52 */
+#define STMFX_REG_IRQ_GPI_TYPE STMFX_REG_IRQ_GPI_TYPE1 /* RW */
+/* IRQ_GPI_PENDING1 0x0C, IRQ_GPI_PENDING2 0x0D, IRQ_GPI_PENDING3 0x0E*/
+#define STMFX_REG_IRQ_GPI_PENDING  STMFX_REG_IRQ_GPI_PENDING1 /* R */
+/* IRQ_GPI_ACK1 0x54, IRQ_GPI_ACK2 0x55, IRQ_GPI_ACK3 0x56 */
+#define STMFX_REG_IRQ_GPI_ACK  STMFX_REG_IRQ_GPI_ACK1 /* RW */
+
+#define NR_GPIO_REGS   3
+#define NR_GPIOS_PER_REG   8
+#define get_reg(offset)((offset) / NR_GPIOS_PER_REG)
+#define get_shift(offset)  ((offset) % NR_GPIOS_PER_REG)
+#define get_mask(offset)   (BIT(get_shift(offset)))
+
+/*
+ * STMFX pinctrl can have up to 24 pins if STMFX other functions are not used.
+ * Pins availability is managed thanks to gpio-ranges property.
+ */
+static const struct pinctrl_pin_desc stmfx_pins[] = {
+   PINCTRL_PIN(0, "gpio0"),
+   PINCTRL_PIN(1, "gpio1"),
+   PINCTRL_PIN(2, "gpio2"),
+   PINCTRL_PIN(3, "gpio3"),
+   PINCTRL_PIN(4, "gpio4"),
+   PINCTRL_PIN(5, "gpio5"),
+   PINCTRL_PIN(6, "gpio6"),
+   PINCTRL_PIN(7, "gpio7"),
+   PINCTRL_PIN(8, "gpio8"),
+   PINCTRL_PIN(9, "gpio9"),
+   PINCTRL_PIN(10, "gpio10"),
+   PINCTRL_PIN(11, "gpio11"),
+   PIN

[PATCH v5 6/9] ARM: dts: stm32: add joystick support on stm32746g-eval

2019-04-09 Thread Amelie Delaunay
The joystick (B3) on stm32746g-eval uses gpios on STMFX gpio expander.
These gpios need a pin configuration (push-pull and bias-pull-up),
described under stmfx_pinctrl node.

Signed-off-by: Amelie Delaunay 
Acked-by: Linus Walleij 
---
 arch/arm/boot/dts/stm32746g-eval.dts | 43 
 1 file changed, 43 insertions(+)

diff --git a/arch/arm/boot/dts/stm32746g-eval.dts 
b/arch/arm/boot/dts/stm32746g-eval.dts
index 58e0457..21e8912 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -87,6 +87,43 @@
};
};
 
+   joystick {
+   compatible = "gpio-keys";
+   #size-cells = <0>;
+   pinctrl-0 = <&joystick_pins>;
+   pinctrl-names = "default";
+   button-0 {
+   label = "JoySel";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
+   };
+   button-1 {
+   label = "JoyDown";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+   };
+   button-2 {
+   label = "JoyLeft";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+   };
+   button-3 {
+   label = "JoyRight";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+   };
+   button-4 {
+   label = "JoyUp";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+   };
+   };
+
usbotg_hs_phy: usb-phy {
#phy-cells = <0>;
compatible = "usb-nop-xceiv";
@@ -130,6 +167,12 @@
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+
+   joystick_pins: joystick {
+   pins = "gpio0", "gpio1", "gpio2", "gpio3", 
"gpio4";
+   drive-push-pull;
+   bias-pull-up;
+   };
};
};
 };
-- 
2.7.4



[PATCH v5 7/9] ARM: dts: stm32: add orange and blue leds on stm32746g-eval

2019-04-09 Thread Amelie Delaunay
Orange (LD2) and blue (LD4) leds on stm32746g-eval are connected on
STMFX gpio expander, offset 17 and 19.

Signed-off-by: Amelie Delaunay 
Acked-by: Linus Walleij 
---
 arch/arm/boot/dts/stm32746g-eval.dts | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/stm32746g-eval.dts 
b/arch/arm/boot/dts/stm32746g-eval.dts
index 21e8912..2b166488 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -70,9 +70,15 @@
gpios = <&gpiof 10 1>;
linux,default-trigger = "heartbeat";
};
+   orange {
+   gpios = <&stmfx_pinctrl 17 1>;
+   };
red {
gpios = <&gpiob 7 1>;
};
+   blue {
+   gpios = <&stmfx_pinctrl 19 1>;
+   };
};
 
gpio_keys {
-- 
2.7.4



[PATCH v5 1/9] dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings

2019-04-09 Thread Amelie Delaunay
This patch adds documentation of device tree bindings for the
STMicroelectronics Multi-Function eXpander (STMFX) MFD core.

Signed-off-by: Amelie Delaunay 
Reviewed-by: Linus Walleij 
Reviewed-by: Rob Herring 
Acked-for-MFD-by: Lee Jones 
---
 Documentation/devicetree/bindings/mfd/stmfx.txt | 28 +
 1 file changed, 28 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/stmfx.txt

diff --git a/Documentation/devicetree/bindings/mfd/stmfx.txt 
b/Documentation/devicetree/bindings/mfd/stmfx.txt
new file mode 100644
index 000..f0c2f7f
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/stmfx.txt
@@ -0,0 +1,28 @@
+STMicroelectonics Multi-Function eXpander (STMFX) Core bindings
+
+ST Multi-Function eXpander (STMFX) is a slave controller using I2C for
+communication with the main MCU. Its main features are GPIO expansion, main
+MCU IDD measurement (IDD is the amount of current that flows through VDD) and
+resistive touchscreen controller.
+
+Required properties:
+- compatible: should be "st,stmfx-0300".
+- reg: I2C slave address of the device.
+- interrupts: interrupt specifier triggered by MFX_IRQ_OUT signal.
+  Please refer to ../interrupt-controller/interrupt.txt
+
+Optional properties:
+- drive-open-drain: configure MFX_IRQ_OUT as open drain.
+- vdd-supply: phandle of the regulator supplying STMFX.
+
+Example:
+
+   stmfx: stmfx@42 {
+   compatible = "st,stmfx-0300";
+   reg = <0x42>;
+   interrupts = <8 IRQ_TYPE_EDGE_RISING>;
+   interrupt-parent = <&gpioi>;
+   vdd-supply = <&v3v3>;
+   };
+
+Please refer to ../pinctrl/pinctrl-stmfx.txt for STMFX GPIO expander function 
bindings.
-- 
2.7.4



[PATCH v5 2/9] mfd: Add ST Multi-Function eXpander (STMFX) core driver

2019-04-09 Thread Amelie Delaunay
STMicroelectronics Multi-Function eXpander (STMFX) is a slave controller
using I2C for communication with the main MCU. Main features are:
- 16 fast GPIOs individually configurable in input/output
- 8 alternate GPIOs individually configurable in input/output when other
STMFX functions are not used
- Main MCU IDD measurement
- Resistive touchscreen controller

Signed-off-by: Amelie Delaunay 
---
 drivers/mfd/Kconfig   |  13 ++
 drivers/mfd/Makefile  |   2 +-
 drivers/mfd/stmfx.c   | 566 ++
 include/linux/mfd/stmfx.h | 123 ++
 4 files changed, 703 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mfd/stmfx.c
 create mode 100644 include/linux/mfd/stmfx.h

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 3443f1a..9783e18 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -1907,6 +1907,19 @@ config MFD_STPMIC1
  To compile this driver as a module, choose M here: the
  module will be called stpmic1.
 
+config MFD_STMFX
+   tristate "Support for STMicroelectronics Multi-Function eXpander 
(STMFX)"
+   depends on I2C
+   depends on OF || COMPILE_TEST
+   select MFD_CORE
+   select REGMAP_I2C
+   help
+ Support for the STMicroelectronics Multi-Function eXpander.
+
+ This driver provides common support for accessing the device,
+ additional drivers must be enabled in order to use the functionality
+ of the device.
+
 menu "Multimedia Capabilities Port drivers"
depends on ARCH_SA1100
 
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index b4569ed7..614eea8 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -246,4 +246,4 @@ obj-$(CONFIG_MFD_MXS_LRADC) += mxs-lradc.o
 obj-$(CONFIG_MFD_SC27XX_PMIC)  += sprd-sc27xx-spi.o
 obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o
 obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o
-
+obj-$(CONFIG_MFD_STMFX)+= stmfx.o
diff --git a/drivers/mfd/stmfx.c b/drivers/mfd/stmfx.c
new file mode 100644
index 000..59f0a03
--- /dev/null
+++ b/drivers/mfd/stmfx.c
@@ -0,0 +1,566 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Driver for STMicroelectronics Multi-Function eXpander (STMFX) core
+ *
+ * Copyright (C) 2019 STMicroelectronics
+ * Author(s): Amelie Delaunay .
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static bool stmfx_reg_volatile(struct device *dev, unsigned int reg)
+{
+   switch (reg) {
+   case STMFX_REG_SYS_CTRL:
+   case STMFX_REG_IRQ_SRC_EN:
+   case STMFX_REG_IRQ_PENDING:
+   case STMFX_REG_IRQ_GPI_PENDING1:
+   case STMFX_REG_IRQ_GPI_PENDING2:
+   case STMFX_REG_IRQ_GPI_PENDING3:
+   case STMFX_REG_GPIO_STATE1:
+   case STMFX_REG_GPIO_STATE2:
+   case STMFX_REG_GPIO_STATE3:
+   case STMFX_REG_IRQ_GPI_SRC1:
+   case STMFX_REG_IRQ_GPI_SRC2:
+   case STMFX_REG_IRQ_GPI_SRC3:
+   case STMFX_REG_GPO_SET1:
+   case STMFX_REG_GPO_SET2:
+   case STMFX_REG_GPO_SET3:
+   case STMFX_REG_GPO_CLR1:
+   case STMFX_REG_GPO_CLR2:
+   case STMFX_REG_GPO_CLR3:
+   return true;
+   default:
+   return false;
+   }
+}
+
+static bool stmfx_reg_writeable(struct device *dev, unsigned int reg)
+{
+   return (reg >= STMFX_REG_SYS_CTRL);
+}
+
+static const struct regmap_config stmfx_regmap_config = {
+   .reg_bits   = 8,
+   .reg_stride = 1,
+   .val_bits   = 8,
+   .max_register   = STMFX_REG_MAX,
+   .volatile_reg   = stmfx_reg_volatile,
+   .writeable_reg  = stmfx_reg_writeable,
+   .cache_type = REGCACHE_RBTREE,
+};
+
+static const struct resource stmfx_pinctrl_resources[] = {
+   DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_GPIO),
+};
+
+static const struct resource stmfx_idd_resources[] = {
+   DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_IDD),
+   DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_ERROR),
+};
+
+static const struct resource stmfx_ts_resources[] = {
+   DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_TS_DET),
+   DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_TS_NE),
+   DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_TS_TH),
+   DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_TS_FULL),
+   DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_TS_OVF),
+};
+
+static struct mfd_cell stmfx_cells[] = {
+   {
+   .of_compatible = "st,stmfx-0300-pinctrl",
+   .name = "stmfx-pinctrl",
+   .resources = stmfx_pinctrl_resources,
+   .num_resources = ARRAY_SIZE(stmfx_pinctrl_resources),
+   },
+   {
+   .of_compatible = "st,stmfx-0300-idd",
+   .name = "stmfx-idd",
+   .resources = stmfx_idd_resources,
+   .num_resources = ARRAY_SIZE(stmfx_idd_resources),
+   },
+   {
+   .of_compatible = "st,stmfx-0300-ts",
+   .name = "stmfx-ts&quo

[PATCH v5 3/9] dt-bindings: pinctrl: document the STMFX pinctrl bindings

2019-04-09 Thread Amelie Delaunay
This patch adds documentation of device tree bindings for the
STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander.

Signed-off-by: Amelie Delaunay 
Reviewed-by: Linus Walleij 
Reviewed-by: Rob Herring 
---
 .../devicetree/bindings/pinctrl/pinctrl-stmfx.txt  | 116 +
 1 file changed, 116 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt 
b/Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt
new file mode 100644
index 000..c1b4c18
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt
@@ -0,0 +1,116 @@
+STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander bindings
+
+ST Multi-Function eXpander (STMFX) offers up to 24 GPIOs expansion.
+Please refer to ../mfd/stmfx.txt for STMFX Core bindings.
+
+Required properties:
+- compatible: should be "st,stmfx-0300-pinctrl".
+- #gpio-cells: should be <2>, the first cell is the GPIO number and the second
+  cell is the gpio flags in accordance with .
+- gpio-controller: marks the device as a GPIO controller.
+- #interrupt-cells: should be <2>, the first cell is the GPIO number and the
+  second cell is the interrupt flags in accordance with
+  .
+- interrupt-controller: marks the device as an interrupt controller.
+- gpio-ranges: specifies the mapping between gpio controller and pin
+  controller pins. Check "Concerning gpio-ranges property" below.
+Please refer to ../gpio/gpio.txt.
+
+Please refer to pinctrl-bindings.txt for pin configuration.
+
+Required properties for pin configuration sub-nodes:
+- pins: list of pins to which the configuration applies.
+
+Optional properties for pin configuration sub-nodes (pinconf-generic ones):
+- bias-disable: disable any bias on the pin.
+- bias-pull-up: the pin will be pulled up.
+- bias-pull-pin-default: use the pin-default pull state.
+- bias-pull-down: the pin will be pulled down.
+- drive-open-drain: the pin will be driven with open drain.
+- drive-push-pull: the pin will be driven actively high and low.
+- output-high: the pin will be configured as an output driving high level.
+- output-low: the pin will be configured as an output driving low level.
+
+Note that STMFX pins[15:0] are called "gpio[15:0]", and STMFX pins[23:16] are
+called "agpio[7:0]". Example, to refer to pin 18 of STMFX, use "agpio2".
+
+Concerning gpio-ranges property:
+- if all STMFX pins[24:0] are available (no other STMFX function in use), you
+  should use gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+- if agpio[3:0] are not available (STMFX Touchscreen function in use), you
+  should use gpio-ranges = <&stmfx_pinctrl 0 0 16>, <&stmfx_pinctrl 20 20 4>;
+- if agpio[7:4] are not available (STMFX IDD function in use), you
+  should use gpio-ranges = <&stmfx_pinctrl 0 0 20>;
+
+
+Example:
+
+   stmfx: stmfx@42 {
+   ...
+
+   stmfx_pinctrl: stmfx-pin-controller {
+   compatible = "st,stmfx-0300-pinctrl";
+   #gpio-cells = <2>;
+   #interrupt-cells = <2>;
+   gpio-controller;
+   interrupt-controller;
+   gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+
+   joystick_pins: joystick {
+   pins = "gpio0", "gpio1", "gpio2", "gpio3", 
"gpio4";
+   drive-push-pull;
+   bias-pull-up;
+   };
+   };
+   };
+
+Example of STMFX GPIO consumers:
+
+   joystick {
+   compatible = "gpio-keys";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   pinctrl-0 = <&joystick_pins>;
+   pinctrl-names = "default";
+   button-0 {
+   label = "JoySel";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <0 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-1 {
+   label = "JoyDown";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <1 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-2 {
+   label = "JoyLeft";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <2 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-3 {
+   label = "JoyRight";
+  

[PATCH v5 5/9] ARM: dts: stm32: add STMFX support on stm32746g-eval

2019-04-09 Thread Amelie Delaunay
This patch adds support for STMicroelectronics Multi-Function eXpander
(STMFX) on stm32746g-eval. It is connected on i2c1.

Signed-off-by: Amelie Delaunay 
Acked-by: Linus Walleij 
---
 arch/arm/boot/dts/stm32746g-eval.dts | 17 +
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/boot/dts/stm32746g-eval.dts 
b/arch/arm/boot/dts/stm32746g-eval.dts
index d90b0d1..58e0457 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -44,6 +44,7 @@
 #include "stm32f746.dtsi"
 #include "stm32f746-pinctrl.dtsi"
 #include 
+#include 
 
 / {
model = "STMicroelectronics STM32746g-EVAL board";
@@ -115,6 +116,22 @@
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
+
+   stmfx: stmfx@42 {
+   compatible = "st,stmfx-0300";
+   reg = <0x42>;
+   interrupts = <8 IRQ_TYPE_EDGE_RISING>;
+   interrupt-parent = <&gpioi>;
+
+   stmfx_pinctrl: stmfx-pin-controller {
+   compatible = "st,stmfx-0300-pinctrl";
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+   };
+   };
 };
 
 &rtc {
-- 
2.7.4



Re: [PATCH v3 2/7] mfd: Add ST Multi-Function eXpander (STMFX) core driver

2019-02-27 Thread Amelie DELAUNAY
On 10/9/18 11:55 AM, Lee Jones wrote:
> On Thu, 27 Sep 2018, Amelie Delaunay wrote:
> 
>> STMicroelectronics Multi-Function eXpander (STMFX) is a slave controller
>> using I2C for communication with the main MCU. Main features are:
>> - 16 fast GPIOs individually configurable in input/output
>> - 8 alternate GPIOs individually configurable in input/output when other
>> STMFX functions are not used
>> - Main MCU IDD measurement
>> - Resistive touchscreen controller
>>
>> Signed-off-by: Amelie Delaunay 
>> Reviewed-by: Linus Walleij 
>> ---
>>   drivers/mfd/Kconfig   |  14 ++
>>   drivers/mfd/Makefile  |   2 +-
>>   drivers/mfd/stmfx.c   | 626 
>> ++
>>   include/linux/mfd/stmfx.h |  27 ++
>>   4 files changed, 668 insertions(+), 1 deletion(-)
>>   create mode 100644 drivers/mfd/stmfx.c
>>   create mode 100644 include/linux/mfd/stmfx.h
>>
>> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
>> index f3a5f8d..8c41342 100644
>> --- a/drivers/mfd/Kconfig
>> +++ b/drivers/mfd/Kconfig
>> @@ -1862,6 +1862,20 @@ config MFD_STM32_TIMERS
>>for PWM and IIO Timer. This driver allow to share the
>>registers between the others drivers.
>>   
>> +config MFD_STMFX
>> +tristate "Support for STMicroelectronics Multi-Function eXpander 
>> (STMFX)"
>> +depends on I2C
>> +depends on OF || COMPILE_TEST
>> +select MFD_CORE
>> +select REGMAP_I2C
>> +help
>> +  Support for the STMicroelectronics Multi-Function eXpander.
>> +
>> +  This driver provides common support for accessing the device,
>> +  additional drivers must be enabled in order to use the functionality
>> +  of the device.
>> +
>> +
>>   menu "Multimedia Capabilities Port drivers"
>>  depends on ARCH_SA1100
>>   
>> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
>> index 5856a94..282323b 100644
>> --- a/drivers/mfd/Makefile
>> +++ b/drivers/mfd/Makefile
>> @@ -240,4 +240,4 @@ obj-$(CONFIG_MFD_MXS_LRADC) += mxs-lradc.o
>>   obj-$(CONFIG_MFD_SC27XX_PMIC)  += sprd-sc27xx-spi.o
>>   obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o
>>   obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o
>> -
>> +obj-$(CONFIG_MFD_STMFX) += stmfx.o
>> diff --git a/drivers/mfd/stmfx.c b/drivers/mfd/stmfx.c
>> new file mode 100644
>> index 000..cfd4fca
>> --- /dev/null
>> +++ b/drivers/mfd/stmfx.c
>> @@ -0,0 +1,626 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Driver for STMicroelectronics Multi-Function eXpander (STMFX) core
>> + *
>> + * Copyright (C) 2018 STMicroelectronics
>> + * Author(s): Amelie Delaunay .
>> + */
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +/* General */
>> +#define STMFX_REG_CHIP_ID   0x00 /* R */
>> +#define STMFX_REG_FW_VERSION_MSB0x01 /* R */
>> +#define STMFX_REG_FW_VERSION_LSB0x02 /* R */
>> +#define STMFX_REG_SYS_CTRL  0x40 /* RW */
>> +/* IRQ output management */
>> +#define STMFX_REG_IRQ_OUT_PIN   0x41 /* RW */
>> +#define STMFX_REG_IRQ_SRC_EN0x42 /* RW */
>> +#define STMFX_REG_IRQ_PENDING   0x08 /* R */
>> +#define STMFX_REG_IRQ_ACK   0x44 /* RW */
>> +/* GPIO management */
>> +#define STMFX_REG_IRQ_GPI_PENDING1  0x0C /* R */
>> +#define STMFX_REG_IRQ_GPI_PENDING2  0x0D /* R */
>> +#define STMFX_REG_IRQ_GPI_PENDING3  0x0E /* R */
>> +#define STMFX_REG_GPIO_STATE1   0x10 /* R */
>> +#define STMFX_REG_GPIO_STATE2   0x11 /* R */
>> +#define STMFX_REG_GPIO_STATE3   0x12 /* R */
>> +#define STMFX_REG_IRQ_GPI_SRC1  0x48 /* RW */
>> +#define STMFX_REG_IRQ_GPI_SRC2  0x49 /* RW */
>> +#define STMFX_REG_IRQ_GPI_SRC3  0x4A /* RW */
>> +#define STMFX_REG_GPO_SET1  0x6C /* RW */
>> +#define STMFX_REG_GPO_SET2  0x6D /* RW */
>> +#define STMFX_REG_GPO_SET3  0x6E /* RW */
>> +#define STMFX_REG_GPO_CLR1  0x70 /* RW */
>> +#define STMFX_REG_GPO_CLR2  0x71 /* RW */
>> +#define STMFX_REG_GPO_CLR3  0x72 /* RW */
>> +
>> +#define STMFX_REG_MAX   0xB0
>> +
>> +/* MFX boot time is around 10ms, so after reset, we have to wait this delay 
>> */
>> +#defi

[PATCH v4 1/9] dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings

2019-02-27 Thread Amelie Delaunay
This patch adds documentation of device tree bindings for the
STMicroelectronics Multi-Function eXpander (STMFX) MFD core.

Signed-off-by: Amelie Delaunay 
Reviewed-by: Linus Walleij 
Acked-for-MFD-by: Lee Jones 
---
 Documentation/devicetree/bindings/mfd/stmfx.txt | 28 +
 1 file changed, 28 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/stmfx.txt

diff --git a/Documentation/devicetree/bindings/mfd/stmfx.txt 
b/Documentation/devicetree/bindings/mfd/stmfx.txt
new file mode 100644
index 000..f0c2f7f
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/stmfx.txt
@@ -0,0 +1,28 @@
+STMicroelectonics Multi-Function eXpander (STMFX) Core bindings
+
+ST Multi-Function eXpander (STMFX) is a slave controller using I2C for
+communication with the main MCU. Its main features are GPIO expansion, main
+MCU IDD measurement (IDD is the amount of current that flows through VDD) and
+resistive touchscreen controller.
+
+Required properties:
+- compatible: should be "st,stmfx-0300".
+- reg: I2C slave address of the device.
+- interrupts: interrupt specifier triggered by MFX_IRQ_OUT signal.
+  Please refer to ../interrupt-controller/interrupt.txt
+
+Optional properties:
+- drive-open-drain: configure MFX_IRQ_OUT as open drain.
+- vdd-supply: phandle of the regulator supplying STMFX.
+
+Example:
+
+   stmfx: stmfx@42 {
+   compatible = "st,stmfx-0300";
+   reg = <0x42>;
+   interrupts = <8 IRQ_TYPE_EDGE_RISING>;
+   interrupt-parent = <&gpioi>;
+   vdd-supply = <&v3v3>;
+   };
+
+Please refer to ../pinctrl/pinctrl-stmfx.txt for STMFX GPIO expander function 
bindings.
-- 
2.7.4



[PATCH v4 0/9] Introduce STMFX I2C Multi-Function eXpander

2019-02-27 Thread Amelie Delaunay
This series adds support for STMicroelectronics Multi-Function eXpander
(STMFX), used on some STM32 discovery and evaluation boards.

STMFX is an STM32L152 slave controller whose firmware embeds the following
features:
- I/O expander (16 GPIOs + 8 extra if the other features are not enabled),
- resistive touchscreen controller,
- IDD measurement.

I2C stuff and chip initialization is based on an MFD parent driver, which
registers STMFX features MFD children.

---
Changes in v4:
- mfd: move registers #define into the header
- mfd: merge stmfx and stmfx_ddata structures into one stmfx structure
- mfd: change stmfx_chip_init/exit and stmfx_irq_init/exit args: use
  i2c_client struct and i2c_get_clientdata
- mfd: fix typos
- mfd: add MFD cells for IDD and TS features
- pinctrl: rework registers #define
- dts: add STMFX support on stm32mp157c-ev1
Changes in v3:
- fix MFD interrupt bindings
- fix drivers/mfd/stmfx.c:103:8: warning: 'mask' may be used uninitialized
  in this function
Changes in v2:
- move to MFD parent driver for i2c stuff and chip initialization
- improve regmap configuration
- take advantage of the use of gpio-ranges

Amelie Delaunay (9):
  dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings
  mfd: Add ST Multi-Function eXpander (STMFX) core driver
  dt-bindings: pinctrl: document the STMFX pinctrl bindings
  pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver
  ARM: dts: stm32: add STMFX support on stm32746g-eval
  ARM: dts: stm32: add joystick support on stm32746g-eval
  ARM: dts: stm32: add orange and blue leds on stm32746g-eval
  ARM: dts: stm32: add STMFX support on stm32mp157c-ev1
  ARM: dts: stm32: add joystick support on stm32mp157c-ev1

 Documentation/devicetree/bindings/mfd/stmfx.txt|  28 +
 .../devicetree/bindings/pinctrl/pinctrl-stmfx.txt  | 116 +++
 arch/arm/boot/dts/stm32746g-eval.dts   |  66 ++
 arch/arm/boot/dts/stm32mp157c-ev1.dts  |  60 ++
 drivers/mfd/Kconfig|  13 +
 drivers/mfd/Makefile   |   2 +-
 drivers/mfd/stmfx.c| 568 ++
 drivers/pinctrl/Kconfig|  12 +
 drivers/pinctrl/Makefile   |   1 +
 drivers/pinctrl/pinctrl-stmfx.c| 820 +
 include/linux/mfd/stmfx.h  | 123 
 11 files changed, 1808 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/mfd/stmfx.txt
 create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt
 create mode 100644 drivers/mfd/stmfx.c
 create mode 100644 drivers/pinctrl/pinctrl-stmfx.c
 create mode 100644 include/linux/mfd/stmfx.h

-- 
2.7.4



[PATCH v4 4/9] pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver

2019-02-27 Thread Amelie Delaunay
This patch adds pinctrl/GPIO driver for STMicroelectronics
Multi-Function eXpander (STMFX) GPIO expander.
STMFX is an I2C slave controller, offering up to 24 GPIOs.
The driver relies on generic pin config interface to configure the GPIOs.

Signed-off-by: Amelie Delaunay 
---
 drivers/pinctrl/Kconfig |  12 +
 drivers/pinctrl/Makefile|   1 +
 drivers/pinctrl/pinctrl-stmfx.c | 820 
 3 files changed, 833 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-stmfx.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 2764d71..ab2eab7 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -265,6 +265,18 @@ config PINCTRL_ST
select PINCONF
select GPIOLIB_IRQCHIP
 
+config PINCTRL_STMFX
+   tristate "STMicroelectronics STMFX GPIO expander pinctrl driver"
+   select GENERIC_PINCONF
+   select GPIOLIB_IRQCHIP
+   select MFD_STMFX
+   help
+ Driver for STMicroelectronics Multi-Function eXpander (STMFX)
+ GPIO expander.
+ This provides a GPIO interface supporting inputs and outputs,
+ and configuring push-pull, open-drain, and can also be used as
+ interrupt-controller.
+
 config PINCTRL_U300
bool "U300 pin controller driver"
depends on ARCH_U300
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 712184b..c188e0f 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -40,6 +40,7 @@ obj-$(CONFIG_PINCTRL_LANTIQ)  += pinctrl-lantiq.o
 obj-$(CONFIG_PINCTRL_LPC18XX)  += pinctrl-lpc18xx.o
 obj-$(CONFIG_PINCTRL_TB10X)+= pinctrl-tb10x.o
 obj-$(CONFIG_PINCTRL_ST)   += pinctrl-st.o
+obj-$(CONFIG_PINCTRL_STMFX)+= pinctrl-stmfx.o
 obj-$(CONFIG_PINCTRL_ZYNQ) += pinctrl-zynq.o
 obj-$(CONFIG_PINCTRL_INGENIC)  += pinctrl-ingenic.o
 obj-$(CONFIG_PINCTRL_RK805)+= pinctrl-rk805.o
diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drivers/pinctrl/pinctrl-stmfx.c
new file mode 100644
index 000..dc1bb0e
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-stmfx.c
@@ -0,0 +1,820 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Driver for STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander
+ *
+ * Copyright (C) 2019 STMicroelectronics
+ * Author(s): Amelie Delaunay .
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "core.h"
+#include "pinctrl-utils.h"
+
+/* GPIOs expander */
+/* GPIO_STATE1 0x10, GPIO_STATE2 0x11, GPIO_STATE3 0x12 */
+#define STMFX_REG_GPIO_STATE   STMFX_REG_GPIO_STATE1 /* R */
+/* GPIO_DIR1 0x60, GPIO_DIR2 0x61, GPIO_DIR3 0x63 */
+#define STMFX_REG_GPIO_DIR STMFX_REG_GPIO_DIR1 /* RW */
+/* GPIO_TYPE1 0x64, GPIO_TYPE2 0x65, GPIO_TYPE3 0x66 */
+#define STMFX_REG_GPIO_TYPESTMFX_REG_GPIO_TYPE1 /* RW */
+/* GPIO_PUPD1 0x68, GPIO_PUPD2 0x69, GPIO_PUPD3 0x6A */
+#define STMFX_REG_GPIO_PUPDSTMFX_REG_GPIO_PUPD1 /* RW */
+/* GPO_SET1 0x6C, GPO_SET2 0x6D, GPO_SET3 0x6E */
+#define STMFX_REG_GPO_SET  STMFX_REG_GPO_SET1 /* RW */
+/* GPO_CLR1 0x70, GPO_CLR2 0x71, GPO_CLR3 0x72 */
+#define STMFX_REG_GPO_CLR  STMFX_REG_GPO_CLR1 /* RW */
+/* IRQ_GPI_SRC1 0x48, IRQ_GPI_SRC2 0x49, IRQ_GPI_SRC3 0x4A */
+#define STMFX_REG_IRQ_GPI_SRC  STMFX_REG_IRQ_GPI_SRC1 /* RW */
+/* IRQ_GPI_EVT1 0x4C, IRQ_GPI_EVT2 0x4D, IRQ_GPI_EVT3 0x4E */
+#define STMFX_REG_IRQ_GPI_EVT  STMFX_REG_IRQ_GPI_EVT1 /* RW */
+/* IRQ_GPI_TYPE1 0x50, IRQ_GPI_TYPE2 0x51, IRQ_GPI_TYPE3 0x52 */
+#define STMFX_REG_IRQ_GPI_TYPE STMFX_REG_IRQ_GPI_TYPE1 /* RW */
+/* IRQ_GPI_PENDING1 0x0C, IRQ_GPI_PENDING2 0x0D, IRQ_GPI_PENDING3 0x0E*/
+#define STMFX_REG_IRQ_GPI_PENDING  STMFX_REG_IRQ_GPI_PENDING1 /* R */
+/* IRQ_GPI_ACK1 0x54, IRQ_GPI_ACK2 0x55, IRQ_GPI_ACK3 0x56 */
+#define STMFX_REG_IRQ_GPI_ACK  STMFX_REG_IRQ_GPI_ACK1 /* RW */
+
+#define NR_GPIO_REGS   3
+#define NR_GPIOS_PER_REG   8
+#define get_reg(offset)((offset) / NR_GPIOS_PER_REG)
+#define get_shift(offset)  ((offset) % NR_GPIOS_PER_REG)
+#define get_mask(offset)   (BIT(get_shift(offset)))
+
+/*
+ * STMFX pinctrl can have up to 24 pins if STMFX other functions are not used.
+ * Pins availability is managed thanks to gpio-ranges property.
+ */
+static const struct pinctrl_pin_desc stmfx_pins[] = {
+   PINCTRL_PIN(0, "gpio0"),
+   PINCTRL_PIN(1, "gpio1"),
+   PINCTRL_PIN(2, "gpio2"),
+   PINCTRL_PIN(3, "gpio3"),
+   PINCTRL_PIN(4, "gpio4"),
+   PINCTRL_PIN(5, "gpio5"),
+   PINCTRL_PIN(6, "gpio6"),
+   PINCTRL_PIN(7, "gpio7"),
+   PINCTRL_PIN(8, "gpio8"),
+   PINCTRL_PIN(9, "gpio9"),
+   PINCTRL_PIN(10, "gpio10"),
+   PINCTRL_PIN(11, "gpio11"),
+   PIN

[PATCH v4 9/9] ARM: dts: stm32: add joystick support on stm32mp157c-ev1

2019-02-27 Thread Amelie Delaunay
The joystick (B1) on stm32mp157c-ev1 uses gpios on STMFX gpio expander.
These gpios need a pin configuration (push-pull and bias-pull-down),
described under stmfx_pinctrl node.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32mp157c-ev1.dts | 44 +++
 1 file changed, 44 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts 
b/arch/arm/boot/dts/stm32mp157c-ev1.dts
index 3a6f033..6d6b692 100644
--- a/arch/arm/boot/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts
@@ -7,6 +7,7 @@
 
 #include "stm32mp157c-ed1.dts"
 #include 
+#include 
 
 / {
model = "STMicroelectronics STM32MP157C eval daughter on eval mother";
@@ -21,6 +22,43 @@
ethernet0 = ðernet0;
};
 
+   joystick {
+   compatible = "gpio-keys";
+   #size-cells = <0>;
+   pinctrl-0 = <&joystick_pins>;
+   pinctrl-names = "default";
+   button-0 {
+   label = "JoySel";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <0 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-1 {
+   label = "JoyDown";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <1 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-2 {
+   label = "JoyLeft";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <2 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-3 {
+   label = "JoyRight";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <3 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-4 {
+   label = "JoyUp";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <4 IRQ_TYPE_EDGE_RISING>;
+   };
+   };
+
panel_backlight: panel-backlight {
compatible = "gpio-backlight";
gpios = <&gpiod 13 GPIO_ACTIVE_LOW>;
@@ -113,6 +151,12 @@
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+
+   joystick_pins: joystick {
+   pins = "gpio0", "gpio1", "gpio2", "gpio3", 
"gpio4";
+   drive-push-pull;
+   bias-pull-down;
+   };
};
};
 };
-- 
2.7.4



[PATCH v4 7/9] ARM: dts: stm32: add orange and blue leds on stm32746g-eval

2019-02-27 Thread Amelie Delaunay
Orange (LD2) and blue (LD4) leds on stm32746g-eval are connected on
STMFX gpio expander, offset 17 and 19.

Signed-off-by: Amelie Delaunay 
Acked-by: Linus Walleij 
---
 arch/arm/boot/dts/stm32746g-eval.dts | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/stm32746g-eval.dts 
b/arch/arm/boot/dts/stm32746g-eval.dts
index b86ad83..a5fa73f 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -69,9 +69,15 @@
gpios = <&gpiof 10 1>;
linux,default-trigger = "heartbeat";
};
+   orange {
+   gpios = <&stmfx_pinctrl 17 1>;
+   };
red {
gpios = <&gpiob 7 1>;
};
+   blue {
+   gpios = <&stmfx_pinctrl 19 1>;
+   };
};
 
gpio_keys {
-- 
2.7.4



[PATCH v4 8/9] ARM: dts: stm32: add STMFX support on stm32mp157c-ev1

2019-02-27 Thread Amelie Delaunay
This patch adds support for STMicroelectronics Multi-Function eXpander
(STMFX) on stm32mp157c-ev1. It is connected on i2c2.

Signed-off-by: Amelie Delaunay 
---
 arch/arm/boot/dts/stm32mp157c-ev1.dts | 16 
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts 
b/arch/arm/boot/dts/stm32mp157c-ev1.dts
index 063ee8a..3a6f033 100644
--- a/arch/arm/boot/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts
@@ -99,6 +99,22 @@
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
+
+   stmfx: stmfx@42 {
+   compatible = "st,stmfx-0300";
+   reg = <0x42>;
+   interrupts = <8 IRQ_TYPE_EDGE_RISING>;
+   interrupt-parent = <&gpioi>;
+
+   stmfx_pinctrl: stmfx-pin-controller {
+   compatible = "st,stmfx-0300-pinctrl";
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+   };
+   };
 };
 
 &i2c5 {
-- 
2.7.4



[PATCH v4 3/9] dt-bindings: pinctrl: document the STMFX pinctrl bindings

2019-02-27 Thread Amelie Delaunay
This patch adds documentation of device tree bindings for the
STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander.

Signed-off-by: Amelie Delaunay 
Reviewed-by: Linus Walleij 
Reviewed-by: Rob Herring 
---
 .../devicetree/bindings/pinctrl/pinctrl-stmfx.txt  | 116 +
 1 file changed, 116 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt 
b/Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt
new file mode 100644
index 000..c1b4c18
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt
@@ -0,0 +1,116 @@
+STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander bindings
+
+ST Multi-Function eXpander (STMFX) offers up to 24 GPIOs expansion.
+Please refer to ../mfd/stmfx.txt for STMFX Core bindings.
+
+Required properties:
+- compatible: should be "st,stmfx-0300-pinctrl".
+- #gpio-cells: should be <2>, the first cell is the GPIO number and the second
+  cell is the gpio flags in accordance with .
+- gpio-controller: marks the device as a GPIO controller.
+- #interrupt-cells: should be <2>, the first cell is the GPIO number and the
+  second cell is the interrupt flags in accordance with
+  .
+- interrupt-controller: marks the device as an interrupt controller.
+- gpio-ranges: specifies the mapping between gpio controller and pin
+  controller pins. Check "Concerning gpio-ranges property" below.
+Please refer to ../gpio/gpio.txt.
+
+Please refer to pinctrl-bindings.txt for pin configuration.
+
+Required properties for pin configuration sub-nodes:
+- pins: list of pins to which the configuration applies.
+
+Optional properties for pin configuration sub-nodes (pinconf-generic ones):
+- bias-disable: disable any bias on the pin.
+- bias-pull-up: the pin will be pulled up.
+- bias-pull-pin-default: use the pin-default pull state.
+- bias-pull-down: the pin will be pulled down.
+- drive-open-drain: the pin will be driven with open drain.
+- drive-push-pull: the pin will be driven actively high and low.
+- output-high: the pin will be configured as an output driving high level.
+- output-low: the pin will be configured as an output driving low level.
+
+Note that STMFX pins[15:0] are called "gpio[15:0]", and STMFX pins[23:16] are
+called "agpio[7:0]". Example, to refer to pin 18 of STMFX, use "agpio2".
+
+Concerning gpio-ranges property:
+- if all STMFX pins[24:0] are available (no other STMFX function in use), you
+  should use gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+- if agpio[3:0] are not available (STMFX Touchscreen function in use), you
+  should use gpio-ranges = <&stmfx_pinctrl 0 0 16>, <&stmfx_pinctrl 20 20 4>;
+- if agpio[7:4] are not available (STMFX IDD function in use), you
+  should use gpio-ranges = <&stmfx_pinctrl 0 0 20>;
+
+
+Example:
+
+   stmfx: stmfx@42 {
+   ...
+
+   stmfx_pinctrl: stmfx-pin-controller {
+   compatible = "st,stmfx-0300-pinctrl";
+   #gpio-cells = <2>;
+   #interrupt-cells = <2>;
+   gpio-controller;
+   interrupt-controller;
+   gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+
+   joystick_pins: joystick {
+   pins = "gpio0", "gpio1", "gpio2", "gpio3", 
"gpio4";
+   drive-push-pull;
+   bias-pull-up;
+   };
+   };
+   };
+
+Example of STMFX GPIO consumers:
+
+   joystick {
+   compatible = "gpio-keys";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   pinctrl-0 = <&joystick_pins>;
+   pinctrl-names = "default";
+   button-0 {
+   label = "JoySel";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <0 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-1 {
+   label = "JoyDown";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <1 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-2 {
+   label = "JoyLeft";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <2 IRQ_TYPE_EDGE_RISING>;
+   };
+   button-3 {
+   label = "JoyRight";
+  

[PATCH v4 6/9] ARM: dts: stm32: add joystick support on stm32746g-eval

2019-02-27 Thread Amelie Delaunay
The joystick (B3) on stm32746g-eval uses gpios on STMFX gpio expander.
These gpios need a pin configuration (push-pull and bias-pull-up),
described under stmfx_pinctrl node.

Signed-off-by: Amelie Delaunay 
Acked-by: Linus Walleij 
---
 arch/arm/boot/dts/stm32746g-eval.dts | 43 
 1 file changed, 43 insertions(+)

diff --git a/arch/arm/boot/dts/stm32746g-eval.dts 
b/arch/arm/boot/dts/stm32746g-eval.dts
index 203faf0..b86ad83 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -86,6 +86,43 @@
};
};
 
+   joystick {
+   compatible = "gpio-keys";
+   #size-cells = <0>;
+   pinctrl-0 = <&joystick_pins>;
+   pinctrl-names = "default";
+   button-0 {
+   label = "JoySel";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
+   };
+   button-1 {
+   label = "JoyDown";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+   };
+   button-2 {
+   label = "JoyLeft";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+   };
+   button-3 {
+   label = "JoyRight";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+   };
+   button-4 {
+   label = "JoyUp";
+   linux,code = ;
+   interrupt-parent = <&stmfx_pinctrl>;
+   interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+   };
+   };
+
usbotg_hs_phy: usb-phy {
#phy-cells = <0>;
compatible = "usb-nop-xceiv";
@@ -129,6 +166,12 @@
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+
+   joystick_pins: joystick {
+   pins = "gpio0", "gpio1", "gpio2", "gpio3", 
"gpio4";
+   drive-push-pull;
+   bias-pull-up;
+   };
};
};
 };
-- 
2.7.4



[PATCH v4 5/9] ARM: dts: stm32: add STMFX support on stm32746g-eval

2019-02-27 Thread Amelie Delaunay
This patch adds support for STMicroelectronics Multi-Function eXpander
(STMFX) on stm32746g-eval. It is connected on i2c1.

Signed-off-by: Amelie Delaunay 
Acked-by: Linus Walleij 
---
 arch/arm/boot/dts/stm32746g-eval.dts | 17 +
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/boot/dts/stm32746g-eval.dts 
b/arch/arm/boot/dts/stm32746g-eval.dts
index 8c081ea..203faf0 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -44,6 +44,7 @@
 #include "stm32f746.dtsi"
 #include "stm32f746-pinctrl.dtsi"
 #include 
+#include 
 
 / {
model = "STMicroelectronics STM32746g-EVAL board";
@@ -114,6 +115,22 @@
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
+
+   stmfx: stmfx@42 {
+   compatible = "st,stmfx-0300";
+   reg = <0x42>;
+   interrupts = <8 IRQ_TYPE_EDGE_RISING>;
+   interrupt-parent = <&gpioi>;
+
+   stmfx_pinctrl: stmfx-pin-controller {
+   compatible = "st,stmfx-0300-pinctrl";
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+   };
+   };
 };
 
 &rtc {
-- 
2.7.4



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