On 10/12/2012 06:58 AM, Sukadev Bhattiprolu wrote:
From 89cb6a25b9f714e55a379467a832ee015014ed11 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu suka...@linux.vnet.ibm.com
Date: Tue, 18 Sep 2012 10:59:01 -0700
Subject: [PATCH] perf: Add a few generic stalled-cycles events
The existing
On 10/15/2012 10:53 PM, Arun Sharma wrote:
On 10/15/12 8:55 AM, Robert Richter wrote:
[..]
Perf tool works then out-of-the-box with:
$ perf record -e cpu/stalled-cycles-fixed-point/ ...
The event string can easily be reused by other architectures as a
quasi standard.
I like Robert's
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/perf_event_server.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/powerpc/include/asm/perf_event_server.h
b/arch/powerpc/include/asm/perf_event_server.h
index 57b42da..3f0c15c 100644
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/power8-pmu.c | 57 +-
1 file changed, 56 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index 106ae0b..153408c
This patch provides basic enablement for perf branch stack sampling framework
on POWER8 processor with a new PMU feature called BHRB (Branch History Rolling
Buffer).
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/core-book3s.c | 96
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/Makefile | 2 +-
arch/powerpc/perf/bhrb.S | 34 ++
2 files changed, 35 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/perf/bhrb.S
diff --git a/arch/powerpc/perf
This patch adds new instructions support for reading various
BHRB entries and also clearing the BHRB buffer.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/ppc-opcode.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/powerpc/include/asm
% top libc-2.11.2.so[k] vfprintf
libc-2.11.2.so[k] vfprintf
0.92% top top [k] _init
[unknown] [k] 0x0fe037f4
Anshuman Khandual (5
% top top [k] _init
[unknown] [k] 0x0fe037f4
Changes in V2
--
- Added copyright messages to the newly created files
- Modified couple of commit messages
Anshuman Khandual (5):
powerpc, perf: Add new BHRB related
This patch provides basic enablement for perf branch stack sampling framework
on POWER8 processor with a new PMU feature called BHRB (Branch History Rolling
Buffer).
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/core-book3s.c | 96
This patch adds new instructions support for reading various
BHRB entries and also clearing the BHRB buffer.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/ppc-opcode.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/powerpc/include/asm
Defines BHRB functions, data and flags for POWER8
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/power8-pmu.c | 57 +-
1 file changed, 56 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch
This patch adds the basic assembly code to read BHRB entries
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/Makefile | 2 +-
arch/powerpc/perf/bhrb.S | 44
2 files changed, 45 insertions(+), 1 deletion(-)
create
This patch adds some new BHRB related generic functions, data and flags
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/perf_event_server.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/powerpc/include/asm/perf_event_server.h
b/arch
On 04/16/2013 10:53 PM, Segher Boessenkool wrote:
+/* r3 = n (where n = [0-1023])
+ * The maximum number of BHRB entries supported with PPC_MFBHRBE
instruction
+ * is 1024. We have limited number of table entries here as POWER8
implements
+ * 32 BHRB entries.
+ */
+
+/* .global read_bhrb
On 04/17/2013 12:38 PM, Michael Ellerman wrote:
On Tue, Apr 16, 2013 at 09:24:10PM +0530, Anshuman Khandual wrote:
This patch provides basic enablement for perf branch stack sampling framework
on POWER8 processor with a new PMU feature called BHRB (Branch History
Rolling
Buffer).
Signed
On 04/17/2013 05:37 PM, Anshuman Khandual wrote:
On 04/17/2013 12:38 PM, Michael Ellerman wrote:
On Tue, Apr 16, 2013 at 09:24:10PM +0530, Anshuman Khandual wrote:
This patch provides basic enablement for perf branch stack sampling
framework
on POWER8 processor with a new PMU feature called
This patch adds couple of generic functions to power_pmu structure
which would configure the BHRB and it's filters. It also adds
representation of the number of BHRB entries present on the PMU.
A new PMU flag PPMU_BHRB would indicate presence of BHRB feature.
Signed-off-by: Anshuman Khandual
This patch adds new POWER8 instruction encoding for reading
the BHRB buffer entries and also clearing it. Encoding for
clrbhrb instruction is straight forward. But mfbhrbe
encoding involves reading a certain index of BHRB buffer
into a particular GPR register.
Signed-off-by: Anshuman Khandual
passing to the user space. This also enables
processing of BHRB data and converts them into generic perf branch
stack data format.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/perf_event_server.h | 1 +
arch/powerpc/perf/core-book3s.c
from perf_event_bhrb.c into
core-book3s.c
- Improved documentation for the patchset
Anshuman Khandual (5):
powerpc, perf: Add new BHRB related instructions for POWER8
powerpc, perf: Add basic assembly code to read BHRB entries on POWER8
powerpc, perf: Add new BHRB related generic functions
This patch populates BHRB specific data for power_pmu structure. It
also implements POWER8 specific BHRB filter and configuration functions.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/power8-pmu.c | 57 +-
1 file
-deterministic results.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/Makefile | 2 +-
arch/powerpc/perf/bhrb.S | 44
2 files changed, 45 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/perf/bhrb.S
diff
On 04/22/2013 05:11 AM, Michael Ellerman wrote:
On Thu, Apr 18, 2013 at 05:56:12PM +0530, Anshuman Khandual wrote:
This patch adds new POWER8 instruction encoding for reading
the BHRB buffer entries and also clearing it. Encoding for
clrbhrb instruction is straight forward.
Which is clear
On 04/22/2013 08:20 AM, Michael Neuling wrote:
Michael Ellerman mich...@ellerman.id.au wrote:
On Mon, Apr 22, 2013 at 11:13:43AM +1000, Michael Neuling wrote:
Michael Ellerman mich...@ellerman.id.au wrote:
On Thu, Apr 18, 2013 at 05:56:12PM +0530, Anshuman Khandual wrote:
This patch adds
On 04/22/2013 08:20 AM, Michael Neuling wrote:
Michael Ellerman mich...@ellerman.id.au wrote:
On Mon, Apr 22, 2013 at 11:13:43AM +1000, Michael Neuling wrote:
Michael Ellerman mich...@ellerman.id.au wrote:
On Thu, Apr 18, 2013 at 05:56:12PM +0530, Anshuman Khandual wrote:
This patch adds
There are 4 options:
1. [not a kernel interface] use ptrace to execute the register changing
command inside the specified pid. The next context switch saves the new
value in the thread_struct. Dirty hack.
2. Add a new syscall which would receive pid + register value and do the
job. A bit
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/perf_event_server.h | 21 -
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/include/asm/perf_event_server.h
b/arch/powerpc/include/asm/perf_event_server.h
On 11/16/2012 05:12 PM, Paul Mackerras wrote:
On Fri, Nov 16, 2012 at 02:29:04PM +0530, Anshuman Khandual wrote:
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
That's not a sufficient description of why you are making this
change. In particular, what is the motivation
On 09/10/2013 07:36 AM, Michael Ellerman wrote:
On Fri, 2013-08-30 at 09:54 +0530, Anshuman Khandual wrote:
This patchset is the re-spin of the original branch stack sampling
patchset which introduced new PERF_SAMPLE_BRANCH_COND filter. This patchset
also enables SW based branch filtering
On 09/14/2013 06:19 AM, Sukadev Bhattiprolu wrote:
We use helpers like GENERIC_EVENT_ATTR() to list the generic events in
sysfs. To avoid name collisions, GENERIC_EVENT_ATTR() requires the perf
event macros to start with PME.
We got all the raw event codes covered for P7 with the help of
On 09/14/2013 06:19 AM, Sukadev Bhattiprolu wrote:
On Power7, the DCACHE_SRC field in MMCRA register identifies the memory
hierarchy level (eg: L2, L3 etc) from which a data-cache miss for a
marked instruction was satisfied.
Use the 'perf_mem_data_src' object to export this hierarchy level
On 09/14/2013 06:19 AM, Sukadev Bhattiprolu wrote:
+static void power7_get_mem_data_src(union perf_mem_data_src *dsrc,
+ struct pt_regs *regs)
+{
+ u64 idx;
+ u64 mmcra = regs-dsisr;
+ u64 addr;
+ int ret;
+ unsigned int instr;
+
+ if (mmcra
This patch adds conditional branch filtering support,
enabling it for PERF_SAMPLE_BRANCH_COND in perf branch
stack sampling framework by utilizing an available
software filter X86_BR_JCC.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Reviewed-by: Stephane Eranian eran...@google.com
where.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/code-patching.h | 30 ++
arch/powerpc/lib/code-patching.c | 54 ++--
2 files changed, 82 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include
Enables conditional branch filter support for POWER8
utilizing MMCRA register based filter and also invalidates
a BHRB branch filter combination involving conditional
branches.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/power8-pmu.c | 10 ++
1 file
of instructions.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Reviewed-by: Stephane Eranian eran...@google.com
---
include/uapi/linux/perf_event.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index
This patch adds enumeration for all available SW branch filters
in powerpc book3s code and also streamlines the look for the
SW branch filter entries while trying to figure out which all
branch filters can be supported in SW.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch
Adding documentation support for conditional branch filter.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Reviewed-by: Stephane Eranian eran...@google.com
---
tools/perf/Documentation/perf-record.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tools/perf
This patchset is the re-spin of the original branch stack
sampling
patchset which introduced new PERF_SAMPLE_BRANCH_COND branch filter. This
patchset
also enables SW based branch filtering support for book3s powerpc platforms
which
have PMU HW backed branch stack sampling
combinations PMU will pass it on to the SW.
Also the combination of PERF_SAMPLE_BRANCH_ANY_CALL and PERF_SAMPLE_BRANCH_COND
can now be handled in SW, hence we dont error them out anymore.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/power8-pmu.c | 73
This patch simply changes the name of the variable from bhrb_filter to
bhrb_hw_filter in order to add one more variable which will track SW
filters in generic powerpc book3s code which will be implemented in the
subsequent patch.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Adding perf record support for new branch stack filter criteria
PERF_SAMPLE_BRANCH_COND.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Reviewed-by: Stephane Eranian eran...@google.com
---
tools/perf/builtin-record.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/perf
all. Its the PMU code's responsibility to uphold this protocol to be
able to
conform to the overall OR semantic of perf branch stack sampling
framework.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/perf_event_server.h | 6 +-
arch/powerpc
On 10/16/2013 01:55 PM, David Laight wrote:
Implement instr_is_load_store_2_06() to detect whether a given instruction
is one of the fixed-point or floating-point load/store instructions in the
POWER Instruction Set Architecture v2.06.
...
The op code encoding is dependent on the ISA version
On 11/26/2013 11:36 AM, m...@ellerman.id.au wrote:
Ideally your commit subject would contain a verb, preferably in the present
tense.
I think simply perf: Add PERF_SAMPLE_BRANCH_COND would be clearer.
Sure, will change it.
On Wed, 2013-16-10 at 06:56:48 UTC, Anshuman Khandual wrote
On 11/26/2013 11:36 AM, m...@ellerman.id.au wrote:
On Wed, 2013-16-10 at 06:56:49 UTC, Anshuman Khandual wrote:
Enables conditional branch filter support for POWER8
utilizing MMCRA register based filter and also invalidates
a BHRB branch filter combination involving conditional
branches
On 11/26/2013 03:45 PM, Anshuman Khandual wrote:
On 11/26/2013 11:36 AM, m...@ellerman.id.au wrote:
Ideally your commit subject would contain a verb, preferably in the present
tense.
I think simply perf: Add PERF_SAMPLE_BRANCH_COND would be clearer.
Sure, will change it.
On Wed, 2013
Adding documentation support for conditional branch filter.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Reviewed-by: Stephane Eranian eran...@google.com
---
tools/perf/Documentation/perf-record.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tools/perf
of instructions.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Reviewed-by: Stephane Eranian eran...@google.com
---
include/uapi/linux/perf_event.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index
This patch adds enumeration for all available SW branch filters
in powerpc book3s code and also streamlines the look for the
SW branch filter entries while trying to figure out which all
branch filters can be supported in SW.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch
This patchset is the re-spin of the original branch stack
sampling
patchset which introduced new PERF_SAMPLE_BRANCH_COND branch filter. This
patchset
also enables SW based branch filtering support for book3s powerpc platforms
which
have PMU HW backed branch stack sampling
all. Its the PMU code's responsibility to uphold this protocol to be
able to
conform to the overall OR semantic of perf branch stack sampling
framework.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/perf_event_server.h | 6 +-
arch/powerpc
combinations PMU will pass it on to the SW.
Also the combination of PERF_SAMPLE_BRANCH_ANY_CALL and PERF_SAMPLE_BRANCH_COND
can now be handled in SW, hence we dont error them out anymore.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/power8-pmu.c | 73
This patch simply changes the name of the variable from bhrb_filter to
bhrb_hw_filter in order to add one more variable which will track SW
filters in generic powerpc book3s code which will be implemented in the
subsequent patch.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
where.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/code-patching.h | 30 ++
arch/powerpc/lib/code-patching.c | 54 ++--
2 files changed, 82 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include
Enables conditional branch filter support for POWER8
utilizing MMCRA register based filter and also invalidates
any BHRB branch filter combination.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/power8-pmu.c | 10 ++
1 file changed, 10 insertions
Adding perf record support for new branch stack filter criteria
PERF_SAMPLE_BRANCH_COND.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Reviewed-by: Stephane Eranian eran...@google.com
---
tools/perf/builtin-record.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/perf
This patch adds conditional branch filtering support,
enabling it for PERF_SAMPLE_BRANCH_COND in perf branch
stack sampling framework by utilizing an available
software filter X86_BR_JCC.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Reviewed-by: Stephane Eranian eran...@google.com
On 02/19/2014 09:36 PM, Sudeep Holla wrote:
From: Sudeep Holla sudeep.ho...@arm.com
This patch removes the redundant sysfs cacheinfo code by making use of
the newly introduced generic cacheinfo infrastructure.
Signed-off-by: Sudeep Holla sudeep.ho...@arm.com
Cc: Benjamin Herrenschmidt
On 03/07/2014 09:36 AM, Anshuman Khandual wrote:
On 02/19/2014 09:36 PM, Sudeep Holla wrote:
From: Sudeep Holla sudeep.ho...@arm.com
This patch removes the redundant sysfs cacheinfo code by making use of
the newly introduced generic cacheinfo infrastructure.
Signed-off-by: Sudeep Holla
Adding perf record support for new branch stack filter criteria
PERF_SAMPLE_BRANCH_COND.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Reviewed-by: Stephane Eranian eran...@google.com
---
tools/perf/builtin-record.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/perf
This patch introduces new branch filter PERF_SAMPLE_BRANCH_COND which
will extend the existing perf ABI. Various architectures can provide
this functionality with either with HW filtering support (if present)
or with SW filtering of captured branch instructions.
Signed-off-by: Anshuman Khandual
...@kernel.crashing.org
Cc: Michael Ellerman mich...@ellerman.id.au
Cc: Peter Zijlstra a.p.zijls...@chello.nl
Anshuman Khandual (4):
perf: Add PERF_SAMPLE_BRANCH_COND
perf, tool: Conditional branch filter 'cond' added to perf record
x86, perf: Add conditional branch filtering support
perf
Adding documentation support for conditional branch filter.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Reviewed-by: Stephane Eranian eran...@google.com
---
tools/perf/Documentation/perf-record.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tools/perf
This patch adds conditional branch filtering support,
enabling it for PERF_SAMPLE_BRANCH_COND in perf branch
stack sampling framework by utilizing an available
software filter X86_BR_JCC.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Reviewed-by: Stephane Eranian eran...@google.com
On 03/10/2014 04:42 PM, Sudeep Holla wrote:
Hi Anshuman,
On 07/03/14 06:14, Anshuman Khandual wrote:
On 03/07/2014 09:36 AM, Anshuman Khandual wrote:
On 02/19/2014 09:36 PM, Sudeep Holla wrote:
From: Sudeep Holla sudeep.ho...@arm.com
This patch removes the redundant sysfs cacheinfo code
On 05/06/2013 04:41 PM, Michael Neuling wrote:
Anshuman Khandual khand...@linux.vnet.ibm.com wrote:
Fixing some conditions during BHRB entry processing.
I think we can simplify this a lot more... something like the below.
I feel that the conditional handling of the invalid BHRB entries
AFAICT, Power7 supports one extra level in the cache-hierarchy, so we propose
to add a new cache level, REM_CCE3 shown above.
To maintain consistency in terminology (i.e 2-hops = remote, 3-hops =
distant),
I propose leaving the REM_MEM1 unused and adding another level, REM_MEM3.
Fixing some conditions during BHRB entry processing.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/core-book3s.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
The 'to' field inside branch entries might contain stale values from previous
PMU interrupt instances which had indirect branches. So clear all the values
before reading a fresh set of BHRB entries after a PMU interrupt.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch
This patch adds couple of generic functions to power_pmu structure
which would configure the BHRB and it's filters. It also adds
representation of the number of BHRB entries present on the PMU.
A new PMU flag PPMU_BHRB would indicate presence of BHRB feature.
Signed-off-by: Anshuman Khandual
This patch populates BHRB specific data for power_pmu structure. It
also implements POWER8 specific BHRB filter and configuration functions.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/power8-pmu.c | 57 +-
1 file
-deterministic results.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/Makefile | 2 +-
arch/powerpc/perf/bhrb.S | 44
2 files changed, 45 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/perf/bhrb.S
diff
passing to the user space. This also enables
processing of BHRB data and converts them into generic perf branch
stack data format.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/perf_event_server.h | 1 +
arch/powerpc/perf/core-book3s.c
the value which was
read from the buffer entry.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/ppc-opcode.h | 8
1 file changed, 8 insertions(+)
diff --git a/arch/powerpc/include/asm/ppc-opcode.h
b/arch/powerpc/include/asm/ppc-opcode.h
index 8752bc8
from perf_event_bhrb.c into
core-book3s.c
- Improved documentation for the patchset
Changes in V4
-
- Incorporated review comments on V3 regarding new instruction encoding
Anshuman Khandual (5):
powerpc, perf: Add new BHRB related instructions for POWER8
powerpc, perf: Add basic
Completely ignore BHRB privilege state filter request as we are
already configuring MMCRA register with privilege state filtering
attribute for the accompanying PMU event. This would help achieve
cleaner user space interaction for BHRB.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
-ring
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.002 MB perf.data (~102 samples) ]
(2) The second patch fixes context migration for BHRB filter configuration
Anshuman Khandual (2):
powerpc, perf: Ignore separate BHRB privilege state filter request
When the task moves around the system, the corresponding cpuhw
per cpu strcuture should be popullated with the BHRB filter
request value so that PMU could be configured appropriately with
that during the next call into power_pmu_enable().
Signed-off-by: Anshuman Khandual khand
of instructions.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
include/uapi/linux/perf_event.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index fb104e5..cb0de86 100644
--- a/include/uapi/linux
Adding documentation support for conditional branch filter.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/perf/Documentation/perf-record.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tools/perf/Documentation/perf-record.txt
b/tools/perf
Enables conditional branch filter support for POWER8
utilizing MMCRA register based filter and also invalidates
a BHRB branch filter combination involving conditional
branches.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/power8-pmu.c | 10 ++
1 file
-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/x86/kernel/cpu/perf_event_intel_lbr.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
index d978353..a0d6387 100644
--- a/arch/x86/kernel/cpu
Adding perf record support for new branch stack filter criteria
PERF_SAMPLE_BRANCH_COND.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/perf/builtin-record.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
This patchset introduces conditional branch filter in perf branch stack
sampling framework incorporating review comments from Michael Neuling,
Peter Zijlstra and Stephane Eranian.
Anshuman Khandual (5):
perf: New conditional branch filter criteria in branch stack sampling
powerpc, perf
On 05/21/2013 07:25 PM, Stephane Eranian wrote:
On Thu, May 16, 2013 at 12:15 PM, Michael Neuling mi...@neuling.org wrote:
Peter Zijlstra pet...@infradead.org wrote:
On Wed, May 15, 2013 at 03:37:22PM +0200, Stephane Eranian wrote:
On Fri, May 3, 2013 at 2:11 PM, Peter Zijlstra
Your description from patch 0 should be here.
Sure, will bring it here.
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index f7d1c4f..8ed323d 100644
--- a/arch/powerpc/perf/power8-pmu.c
+++ b/arch/powerpc/perf/power8-pmu.c
@@ -525,16 +525,17 @@ static u64
On 05/22/2013 05:53 PM, Stephane Eranian wrote:
Hi,
On Wed, May 22, 2013 at 8:43 AM, Anshuman Khandual
khand...@linux.vnet.ibm.com wrote:
On 05/21/2013 07:25 PM, Stephane Eranian wrote:
On Thu, May 16, 2013 at 12:15 PM, Michael Neuling mi...@neuling.org wrote:
Peter Zijlstra pet
On 05/22/2013 02:29 PM, Anshuman Khandual wrote:
Your description from patch 0 should be here.
Does it sound better ?
- if ((br_privilege != 7) (br_privilege != 0))
- return -1;
+
+ if (br_privilege)
+ pr_info(BHRB privilege state filter request %llx ignored\n
On 09/26/2013 04:44 PM, Stephane Eranian wrote:
So you are saying that the HW filter is exclusive. That seems odd. But
I think it is
because of the choices is ANY. ANY covers all the types of branches. Therefore
it does not make a difference whether you add COND or not. And
vice-versa, if you
# PERF_SAMPLE_BRANCH_ANY_RET
Changes in V2
--
(1) Enabled PPC64 SW branch filtering support
(2) Incorporated changes required for all previous comments
Anshuman Khandual (6
Adding documentation support for conditional branch filter.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Reviewed-by: Stephane Eranian eran...@google.com
---
tools/perf/Documentation/perf-record.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tools/perf
This patch adds conditional branch filtering support,
enabling it for PERF_SAMPLE_BRANCH_COND in perf branch
stack sampling framework by utilizing an available
software filter X86_BR_JCC.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Reviewed-by: Stephane Eranian eran...@google.com
) bctarl
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/perf_event_server.h | 2 +-
arch/powerpc/perf/core-book3s.c | 200 +--
arch/powerpc/perf/power8-pmu.c | 19 ++-
3 files changed, 198 insertions
of instructions.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Reviewed-by: Stephane Eranian eran...@google.com
---
include/uapi/linux/perf_event.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index
Adding perf record support for new branch stack filter criteria
PERF_SAMPLE_BRANCH_COND.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/perf/builtin-record.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
Enables conditional branch filter support for POWER8
utilizing MMCRA register based filter and also invalidates
a BHRB branch filter combination involving conditional
branches.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/power8-pmu.c | 10 ++
1 file
On 08/30/2013 05:18 PM, Stephane Eranian wrote:
2013/8/30 Anshuman Khandual khand...@linux.vnet.ibm.com
This patchset is the re-spin of the original branch stack sampling
patchset which introduced new PERF_SAMPLE_BRANCH_COND filter. This patchset
also enables SW based branch
On 08/30/2013 05:18 PM, Stephane Eranian wrote:
2013/8/30 Anshuman Khandual khand...@linux.vnet.ibm.com
This patchset is the re-spin of the original branch stack sampling
patchset which introduced new PERF_SAMPLE_BRANCH_COND filter. This patchset
also enables SW based branch
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