anatop module have sereval configurations for user
to reduce the power consumption in suspend, provide
suspend/resume interface for further use and enable
fet_odrive to reduce CORE LDO leakage during suspend.
Signed-off-by: Anson Huang
---
arch/arm/mach-imx/Kconfig |4
arch/arm
enable periphery charge pump for well biasing
at suspend to reduce periphery leakage.
Signed-off-by: Anson Huang
---
arch/arm/mach-imx/clk-imx6q.c | 22 +-
arch/arm/mach-imx/common.h|4 ++--
arch/arm/mach-imx/pm-imx6q.c |4 +++-
3 files changed, 26 insertions
RBC setting is changed.
Signed-off-by: Anson Huang
---
arch/arm/mach-imx/anatop.c| 19 +++
arch/arm/mach-imx/clk-imx6q.c | 35 +++
arch/arm/mach-imx/common.h|3 +++
arch/arm/mach-imx/gpc.c | 21 -
arch/arm
On Wed, Mar 20, 2013 at 03:29:33PM +0800, Shawn Guo wrote:
> On Wed, Mar 20, 2013 at 01:39:38PM -0400, Anson Huang wrote:
> > anatop module have sereval configurations for user
> > to reduce the power consumption in suspend, provide
> > suspend/resume interface for f
n Wed, Mar 20, 2013 at 01:39:39PM -0400, Anson Huang wrote:
> > enable periphery charge pump for well biasing
> > at suspend to reduce periphery leakage.
> >
> > Signed-off-by: Anson Huang
> > ---
> > arch/arm/mach-imx/clk-imx6q.c | 22 +-
On Wed, Mar 20, 2013 at 05:01:19PM +0800, Shawn Guo wrote:
> On Wed, Mar 20, 2013 at 01:39:40PM -0400, Anson Huang wrote:
> > RBC is to control whether some ANATOP sub modules
> > can enter lpm mode when SOC is into STOP mode, if
> > RBC is enabled and PMIC_VSTBY_REQ is set,
[26-27]: vddpu
bit [28-29]: vddsoc
field definition:
0'b00: 64 cycles of 24M clock;
0'b01: 128 cycles of 24M clock;
0'b02: 256 cycles of 24M clock;
0'b03: 512 cycles of 24M clock;
Signed-off-by: Anson Huang
---
drivers/regulator/anatop-regulator.c | 42 +++
[26-27]: vddpu
bit [28-29]: vddsoc
field definition:
0'b00: 64 cycles of 24M clock;
0'b01: 128 cycles of 24M clock;
0'b02: 256 cycles of 24M clock;
0'b03: 512 cycles of 24M clock;
Signed-off-by: Anson Huang
---
.../bindings/regulator/anatop-regulator.txt|6 +++
d
-27]: vddpu
bit [28-29]: vddsoc
field definition:
0'b00: 64 cycles of 24M clock;
0'b01: 128 cycles of 24M clock;
0'b02: 256 cycles of 24M clock;
0'b03: 512 cycles of 24M clock;
Signed-off-by: Anson Huang
---
.../bindings/regulator/anatop-regulator.txt|8
d
-27]: vddpu
bit [28-29]: vddsoc
field definition:
0'b00: 64 cycles of 24M clock;
0'b01: 128 cycles of 24M clock;
0'b02: 256 cycles of 24M clock;
0'b03: 512 cycles of 24M clock;
Signed-off-by: Anson Huang
---
.../bindings/regulator/anatop-regulator.txt|8
d
On Wed, Jan 30, 2013 at 02:30:47PM -0700, Troy Kisky wrote:
> On 1/30/2013 3:37 PM, Anson Huang wrote:
> >some of anatop's regulators(vppcpu, vddpu and vddsoc) have
> >register settings about LDO's step time, which will impact
> >the LDO ramp up speed, need to use se
Fix build error when CONFIG_SOC_IMX6SX is disabled,
as i.MX6UL reuses i.MX6SX's cpuidle driver.
arch/arm/mach-imx/built-in.o: In function `imx6ul_init_late':
platform-spi_imx.c:(.init.text+0x445c): undefined reference to
`imx6sx_cpuidle_init'
make: *** [vmlinux] Error 1
Signe
Sorry, please ignore this patch, Arnd Bergmann has summited a
patch to fix this issue.
Best Regards!
Anson Huang
> -Original Message-
> From: linux-arm-kernel [mailto:linux-arm-kernel-boun...@lists.infradead.org]
> On Behalf Of Anson Huang
> Sent: 2016-09-07 6:31 PM
>
if to flush L2 when entering idle with ARM power off,
this is different from i.MX6SX which has PL310 external
L2 cache.
Signed-off-by: Anson Huang
---
arch/arm/mach-imx/cpuidle-imx6sx.c | 10 ++
arch/arm/mach-imx/mach-imx6ul.c| 3 +++
2 files changed, 13 insertions(+)
diff --git a/arc
i.MX7D has 2 Cortex-A7 ARM cores, and it has a different GPC design
than i.MX6, so this patch set adds a new GPCV2 driver for i.MX7D,
and also adds runtime check in SMP code to support both Cortex-A9
and Cortex-A7 ARM cores.
With this patch set, i.MX7D can boot up SMP kernel with 2 CPUs.
Anson
e to
arch timer.
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx7s.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index bb7102c..e920436 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@
-a7.
Signed-off-by: Anson Huang
---
arch/arm/mach-imx/headsmp.S| 11 +++
arch/arm/mach-imx/mach-imx7d.c | 2 ++
arch/arm/mach-imx/platsmp.c| 19 ++-
arch/arm/mach-imx/src.c| 38 ++
4 files changed, 61 insertions(+), 9
i.MX7's GPC(general power controller) module is
different from i.MX6, name it as GPCV2 and add
its driver for SMP support, as secondary CPUs
boot up will need GPC to enable power.
Signed-off-by: Anson Huang
---
arch/arm/mach-imx/Kconfig | 4 +++
arch/arm/mach-imx/Makefile | 1 +
arc
i.MX is a SoC rather than a CPU, so for those names
of cpu_is_xxx and cpu_type etc., better to use soc_is_xxx
and soc_type etc. instead, this patch improves these names.
Signed-off-by: Anson Huang
---
arch/arm/mach-imx/anatop.c | 6 ++---
arch/arm/mach-imx/common.h | 2 +-
arch/arm
off: probe of 3037.snvs:snvs-poweroff failed
with error -16
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx7s.dtsi | 8
1 file changed, 8 deletions(-)
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index a052198..a072e7f 100644
--- a/arch/arm/boot/dts/
domain driver, thus make
gpcv2 pgc driver more generic for i.MX platforms.
Signed-off-by: Anson Huang
---
drivers/soc/imx/gpcv2.c | 68 +
1 file changed, 40 insertions(+), 28 deletions(-)
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/g
gpcv2 driver is NOT just used on i.MX7D which has Cortex-A7
cores, but also on i.MX8MQ/i.MX8MM platforms which use Cortex-A53
cores, so let's use A_CORE instread of A7 to avoid confusion.
Signed-off-by: Anson Huang
---
drivers/soc/imx/gpcv2.c | 20 ++--
1 file change
On i.MX7D, IMX7D_NAND_USDHC_BUS_ROOT_CLK is NOT necessary
for system, and IMX7D_AHB_CHANNEL_ROOT_CLK is NOT existing
at all, remove them from clks_init_on array.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk-imx7d.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a
Clock framework will enable those clocks registered
with CLK_IS_CRITICAL flag, so no need to have
clks_init_on array during clock initialization now.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk-imx7d.c | 27 ---
drivers/clk/imx/clk.h | 7 +++
2 files
i.MX6SLL has HW bus auto clock gating function, enable
it by default to save VDD_SOC_IN power, about 5% ~ 20%
saved depends on different use cases.
Signed-off-by: Anson Huang
---
arch/arm/mach-imx/pm-imx6.c | 11 +--
include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 3
On i.MX6SLL EVK board, PFuze100's SW4 is supplying
LPDDR3, it needs to be always on. This patch fixes
Linux kernel boot up hang caused by SW4 being turned
off:
[1.693613] cfg80211: failed to load regulatory.db
[1.700063] SW4: disabling
[1.703973] SWBST: disabling
Signed-off-by:
i.MX6SLL has GPIO clock gates in CCM CCGR, add
clock property for GPIO driver to make sure all
GPIO banks work as expected.
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx6sll.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts
According to Reference Manual Rev.0, 06/2017,
there are GPIO LPCGs defined in CCM CCGRs,
add them into clock tree.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk-imx6sll.c | 6 ++
include/dt-bindings/clock/imx6sll-clock.h | 9 -
2 files changed, 14 insertions(+), 1
Gentle Ping...
Anson Huang
Best Regards!
> -Original Message-
> From: Anson Huang
> Sent: Sunday, June 3, 2018 9:44 AM
> To: shawn...@kernel.org; ker...@pengutronix.de; Fabio Estevam
> ; robh...@kernel.org; mark.rutl...@arm.com;
> mturque...@baylibre.com; sb...@
Gentle Ping...
Anson Huang
Best Regards!
> -Original Message-
> From: Anson Huang
> Sent: Sunday, June 3, 2018 11:01 AM
> To: shawn...@kernel.org; ker...@pengutronix.de; Fabio Estevam
> ; mturque...@baylibre.com; sb...@kernel.org
> Cc: dl-linux-imx ; linux-arm-ker...@l
Acked-by: Anson Huang
I also saw such issue on i.MX6SLL evk board, and also sent out patch for
i.MX6SLL.
Anson Huang
Best Regards!
> -Original Message-
> From: Robin Gong
> Sent: Monday, June 25, 2018 8:34 PM
> To: shawn...@kernel.org; ker...@pengutronix.de; Fabio Este
Hi, Andrey
Anson Huang
Best Regards!
> -Original Message-
> From: Andrey Smirnov
> Sent: Tuesday, August 28, 2018 7:04 AM
> To: Anson Huang
> Cc: Shawn Guo ; Sascha Hauer
> ; Sascha Hauer ; Fabio
> Estevam ; linux-arm-kernel
> ; linux-kernel
> ; dl-linux-imx
Anson Huang
Best Regards!
> -Original Message-
> From: Andrey Smirnov
> Sent: Tuesday, August 28, 2018 6:51 AM
> To: Anson Huang
> Cc: Shawn Guo ; Sascha Hauer
> ; Sascha Hauer ; Fabio
> Estevam ; linux-arm-kernel
> ; linux-kernel
> ; dl-linux-imx
> Sub
Anson Huang
Best Regards!
> -Original Message-
> From: Andrey Smirnov
> Sent: Tuesday, August 28, 2018 4:01 PM
> To: Anson Huang
> Cc: Shawn Guo ; Sascha Hauer
> ; Sascha Hauer ; Fabio
> Estevam ; linux-arm-kernel
> ; linux-kernel
> ; dl-linux-imx
> Sub
gpcv2 driver is NOT just used on i.MX7D which has Cortex-A7
cores, but also on i.MX8MQ/i.MX8MM platforms which use Cortex-A53
cores, so let's use A_CORE instread of A7 to avoid confusion.
Signed-off-by: Anson Huang
Acked-by: Andrey Smirnov
---
no change since V1.
drivers/soc/imx/gpcv2.c
ata for power domain
driver, thus make gpcv2 pgc driver more generic for i.MX
platforms.
Signed-off-by: Anson Huang
Acked-by: Andrey Smirnov
---
changes since V1:
use .data in imx_gpcv2_dt_ids[] instead of calling
of_machine_is_compatible() for different platforms support.
dri
Hi, Shawn
I saw v4.19-rc1 is created, can you please apply this patch?
Anson Huang
Best Regards!
> -Original Message-
> From: Shawn Guo
> Sent: Thursday, July 12, 2018 10:52 AM
> To: Anson Huang
> Cc: s.ha...@pengutronix.de; ker...@pengutronix.de; Fabio E
This patch enables i.MX7D SDB board's below GPIO buttons
as wakeup sources:
S1(FUNC1): KEY_VOLUMEUP
S3(FUNC2): KEY_VOLUMEDOWN
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx7d-sdb.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boo
Enable cpuidle for i.MX7S/D using generic ARM cpuidle
driver, below 2 idle states enabled:
1. ARM WFI;
2. SoC WAIT mode.
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx7d.dtsi | 1 +
arch/arm/boot/dts/imx7s.dtsi | 14 ++
2 files changed, 15 insertions(+)
diff --git a/arch
Some i.MX platforms like i.MX7S/D uses generic ARM cpuidle
driver and psci method to support cpuidle feature, select
CONFIG_ARM_CPUIDLE by default for such platforms.
Signed-off-by: Anson Huang
---
arch/arm/configs/imx_v6_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm
Add i.mx8mq specific compatible string.
Signed-off-by: Anson Huang
---
Documentation/devicetree/bindings/thermal/qoriq-thermal.txt | 6 +++---
drivers/thermal/qoriq_thermal.c | 1 +
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/Documentation
Update i.MX6ULL iomux header according to latest reference
manual Rev.1, 11/2017.
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx6ull-pinfunc.h | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6ull-pinfunc.h
b/arch/arm/boot
This patch enables i.MX6SX SDB board's below GPIO buttons
as wakeup sources:
SW4(FUNC1): KEY_VOLUMEUP
SW5(FUNC2): KEY_VOLUMEDOWN
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx6sx-sdb.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi
b/arc
The i.MX7 SRC's compatible string should be "fsl,imx7d-src".
Signed-off-by: Anson Huang
---
Documentation/devicetree/bindings/reset/fsl,imx7-src.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt
Anson Huang
Best Regards!
> -Original Message-
> From: Peng Fan
> Sent: Wednesday, August 8, 2018 4:49 PM
> To: Anson Huang ; shawn...@kernel.org;
> s.ha...@pengutronix.de; ker...@pengutronix.de; Fabio Estevam
> ; mturque...@baylibre.com; sb...@kernel.or
On some i.MX SoCs' low power mode, UART iomux settings
may be lost, need to add pinctrl sleep/default mode switch
during suspend/resume to make sure UART iomux settings are
correct after resume.
Signed-off-by: Anson Huang
---
drivers/tty/serial/imx.c | 5 +
1 file changed, 5 inser
operations.
Signed-off-by: Anson Huang
---
drivers/tty/serial/imx.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index 239c0fa..a09ccef 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -2376,9 +2376,12
Hi, Peng
Anson Huang
Best Regards!
> -Original Message-
> From: Peng Fan
> Sent: Monday, August 13, 2018 9:16 AM
> To: Anson Huang ; shawn...@kernel.org;
> s.ha...@pengutronix.de; ker...@pengutronix.de; Fabio Estevam
> ; mturque...@baylibre.com; sb...@kernel.or
i.MX6ULL is a lite version of i.MX6UL, its full name
is i.MX6 UltraLiteLite, NOT UlltraLite.
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx6ull-14x14-evk.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6ull-14x14-evk.dts
b/arch/arm/boot/dts
Hi, Stefan
Anson Huang
Best Regards!
> -Original Message-
> From: Stefan Wahren
> Sent: Thursday, August 23, 2018 2:53 PM
> To: Anson Huang ; shawn...@kernel.org;
> s.ha...@pengutronix.de; ker...@pengutronix.de; Fabio Estevam
> ; robh...@kernel.org; mark.rutl...@ar
Hi, Sacha
Anson Huang
Best Regards!
> -Original Message-
> From: Sascha Hauer
> Sent: Thursday, August 23, 2018 2:57 PM
> To: Anson Huang
> Cc: shawn...@kernel.org; ker...@pengutronix.de; Fabio Estevam
> ; robh...@kernel.org; mark.rutl...@arm.co
This patch adds missing compatible for i.MX boards.
Signed-off-by: Anson Huang
---
Documentation/devicetree/bindings/arm/fsl.txt | 40 +++
1 file changed, 40 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt
b/Documentation/devicetree/bindings
i.MX6ULL is a lite version of i.MX6UL, its full name
is i.MX6 UltraLiteLite, NOT UlltraLite.
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx6ull-14x14-evk.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6ull-14x14-evk.dts
b/arch/arm/boot/dts
Gentle Ping...
Anson Huang
Best Regards!
> -Original Message-
> From: Anson Huang
> Sent: Tuesday, July 31, 2018 12:57 AM
> To: rui.zh...@intel.com; edubez...@gmail.com; linux...@vger.kernel.org;
> linux-kernel@vger.kernel.org
> Cc: dl-linux-imx ; Nitin Garg
> Sub
both active and
passive mode, this patch clears the passive_delay when thermal
zone is disabled and restores it when it is enabled.
Signed-off-by: Anson Huang
---
drivers/thermal/of-thermal.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/of-thermal.c
oves it.
Fixes: b97872d4eb22 ("ARM: dts: imx: Add missing OPP properties for CPUs")
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx7d.dtsi | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 9a772fc..7cbc2ff 10
Hi, Shawn
Anson Huang
Best Regards!
> -Original Message-
> From: Shawn Guo [mailto:shawn...@kernel.org]
> Sent: Thursday, July 19, 2018 11:20 AM
> To: Anson Huang ; Viresh Kumar
>
> Cc: s.ha...@pengutronix.de; ker...@pengutronix.de; Fabio Estevam
> ; robh...@
Add "gpio-ranges" property to establish connections between GPIOs
and PINs on i.MX6SLL pinctrl driver, for details, please refer to
Documentation/devicetree/bindings/gpio/gpio.txt of "gpio-ranges"
property.
Signed-off-by: Anson Huang
---
arch/arm/boot/d
The i.MX7ULP B0 chip has some pin changes for USB and VIU
module, update pinfunc header file accordingly.
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx7ulp-pinfunc.h | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx7ulp-pinfunc.h
Let me know your thoughts, thanks!
Anson Huang
Best Regards!
> -----Original Message-
> From: Anson Huang
> Sent: Wednesday, June 27, 2018 9:31 AM
> To: shawn...@kernel.org; s.ha...@pengutronix.de; ker...@pengutronix.de;
> Fabio Estevam ; robh...@kernel.org;
> mark.ru
On i.MX6SL EVK board, the MX6SL_PAD_KEY_ROW5 pin is
used as lcd 3v3 regulator control pin, need to make
sure MX6SL_PAD_KEY_ROW5 is muxed as GPIO function
for controlling lcd 3v3 regulator.
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx6sl-evk.dts | 1 +
1 file changed, 1 insertion
On i.MX6SLL EVK board, lcd regulator is controlled
by GPIO4 IO03 using MX6SLL_PAD_KEY_ROW5__GPIO4_IO03 pin,
NOT MX6SLL_PAD_ECSPI1_SCLK__GPIO4_IO08, correct it.
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx6sll-evk.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Enable pwm1 module on i.MX6SLL EVK board to make
backlight driver really work with LCD panel connected.
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx6sll-evk.dts | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sll-evk.dts
b/arch/arm/boot/dts
Enable SEIKO 43WVF1G lcdif panel for DRM driver,
add necessary properties according to SEIKO 43WVF1G
driver's requirement, such as "dvdd-supply", "avdd-supply"
and "backlight" etc..
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx6sll-evk.dts | 76 +++
Hi, Fabio
Anson Huang
Best Regards!
> -Original Message-
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: Saturday, July 14, 2018 2:34 AM
> To: Anson Huang
> Cc: Linus Walleij ; open list:GPIO SUBSYSTEM
> ; linux-kernel ;
> dl-linux-imx
> Subject: Re
On i.MX6SL EVK board, the MX6SL_PAD_KEY_ROW5 pin is
used as lcd 3v3 regulator control pin, need to make
sure MX6SL_PAD_KEY_ROW5 is muxed as GPIO function
for controlling lcd 3v3 regulator.
Signed-off-by: Anson Huang
---
change since V1:
using a separate pin group for lcd regulator
: acf4004a DAC: 0051
[ 108.568491] Process cat (pid: 389, stack limit = 0xd4318a65)
[ 108.574174] Stack: (0xeccf1d98 to 0xeccf2000)
Signed-off-by: Anson Huang
---
drivers/soc/imx/gpc.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/soc/imx/gpc.c b/drivers/soc
save/restore operations in noirq
suspend/resume phase, since GPIO is fundamental module
which could be used by other peripherals' resume phase.
Signed-off-by: Anson Huang
---
changes since V1:
Add condition check to make it only work for i.MX7D which GPIO might
lost power.
drivers
Hi, Fabio
Anson Huang
Best Regards!
> -Original Message-
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: Sunday, July 15, 2018 12:13 AM
> To: Anson Huang
> Cc: Linus Walleij ; open list:GPIO SUBSYSTEM
> ; linux-kernel ;
> dl-linux-imx
> Subject: Re
According to latest reference manual (Rev.2, 9/2017),
previous CKO1/2's mux options are incorrect, update
them.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk-imx6sx.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/imx/clk-imx6sx.c b/dr
-Original Message-
From: Dong Aisheng [mailto:donga...@gmail.com]
Sent: 2018年1月25日 23:30
To: Anson Huang
Cc: shawn...@kernel.org; ker...@pengutronix.de; Fabio Estevam
; robh...@kernel.org; A.s. Dong ;
mark.rutl...@arm.com; li...@armlinux.org.uk; dl-linux-imx ;
linux-arm-ker
-Original Message-
From: Dong Aisheng [mailto:donga...@gmail.com]
Sent: 2018年1月26日 15:00
To: Anson Huang
Cc: rui.zh...@intel.com; edubez...@gmail.com; robh...@kernel.org;
mark.rutl...@arm.com; shawn...@kernel.org; ker...@pengutronix.de; Fabio Estevam
; li...@armlinux.org.uk; Jacky
Add i.MX7 temperature monitor support.
Signed-off-by: Anson Huang
---
.../devicetree/bindings/thermal/imx-thermal.txt | 5 +++--
arch/arm/boot/dts/imx7s.dtsi | 20
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/Documentation
OCOTP offset 0x4F0, bit[17:9], the
formula is as below:
Tmeas = (Nmeas - n1) + 25; n1 is the fuse value for 25C.
Signed-off-by: Anson Huang
Signed-off-by: Bai Ping
---
drivers/thermal/imx_thermal.c | 315 +-
1 file changed, 247 insertions(+), 68 deletions
Add PU power domain support, GPU is the only
module inside PU power domain, and PU power
is supplied by LDO_SOC.
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx6sx.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
Add ARM power domain in PGC.
Signed-off-by: Anson Huang
---
this patch should be based on
0001-ARM-dts-imx6sx-add-pu-power-domain-support.patch
arch/arm/boot/dts/imx6sx.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
runtime status
--
ARM on
Signed-off-by: Anson Huang
---
drivers/soc/imx/gpc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/imx/gpc.c b/drivers/soc
Add 696MHz operating point according to datasheet
(Rev. 0, 12/2015).
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx6ul.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index d5181f8..963e169 100644
--- a/arch/arm/boot
d-off-by: Anson Huang
---
changes since v1:
redo the patch based on linux-next-pm.
drivers/cpufreq/imx6q-cpufreq.c | 46 -
1 file changed, 45 insertions(+), 1 deletion(-)
diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
Hi, Rafael
Best Regards!
Anson Huang
> -Original Message-
> From: rjwyso...@gmail.com [mailto:rjwyso...@gmail.com] On Behalf Of Rafael
> J. Wysocki
> Sent: 2018-01-05 8:21 PM
> To: Anson Huang
> Cc: linux-arm-ker...@lists.infradead.org; devicet...@vger.kernel.org;
Best Regards!
Anson Huang
> -Original Message-
> From: Rafael J. Wysocki [mailto:r...@rjwysocki.net]
> Sent: 2018-01-08 7:34 AM
> To: Anson Huang
> Cc: Rafael J. Wysocki ; linux-arm-
> ker...@lists.infradead.org; devicet...@vger.kernel.org; Linux PM p...@vger.
Add 696MHz operating point according to datasheet
(Rev. 0, 12/2015).
Signed-off-by: Anson Huang
Reviewed-by: Fabio Estevam
---
changes since v2:
add reviewed-by.
arch/arm/boot/dts/imx6ul.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm
d-off-by: Anson Huang
Reviewed-by: Fabio Estevam
---
changes since v2:
add reviewed-by.
drivers/cpufreq/imx6q-cpufreq.c | 46 -
1 file changed, 45 insertions(+), 1 deletion(-)
diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpuf
Add i.MX7 temperature monitor support.
Signed-off-by: Anson Huang
Acked-by: Dong Aisheng
---
no changes since V1.
.../devicetree/bindings/thermal/imx-thermal.txt | 5 +++--
arch/arm/boot/dts/imx7s.dtsi | 20
2 files changed, 23 insertions
OCOTP offset 0x4F0, bit[17:9], the
formula is as below:
Tmeas = (Nmeas - n1) + 25; n1 is the fuse value for 25C.
Signed-off-by: Anson Huang
Signed-off-by: Bai Ping
---
changes since V1:
1. remove MX7 operation in imx_set_panic_temp since MX7 does NOT
support it;
2. add const for
Best Regards!
Anson Huang
> -Original Message-
> From: Dong Aisheng [mailto:donga...@gmail.com]
> Sent: 2018-01-08 6:39 PM
> To: Anson Huang
> Cc: linux-arm-ker...@lists.infradead.org; linux-...@vger.kernel.org; linux-
> ker...@vger.kernel.org; devicet...@vger.kernel
Best Regards!
Anson Huang
> -Original Message-
> From: Dong Aisheng [mailto:donga...@gmail.com]
> Sent: 2018-01-09 10:17 AM
> To: Anson Huang
> Cc: linux-arm-ker...@lists.infradead.org; linux-...@vger.kernel.org; linux-
> ker...@vger.kernel.org; devicet...@vger.ke
Add i.MX7 SNVS RTC clock.
Signed-off-by: Anson Huang
---
changes since v1:
update snvs lp rtc binding-doc for clock info.
Documentation/devicetree/bindings/crypto/fsl-sec4.txt | 16
arch/arm/boot/dts/imx7s.dtsi | 2 ++
2 files changed, 18
According to the i.MX7D Reference Manual,
SNVS block has a clock gate, accessing SNVS block
would need this clock gate to be enabled, add it
into clock tree so that SNVS module driver can
operate this clock gate.
Signed-off-by: Anson Huang
---
no changes since v1.
drivers/clk/imx/clk-imx7d.c
Best Regards!
Anson Huang
> -Original Message-
> From: Dong Aisheng [mailto:donga...@gmail.com]
> Sent: 2018-01-09 5:23 PM
> To: Stefan Agner
> Cc: shawn...@kernel.org; ker...@pengutronix.de; Fabio Estevam
> ; robh...@kernel.org; mark.rutl...@arm.co
Best Regards!
Anson Huang
> -Original Message-
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: 2018-01-09 5:27 PM
> To: Anson Huang
> Cc: Horia Geantă ; Aymen Sghaier
> ; Herbert Xu ;
> David S. Miller ; Rob Herring ;
> Mark Rutland ; Shawn Guo
According to the i.MX7D Reference Manual,
SNVS block has a clock gate, accessing SNVS block
would need this clock gate to be enabled, add it
into clock tree so that SNVS module driver can
operate this clock gate.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk-imx7d.c | 1
Add i.MX7 SNVS RTC clock.
Signed-off-by: Anson Huang
---
changes since v2:
improve the binding doc statement about clocks.
Documentation/devicetree/bindings/crypto/fsl-sec4.txt | 15 +++
arch/arm/boot/dts/imx7s.dtsi | 2 ++
2 files changed, 17
Best Regards!
Anson Huang
> -Original Message-
> From: Dong Aisheng [mailto:donga...@gmail.com]
> Sent: 2018-01-09 5:47 PM
> To: Anson Huang
> Cc: Horia Geantă ; Aymen Sghaier
> ; herb...@gondor.apana.org.au;
> da...@davemloft.net; robh...@kernel.org; mark.rut
Best Regards!
Anson Huang
> -Original Message-
> From: Dong Aisheng [mailto:donga...@gmail.com]
> Sent: 2018-01-09 5:44 PM
> To: Anson Huang
> Cc: Horia Geantă ; Aymen Sghaier
> ; herb...@gondor.apana.org.au;
> da...@davemloft.net; robh...@kernel.org; mark.rut
Add i.MX7 SNVS RTC clock.
Signed-off-by: Anson Huang
---
change since v3:
add optional for clocks in binding doc statement.
Documentation/devicetree/bindings/crypto/fsl-sec4.txt | 17 +
arch/arm/boot/dts/imx7s.dtsi | 2 ++
2 files changed, 19
According to the i.MX7D Reference Manual,
SNVS block has a clock gate, accessing SNVS block
would need this clock gate to be enabled, add it
into clock tree so that SNVS module driver can
operate this clock gate.
Signed-off-by: Anson Huang
Acked-by: Dong Aisheng
Reviewed-by: Fabio Estevam
Add optional clock enable/disable support for the SNVS pwrkey,
which is required for accessing SNVS block on some i.MX SoCs
like i.MX7D.
If SNVS clock is required, it needs to be passed from dtb file
and SNVS pwrkey driver will enable it.
Signed-off-by: Anson Huang
---
drivers/input/keyboard
Ping...
@rui.zh...@intel.com, can you help review this patch?
Anson Huang
Best Regards!
> -Original Message-
> From: linux-arm-kernel [mailto:linux-arm-kernel-boun...@lists.infradead.org]
> On Behalf Of Anson Huang
> Sent: Friday, March 2, 2018 10:00 AM
> To: Leonard C
Different TPM modules have different width counters which
is 16-bit or 32-bit, the counter width can be read from
TPM_PARAM register bit[23:16], this patch adds dynamic
check for counter width to support both 16-bit and 32-bit
TPM modules.
Signed-off-by: Anson Huang
---
drivers/clocksource
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