Re: [RFC] arm64: Early printk support for virtio-mmio console devices.

On 22 April 2013 06:51, Rusty Russell ru...@rustcorp.com.au wrote: Pranavkumar Sawargaonkar pranavku...@linaro.org writes: On 18 April 2013 12:21, Rusty Russell ru...@rustcorp.com.au wrote: PranavkumarSawargaonkar pranavku...@linaro.org writes: From: Pranavkumar Sawargaonkar

Re: [PATCH 1/1] irq-gic: add capability to set bypass flag in GIC

On Wed, Nov 20, 2013 at 4:28 PM, Marc Zyngier marc.zyng...@arm.com wrote: [dropping patc...@apm.com from the CC list, as someone seems to have tripped on the config file, and I'm tired of getting bounces] Feng, On 19/11/13 21:42, Feng Kan wrote: The GIC-400 implementation allows for FIQ

Re: [PATCH 1/1] irq-gic: add capability to set bypass flag in GIC

On Sat, Nov 23, 2013 at 2:11 PM, Anup Patel a...@brainfault.org wrote: On Wed, Nov 20, 2013 at 4:28 PM, Marc Zyngier marc.zyng...@arm.com wrote: [dropping patc...@apm.com from the CC list, as someone seems to have tripped on the config file, and I'm tired of getting bounces] Feng, On 19/11

Re: [PATCH 1/1] irq-gic: add capability to set bypass flag in GIC

(Adding correct Kumar Sankaran to CC. My mistake.) (Adding back patc...@apm.com. It is fixed now). On Mon, Nov 25, 2013 at 2:52 PM, Marc Zyngier marc.zyng...@arm.com wrote: On 23/11/13 08:41, Anup Patel wrote: On Wed, Nov 20, 2013 at 4:28 PM, Marc Zyngier marc.zyng...@arm.com wrote: [dropping

Re: [PATCH 1/1] irq-gic: add capability to set bypass flag in GIC

On Mon, Nov 25, 2013 at 9:13 PM, Rob Herring robherri...@gmail.com wrote: On Sat, Nov 23, 2013 at 2:41 AM, Anup Patel a...@brainfault.org wrote: On Wed, Nov 20, 2013 at 4:28 PM, Marc Zyngier marc.zyng...@arm.com wrote: [dropping patc...@apm.com from the CC list, as someone seems to have

Re: [PATCH 1/1] irq-gic: add capability to set bypass flag in GIC

On Tue, Nov 26, 2013 at 9:05 PM, Rob Herring robherri...@gmail.com wrote: On Mon, Nov 25, 2013 at 10:00 AM, Anup Patel a...@brainfault.org wrote: On Mon, Nov 25, 2013 at 9:13 PM, Rob Herring robherri...@gmail.com wrote: On Sat, Nov 23, 2013 at 2:41 AM, Anup Patel a...@brainfault.org wrote

Re: [PATCH 0/2] Early printk support for virtio console devices.

On Wed, May 1, 2013 at 5:56 AM, Alexander Graf ag...@suse.de wrote: On 30.04.2013, at 02:32, Rusty Russell wrote: Alexander Graf ag...@suse.de writes: Am 29.04.2013 um 05:09 schrieb Rusty Russell ru...@rustcorp.com.au: Alexander Graf ag...@suse.de writes: On 26.04.2013, at 13:04,

Re: [PATCH 0/2] Early printk support for virtio console devices.

On Wed, May 1, 2013 at 7:37 AM, Rusty Russell ru...@rustcorp.com.au wrote: Alexander Graf ag...@suse.de writes: There are not device specific registers in virtio-console. Virtio-console lives behind a virtio bus which doesn't know what these registers are. You're not going to make coherent

Re: [PATCH 0/2] Early printk support for virtio console devices.

On 26 April 2013 17:03, Peter Maydell peter.mayd...@linaro.org wrote: On 26 April 2013 12:19, Alexander Graf ag...@suse.de wrote: MMIO registers are handled by a different layer than the virtio console itself. After the virtio refactoring in QEMU, they will be completely separate drivers.

Re: [PATCH 0/2] Early printk support for virtio console devices.

On 26 April 2013 18:03, Arnd Bergmann a...@arndb.de wrote: On Friday 26 April 2013 17:36:16 Anup Patel wrote: On 26 April 2013 17:03, Peter Maydell peter.mayd...@linaro.org wrote: On 26 April 2013 12:19, Alexander Graf ag...@suse.de wrote: MMIO registers are handled by a different layer than

Re: [PATCH] ARM: KVM: add irqfd and irq routing support

On Fri, May 9, 2014 at 6:15 PM, Eric Auger eric.au...@linaro.org wrote: This patch enables irqfd and irq routing on ARM. It turns on CONFIG_HAVE_KVM_EVENTFD and CONFIG_HAVE_KVM_IRQ_ROUTING irqfd framework enables to assign physical IRQs to guests. 1) user-side uses KVM_IRQFD VM ioctl to

Re: [RFC PATCH 3/9] irqchip: GIC: Convert to EOImode == 1

Hi Marc, On Wed, Jun 25, 2014 at 2:58 PM, Marc Zyngier marc.zyng...@arm.com wrote: So far, GICv2 has been used in with EOImode == 0. The effect of this mode is to perform the priority drop and the deactivation of the interrupt at the same time. While this works perfectly for Linux (we only

Re: [PATCH] arm64: make CONFIG_ZONE_DMA user settable

Mustang the DRAM starts at 0x40. I have tested your patch and the original patch from this thread. Both patches fixes the issue for X-Gene Mustang and Linux-3.16-rc5 happily boots on X-Gene. Can you to send your patch as Linux-3.16-rcX fix? For your patch, you can have: Tested-by: Anup

Re: [PATCH v4 5/6] Documentation: dt-bindings: Add binding info for X-Gene QMTM UIO driver

On Thu, Nov 13, 2014 at 1:15 PM, Ankit Jindal ankit.jin...@linaro.org wrote: This patch adds device tree binding documentation for X-Gene QMTM UIO driver. Signed-off-by: Ankit Jindal ankit.jin...@linaro.org Signed-off-by: Tushar Jagad tushar.ja...@linaro.org ---

RE: [PATCH 0/6] arm64: Simple additions to NS2 DT

Ping ??? Regards, Anup -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/

[PATCH v3 0/2] NAND support for Broadcom NS2 SoC

fore doing nand_scan_ident() in brcmnand_init_cs(). Anup Patel (2): mtd: brcmnand: Force 8bit mode before doing nand_scan_ident() arm64: dts: Add BRCM IPROC NAND DT node for NS2 arch/arm64/boot/dts/broadcom/ns2-svk.dts | 30 -- arch/arm64/boot/dts/broadcom/ns2.dt

[PATCH v3 2/2] arm64: dts: Add BRCM IPROC NAND DT node for NS2

The NAND controller on NS2 SoC is compatible with existing BRCM IPROC NAND driver so let's enable it in NS2 DT and NS2 SVK DT. This patch also fixes use of node labels in ns2-svk.dts. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Review

[PATCH v3 1/2] mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()

is issued. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- drivers/mtd/nand/brcmnand/brcmnand.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/mtd/nand/brcm

RE: [PATCH v3 2/2] arm64: dts: Add BRCM IPROC NAND DT node for NS2

> -Original Message- > From: Ray Jui [mailto:r...@broadcom.com] > Sent: 28 October 2015 06:17 > To: Brian Norris > Cc: Anup Patel; David Woodhouse; Linux MTD; Rob Herring; Pawel Moll; Mark > Rutland; Catalin Marinas; Will Deacon; Sudeep Holla; Ian Campbell; Kumar Gal

RE: [PATCH v3 1/2] mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()

> -Original Message- > From: Brian Norris [mailto:computersforpe...@gmail.com] > Sent: 28 October 2015 05:45 > To: Anup Patel > Cc: David Woodhouse; Linux MTD; Rob Herring; Pawel Moll; Mark Rutland; > Catalin Marinas; Will Deacon; Sudeep Holla; Ian Campbell; Kumar Gala

[PATCH v4 3/3] arm64: dts: Add BRCM IPROC NAND DT node for NS2

The NAND controller on NS2 SoC is compatible with existing BRCM IPROC NAND driver so let's enable it in NS2 DT and NS2 SVK DT. This patch also fixes use of node labels in ns2-svk.dts. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Review

[PATCH v4 1/3] mtd: brcmnand: factor out CFG and CFG_EXT bitfields

From: Brian Norris <computersforpe...@gmail.com> Use enum instead of magic numbers for CFG and CFG_EXT bitfields. Signed-off-by: Brian Norris <computersforpe...@gmail.com> Tested-by: Anup Patel <anup.pa...@broadcom.com> --- drivers/mtd/nand/brcmna

RE: [PATCH v4 2/3] mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()

> -Original Message- > From: Anup Patel [mailto:anup.pa...@broadcom.com] > Sent: 30 October 2015 11:49 > To: David Woodhouse; Brian Norris; Linux MTD > Cc: Rob Herring; Pawel Moll; Mark Rutland; Catalin Marinas; Will Deacon; > Sudeep Holla; Ian Campbell; Kumar Ga

RE: [PATCH v4 0/3] NAND support for Broadcom NS2 SoC

Hi All, Please disregard this patchset. There is an accidental typo in patch2. We should use ~CFG_BUS_WIDTH instead of CFG_BUS_WIDTH in patch2. I will quickly send v5 patchset to fix this. Sorry, for the noise. Regards, Anup -- To unsubscribe from this list: send the line "unsubscribe

[PATCH v5 1/3] mtd: brcmnand: factor out CFG and CFG_EXT bitfields

From: Brian Norris <computersforpe...@gmail.com> Use enum instead of magic numbers for CFG and CFG_EXT bitfields. Signed-off-by: Brian Norris <computersforpe...@gmail.com> Tested-by: Anup Patel <anup.pa...@broadcom.com> --- drivers/mtd/nand/brcmna

[PATCH v5 0/3] NAND support for Broadcom NS2 SoC

h2 because these are already merged by MTD maintainer. - Avoid using absolute node paths in ns2-svk.dts. Changes since v1: - Dropped patch3 and patch4 because we don't need to reset BRCMNAND controller for NS2. - Added patch to force 8bit mode before doing nand_scan_ident() in brcmnand_init_c

[PATCH v5 2/3] mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()

is issued. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- drivers/mtd/nand/brcmnand/brcmnand.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/mtd/nand/b

[PATCH v5 3/3] arm64: dts: Add BRCM IPROC NAND DT node for NS2

The NAND controller on NS2 SoC is compatible with existing BRCM IPROC NAND driver so let's enable it in NS2 DT and NS2 SVK DT. This patch also fixes use of node labels in ns2-svk.dts. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Review

[PATCH v4 2/3] mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()

is issued. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- drivers/mtd/nand/brcmnand/brcmnand.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/mtd/nand/b

[PATCH v4 0/3] NAND support for Broadcom NS2 SoC

ths in ns2-svk.dts. Changes since v1: - Dropped patch3 and patch4 because we don't need to reset BRCMNAND controller for NS2. - Added patch to force 8bit mode before doing nand_scan_ident() in brcmnand_init_cs(). Anup Patel (2): mtd: brcmnand: Force 8bit mode before doing nand_scan_ident

RE: [PATCH v5 2/3] mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()

> -Original Message- > From: Brian Norris [mailto:computersforpe...@gmail.com] > Sent: 31 October 2015 01:18 > To: Anup Patel > Cc: David Woodhouse; Linux MTD; Rob Herring; Pawel Moll; Mark Rutland; > Catalin Marinas; Will Deacon; Sudeep Holla; Ian Campbell; Kumar Gala

RE: [PATCH 0/6] arm64: Simple additions to NS2 DT

+Arnd, +Olof Ping? Regards, Anup -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/

RE: [PATCH v5 0/3] NAND support for Broadcom NS2 SoC

+Arnd, +Olof Regards, Anup -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/

RE: [PATCH v5 0/3] NAND support for Broadcom NS2 SoC

> -Original Message- > From: Brian Norris [mailto:computersforpe...@gmail.com] > Sent: 31 October 2015 01:02 > To: Anup Patel > Cc: David Woodhouse; Linux MTD; Rob Herring; Pawel Moll; Mark Rutland; > Catalin Marinas; Will Deacon; Sudeep Holla; Ian Campbell; Kumar Gala

RE: [PATCH 3/5] mtd: brcmnand: Optional DT flag to reset IPROC NAND controller

Hi Brian, > -Original Message- > From: Brian Norris [mailto:computersforpe...@gmail.com] > Sent: 13 October 2015 02:58 > To: Anup Patel > Cc: Florian Fainelli; Scott Branden; linux-arm-ker...@lists.infradead.org; Rob > Herring; Pawel Moll; Mark Rutland; Ian Campbell; K

[PATCH v2 1/4] mtd: brcmnand: Fix pointer type-cast in brcmnand_write()

We should always type-cast pointer to "long" or "unsigned long" because size of pointer is same as machine word size. This will avoid pointer type-cast issues on both 32bit and 64bit systems. This patch fixes pointer type-cast issue in brcmnand_write() as-per above info.

[PATCH v2 4/4] arm64: dts: Add BRCM IPROC NAND DT node for NS2

The NAND controller on NS2 SoC is compatible with existing BRCM IPROC NAND driver so let's enable it in NS2 DT and NS2 SVK DT. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- a

[PATCH v2 0/4] NAND support for Broadcom NS2 SoC

. Changes since v1: - Dropped patch3 and patch4 because we don't need to reset BRCMNAND controller for NS2. - Added patch to force 8bit mode before doing nand_scan_ident() in brcmnand_init_cs(). Anup Patel (4): mtd: brcmnand: Fix pointer type-cast in brcmnand_write() mtd: n

[PATCH v2 2/4] mtd: nand: Allow MTD_NAND_BRCMNAND to be selected for ARM64

The BRCM NAND driver can be re-used for Broadcom ARM64 SoCs hence this patch updates Kconfig to allow selection of MTD_NAND_BRCMNAND for ARM64. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Vikram Prakash <vikr...@broadcom.com> Reviewed-by: Ray Jui <r...@broadco

[PATCH v2 3/4] mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()

is issued. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- drivers/mtd/nand/brcmnand/brcmnand.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/mtd/nand/brcm

RE: [PATCH v2 4/4] arm64: dts: Add BRCM IPROC NAND DT node for NS2

> -Original Message- > From: Sudeep Holla [mailto:sudeep.ho...@arm.com] > Sent: 20 October 2015 14:36 > To: Anup Patel > Cc: David Woodhouse; Brian Norris; linux-...@lists.infradead.org; Sudeep > Holla; Rob Herring; Pawel Moll; Mark Rutland; Ian Campbell; Kumar Gala; &

RE: [PATCH v2 1/4] mtd: brcmnand: Fix pointer type-cast in brcmnand_write()

> -Original Message- > From: Ray Jui [mailto:r...@broadcom.com] > Sent: 16 October 2015 21:06 > To: Anup Patel; David Woodhouse; Brian Norris; linux-...@lists.infradead.org > Cc: Rob Herring; Pawel Moll; Mark Rutland; Ian Campbell; Kumar Gala; Catalin > Marinas;

RE: [PATCH 3/5] mtd: brcmnand: Optional DT flag to reset IPROC NAND controller

> -Original Message- > From: Florian Fainelli [mailto:f.faine...@gmail.com] > Sent: 07 October 2015 04:51 > To: Scott Branden; Brian Norris; Anup Patel > Cc: linux-arm-ker...@lists.infradead.org; Rob Herring; Pawel Moll; Mark > Rutland; Ian Campbell; Kumar Gal

RE: [PATCH 3/5] mtd: brcmnand: Optional DT flag to reset IPROC NAND controller

> -Original Message- > From: Brian Norris [mailto:computersforpe...@gmail.com] > Sent: 05 October 2015 03:20 > To: Anup Patel > Cc: linux-arm-ker...@lists.infradead.org; Rob Herring; Pawel Moll; Mark > Rutland; Ian Campbell; Kumar Gala; Catalin Marinas; Will Deacon;

[PATCH 0/5] NAND support for Broadcom NS2 SoC

We enable NAND support for Broadcom NS2 SoC by reusing existing BRCMNAND driver. This patchset applies on-top of "arm64: Simple additions to NS2 DT" patchset and is available in ns2_nand_v1 branch of https://github.com/Broadcom/arm64-linux.git. The patchset is tested on NS2 SVK. Anu

[PATCH 3/5] mtd: brcmnand: Optional DT flag to reset IPROC NAND controller

t the NAND controller before any commands are issued. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Pramod KUMAR <pramo...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- drivers/m

[PATCH 4/5] Documentation: dt-bindings: Add info about brcm,nand-iproc-reset DT flag

This patch updates the BRCM NAND controller DT bindings documentation to add info about newly added optional flag "brcm,nand-iproc-reset". Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Pramod KUMAR <pramo...@broadcom.com> Reviewed-by: Ray Jui <r.

[PATCH 5/5] arm64: dts: Add BRCM IPROC NAND DT node for NS2

The NAND controller on NS2 SoC is compatible with existing BRCM IPROC NAND driver so let's enable it in NS2 DT and NS2 SVK DT. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- a

[PATCH 5/6] arm64: dts: Add IPROC RNG200 DT node for NS2

We have IPROC RNG200 hardware random number generation in NS2 SoC, lets enable it for NS2 in NS2 DT. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Pramod KUMAR <pramo...@broadcom.com> Reviewed-by: Vikram Prakash <

[PATCH 1/6] arm64: dts: Add L2-cache DT node for NS2

Recent kernels requires cache hierrachy to be defined via DT hence this patch updates NS2 DT accordingly. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Sandeep Tripathy <tripa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Sc

[PATCH 6/6] arm64: dts: Add I2C nodes for NS2

From: Ray Jui This patch adds iProc I2C DT nodes for NS2 and enable them for the NS2 SVK board Signed-off-by: Ray Jui Reviewed-by: Vikram Prakash Reviewed-by: Scott Branden ---

[PATCH 3/6] arm64: dts: Add syscon based reboot in DT for NS2

. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- arch/arm64/boot/dts/broadcom/ns2.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/broadco

[PATCH 2/6] arm64: dts: Add SMMU DT node for NS2

The SMMU-500 driver is already available in Linux kernel. Let's enable it for NS2 in DT. This patch keeps mmu-masters attribute empty so that driver patches can later extend this attribute when adding device DT nodes. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray

[PATCH 4/6] arm64: dts: Add ARM PMUv3 DT node in NS2 DT

The NS2 SoC has Cortex-A57 CPUs which support ARM PMUv3 so, lets enable ARM PMUv3 in NS2 DT. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Vikram Prakash <vikr...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@br

[PATCH 0/6] arm64: Simple additions to NS2 DT

We add l2-cache, SMMU, reboot, PMUv3, RNG, and I2C DT nodes for NS2 SVK. This patchset is based on v4.3-rc3 and available in ns2_dt1_v1 branch of https://github.com/Broadcom/arm64-linux.git. The patchset is tested on NS2 SVK. Anup Patel (5): arm64: dts: Add L2-cache DT node for NS2 arm64

[PATCH 2/5] mtd: nand: Allow MTD_NAND_BRCMNAND to be selected for ARM64

The BRCM NAND driver can be re-used for Broadcom ARM64 SoCs hence this patch updates Kconfig to allow selection of MTD_NAND_BRCMNAND for ARM64. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Vikram Prakash <vikr...@broadcom.com> Reviewed-by: Ray Jui <r...@broadco

[PATCH 1/5] mtd: brcmnand: Fix pointer type-cast in brcmnand_write()

We should always type-cast pointer to "long" or "unsigned long" because size of pointer is same as machine word size. This will avoid pointer type-cast issues on both 32bit and 64bit systems. This patch fixes pointer type-cast issue in brcmnand_write() as-per above info.

Re: [PATCH 3/4] uio: introduce devicetree bindings for uio_dmem_genirq

Sorry for jumping-in late ... On Tue, May 24, 2016 at 2:06 AM, Rob Herring wrote: > On Thu, May 19, 2016 at 10:45:56AM +0200, Jan Viktorin wrote: >> Hello Rob, >> >> thank you for your opinion... >> >> On Wed, 18 May 2016 12:01:05 -0500 >> Rob Herring wrote: >>

Re: [PATCH v2 4/4] iommu/arm-smmu: Add stub of_xlate() operation in SMMUv1/SMMUv2 driver

On Mon, Feb 8, 2016 at 4:48 PM, Mark Rutland <mark.rutl...@arm.com> wrote: > On Mon, Feb 08, 2016 at 10:47:32AM +0530, Anup Patel wrote: >> To allow use of large memory (> 4Gb) with 32bit devices we need to use >> IOMMU based DMA mappings for such 32bit devices. The IOMMU

[PATCH 1/6] arm64: Select COMMON_CLK_IPROC, PINCTRL and GPIOLIB for iProc SoCs

We select COMMON_CLK_IPROC, PINCTRL, and GPIOLIB in arm64 Kconfig for ARCH_BCM_IPROC so that we can use COMMON_CLK, PINCTRL and GPIOLIB with iProc SoC drivers. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Signed-off-by: Ray Jui <r...@broadcom.com> Signed-off-by: Yendapally Redd

[PATCH 3/6] arm64: dts: Add ARM SP804 timer DT nodes for NS2

We have four ARM SP804 dual-mode timer instances in NS2 SoC hence this patch adds appropriate DT nodes for NS2. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Pramod KUMAR <pramo...@broadcom.com> Reviewed-by: Sc

[PATCH 5/6] arm64: dts: Add ARM SP805 watchdog DT node for NS2

We have one ARM SP805 watchdog instance on NS2 for non-secure software hence this patch adds appropriate watchdog DT node in NS2 DT. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Pramod KUMAR <pramo...@broadcom.com>

[PATCH 6/6] arm64: dts: Add PCIe0 and PCIe4 DT nodes for NS2

From: Ray Jui <r...@broadcom.com> This patch enables PCIe0 and PCIe4 for NS2 by adding appropriate DT nodes in NS2 DT. Signed-off-by: Ray Jui <r...@broadcom.com> Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com>

[PATCH 4/6] dt-bindings: watchdog: Add ARM SP805 DT bindings

The ARM SP805 DT node is already present in various DTS files. This patch adds missing DT bindings documentation for ARM SP805. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Vikram Prakash <vikr...@broadcom.com>

[PATCH 0/6] More updates for NS2 DT

patches have been tested on Broadcom NS2 SVK. Anup Patel (5): arm64: Select COMMON_CLK_IPROC, PINCTRL and GPIOLIB for iProc SoCs arm64: dts: Add SDHCI DT node for NS2 arm64: dts: Add ARM SP804 timer DT nodes for NS2 dt-bindings: watchdog: Add ARM SP805 DT bindings arm64: dts: Add ARM

[PATCH 2/6] arm64: dts: Add SDHCI DT node for NS2

The IPROC SDHCI driver works fine for SDIO 3.0 on NS2 so let's enable it for NS2 SoC in NS2 DT. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Vikram Prakash <vikr...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> --- arch/arm64/boot/dts/broadco

Re: [PATCH] Documentation: SubmittingPatches: Add note about Reviewed-by tags

On Fri, Feb 12, 2016 at 7:42 AM, Florian Fainelli wrote: > As is now common in a lot of organization having an internal code review > process (be it through Gerritt or other tools), patches extracted from > this review process and submitted to public mailing-lists will have

[PATCH v2 1/4] iommu/arm-smmu: Init driver using IOMMU_OF_DECLARE

lt;sricha...@codeaurora.org> Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Tested-by: Anup Patel <anup.pa...@broadcom.com> --- drivers/iommu/arm-smmu.c | 35 ++- 1 file changed, 22 insertions(+), 13 deletions(-) diff --git a/drivers/iommu/arm-smmu.c b/

[PATCH v2 4/4] iommu/arm-smmu: Add stub of_xlate() operation in SMMUv1/SMMUv2 driver

Uv1/SMMUv2 driver because it requires of_xlate() operation to be implemented by the driver. This patch adds a stub implementation of of_xlate() in SMMUv1/SMMUv2 driver to allow usage of 'iommus' attribute in DT for 32bit devices. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by

[PATCH v2 3/4] of: iommu: Increment DT node refcount in of_iommu_set_ops()

We are saving pointer to iommu DT node in of_iommu_set_ops() hence we should increment DT node ref count. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> Reviewed-by: Robin Murphy <

[PATCH v2 2/4] iommu/arm-smmu: Invoke DT probe from arm_smmu_of_setup()

The SMMUv1/SMMUv2 driver is initialized very early using the IOMMU_OF_DECLARE() but the actual platform device is probed via normal DT probing. This patch uses of_platform_device_create() from arm_smmu_of_setup() to ensure that SMMU platform device is probed immediately. Signed-off-by: Anup

[PATCH v2 0/4] iommu/arm-smmu: misc fixes for SMMUv1/SMMUv2

_v2 branch of https://github.com/Broadcom/arm64-linux.git All patches have been tested on Broadcom SoCs having SMMU-500. Anup Patel (3): iommu/arm-smmu: Invoke DT probe from arm_smmu_of_setup() of: iommu: Increment DT node refcount in of_iommu_set_ops() iommu/arm-smmu: Add stub of_xlate()

[RFC PATCH 1/6] iommu/arm-smmu: Init driver using IOMMU_OF_DECLARE

lt;sricha...@codeaurora.org> Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Tested-by: Anup Patel <anup.pa...@broadcom.com> --- drivers/iommu/arm-smmu.c | 35 ++- 1 file changed, 22 insertions(+), 13 deletions(-) diff --git a/drivers/iommu/arm-smmu.c b/

[RFC PATCH 4/6] iommu/arm-smmu: Add support for IOMMU_DOMAIN_DMA in SMMUv1/SMMUv2 driver

To allow use of large memory (> 4Gb) with 32bit devices we need to use some kind of iommu for such 32bit devices. This patch extends SMMUv1/SMMUv2 driver to support DMA domains which in-turn will allows us to use iommu based DMA mappings for 32bit devices. Signed-off-by: Anup Patel <a

[RFC PATCH 2/6] iommu/arm-smmu: Invoke DT probe from arm_smmu_of_setup()

The SMMUv1/SMMUv2 driver is initialized very early using the IOMMU_OF_DECLARE() but the actual platform device is probed via normal DT probing. This patch uses of_platform_device_create() from arm_smmu_of_setup() to ensure that SMMU platform device is probed immediately. Signed-off-by: Anup

[RFC PATCH 0/6] iommu/arm-smmu: Add support for DMA domains and instruction fetch

in smmu_v1 branch of https://github.com/Broadcom/arm64-linux.git All patches have been tested on Broadcom SoCs having SMMU-500. Anup Patel (5): iommu/arm-smmu: Invoke DT probe from arm_smmu_of_setup() of: iommu: Increment DT node refcount in of_iommu_set_ops() iommu/arm-smmu: Add support

[RFC PATCH 5/6] iommu/arm-smmu: Option to treat instruction fetch as data read for SMMUv2

to treat instruction fetch as data read. This patch adds an optional DT attribute 'smmu-inst-as-data' to treat privilege/unprivilege instruction fetch as data read for SMMUv2. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Vi

[RFC PATCH 6/6] iommu/arm-smmu: Update bindings document for smmu-inst-as-data DT option

This patch adds info about 'smmu-inst-as-data' DT option in ARM SMMUv1/SMMUv2 driver bindings document. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Vikram Prakash <vikr...@broadcom.com> Reviewed-by: Scott Branden <

[RFC PATCH 3/6] of: iommu: Increment DT node refcount in of_iommu_set_ops()

We are saving pointer to iommu DT node in of_iommu_set_ops() hence we should increment DT node ref count. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- drivers/iommu/of_iom

RE: [RFC PATCH 4/6] iommu/arm-smmu: Add support for IOMMU_DOMAIN_DMA in SMMUv1/SMMUv2 driver

> -Original Message- > From: Robin Murphy [mailto:robin.mur...@arm.com] > Sent: 28 January 2016 22:59 > To: Anup Patel; Catalin Marinas; Joerg Roedel; Will Deacon; Sricharan R; Linux > IOMMU; Linux ARM Kernel > Cc: Rob Herring; Pawel Moll; Mark Rutland; Ian Campbell;

RE: [RFC PATCH 5/6] iommu/arm-smmu: Option to treat instruction fetch as data read for SMMUv2

> -Original Message- > From: Robin Murphy [mailto:robin.mur...@arm.com] > Sent: 28 January 2016 22:41 > To: Anup Patel; Catalin Marinas; Joerg Roedel; Will Deacon; Robin Murphy; > Sricharan R; Linux IOMMU; Linux ARM Kernel > Cc: Mark Rutland; Device Tree; Scott Brande

RE: [RFC PATCH 6/6] iommu/arm-smmu: Update bindings document for smmu-inst-as-data DT option

> -Original Message- > From: Mark Rutland [mailto:mark.rutl...@arm.com] > Sent: 27 January 2016 17:59 > To: Anup Patel > Cc: Catalin Marinas; Joerg Roedel; Will Deacon; Robin Murphy; Sricharan R; > Linux IOMMU; Linux ARM Kernel; Rob Herring; Pawel Moll; Ian Campbell; Ku

Re: [PATCH v2 2/4] iommu/arm-smmu: Invoke DT probe from arm_smmu_of_setup()

On Thu, Feb 18, 2016 at 5:30 PM, Sricharan <sricha...@codeaurora.org> wrote: > Hi, > >> -Original Message- >> From: linux-arm-kernel [mailto:linux-arm-kernel- >> boun...@lists.infradead.org] On Behalf Of Anup Patel >> Sent: Monday, February 08, 2016 10

[PATCH 0/5] Add SATA3 support for Broadcom NS2 SVK

://github.com/Broadcom/arm64-linux.git All patches have been tested on Broadcom NS2 SVK. Anup Patel (5): phy: Rename phy-brcmstb-sata driver to phy-brcm-sata driver phy: Add support for NS2 SATA3 PHY in Broadcom SATA3 PHY driver dt-bindings: phy: bindings document for common Broadcom SATA3 PHY

[PATCH 5/5] arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2

We have one dual-port SATA3 AHCI controller present in NS2 SoC. This patch enables SATA3 AHCI controller and SATA3 PHY for NS2 SoC in NS2 DT. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom

[PATCH 4/5] dt-bindings: ata: add compatible string for iProc AHCI controller

The Broadcom iProc SoCs have AHCI compliant SATA controller. This patch adds common compatible string for AHCI SATA controller on iProc SoCs. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> --- Documentation/devicetree/bindings/ata/ahci-platform.txt | 1 + 1 file changed, 1 ins

[PATCH 2/5] phy: Add support for NS2 SATA3 PHY in Broadcom SATA3 PHY driver

This patch adds support for Broadcom NS2 SATA3 PHY in existing Broadcom SATA3 PHY driver. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> --- drivers/phy/phy-brcm-sata.c | 238 +--- 1 file changed, 200 insertions(+), 38 deletions(-) diff

[PATCH 1/5] phy: Rename phy-brcmstb-sata driver to phy-brcm-sata driver

SoCs. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> --- drivers/phy/Kconfig | 18 +- drivers/phy/Makefile| 2 +- drivers/phy/{phy-brcmstb-sata.c => phy-brcm-sata.c} | 8 3 files changed, 14 i

[PATCH 3/5] dt-bindings: phy: bindings document for common Broadcom SATA3 PHY driver

This patch: 1. Renames DT bindings document of Broadcom STB SATA3 PHY driver to common Broadcom SATA3 PHY driver bindings document 2. Adds bindings info for NS2 SATA3 PHY Signed-off-by: Anup Patel <anup.pa...@broadcom.com> --- .../phy/{brcm,brcmstb-sata-phy.txt => brcm-sata-phy.t

[PATCH v2 2/5] phy: Add support for NS2 SATA3 PHY in Broadcom SATA3 PHY driver

This patch adds support for Broadcom NS2 SATA3 PHY in existing Broadcom SATA3 PHY driver. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> --- drivers/phy/phy-brcm-sata.c | 238 +--- 1 file changed, 200 insertions(+), 38 deletions(-) diff

[PATCH v2 1/5] phy: Rename phy-brcmstb-sata driver to phy-brcm-sata driver

SoCs. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> --- drivers/phy/Kconfig | 18 +- drivers/phy/Makefile| 2 +- drivers/phy/{phy-brcmstb-sata.c => phy-brcm-sata.c} | 8 3 files changed, 14 i

[PATCH v2 3/5] dt-bindings: phy: bindings document for common Broadcom SATA3 PHY driver

This patch: 1. Renames DT bindings document of Broadcom STB SATA3 PHY driver to common Broadcom SATA3 PHY driver bindings document 2. Adds bindings info for NS2 SATA3 PHY Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Acked-by: Rob Herring <r...@kernel.org> --- .../phy/{brcm,

[PATCH v2 0/5] Add SATA3 support for Broadcom NS2 SVK

://github.com/Broadcom/arm64-linux.git All patches have been tested on Broadcom NS2 SVK. Changes since v1: - Added ACKed by Rob for DT bindings related patches Anup Patel (5): phy: Rename phy-brcmstb-sata driver to phy-brcm-sata driver phy: Add support for NS2 SATA3 PHY in Broadcom SATA3 PHY

[PATCH v2 4/5] dt-bindings: ata: add compatible string for iProc AHCI controller

The Broadcom iProc SoCs have AHCI compliant SATA controller. This patch adds common compatible string for AHCI SATA controller on iProc SoCs. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Acked-by: Rob Herring <r...@kernel.org> --- Documentation/devicetree/bindings/ata/ahci-

[PATCH v2 5/5] arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2

We have one dual-port SATA3 AHCI controller present in NS2 SoC. This patch enables SATA3 AHCI controller and SATA3 PHY for NS2 SoC in NS2 DT. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom

[PATCH 2/4] arm64: dts: Add maintenance interrupt for GIC in NS2 DT

The KVM ARM64 requires GIC maintenance interrupt for VGIC emulation so this patch adds the missing "interrupts" attribute to GIC node in NS2 DT. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden

[PATCH 0/4] Few more updates for NS2 DT

patches have been tested on Broadcom NS2 SVK. Anup Patel (4): arm64: dts: Add ARM PL330 DMA DT node for NS2 arm64: dts: Add maintenance interrupt for GIC in NS2 DT arm64: dts: Move NS2 clock DT nodes to separate DT file arm64: dts: Add ARM PL022 SPI DT nodes for NS2 arch/arm64/boot/dts

[PATCH 1/4] arm64: dts: Add ARM PL330 DMA DT node for NS2

We have one ARM PL330 DMA instance with 8 channels in NS2 SoC. Let's enable it for NS2 in NS2 DT. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Pramod KUMAR <pramo...@broadcom.com> Reviewed-by: Scott Branden <

[PATCH 3/4] arm64: dts: Move NS2 clock DT nodes to separate DT file

For more readabilty and consistency with other Broadcom SoCs, we move all NS2 clock DT nodes from main SoC DT file to a separate DT file. We also update the license header in ns2.dtsi as-per new Broadcom convention. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray

[PATCH 4/4] arm64: dts: Add ARM PL022 SPI DT nodes for NS2

in NS2 DT and NS2 SVK DT respectively. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- arch/arm64/boot/dts/broadcom/ns2-svk.dts | 45 arch/arm64/boo

  1   2   3   4   5   6   7   8   9   10   >