Re: [PATCH linux v7 1/6] hwmon: Add core On-Chip Controller support for POWER CPUs

DRIVER Mention P8 and P9? +M: Eddie James <eaja...@us.ibm.com> +L: linux-hw...@vger.kernel.org Have you subscribed to this list? Would you prefer the mail to come to the openbmc list? +S: Maintained +F: Documentation/hwmon/occ +F: drivers/hwmon/occ/ + ONENAND FLAS

Re: [PATCH linux v7 3/6] hwmon: occ: Add I2C transport implementation for SCOM operations

On 02/09/2017 11:31 PM, Joel Stanley wrote: On Wed, Feb 8, 2017 at 9:40 AM, wrote: From: "Edward A. James" Add functions to send SCOM operations over I2C bus. The BMC can communicate with the Power8 host processor over I2C, but needs to use

Re: [PATCH linux v7 1/6] hwmon: Add core On-Chip Controller support for POWER CPUs

DRIVER Mention P8 and P9? +M: Eddie James <eaja...@us.ibm.com> +L: linux-hw...@vger.kernel.org Have you subscribed to this list? Would you prefer the mail to come to the openbmc list? +S: Maintained +F: Documentation/hwmon/occ +F: drivers/hwmon/occ/ + ONENAND FLAS

[PATCH linux v8 6/6] hwmon: occ: Add callbacks for parsing P9 OCC datastructures

nsor = p9_alloc_sensor, + .get_sensor = p9_get_sensor, +}; + +static const struct occ_init_data p9_init = { + .command_addr = 0xFFFBE000, + .response_addr = 0xFFFBF000, + .ops = _ops, +}; + +const u32 *p9_get_sensor_hwmon_configs() +{ + return p9_sensor_hwmon_c

[PATCH linux v8 1/6] hwmon: Add core On-Chip Controller support for POWER CPUs

=== + +Supported chips: + * POWER8 + * POWER9 + +Please note that the driver does not run on these processors. Instead, the +driver runs on a connected service processor, such as an AST2400. (see the +BMC - Host Communications section). + +Author: Eddie James <eaj

[PATCH linux v8 4/6] hwmon: occ: Add callbacks for parsing P8 OCC datastructures

{ + .command_addr = 0x6000, + .response_addr = 0x7000, + .ops = _ops, +}; + +const u32 *p8_get_sensor_hwmon_configs() +{ + return p8_sensor_hwmon_configs; +} + +struct occ *p8_occ_init(struct device *dev, void *bus, + const struct occ_bus_ops *bus_ops) +{ +

[PATCH linux v8 5/6] hwmon: occ: Add hwmon implementation for the P8 OCC

er = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = OCC_P8_I2C_NAME, + .of_match_table = occ_of_match, + }, + .probe = p8_occ_probe, + .id_table = occ_ids, +}; + +module_i2c_driver(p8_occ_driver); + +MODULE_AUTHOR("Eddie James <eaja...@us.ibm.com>"); +MODULE_DESCRIPTION("BMC P8 OCC hwmon driver"); +MODULE_LICENSE("GPL"); -- 1.8.3.1

[PATCH linux v8 3/6] hwmon: occ: Add I2C transport implementation for SCOM operations

buf[2] = data0; + + rc = i2c_master_send(client, (const char *)buf, sizeof(u32) * 3); + if (rc < 0) + return rc; + else if (rc != sizeof(u32) * 3) + return -EIO; + + return 0; +} + +MODULE_AUTHOR("Eddie James <eaja...@us.ibm.com>")

[PATCH linux v8 2/6] hwmon: occ: Add sysfs interface

_info, + NULL); + if (IS_ERR(hwmon->dev)) { + dev_err(dev, "cannot register hwmon device %s: %ld\n", + hwmon->hwmon_name, PTR_ERR(hwmon->dev)); + return ERR_CAST(hwmon->dev); +

[PATCH linux v8 0/6] drivers: hwmon: Add On-Chip Controller driver

From: "Edward A. James" This patchset adds a hwmon driver to support the OCC (On-Chip Controller) on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management Controller). The OCC is an embedded processor that provides real time power and thermal monitoring. The

[PATCH linux v9 2/5] hwmon: occ: Add sysfs interface

hwmon, + >occ_info, + NULL); + if (IS_ERR(hwmon->dev)) { + dev_err(dev, "cannot register hwmon device %s: %ld\n", + h

[PATCH linux v9 3/5] hwmon: occ: Add I2C transport implementation for SCOM operations

buf[2] = data0; + + rc = i2c_master_send(client, (const char *)buf, sizeof(u32) * 3); + if (rc < 0) + return rc; + else if (rc != sizeof(u32) * 3) + return -EIO; + + return 0; +} + +MODULE_AUTHOR("Eddie James <eaja...@us.ibm.com>")

[PATCH linux v9 4/5] hwmon: occ: Add callbacks for parsing P8 OCC datastructures

{ + .command_addr = 0x6000, + .response_addr = 0x7000, + .ops = _ops, +}; + +const u32 *p8_get_sensor_hwmon_configs() +{ + return p8_sensor_hwmon_configs; +} + +struct occ *p8_occ_init(struct device *dev, void *bus, + const struct occ_bus_ops *bus_ops) +{ +

[PATCH linux v9 5/5] hwmon: occ: Add hwmon implementation for the P8 OCC

er = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = OCC_P8_I2C_NAME, + .of_match_table = occ_of_match, + }, + .probe = p8_occ_probe, + .id_table = occ_ids, +}; + +module_i2c_driver(p8_occ_driver); + +MODULE_AUTHOR("Eddie James <eaja...@us.ibm.com>"); +MODULE_DESCRIPTION("BMC P8 OCC hwmon driver"); +MODULE_LICENSE("GPL"); -- 1.8.3.1

[PATCH linux v9 0/5] drivers: hwmon: Add On-Chip Controller driver

From: "Edward A. James" This patchset adds a hwmon driver to support the OCC (On-Chip Controller) on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management Controller). The OCC is an embedded processor that provides real time power and thermal monitoring. The

[PATCH linux v9 1/5] hwmon: Add core On-Chip Controller support for POWER CPUs

=== + +Supported chips: + * POWER8 + * POWER9 + +Please note that the driver does not run on these processors. Instead, the +driver runs on a connected service processor, such as an AST2400. (see the +BMC - Host Communications section). + +Author: Eddie James <eaj

[PATCH 4/4] Documentation: ABI: Add IBM power supply sysfs documentation

From: "Edward A. James" Signed-off-by: Edward A. James --- Documentation/ABI/testing/sysfs-driver-ibmps | 49 1 file changed, 49 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-ibmps diff --git

[PATCH 0/4] drivers/hwmon/pmbus: Add IBM power supply hwmon driver

From: "Edward A. James" This series adds a hwmon pmbus driver for an IBM power supply. The core monitoring functionality is provided by pmbus. The driver also exports some sysfs entries for raw status register access and the ability to clear faults. Edward A. James (4):

[PATCH 1/4] drivers/hwmon/pmbus: Add IBM power supply hwmon driver

of, p8_i2c_occ_of_match); + +static struct i2c_driver ibmps_driver = { + .driver = { + .name = "ibmps", + .of_match_table = ibmps_of_match, + }, + .probe = ibmps_probe, + .remove = ibmps_remove, + .id_table = ibmps_

[PATCH 3/4] Documentation: hwmon: Add IBM power supply documentation

a/Documentation/hwmon/ibmps b/Documentation/hwmon/ibmps new file mode 100644 index 000..7f13fd4 --- /dev/null +++ b/Documentation/hwmon/ibmps @@ -0,0 +1,53 @@ +Kernel driver ibmps + + +Supported chips: + * IBM Witherspoon power supply + +Author: Eddie James <eaja...@u

[PATCH 2/4] drivers/hwmon/pmbus: ibmps: Add non-hwmon attributes

From: "Edward A. James" Add sysfs entries to dump out PS registers and clear faults. Signed-off-by: Edward A. James --- drivers/hwmon/pmbus/ibmps.c | 78 + 1 file changed, 78 insertions(+) diff --git

Re: [PATCH v5 0/6] drivers/i2c: Add FSI-attached I2C master algorithm

On 08/15/2017 12:35 PM, Peter Rosin wrote: On 2017-08-15 18:28, Christopher Bostic wrote: On 8/15/17 3:10 AM, Joel Stanley wrote: On Tue, Aug 15, 2017 at 4:06 PM, Peter Rosin <p...@axentia.se> wrote: On 2017-07-26 19:13, Eddie James wrote: From: "Edward A. James" <

[PATCH v4 1/3] dt-bindings: i2c: Document the IBM CCF power supply version 1

From: "Edward A. James" Signed-off-by: Edward A. James --- .../devicetree/bindings/i2c/ibm,cffps1.txt | 21 + 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/ibm,cffps1.txt diff

Re: [PATCH v3 3/3] Documentation: hwmon: Document the IBM CFF power supply

On 08/14/2017 05:37 PM, Guenter Roeck wrote: On Mon, Aug 14, 2017 at 02:26:20PM -0500, Eddie James wrote: On 08/14/2017 01:53 PM, Guenter Roeck wrote: On Mon, Aug 14, 2017 at 10:26:30AM -0500, Eddie James wrote: From: "Edward A. James" <eaja...@us.ibm.com> Signed-off-by:

[PATCH v4 2/3] hwmon: (pmbus): Add IBM Common Form Factor (CFF) power supply driver

", + .of_match_table = ibm_cffps_of_match, + }, + .probe = ibm_cffps_probe, + .remove = pmbus_do_remove, + .id_table = ibm_cffps_id, +}; + +module_i2c_driver(ibm_cffps_driver); + +MODULE_AUTHOR("Eddie James"); +MODULE_DESCRIPTION("PMBus driver for IBM Common Form Factor power supplies"); +MODULE_LICENSE("GPL"); -- 1.8.3.1

[PATCH v4 3/3] Documentation: hwmon: Document the IBM CFF power supply

--git a/Documentation/hwmon/ibm-cffps b/Documentation/hwmon/ibm-cffps new file mode 100644 index 000..e05ecd8 --- /dev/null +++ b/Documentation/hwmon/ibm-cffps @@ -0,0 +1,54 @@ +Kernel driver ibm-cffps +=== + +Supported chips: + * IBM Common Form Factor power supply + +Aut

[PATCH v4 0/3] hwmon: (pmbus): Add IBM Common Form Factor (CFF) power supply driver

From: "Edward A. James" This series adds a hwmon pmbus driver for a POWER System power supply. The core monitoring functionality is provided by pmbus. Changes since v3: * Change "fault" to "alarm" in the documentation. Changes since v2: * Renamed the driver again... *

Re: [PATCH v3 3/3] Documentation: hwmon: Document the IBM CFF power supply

On 08/14/2017 01:53 PM, Guenter Roeck wrote: On Mon, Aug 14, 2017 at 10:26:30AM -0500, Eddie James wrote: From: "Edward A. James" <eaja...@us.ibm.com> Signed-off-by: Edward A. James <eaja...@us.ibm.com> --- Documentation/hwmon/ibm-cffps | 54 +

[PATCH v4] hwmon: (pmbus): Add debugfs for status registers

From: "Edward A. James" Export all the available status registers through debugfs. This is useful for hardware diagnostics, especially on multi-page pmbus devices, as user-space access of the i2c space could corrupt the pmbus page accounting. Signed-off-by: Edward A. James

Re: [PATCH 1/4] drivers/hwmon/pmbus: Add IBM power supply hwmon driver

On 08/10/2017 10:00 AM, Guenter Roeck wrote: On Wed, Aug 02, 2017 at 04:17:10PM -0500, Eddie James wrote: From: "Edward A. James" <eaja...@us.ibm.com> Add the driver to monitor power supplies with hwmon over pmbus. Signed-off-by: Edward A. James <eaja...@us.ibm.com&g

Re: [PATCH 4/4] drivers/hwmon/pmbus: Add debugfs for status registers

On 08/09/2017 08:15 PM, Guenter Roeck wrote: On Wed, Aug 09, 2017 at 05:19:17PM -0500, Eddie James wrote: From: "Edward A. James" <eaja...@us.ibm.com> Export all the available status registers through debugfs, if the client driver wants them. Signed-off-by: Edwar

Re: [PATCH 4/4] drivers/hwmon/pmbus: Add debugfs for status registers

On 08/10/2017 03:15 PM, Eddie James wrote: On 08/09/2017 08:15 PM, Guenter Roeck wrote: On Wed, Aug 09, 2017 at 05:19:17PM -0500, Eddie James wrote: From: "Edward A. James" <eaja...@us.ibm.com> Export all the available status registers through debugfs, if the client d

[PATCH v2 0/4] hwmon: (pmbus): Core extension for STATUS_WORD and debugfs

From: "Edward A. James" This series adds some functionality to the pmbus core. The first two patches provide support for the STATUS_WORD register. This allows more default alarm attributes to be used, as the upper byte of the status register is available. The third patch

[PATCH v2 3/4] hwmon: (pmbus): Add generic alarm bit for iin and pin

From: "Edward A. James" Add PB_STATUS_INPUT as the generic alarm bit for iin and pin. We also need to redo the status register checking before setting up the boolean attribute, since it won't necessarily check STATUS_WORD if the device doesn't support it, which we need for

[PATCH v2 4/4] hwmon: (pmbus): Add debugfs for status registers

From: "Edward A. James" Export all the available status registers through debugfs, if the client driver wants them. Signed-off-by: Edward A. James --- drivers/hwmon/pmbus/pmbus.h | 6 ++ drivers/hwmon/pmbus/pmbus_core.c | 201

[PATCH v2 2/4] hwmon: (pmbus): Access word data for STATUS_WORD

From: "Edward A. James" Pmbus always reads byte data from the status register, even if configured to use STATUS_WORD. Use a function pointer to read the correct amount of data from the registers. Also switch to try STATUS_WORD first before STATUS_BYTE on init. Signed-off-by:

[PATCH v2 1/4] hwmon: (pmbus): Switch status registers to 16 bit

From: "Edward A. James" Switch the storage of status registers to 16 bit values. This allows us to store all the bits of STATUS_WORD. Signed-off-by: Edward A. James --- drivers/hwmon/pmbus/pmbus_core.c | 14 +++--- 1 file changed, 7

[PATCH v2 3/3] Documentation: hwmon: Add POWER system power supply documentation

a/Documentation/hwmon/powerps b/Documentation/hwmon/powerps new file mode 100644 index 000..a4fbe92 --- /dev/null +++ b/Documentation/hwmon/powerps @@ -0,0 +1,54 @@ +Kernel driver powerps += + +Supported chips: + * POWER system power supply + +Author: Eddie Jam

[PATCH v2 1/3] dt-bindings: i2c: Document the POWER system power supply device

From: "Edward A. James" Signed-off-by: Edward A. James --- .../devicetree/bindings/i2c/ibm,power-ps.txt| 21 + 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/ibm,power-ps.txt diff

[PATCH v2 2/3] hwmon: (pmbus): Add POWER system power supply driver

rps_of_match, + }, + .probe = powerps_probe, + .remove = pmbus_do_remove, + .id_table = powerps_id, +}; + +module_i2c_driver(powerps_driver); + +MODULE_AUTHOR("Eddie James"); +MODULE_DESCRIPTION("PMBus driver for POWER system power supplies"); +MODULE_LICENSE("GPL"); -- 1.8.3.1

[PATCH v2 0/3] hwmon: (pmbus): Add POWER System power supply driver

From: "Edward A. James" This series adds a hwmon pmbus driver for a POWER System power supply. The core monitoring functionality is provided by pmbus. This series depends on the pmbus core extensions for debugfs recently submitted to the mailing list (latest:

Re: [PATCH v2 2/3] hwmon: (pmbus): Add POWER system power supply driver

On 08/10/2017 08:18 PM, Guenter Roeck wrote: On Thu, Aug 10, 2017 at 05:19:45PM -0500, Eddie James wrote: From: "Edward A. James" <eaja...@us.ibm.com> Add the driver to monitor POWER system power supplies with hwmon over pmbus. Signed-off-by: Edward A. James <

[PATCH v3 0/3] hwmon: (pmbus): Add IBM Common Form Factor (CFF) power supply driver

From: "Edward A. James" This series adds a hwmon pmbus driver for a POWER System power supply. The core monitoring functionality is provided by pmbus. Changes since v2: * Renamed the driver again... * Remove debugfs bool from pmbus_driver_info. * Add comment for returning

[PATCH v3 3/3] Documentation: hwmon: Document the IBM CFF power supply

--git a/Documentation/hwmon/ibm-cffps b/Documentation/hwmon/ibm-cffps new file mode 100644 index 000..e091ff2 --- /dev/null +++ b/Documentation/hwmon/ibm-cffps @@ -0,0 +1,54 @@ +Kernel driver ibm-cffps +=== + +Supported chips: + * IBM Common Form Factor power supply + +Aut

[PATCH v3 2/3] hwmon: (pmbus): Add IBM Common Form Factor (CFF) power supply driver

", + .of_match_table = ibm_cffps_of_match, + }, + .probe = ibm_cffps_probe, + .remove = pmbus_do_remove, + .id_table = ibm_cffps_id, +}; + +module_i2c_driver(ibm_cffps_driver); + +MODULE_AUTHOR("Eddie James"); +MODULE_DESCRIPTION("PMBus driver for IBM Common Form Factor power supplies"); +MODULE_LICENSE("GPL"); -- 1.8.3.1

[PATCH v3 1/3] dt-bindings: i2c: Document the IBM CCF power supply version 1

From: "Edward A. James" Signed-off-by: Edward A. James --- .../devicetree/bindings/i2c/ibm,cffps1.txt | 21 + 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/ibm,cffps1.txt diff

[PATCH v3] hwmon: (pmbus): Add debugfs for status registers

From: "Edward A. James" Export all the available status registers through debugfs. This is useful for hardware diagnostics, especially on multi-page pmbus devices, as user-space access of the i2c space could corrupt the pmbus page accounting. Signed-off-by: Edward A. James

Re: [PATCH v2 4/4] hwmon: (pmbus): Add debugfs for status registers

On 08/11/2017 08:52 AM, Guenter Roeck wrote: On 08/10/2017 02:57 PM, Eddie James wrote: From: "Edward A. James" <eaja...@us.ibm.com> Export all the available status registers through debugfs, if the client driver wants them. Signed-off-by: Edward A. James <eaja...@us.ibm

Re: [PATCH v3] hwmon: (pmbus): Add debugfs for status registers

On 08/14/2017 11:13 AM, Guenter Roeck wrote: On Mon, Aug 14, 2017 at 09:59:50AM -0500, Eddie James wrote: From: "Edward A. James" <eaja...@us.ibm.com> Export all the available status registers through debugfs. This is useful for hardware diagnostics, especially on multi-pa

[PATCH v4 3/6] drivers/i2c: Add transfer implementation for FSI algorithm

From: "Edward A. James" Execute I2C transfers from the FSI-attached I2C master. Use polling instead of interrupts as we have no hardware IRQ over FSI. Signed-off-by: Edward A. James --- drivers/i2c/busses/i2c-fsi.c | 197

[PATCH v4 2/6] drivers/i2c: Add port structure to FSI algorithm

From: "Edward A. James" Add and initialize I2C adapters for each port on the FSI-attached I2C master. Ports for each master are defined in the devicetree. Signed-off-by: Edward A. James --- drivers/i2c/busses/i2c-fsi.c | 91

[PATCH v4 6/6] dt-bindings: i2c: Add FSI-attached I2C master dt binding documentation

From: "Edward A. James" Document the bindings. Signed-off-by: Edward A. James --- Documentation/devicetree/bindings/i2c/i2c-fsi.txt | 40 +++ 1 file changed, 40 insertions(+) create mode 100644

[PATCH v4 4/6] drivers/i2c: Add I2C master locking to FSI algorithm

From: "Edward A. James" Since there are many ports per master, each with it's own adapter and chardev, we need some locking to prevent transfers from changing the\ master state while other transfers are in progress. Signed-off-by: Edward A. James ---

[PATCH v4 1/6] drivers/i2c: Add FSI-attached I2C master algorithm

c/busses/i2c-fsi.c new file mode 100644 index 000..b7f2bc6 --- /dev/null +++ b/drivers/i2c/busses/i2c-fsi.c @@ -0,0 +1,243 @@ +/* + * Copyright 2017 IBM Corporation + * + * Eddie James <eaja...@us.ibm.com> + * + * This program is free software; you can redistribute it and/or + * modify

[PATCH v4 5/6] drivers/i2c: Add bus recovery for FSI algorithm

From: "Edward A. James" Bus recovery should reset the engine and force clock the bus 9 times to recover most situations. Signed-off-by: Edward A. James --- drivers/i2c/busses/i2c-fsi.c | 75 1 file changed,

[PATCH v4 0/6] drivers/i2c: Add FSI-attached I2C master algorithm

From: "Edward A. James" This series adds an algorithm for an I2C master physically located on an FSI slave device. The I2C master has multiple ports, each of which may be connected to an I2C slave. Access to the I2C master registers is achieved over FSI bus. Due to the

[PATCH v2 6/6] dt-bindings: i2c: Add FSI-attached I2C master dt binding documentation

From: "Edward A. James" Document the bindings. Signed-off-by: Edward A. James --- Documentation/devicetree/bindings/i2c/i2c-fsi.txt | 40 +++ 1 file changed, 40 insertions(+) create mode 100644

[PATCH v2 4/6] drivers/i2c: Add I2C master locking to FSI algorithm

From: "Edward A. James" Since there are many ports per master, each with it's own adapter and chardev, we need some locking to prevent transfers from changing the\ master state while other transfers are in progress. Signed-off-by: Edward A. James ---

[PATCH v2 0/6] drivers/i2c: Add FSI-attached I2C master algorithm

From: "Edward A. James" This series adds an algorithm for an I2C master physically located on an FSI slave device. The I2C master has multiple ports, each of which may be connected to an I2C slave. Access to the I2C master registers is achieved over FSI bus. Due to the

[PATCH v2 2/6] drivers/i2c: Add port structure to FSI algorithm

From: "Edward A. James" Add and initialize I2C adapters for each port on the FSI-attached I2C master. Ports for each master are defined in the devicetree. Signed-off-by: Edward A. James --- drivers/i2c/busses/i2c-fsi.c | 91

[PATCH v2 1/6] drivers/i2c: Add FSI-attached I2C master algorithm

c/busses/i2c-fsi.c new file mode 100644 index 000..b7f2bc6 --- /dev/null +++ b/drivers/i2c/busses/i2c-fsi.c @@ -0,0 +1,243 @@ +/* + * Copyright 2017 IBM Corporation + * + * Eddie James <eaja...@us.ibm.com> + * + * This program is free software; you can redistribute it and/or + * modify

[PATCH v2 5/6] drivers/i2c: Add bus recovery for FSI algorithm

From: "Edward A. James" Bus recovery should reset the engine and force clock the bus 9 times to recover most situations. Signed-off-by: Edward A. James --- drivers/i2c/busses/i2c-fsi.c | 75 1 file changed,

[PATCH v2 3/6] drivers/i2c: Add transfer implementation for FSI algorithm

From: "Edward A. James" Execute I2C transfers from the FSI-attached I2C master. Use polling instead of interrupts as we have no hardware IRQ over FSI. Signed-off-by: Edward A. James --- drivers/i2c/busses/i2c-fsi.c | 197

[PATCH] drivers/fsi/scom: Remove reset before every putscom

From: "Edward A. James" Reset causes problems for operations requiring multiple scoms (e.g. i2c over scom). Instead, reset scom engine during probe. Signed-off-by: Edward A. James --- drivers/fsi/fsi-scom.c | 10 -- 1 file changed, 4

[PATCH v2 03/10] drivers/hwmon/occ: Parse OCC poll response

From: "Edward A. James" Add method to parse the response from the OCC poll command. This only needs to be done during probe(), since the OCC shouldn't change the number or format of sensors while it's running. The parsed response allows quick access to sensor data, as well as

[PATCH v2 06/10] drivers/hwmon/occ: Add non-hwmon attributes

From: "Edward A. James" Create device attributes for additional OCC properties that do not belong as hwmon sensors. These provide additional information as to the state of the processor and system. Signed-off-by: Edward A. James ---

[PATCH v2 02/10] drivers/hwmon/occ: Add command transport method for P8 and P9

From: "Edward A. James" For the P8 OCC, add the procedure to send a command to the OCC over I2C bus. This involves writing the OCC command registers with serial communication operations (SCOMs) interpreted by the I2C slave. For the P9 OCC, add a procedure to use the OCC

[PATCH v2 04/10] drivers/hwmon/occ: Add sensor types and versions

From: "Edward A. James" Add structures to define all sensor types and versions. Add sysfs show and store functions for each sensor type. Add a method to construct the "set user power cap" command and send it to the OCC. Add rate limit to polling the OCC (in case user-space

[PATCH v2 05/10] drivers/hwmon/occ: Add sensor attributes and register hwmon device

From: "Edward A. James" Setup the sensor attributes for every OCC sensor found by the first poll response. Register the attributes with hwmon. Add hwmon documentation for the driver. Signed-off-by: Edward A. James --- drivers/hwmon/occ/common.c | 432

[PATCH v2 08/10] Documentation: hwmon: Add OCC documentation

44 Documentation/hwmon/occ diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ new file mode 100644 index 000..dcae911 --- /dev/null +++ b/Documentation/hwmon/occ @@ -0,0 +1,74 @@ +Kernel driver occ-hwmon +=== + +Supported chips: + * POWER8 + * POWER9 + +Aut

[PATCH v2 09/10] Documentation: ABI: Add occ-hwmon driver sysfs documentation

From: "Edward A. James" Detail the sysfs attributes provided by the occ-hwmon driver. Signed-off-by: Edward A. James --- Documentation/ABI/testing/sysfs-driver-occ-hwmon | 77 1 file changed, 77 insertions(+) create mode 100644

[PATCH v2 00/10] drivers/hwmon: Add On-Chip Controller (OCC) hwmon driver

From: "Edward A. James" This series adds a hwmon driver to support the OCC on POWER8 and POWER9 processors. The OCC is an embedded processor that provides realtime power and thermal monitoring and management. This driver has two different platform drivers as a "base" for the

[PATCH v2 01/10] drivers/hwmon: Add On-Chip Controller (OCC) hwmon driver

s = I2C_CLASS_HWMON, + .driver = { + .name = "occ-hwmon", + .of_match_table = p8_i2c_occ_of_match, + }, + .probe = p8_i2c_occ_probe, +}; + +module_i2c_driver(p8_i2c_occ_driver); + +MODULE_AUTHOR("Eddie James <eaja...@us.ibm.com>&quo

[PATCH v2 10/10] dt-bindings: i2c: Add P8 OCC hwmon driver documentation

From: "Edward A. James" Document the bindings for I2C-based OCC hwmon driver. Signed-off-by: Edward A. James --- .../devicetree/bindings/i2c/ibm,p8-occ-hwmon.txt | 25 ++ 1 file changed, 25 insertions(+) create mode 100644

[PATCH v2 07/10] drivers/hwmon/occ: Add error handling

From: "Edward A. James" Add logic to detect a number of error scenarios on the OCC. Export any errors through an additional non-hwmon device attribute. The error counting and state verification are required by the OCC hardware specification. Signed-off-by: Edward A. James

[PATCH v5 0/6] drivers/i2c: Add FSI-attached I2C master algorithm

From: "Edward A. James" This series adds an algorithm for an I2C master physically located on an FSI slave device. The I2C master has multiple ports, each of which may be connected to an I2C slave. Access to the I2C master registers is achieved over FSI bus. Due to the

[PATCH v5 4/6] drivers/i2c: Add I2C master locking to FSI algorithm

From: "Edward A. James" Since there are many ports per master, each with it's own adapter and chardev, we need some locking to prevent transfers from changing the\ master state while other transfers are in progress. Signed-off-by: Edward A. James ---

[PATCH v5 1/6] drivers/i2c: Add FSI-attached I2C master algorithm

c/busses/i2c-fsi.c new file mode 100644 index 000..79475f8 --- /dev/null +++ b/drivers/i2c/busses/i2c-fsi.c @@ -0,0 +1,244 @@ +/* + * Copyright 2017 IBM Corporation + * + * Eddie James <eaja...@us.ibm.com> + * + * This program is free software; you can redistribute it and/or + * modify

[PATCH v5 2/6] drivers/i2c: Add port structure to FSI algorithm

From: "Edward A. James" Add and initialize I2C adapters for each port on the FSI-attached I2C master. Ports for each master are defined in the devicetree. Signed-off-by: Edward A. James --- drivers/i2c/busses/i2c-fsi.c | 96

[PATCH v5 3/6] drivers/i2c: Add transfer implementation for FSI algorithm

From: "Edward A. James" Execute I2C transfers from the FSI-attached I2C master. Use polling instead of interrupts as we have no hardware IRQ over FSI. Signed-off-by: Edward A. James --- drivers/i2c/busses/i2c-fsi.c | 197

[PATCH v5 6/6] dt-bindings: i2c: Add FSI-attached I2C master dt binding documentation

From: "Edward A. James" Document the bindings. Signed-off-by: Edward A. James Acked-by: Rob Herring --- Documentation/devicetree/bindings/i2c/i2c-fsi.txt | 40 +++ 1 file changed, 40 insertions(+) create mode

[PATCH v5 5/6] drivers/i2c: Add bus recovery for FSI algorithm

From: "Edward A. James" Bus recovery should reset the engine and force clock the bus 9 times to recover most situations. Signed-off-by: Edward A. James --- drivers/i2c/busses/i2c-fsi.c | 75 1 file changed,

Re: [PATCH 6/6] Documentation/devicetree: Add FSI-attached I2C master dt bindings

On 06/26/2017 08:06 PM, Jeremy Kerr wrote: Hi Eddie, +Required properties: + - compatible = "ibm,i2cm-fsi"; + - reg = < address size >; : The FSI CFAM address and address space + size. + - #address-cells = <1>; : Number of

[PATCH v2 2/5] drivers/fsi/sbefifo: Add in-kernel API

From: "Edward A. James" Refactor the user interface of the SBEFIFO driver to allow for an in-kernel read/write API. Add exported functions for other drivers to call, and add an include file with those functions. Also parse the device tree for child nodes and create child

[PATCH v2 1/5] drivers/fsi: Add SBEFIFO FSI client device driver

spin_unlock(>lock); + + WRITE_ONCE(sbefifo->rc, -ENODEV); + + wake_up(>wait); + sbefifo_put(sbefifo); + } + + return 0; +} + +static struct fsi_device_id sbefifo_ids[] = { + { + .engine_type = FSI_ENGID_SB

[PATCH v2 0/5] drivers/fsi: Add SBEFIFO and OCC drivers

From: "Edward A. James" This series adds two FSI-based device drivers. The OCC driver is dependent on the SBEFIFO driver, as a user of it's in-kernel API. The in-kernel API provided by the OCC driver will be used by a hwmon driver (on the lkml as "Add On-Chip Controller (OCC)

[PATCH v2 3/5] drivers/fsi: Add On-Chip Controller (OCC) driver

of_device_id occ_match[] = { + { .compatible = "ibm,p9-occ" }, + { }, +}; + +static struct platform_driver occ_driver = { + .driver = { + .name = "occ", + .of_match_table = occ_match, + }, + .probe = occ_probe, + .remove = occ_remove, +}; + +static int occ_init(void) +{ + occ_wq = create_singlethread_workqueue("occ"); + if (!occ_wq) + return -ENOMEM; + + return platform_driver_register(_driver); +} + +static void occ_exit(void) +{ + destroy_workqueue(occ_wq); + + platform_driver_unregister(_driver); + + ida_destroy(_ida); +} + +module_init(occ_init); +module_exit(occ_exit); + +MODULE_AUTHOR("Eddie James <eaja...@us.ibm.com>"); +MODULE_DESCRIPTION("BMC P9 OCC driver"); +MODULE_LICENSE("GPL"); -- 1.8.3.1

[PATCH v2 4/5] drivers/fsi/occ: Add in-kernel API

From: "Edward A. James" Add an in-kernel read/write API with exported functions. This is necessary for other drivers which want to directly interact with the OCC. Also parse the OCC device tree node for child nodes and create child platform devices accordingly.

[PATCH v2 5/5] Documentation/devicetree/bindings: Add FSI device documentation

From: "Edward A. James" Document the bindings for the SBE and OCC devices. SBE devices are located on a CFAM on an FSI bus, and OCC devices are accessed through the SBEFIFO. Signed-off-by: Edward A. James ---

Re: [PATCH linux v9 2/5] hwmon: occ: Add sysfs interface

On 04/02/2017 06:19 AM, Guenter Roeck wrote: On 03/14/2017 01:55 PM, Eddie James wrote: From: "Edward A. James" <eaja...@us.ibm.com> Add a generic mechanism to expose the sensors provided by the OCC in sysfs. Signed-off-by: Edward A. James <eaja...@us.ibm.com> Signed-

[PATCH 4/4] drivers/hwmon/pmbus: Add debugfs for status registers

From: "Edward A. James" Export all the available status registers through debugfs, if the client driver wants them. Signed-off-by: Edward A. James --- drivers/hwmon/pmbus/pmbus.c | 24 +- drivers/hwmon/pmbus/pmbus.h | 11 +++

[PATCH 0/4] drivers/hwmon/pmbus: Core extensions for STATUS_WORD support and debugfs

From: "Edward A. James" This series adds some functionality to the pmbus core. The first two patches provide support for the STATUS_WORD register. This allows more default alarm attributes to be used, as the upper byte of the status register is available. The third patch

[PATCH 3/4] drivers/hwmon/pmbus: Add generic alarm bit for iin and pin

From: "Edward A. James" Add PB_STATUS_INPUT as the generic alarm bit for iin and pin. We also need to redo the status register checking before setting up the boolean attribute, since it won't necessarily check STATUS_WORD if the device doesn't support it, which we need for

[PATCH 1/4] drivers/hwmon/pmbus: Switch status registers to 16 bit

From: "Edward A. James" Switch the storage of status registers to 16 bit values. This allows us to store all the bits of STATUS_WORD. Signed-off-by: Edward A. James --- drivers/hwmon/pmbus/pmbus_core.c | 14 +++--- 1 file changed, 7

[PATCH 2/4] drivers/hwmon/pmbus: Access word data for STATUS_WORD

From: "Edward A. James" Pmbus always reads byte data from the status register, even if configured to use STATUS_WORD. Use a function pointer to read the correct amount of data from the registers. Also switch to try STATUS_WORD first before STATUS_BYTE on init. Signed-off-by:

[PATCH linux 4/4] drivers/fsi/occ: Add in-kernel API

From: "Edward A. James" Add an in-kernel read/write API with exported functions. This is necessary for other drivers which want to directly interact with the OCC. Also parse the OCC device tree node for child nodes and create child platform devices accordingly.

[PATCH linux 1/4] drivers/fsi: Add SBEFIFO FSI client device driver

kfree(xfr); + spin_unlock(>lock); + + WRITE_ONCE(sbefifo->rc, -ENODEV); + + wake_up(>wait); + sbefifo_put(sbefifo); + } + + return 0; +} + +static struct fsi_device_id sbefifo_ids[] = { + { +

[PATCH linux 3/4] drivers/fsi: Add On-Chip Controller (OCC) driver

+ ida_simple_remove(_ida, occ->idx); + + return 0; +} + +static const struct of_device_id occ_match[] = { + { .compatible = "ibm,p9-occ" }, + { }, +}; + +static struct platform_driver occ_driver = { + .driver = { + .name = "occ", + .of

[PATCH linux 2/4] drivers/fsi/sbefifo: Add in-kernel API

From: "Edward A. James" Refactor the user interface of the SBEFIFO driver to allow for an in-kernel read/write API. Add exported functions for other drivers to call, and add an include file with those functions. Also parse the device tree for child nodes and create child

[PATCH linux 0/4] drivers/fsi: Add SBEFIFO and OCC drivers

From: "Edward A. James" This series adds two FSI-based device drivers. The OCC driver is dependent on the SBEFIFO driver, as a user of it's in-kernel API. The in-kernel API provided by the OCC driver will be used by a hwmon driver (to be sent to the lkml soon). I previously

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