-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/i2c/busses/i2c-mv64xxx.c | 143 +--
1 file changed, 139 insertions(+), 4 deletions(-)
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index 6356439..5376dc3
to use this new
feature and should go through mvebu subsystem.
The 2 patches are independents for building or even at runtime, but of
course we need both of them to be able to use the I2C Transaction
Generator on the Armada XP SoC.
Thanks
Gregory CLEMENT (1):
ARM: dts: mvebu: Add the i2c-bridge
Hello,
This series contains a real fix for the I2C controller of the Armada
XP SoC and a patch closer to a improvement than a fix.
They are independent and are only in the same series because they are
kind of fixes.
They are based on 3.10-rc4, and they will be small conflicts if they
are
Hello,
This series contains a real fix for the I2C controller of the Armada
XP SoC and a patch closer to a improvement than a fix.
They are independent and are only in the same series because they are
kind of fixes.
They are based on 3.10-rc4, and they will be small conflicts if they
are
this time
is 2.9us.
So this patch adds a 5us delay for the start case only if the
mv64xxx_i2c_errata_delay flag is set.
[gregory.clem...@free-electrons.com: Merge the incoming commits into
this single one]
[gregory.clem...@free-electrons.com: Reword the commit log]
Signed-off-by: Gregory CLEMENT
]
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Signed-off-by: Zbigniew Bodek z...@semihalf.com
---
drivers/i2c/busses/i2c-mv64xxx.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index 60cac9f
The OpenBlocks A6 board has one software-controlled button on the
front side, labeled INIT, so we add minimal support for this button
in the kernel.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/kirkwood-openblocks_a6.dts | 13 +
1 file
On 05/02/2013 09:43 PM, Gregory CLEMENT wrote:
The OpenBlocks A6 board has one software-controlled button on the
front side, labeled INIT, so we add minimal support for this button
in the kernel.
Oh, I found that Thomas have already submitted the same patch but I was
misleaded because I
On 05/02/2013 10:02 PM, Andrew Lunn wrote:
On Thu, May 02, 2013 at 09:48:50PM +0200, Sebastian Hesselbarth wrote:
On 05/02/2013 09:35 PM, Jason Gunthorpe wrote:
I have kirkwood HW but I haven't had time to make newer kernels run on
it, otherwise I'd test it too :(
I also have kirkwood HW but
/at91_pmc.h =
include/linux/clk/at91.h (76%)
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from the cpuinit tree.
I fixed it up (see below) and can carry the fix as necessary (no action is
required).
From my point of view it looks good.
Thanks,
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/
However we don't build Linus master but we could add it.
Best regards,
Thomas
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their dtb. If I understood well it is the philosophy behind the device tree.
Regards,
But again, I am very open for suggestions here.
Sebastian
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On 09/10/2013 10:50, Mark Rutland wrote:
On Tue, Oct 08, 2013 at 05:33:23PM +0100, Gregory CLEMENT wrote:
On 08/10/2013 18:05, Sebastian Hesselbarth wrote:
On 10/08/2013 03:41 PM, Mark Rutland wrote:
On Tue, Oct 08, 2013 at 01:24:28PM +0100, Sebastian Hesselbarth wrote:
This add a compatible
compatible string.
[...]
Regards,
Gregory
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the body of a message
-by: Arnd Bergmann a...@arndb.de
Acked-by: Jason Cooper ja...@lakedaemon.net
Cc: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/clocksource/time-armada-370-xp.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/clocksource/time-armada-370-xp.c
b/drivers
On 19/05/2014 13:09, Paul Bolle wrote:
On Fri, 2014-05-16 at 15:07 -0400, Jason Cooper wrote:
On Thu, May 15, 2014 at 12:17:35PM +0200, Gregory CLEMENT wrote:
This patch adds the selection of the config symbol needed to build the
USB3 support for Armada 38x into mvebu_v7_defconfig.
Signed
it doesn't work). Instead, add a 'struct
clk*' field in xhci_hcd to support the clock in xhci-plat,
exactly like xhci_hcd has msix_count and msix_entries for
xhci-pci.
- Misc minor code style improvements.
Gregory CLEMENT (14):
usb: ehci-orion: fix clock reference leaking
: 8c869edaee07c623066266827371235fb9c12e01 ('ARM: Orion: EHCI: Add support
for enabling clocks')
Cc: sta...@vger.kernel.org # v3.8+
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Acked-by: Alan Stern st
properly. Also call phy_power_off() when needed, and rename goto
labels.]
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Acked-by: Alan Stern st...@rowland.harvard.edu
---
drivers/usb/host/ehci-orion.c | 28
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
In preparation to the introduction of additional initialization steps
in ehci_orion_drv_probe(), we rename the error goto labels from err1,
err2 and err3 names to some more meaningful names.
Signed-off-by: Thomas Petazzoni
the Armada 375 and
Armada 38x XHCI controllers, and therefore enable the relevant quirk.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Acked-by: Mathias Nyman mathias.ny...@linux.intel.com
---
drivers/usb/host
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in multi_v7_defconfig.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Signed-off-by: Thomas Petazzoni thomas.petazz...@free
This patch add the selection of the config symbol to build the USB3
support for Armada 375.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu
The Marvell Armada 38x SoCs contains one EHCI controller. This commit
adds the Device Tree description of this interface at the SoC level,
and also enables the USB2 port on the Armada 385 DB platform.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada
The Marvell Armada 375 SoCs contain a xHCI controller. This commit
adds the Device Tree description of this interfaces at the SoC level,
and also enables the USB3 port on the Armada 375 DB platform.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Signed-off-by: Thomas Petazzoni
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in mvebu_v7_defconfig.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Signed-off-by: Thomas Petazzoni thomas.petazz...@free
The Marvell Armada 375 SoCs contains one EHCI controller. This commit
adds the Device Tree description of this interfaces at the SoC level,
and also enables the USB2 port on the Armada 375 DB platform.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Signed-off-by: Thomas
is now supported.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Acked-by: Mathias Nyman mathias.ny...@linux.intel.com
---
Documentation/devicetree/bindings/usb/usb-xhci.txt | 7 ++-
1 file changed, 6 insertions
This patch adds the selection of the config symbol needed to build the
USB3 support for Armada 38x into mvebu_v7_defconfig.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
arch/arm/mach-mvebu/Kconfig | 1
The Marvell Armada 38x SoCs contains two xHCI controllers. This commit
adds the Device Tree description of those interfaces at the SoC level,
and also enables the two USB3 ports on the Armada 385 DB platform and
one USB3 port on the Armada 385 RD platform.
Signed-off-by: Gregory CLEMENT
-plat, it might be used by other drivers in
the future. Moreover, the xhci_hcd structure already holds other
members such as msix_count and msix_entries, which are MSI-X specific,
and therefore only used by xhci-pci.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Signed-off
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
This commit updates the Device Tree binding documentation of
ehci-orion to take into account the fact that we can now optionally
pass a clock and a PHY reference.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Sorting the headers in alphabetic order will help to reduce the conflict
when adding new headers later.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Acked-by: Felipe Balbi ba...@ti.com
---
drivers/usb/host/xhci-plat.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
Commit 77dae54ab385033e488d8b07045bc7f8d931740f ('ARM: Kirkwood:
ehci-orion: Add device tree binding') added the Device Tree binding
for the ehci-orion driver. To achieve that with the irq, it used the
irq_of_parse_and_map() function when
On 15/05/2014 15:34, Jason Cooper wrote:
On Thu, May 15, 2014 at 05:26:36PM +0400, Sergei Shtylyov wrote:
Hello.
On 05/15/2014 02:17 PM, Gregory CLEMENT wrote:
The Marvell Armada 375 SoCs contains one EHCI controller. This commit
However, you're adding two. :-)
So it would seem
Armada 375 comes with an USB2 host and device controller and an USB3
controller. The USB cluster control register allows to manage common
features of both USB controllers. This commit adds the Device Tree
binding documentation for this piece of hardware.
Signed-off-by: Gregory CLEMENT
On Armada 375, the USB cluster allows to control the cluster composed
of the USB2 and USB3 host controllers.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-375.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/armada
Now that the USB cluster node has been added, use it as a PHY provider
for the USB controller linked to it: the first EHCI and the xHCI.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-375.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git
in
xhci_hcd. While only used for now in xhci-plat, here again, it might
be used by other drivers in the future.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/usb/host/xhci-plat.c | 29 -
drivers/usb/host/xhci.h | 2 ++
2 files changed
-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
drivers/phy/Kconfig | 6 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-armada375-usb2.c | 140
his dts.
During the debug I also noticed that xhci don't handle the PHY so I
also add the support for an optional phy. This patch is for Mathias
Nyman.
Thanks,
Gregory
Gregory CLEMENT (5):
phy: add support for USB cluster on the Armada 375 SoC
Documentation: dt-bindings: document the Armada
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Hi Kishon,
On 23/05/2014 11:24, Kishon Vijay Abraham I wrote:
Hi,
On Friday 16 May 2014 09:52 PM, Gregory CLEMENT wrote:
Armada 375 comes with an USB2 host and device controller and an USB3
controller. The USB cluster control register allows to manage common
features of both USB
, could you pick it up and append your 375 binding to it? We
can avoid merge conflicts that way.
yes sure, I will do it
Thanks
Andrew
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On 23/05/2014 11:28, Kishon Vijay Abraham I wrote:
Hi,
On Friday 16 May 2014 09:52 PM, Gregory CLEMENT wrote:
This commit extends the xhci-plat so that it can optionally be passed
a reference to a PHY through the Device Tree. It will be useful for
the Armada 375 SoCs. If no PHY is provided
On 23/05/2014 11:20, Kishon Vijay Abraham I wrote:
Hi,
On Friday 16 May 2014 09:52 PM, Gregory CLEMENT wrote:
The Armada 375 SoC comes with an USB2 host and device controller and
an USB3 controller. The USB cluster control register allows to manage
common features of both USB controllers
On 04/02/2014 00:36, Sebastian Hesselbarth wrote:
On 02/04/2014 12:16 AM, Willy Tarreau wrote:
On Thu, Jan 30, 2014 at 11:31:32AM +0100, Sebastian Hesselbarth wrote:
On 01/30/14 11:24, Gregory CLEMENT wrote:
On 25/01/2014 19:19, Sebastian Hesselbarth wrote:
This patch set fixes clk init order
,
this patch adds this work inside the framework itself.
Using the data of the device tree the of_clk_init function now delayed
the initialization of a clock provider if its parent provider was not
ready yet.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
Mike,
this patch could
1;
}
/**
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On 05/02/2014 15:48, Gregory CLEMENT wrote:
Hi Boris,
On 05/02/2014 10:48, Boris BREZILLON wrote:
The parent dependency check is only available on the first parent of a given
clk.
Add support for strict dependency check: all parents of a given clk must be
initialized.
Signed-off
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn and...@lunn.ch
Cc: Gregory Clement gregory.clem...@free-electrons.com
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Ezequiel Garcia ezequiel.gar...@free-electrons.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel
.
Regards,
Gregory
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code.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/pci/host/pci-mvebu.c | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c
index 2aa7b77c7c88..0b4b99fa1fb5 100644
--- a/drivers/pci/host/pci
On 02/01/2014 11:46, Thomas Petazzoni wrote:
Dear Gregory CLEMENT,
On Thu, 2 Jan 2014 11:41:36 +0100, Gregory CLEMENT wrote:
In the commit b42285f66f871a989, Sebastian moved clock enable before
register access, but during the merge of the commit
9f352f0e6c0fa2dc608812df PCI: mvebu
reason to not have pulled it, yet?
http://www.spinics.net/lists/arm-kernel/msg316518.html
I would really like that it was sorted out, because all the build using
the mvebu related defconfig fails since two weeks because of it now.
I am ready to help if you need it.
Thanks!
--
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The cpu idle support will need to access to Power Management Service
Unit. This commit adds the architecture related functions that will be
used in the idle path of the cpuidle driver.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pmsu.c | 132
on the work of Nadav Haklai.
Signed-off-by: Nadav Haklai nad...@marvell.com
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/cpuidle/Kconfig.arm | 5 ++
drivers/cpuidle/Makefile| 1 +
drivers/cpuidle/cpuidle-armada-370-xp.c | 93
The cpuidle is a platform driver so we register the device just after
the initialization of the board in an arch_initcall.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pmsu.c | 22 ++
1 file changed, 22 insertions(+)
diff --git
In order to have well encapsulated code, we use notifier callbacks for
CPU_PM_ENTER and CPU_PM_EXIT inside the mvebu power management code.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pmsu.c | 19 +++
1 file changed, 19 insertions
Setting the start (or boot) address of a CPU is no more used only
during SMP bring up, but it will also be used by the CPU idle
functions or later by the CPU hot plug ones.
This commit moves it in a separate function.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch
) to be used by
the exposed functions (ll_add_cpu_to_smp_group and
ll_enable_coherency)
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/coherency.c| 8 ++--
arch/arm/mach-mvebu/coherency_ll.S | 94 +-
arch/arm/mach-mvebu
continue to support it during a few
releases.
Cc: devicet...@vger.kernel.org
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
.../devicetree/bindings/arm/armada-370-xp-pmsu.txt | 14 ++
arch/arm/boot/dts/armada-xp.dtsi | 11
This commit adds a function which adjusts the PMSU configuration to
automatically power down the L2 and coherency fabric when we enter a
certain idle state.
This feature is part of the Power Management Service Unit of the
Armada 370 and Armada XP SoCs.
Signed-off-by: Gregory CLEMENT gregory.clem
When going to deep idle we need to disable the SoC snooping (aka
hardware coherency support). Playing with the coherency fabric
requires to use assembly code to be sure that the compiler doesn't
reorder the instructions nor do wrong optimization.
Signed-off-by: Gregory CLEMENT gregory.clem
binding
This patch also adds warnings if one of the base registers set can't
be ioremapped.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pmsu.c | 47 +-
1 file changed, 42 insertions(+), 5 deletions(-)
diff
set_cpu_coherent() took the SMP group ID as parameter. But this
parameter was never used, and the CPU always uses the SMP group 0. So
we can remove this parameter.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/coherency.c | 4 ++--
arch/arm/mach-mvebu
ll_set_cpu_coherent is always used on the current CPU, so instead of
passing the CPU id as argument, ll_set_cpu_coherent() can find it by
itself.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Acked-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
arch/arm/mach
PJ4B needs extra instructions for suspend and resume, so instead of
using the armv7 version, this commit introduces specific versions for
PJ4B.
Cc: Russell King li...@arm.linux.org.uk
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mm/proc-v7.S | 28
or the virtual address.
This patch add a check of the MMU bit to choose the accurate address,
then the calling function doesn't have to pass this information.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/coherency.c| 6 +++---
arch/arm/mach-mvebu
rule under the new ARM SoC section in the Makefile
* Rebased on Linus Torvalds master branch of Thursday September 12
Gregory CLEMENT (14):
ARM: PJ4B: Add cpu_suspend/cpu_resume hooks for PJ4B
ARM: mvebu: remove the address parameter for ll_set_cpu_coherent
ARM: mvebu: ll_set_cpu_coherent
Hi Jason,
On 26/03/2014 01:30, Jason Cooper wrote:
On Tue, Mar 25, 2014 at 11:48:18PM +0100, Gregory CLEMENT wrote:
The initial binding for PMSU were wrong. It didn't take into account
all the registers from the PMSU and moreover it referred to registers
which are not part of PMSU
On 26/03/2014 01:42, Jason Cooper wrote:
Gregory,
On Tue, Mar 25, 2014 at 11:48:11PM +0100, Gregory CLEMENT wrote:
...
The first patch should go through ARM subsystem and should be taken by
Russell King. I made few change on it following Lorenzo advice and
now it will reuse the cpu v7
On 26/03/2014 11:31, Thomas Petazzoni wrote:
Dear Gregory CLEMENT,
On Tue, 25 Mar 2014 23:48:25 +0100, Gregory CLEMENT wrote:
+int __init armada_370_xp_cpu_pm_init(void)
+{
+if (!((of_find_compatible_node(NULL, NULL,
marvell,armada-370-xp-pmsu
On 26/03/2014 12:52, Sebastian Hesselbarth wrote:
On 03/25/2014 11:48 PM, Gregory CLEMENT wrote:
ll_set_cpu_coherent is always used on the current CPU, so instead of
passing the CPU id as argument, ll_set_cpu_coherent() can find it by
itself.
Signed-off-by: Gregory CLEMENT gregory.clem
On 26/03/2014 13:04, Sebastian Hesselbarth wrote:
On 03/25/2014 11:48 PM, Gregory CLEMENT wrote:
The initial binding for PMSU were wrong. It didn't take into account
all the registers from the PMSU and moreover it referred to registers
which are not part of PMSU.
The Power Management Unit
On 26/03/2014 16:19, Kevin Hilman wrote:
[+ imx6 maintainers ]
On Thu, Mar 20, 2014 at 8:52 PM, Mike Turquette mturque...@linaro.org wrote:
Quoting Gregory CLEMENT (2014-02-28 02:46:12)
Hi Mike,
On 24/02/2014 19:10, Gregory CLEMENT wrote:
Until now the clock providers were initialized
Hi Fabio,
On 26/03/2014 17:22, Fabio Estevam wrote:
Hi Gregory,
On Wed, Mar 26, 2014 at 1:02 PM, Gregory CLEMENT
gregory.clem...@free-electrons.com wrote:
I don't have any imx6 board, but should it be possible for you or the imx6
maintainer to add earlyprintk to see exactly what happen
) {
+ pr_warn(%s: Now force the initialization of the
remaning clocks\n, __func__);
force = true;
+ }
}
}
--
1.8.1.2
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or the virtual address.
This patch add a check of the MMU bit to choose the accurate address,
then the calling function doesn't have to pass this information.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/coherency.c| 6 +++---
arch/arm/mach-mvebu
In order to have well encapsulated code, we use notifier callbacks for
CPU_PM_ENTER and CPU_PM_EXIT inside the mvebu power management code.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pmsu.c | 18 ++
1 file changed, 18 insertions
by Thomas)
* Moved the config entry in Kconfig.arm, and rename the config symbol
according the pattern used by other arm cpu: ARM_soc name_CPUIDLE
* Moved the build rule under the new ARM SoC section in the Makefile
* Rebased on Linus Torvalds master branch of Thursday September 12
Gregory
on the work of Nadav Haklai.
Signed-off-by: Nadav Haklai nad...@marvell.com
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/cpuidle/Kconfig.arm | 5 ++
drivers/cpuidle/Makefile| 1 +
drivers/cpuidle/cpuidle-armada-370-xp.c | 93
The cpuidle is a platform driver so we register the device just after
the initialization of the board in an arch_initcall.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pmsu.c | 37 +
1 file changed, 37 insertions
) to be used by
the exposed functions (ll_add_cpu_to_smp_group and
ll_enable_coherency)
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/coherency.c| 8 ++--
arch/arm/mach-mvebu/coherency_ll.S | 92 +-
arch/arm/mach-mvebu
The cpu idle support will need to access to Power Management Service
Unit. This commit adds the architecture related functions that will be
used in the idle path of the cpuidle driver.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pmsu.c | 132
When going to deep idle we need to disable the SoC snooping (aka
hardware coherency support). Playing with the coherency fabric
requires to use assembly code to be sure that the compiler doesn't
reorder the instructions nor do wrong optimization.
Signed-off-by: Gregory CLEMENT gregory.clem
set_cpu_coherent() took the SMP group ID as parameter. But this
parameter was never used, and the CPU always uses the SMP group 0. So
we can remove this parameter.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/coherency.c | 4 ++--
arch/arm/mach-mvebu
This commit adds a function which adjusts the PMSU configuration to
automatically power down the L2 and coherency fabric when we enter a
certain idle state.
This feature is part of the Power Management Service Unit of the
Armada 370 and Armada XP SoCs.
Signed-off-by: Gregory CLEMENT gregory.clem
PJ4B needs extra instructions for suspend and resume, so instead of
using the armv7 version, this commit introduces specific versions for
PJ4B.
Cc: Russell King li...@arm.linux.org.uk
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mm/proc-v7.S | 28
ll_set_cpu_coherent is always used on the current CPU, so instead of
passing the CPU id as argument, ll_set_cpu_coherent() can find it by
itself.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Acked-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
arch/arm/mach
Sorting the headers in alphabetic order will help to reduce the conflict
when adding new headers later.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Acked-by: Felipe Balbi ba...@ti.com
---
drivers/usb/host/xhci-plat.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions
Extend the compatible string list with armada-380-xhci. It is used to
describe xhci controller which is in the Armada 38x SoCs.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
Documentation/devicetree/bindings/usb/usb-xhci.txt | 3 ++-
1 file changed, 2 insertions(+), 1
The Marvell Armada 375 SoCs contain a xHCI host. This commit adds the
Device Tree description of this interfaces at the SoC level, and also
enables the USB3 port on the Armada 375 DB platform.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-375
On Armada 375, the USB cluster allows to control the cluster composed
of the USB2 and USB3 host controllers.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-375.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/armada
The Marvell Armada 375 SoCs contains one EHCI host. This commit adds
the Device Tree description of this interfaces at the SoC level, and
also enables the USB2 port on the Armada 375 DB platform.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-375
This patch add the selection of the config symbol to build the USB3
support for Armada 375.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu
Extend the compatible string list with armada-375-xhci. It is used to
describe xHCI controller which is in the Armada 375 SoC.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
Documentation/devicetree/bindings/usb/usb-xhci.txt | 3 ++-
1 file changed, 2 insertions(+), 1
The Armada 375 SoC comes with an USB2 host and device controller and
an USB3 controller. The USB cluster control register allows to manage
common features of both USB controllers. It uses the generic PHY
framework
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/phy
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in mvebu_v7_defconfig.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/configs/mvebu_v7_defconfig | 1 +
1 file
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