...@gmail.com
Acked-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Thanks,
Gregory
---
Wolfram,
Actually, I was hoping that default pin hog mechanism
(pinctrl-names = default) could also be used from i2c mux nodes
and devices. Anyway, I had a look at i2c-core/mux code and failed
-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Acked-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Thanks,
Gregory
---
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn and...@lunn.ch
Cc: Gregory Clement gregory.clem...@free-electrons.com
Cc: Gabriel Dobato doba
Hi Sebastian,
On 17/02/2015 19:52, Sebastian Hesselbarth wrote:
Add pcie[01] node labels to allow to reference them easily from
board level.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Acked-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Thanks,
Gregory
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= armadaxp_filt_data,
+ },
+ {
.compatible = marvell,armada370-thermal,
.data = armada370_data,
},
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Hi Ezequiel,
On 25/02/2015 19:17, Ezequiel Garcia wrote:
On 02/25/2015 02:04 PM, Gregory CLEMENT wrote:
My conclusions about these registers are based on experimental data. The
documentation is very sparse, but the Thermal Manager Control and Status
Register looks like the preferred register
deletions(-)
delete mode 100644 arch/arm/boot/dts/dove-cm-a510.dts
create mode 100644 arch/arm/boot/dts/dove-cm-a510.dtsi
create mode 100644 arch/arm/boot/dts/dove-sbc-a510.dts
---
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn and...@lunn.ch
Cc: Gregory Clement gregory.clem...@free
: invalid state %d\n, __func__,
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Hi Jason,
On 03/04/2015 01:23, Jason Cooper wrote:
On Mon, Mar 30, 2015 at 04:04:37PM +0200, Gregory CLEMENT wrote:
On the Armada 370/XP SoCs, in standby mode the SoC stay powered and it
is possible to wake-up from any interrupt sources. This patch adds
flag to the MPIC irqchip driver to let
On 20/04/2015 17:15, Andrew wrote:
Gregory CLEMENT писал 20.04.2015 18:04:
Hi Andrew,
On 13/04/2015 16:32, Andrew wrote:
Gregory CLEMENT писал 13.04.2015 17:16:
Hi Andrew(s),
On 12/04/2015 21:47, Andrew Lunn wrote:
On Sun, Apr 12, 2015 at 06:41:31PM +0300, Andrew wrote:
Andrew Lunn
Hi Andrew,
On 13/04/2015 16:32, Andrew wrote:
Gregory CLEMENT писал 13.04.2015 17:16:
Hi Andrew(s),
On 12/04/2015 21:47, Andrew Lunn wrote:
On Sun, Apr 12, 2015 at 06:41:31PM +0300, Andrew wrote:
Andrew Lunn ?? 12.04.2015 17:58:
Okay, got it.
I'll file a bug about this issue
soon, get this removed now.
Note that there would normally be a corresponding removal of
a .previous directive for each __CPUINIT in asm files, but in
this case it appears that this single function file was never
paired off with one.
Of course you have my
Acked-by: Gregory CLEMENT gregory.clem
on these two SoCs were the r3p3.
At the end I don't know which one of the patches to apply...
But in any case I will add
Acked-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Thanks,
Gregory
Signed-off-by: Valentin Rothberg valentinrothb...@gmail.com
---
I detected this issue
Hi Russell,
On 28/04/2015 18:54, Russell King - ARM Linux wrote:
On Tue, Apr 28, 2015 at 06:41:41PM +0200, Gregory CLEMENT wrote:
Hi Valentin,
On 28/04/2015 18:02, Valentin Rothberg wrote:
ARM_ERRATA_753970 is not defined in Kconfig, so that both selects turn
out to be nops. Hence, we can
on 3.18.6, on 3.19 and up - it writes data to the port
(and mcu acks it),
but can't read any responses.
Same thing happens to the python (pyserial inside) implementation of the
fan-daemon:
https://github.com/martignlo/DNS-320L
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---
arch/arm/boot/dts/dove-cubox.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot
arch/arm/boot/dts/dove-sbc-a510.dts
---
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn and...@lunn.ch
Cc: Gregory Clement gregory.clem...@free-electrons.com
Cc: Gabriel Dobato doba...@gmail.com
Cc: Arnd Bergmann a...@arndb.de
Cc: Olof Johansson o...@lixom.net
Cc: linux-arm-ker
Hi Sebastian,
On 06/05/2015 15:13, Arnd Bergmann wrote:
On Wednesday 06 May 2015 15:06:29 Gregory CLEMENT wrote:
On 04/05/2015 22:08, Sebastian Hesselbarth wrote:
This is v2 of the patch set to improve current mainline support for
the Compulab CM-A510 System-on-Module (SoM) and its default
Hi Mike, Sebastian,
On 08/05/2015 21:00, Michael Turquette wrote:
Quoting Gregory CLEMENT (2015-05-06 06:14:22)
Hi Sebastian,
On 04/05/2015 23:04, Sebastian Hesselbarth wrote:
Si5351 clock generator on CuBox uses XTAL as clock reference, name the
clock phandle accordingly.
as soon
driver is loaded first, then the old
one will manage to be loaded too. I think that just adding a
request_region()/release_region() (or converting the ioremap in a
devm_ioremap_resource() in the old driver would be enough.
Gregory
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Hi Maxime,
On 17/04/2015 16:32, Maxime Ripard wrote:
On Fri, Apr 17, 2015 at 04:19:22PM +0200, Boris Brezillon wrote:
Hi Gregory,
On Fri, 17 Apr 2015 15:01:01 +0200
Gregory CLEMENT gregory.clem...@free-electrons.com wrote:
Hi Boris,
On 17/04/2015 10:39, Boris Brezillon wrote:
On Fri, 17
On 17/04/2015 16:50, Maxime Ripard wrote:
On Fri, Apr 17, 2015 at 04:40:43PM +0200, Gregory CLEMENT wrote:
Hi Maxime,
On 17/04/2015 16:32, Maxime Ripard wrote:
On Fri, Apr 17, 2015 at 04:19:22PM +0200, Boris Brezillon wrote:
Hi Gregory,
On Fri, 17 Apr 2015 15:01:01 +0200
Gregory CLEMENT
adaptation should be related
to the SRAM. It will be also needed to find a way to be able to load only one
driver
at a time: either the old or the new, but not both.
However I still wonder if it worth the effort.
Thanks,
Gregory
thx,
Jason.
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?
Thanks,
Gregory
Andrew
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on the datasheet I have (in case of it was different of the public
one)
and for all the variant of the Armada 370: 88F6710, 88F6707, and 88F6W11 the
MPP63
is list as GPO.
I will ask Marvell to see if it was a typo on their datasheet.
Thanks,
Gregory
Andrew
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On 17/04/2015 17:49, Maxime Ripard wrote:
On Fri, Apr 17, 2015 at 05:01:55PM +0200, Gregory CLEMENT wrote:
On 17/04/2015 16:50, Maxime Ripard wrote:
On Fri, Apr 17, 2015 at 04:40:43PM +0200, Gregory CLEMENT wrote:
Hi Maxime,
On 17/04/2015 16:32, Maxime Ripard wrote:
On Fri, Apr 17, 2015
-info.html
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More
-by: Roger Quadros rog...@ti.com
FWIW:
Reviewed-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
kernel/irq/dummychip.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/irq/dummychip.c b/kernel/irq/dummychip.c
index 988dc58..2feb6fe 100644
--- a/kernel/irq/dummychip.c
Hi Roger,
On 15/04/2015 10:07, Roger Quadros wrote:
Hi Gregory,
On 14/04/15 17:02, Gregory CLEMENT wrote:
Hi Roger,
On 14/04/2015 12:13, Roger Quadros wrote:
Hi Thomas,
On 30/03/15 16:15, Roger Quadros wrote:
Without this system suspend is broken on systems that have
drivers calling
by pci_bus_assign_domain_nr().
For the mvebu part I tested on Armada XP, Armada 375 and Armada 38x
SoCs, and I didn't saw any regression. So you can add my:
Tested-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Thanks,
Gregory
Signed-off-by: Yijing Wang wangyij...@huawei.com
it was not needed
anymore. Actually we should have done this change when this function
had been introduced. So for the point of view of the code it's fine.
Then I tested your full series on Armada XP, Armada 375 and Armada 38x
SoCs, and I didn't saw any regression. So you can add my:
Reviewed-by: Gregory CLEMENT
On 03/04/2015 16:29, Jason Cooper wrote:
On Fri, Apr 03, 2015 at 09:17:55AM +0200, Gregory CLEMENT wrote:
Hi Jason,
On 03/04/2015 01:23, Jason Cooper wrote:
On Mon, Mar 30, 2015 at 04:04:37PM +0200, Gregory CLEMENT wrote:
On the Armada 370/XP SoCs, in standby mode the SoC stay powered
to
mv_mbus_dram_info_nooverlap() as part of the -rc cycle.
(2) is probably easier. Herbert, what do you think?
Thomas
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removal as patch2?
I agree. I would like to see 2 patches. The first one should be not
controversial
and could be applied whereas the second one will need a deeper review.
Thanks,
Gregory
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++)
-printk(%.2x%s, addr[i], (i 5) ? : : .\n);
+printk(KERN_INFO tsx09: found ethernet mac address %pM\n, addr);
memcpy(qnap_tsx09_eth_data.mac_addr, addr, 6);
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,
+0x0 0x18 0x0 0x5747;
+};
+};
+
+eth1 {
+phy = phy0;
+phy-mode = rgmii-id;
+status = okay;
+};
+
+i2c0 {
+compatible = marvell,mv64xxx-i2c;
+clock-frequency = 10;
+status = okay;
+};
--
2.1.4
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Hi,
On 26/05/2015 11:44, Gregory CLEMENT wrote:
Use the new compatible introduced in rder to beneficiate of a wider
and more accurate range of baud rates to be used.
As the driver part was applied, I applied this patch
on mvebu/dt
Thanks,
Gregory
Signed-off-by: Gregory CLEMENT
Hi Mark,
On 27/05/2015 19:45, Mark Brown wrote:
On Tue, May 26, 2015 at 02:20:08PM +0200, Gregory CLEMENT wrote:
Mark do you want a new patch or do you prefer fixing the typo
yourself ? it should be
I fixed it up locally (in general it's easier to just send the patch
though).
Thanks
Hi Thomas,
On 03/07/2015 14:17, Thomas Petazzoni wrote:
Gregory,
On Fri, 03 Jul 2015 13:39:49 +0200, Gregory CLEMENT wrote:
Having 2 initcall does not work because, there is a dependency between these
2 calls. And actually the suspend_ops is registered before the board specific
hook
GPIO_GENERIC.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
This would have come from a wrong copy and paste, because indeed we
have never used the gpio-generic.
Acked-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Thanks,
Gregory
---
drivers/gpio/Kconfig | 1
Hi Thomas,
On 01/07/2015 17:54, Thomas Petazzoni wrote:
Dear Gregory CLEMENT,
On Tue, 30 Jun 2015 19:18:59 +0200, Gregory CLEMENT wrote:
static void __init mvebu_init_irq(void)
{
+if (of_machine_is_compatible(marvell,armada375) ||
+of_machine_is_compatible(marvell
in order to activate this
feature.
This is still an RFC because there is still some stability issue to
fix with the current code.The solution has been found but still need
time to write it properly. As most of the code is already there your
feedback is very welcome.
Thanks,
Gregory
Gregory CLEMENT (5
In preparation to support cpufreq for Armada 38x:
- rename the function to be more generic.
- move masking interrupt to the _dfs_request_local function in order
to be use by both SoCs.
- add stubs allowing registering the support for a new SoC
Signed-off-by: Gregory CLEMENT gregory.clem
The register definition were too verbose. Shorten them in order to
have something more readable and avoiding having most of the
instruction on two lines.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pmsu.c | 102
This patch first shortens the registers definition and also introduces
difference between Armada XP value and Armada 38x value.
Then it adds specific functions for Armada 38x in order to support cpu
freq on these SoCs.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
to be done at
pmsu level: this unit must not wait for the second CPU when the
frequency is modified.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pmsu.c | 67 +-
1 file changed, 61 insertions(+), 6 deletions
In order to support dynamic frequency scaling:
- the cpuclk Device Tree node must be added
- the clock property of the CPUs must be filled including the
clock-latency property.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-380.dtsi | 3
Thanks,
Gregory
On 01/07/2015 18:04, Thomas Petazzoni wrote:
Hello,
On Tue, 30 Jun 2015 19:19:00 +0200, Gregory CLEMENT wrote:
On the Armada 370/XP/38x/39x SoCs when the suspend to ram feature is
supported, the SoC is shutdown and will be waken up by an external
waken - woken
OK
Hi Thomas,
On 01/07/2015 17:47, Thomas Petazzoni wrote:
Dear Gregory CLEMENT,
On Tue, 30 Jun 2015 19:18:58 +0200, Gregory CLEMENT wrote:
Until now only one Armada XP and one Armada 388 based board supported
suspend to ram. However, most of the recent mvebu SoCs can support the
standby mode
370, 38x, 39x and XP SoCs. There are issues with the
Armada 375, and the support might be added (if possible) in a future
patch.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/common.h | 4 ++--
arch/arm/mach-mvebu/pm-board.c | 12 --
arch/arm
On the Armada 375/38x/39x SoCs, in standby mode the SoCs stay powered
and it is possible to wake-up from any interrupt sources. This patch
adds flag to the GIC irqchip driver to let linux know this.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/board
mvebu_pm_init and mvebu_armada_pm_init are only called during boot, so
flag them with __init and save some memory.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Reviewed-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
arch/arm/mach-mvebu/pm-board.c | 2 +-
arch
wakup sources less confusing for the
users. Suggested by Thomas.
Thanks,
Gregory
Gregory CLEMENT (4):
ARM: mvebu: Use __init for the PM initialization functions
ARM: mvebu: Add standby support
ARM: mvebu: Allow using the GIC for wakeup in standby mode
ARM: mvebu: Warn about the wake-up
the user that in suspend to ram
mode, the wake-up sources won't be taken into consideration.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/pm.c b/arch/arm/mach-mvebu/pm.c
index
Since u-boot 2015_T1.0p6 there are new requency settings available.
Based on a patch from Nadav Haklai nad...@marvell.com
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/clk/mvebu/armada-38x.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git
Hi Andrew,
thanks for your prompt review
On 02/07/2015 22:04, Andrew Lunn wrote:
On Thu, Jul 02, 2015 at 09:42:38PM +0200, Gregory CLEMENT wrote:
Since u-boot 2015_T1.0p6 there are new requency settings available.
Hi Gregory
Missing f in f_requency.
it must have been lost in the copy
-on;
+gpio = gpio1 24 GPIO_ACTIVE_HIGH;
+};
+};
+};
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and Armada 39x SoCs the limitation is 50MHz and
for the Armada 375 it is tclk/15.
This patch introduces new compatible strings to handle all these
case. In order to be future proof a compatible was created for each
SoC even if currently some SoCs seem using the same IP.
Signed-off-by: Gregory CLEMENT
and tclk/4.
A proper solution is adding a compatible string for each SoC, but it
can't be done as a fix for compatibility reason (we can't modify
device tree that have been already released) and it will be part of a
separate patch.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Use the new compatible introduced in rder to beneficiate of a wider
and more accurate range of baud rates to be used.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-370-xp.dtsi | 2 --
arch/arm/boot/dts/armada-370.dtsi| 4
arch/arm/boot
ones allow using the best
maximum frequency available.
Thanks,
Gregory
Gregory CLEMENT (3):
spi: orion: Fix maximum baud rates for Armada 370/XP
spi: orion: Fix extended baud rates for each Armada SoCs
ARM: mvebu: use improved armada spi device tree compatible name for
each SoC
380
AHCI interfaces)
Signed-off-by: Nadav Haklai nad...@marvell.com
Reviewed-by: Omri Itach om...@marvell.com
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Cc: sta...@vger.kernel.org
---
drivers/ata/ahci_mvebu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
, for the Armada 38x SoCs
s/38x/39x/ on this line.
Thanks,
Gregory
Andrew
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Hi Mark,
On 26/05/2015 12:36, Mark Brown wrote:
On Tue, May 26, 2015 at 11:44:42AM +0200, Gregory CLEMENT wrote:
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Reported-by: Kostya Porotchkin kos...@marvell.com
Cc: sta...@vger.kernel.org #Fixes df59fa7f4bca
Applied
Hi all,
On 20/08/2015 18:12, Gregory CLEMENT wrote:
According to the OTG specification after a timeout of
OTG_TIME_A_WAIT_VRISE (the maximum value is 100ms) the driver must
move from the state a_wait_vrise to the state a_wait_bcon. However,
the dsps version of musb does not handle this case
to exit this state was to insert a OTG adapter with an
USB device connected. Until this, the usb device mode was not
available.
It was tested on a AM35x based board.
CC: sta...@vger.kernel.org
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/usb/musb/musb_dsps.c | 14
370, 38x, 39x and XP SoCs. There are issues
with the Armada 375, and the support would be added (if possible) in a
future patch.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/common.h | 5 ++--
arch/arm/mach-mvebu/pm-board.c | 17 -
arch
mvebu_pm_init and mvebu_armada_pm_init are only called during boot, so
flag them with __init and save some memory.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pm-board.c | 2 +-
arch/arm/mach-mvebu/pm.c | 2 +-
2 files changed, 2 insertions
mode, the wake-up sources won't be taken into consideration.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/pm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/pm.c b/arch/arm/mach-mvebu/pm.c
index 264073a777d8..4402dcfa7c56
On the Armada 375/38x/39x SoCs, in standby mode the SoCs stay powered
and it is possible to wake-up from any interrupt sources. This patch
adds flag to the GIC irqchip driver to let linux know this.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/mach-mvebu/board
or by setting the serial line as a
wake-up source through the sysfs interface.
Thanks,
Gregory
Gregory CLEMENT (4):
ARM: mvebu: Use __init for the PM initialization functions
ARM: mvebu: Add standby support
ARM: mvebu: Allow using the GIC for wakeup in standby mode
ARM: mvebu: Warn about
Hi Sudeep,
On 27/07/2015 13:02, Sudeep Holla wrote:
Hi Thomas/Gregory,
On 01/07/15 16:54, Thomas Petazzoni wrote:
Dear Gregory CLEMENT,
On Tue, 30 Jun 2015 19:18:59 +0200, Gregory CLEMENT wrote:
static void __init mvebu_init_irq(void)
{
+ if (of_machine_is_compatible(marvell
Hi,
On 03/07/2015 13:55, Gregory CLEMENT wrote:
On the Armada 375/38x/39x SoCs, in standby mode the SoCs stay powered
and it is possible to wake-up from any interrupt sources. This patch
adds flag to the GIC irqchip driver to let linux know this.
Signed-off-by: Gregory CLEMENT gregory.clem
)
from the mvebu tree interacting with commit
0d3f2c92e004 (irqchip/gic: Remove redundant gic_set_irqchip_flags)
from the tip tree.
I have applied the following merge fix patch for today:
Thanks for the fix, I was aware of this and asked Thomas Petazzoni
and Gregory CLEMENT to revert
to v4.2-rc, use
is_errata_50mhz_ac instead of using a new ARMADA_380_SPI spi type.
Signed-off-by: Nadav Haklai nad...@marvell.com
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/spi/spi-orion.c | 54 -
1 file changed, 53
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SOC=y
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that the driver has been merged do you plan submitting the DT support
soon?
Thanks,
Gregory
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Hi,
On 30/06/2015 19:18, Gregory CLEMENT wrote:
Hi,
Until now only few mvebu v7 based board supported suspend to ram. This
suspend to ram mode was unusual because it involved shutting down the
SoC and relied on a PIC to wake up the system.
However, most of the recent mvebu SoCs can
think it should be irq_set_probe(virq), I don't see why you inverted the
probe flag.
Thanks,
Gregory
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me situation but it doesn't seem to be
the good default behavior. That's why I was looking for a way to let the
use configure it according to his needs.
Please correct me if I am wrong somewhere, because currently I don't
find a good solution for it.
Thanks,
Gregory
--
Gregory Clement, Free Electrons
K
This patch add the support for the RSS related ethtool
function. Currently it only use one entry in the indirection table which
allows associating an mveneta interface to a given CPU.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mv
.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 150 ++
1 file changed, 115 insertions(+), 35 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mv
static.
I really would like to have some feedback before going further and
then going in the wring direction.
Thanks,
Gregory CLEMENT (2):
net: mvneta: Associate RX queues with each CPU
net: mvneta: Add naive RSS support
drivers/net/ethernet/marvell/mvneta.c | 264 +++
eta_pcpu_port *pcpu_port =
>> + per_cpu_ptr(pp->ports, cpu);
>> +
>> + napi_enable(_port->napi);
>> + }
>> +
>
> rxq_def changed, but txq vs CPU mapping remained as in the beginning -
> is it intentional?
txq vs CPU mappi
g can be
> + * used instead:
> + * 'dat3-cd;'
> + * 'cd-inverted;'
> + */
> + broken-cd;
> wp-inverted;
> bus-width = <8>;
>
t
the commit a71b092a9c68 ("ARM: Convert handle_IRQ to use
__handle_domain_irq") on this branch.
Thanks,
Gregory
>
> Ben.
>
> --
> Ben Hutchings
> Who are all these weirdos? - David Bowie, reading IRC for the first time
--
Gregory Clement, Free Electrons
Kernel, d
"marvell,a385-db-ap", "marvell,armada385",
> "marvell,armada380";
>
> chosen {
> stdout-path = "serial1:115200n8";
> --
> 1.8.3.1
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
developmen
The second macb is present on all the sama5d4 SoCs. Let's add a node
reflecting it in the device tree.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm/boot/dts/sama5d4.dtsi | 30 ++
1 file changed, 30 insertions(+)
diff --git
The second macb is present on all sama5d4 soc. Let's add a node
reflecting it in the device tree.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm/boot/dts/at91-vinco.dts | 5 +
arch/arm/boot/dts/sama5d4.dtsi | 30 ++
2
Hi all,
please ignore this patch, some garbage slipt in it.
I will send a proper one in a few minute
Sorry for the noise
Gregory
On ven., oct. 16 2015, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
> The second macb is present on all sama5d4 soc. Let's add a node
>
T_ENABLE_OFFS);
>
> - data = irq_get_irq_data(virq);
> - if (!irqd_irq_disabled(data))
> - armada_370_xp_irq_unmask(data);
> + /*
> + * Re-enable on the current CPU,
> + * armada_xp_mpic_
rs are relative to "main_int_base" and
> which registers are relative to "per_cpu_int_base".
>
> Signed-off-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Thanks,
Gregory
> ---
> drive
rdware operates and what strategy the
> driver implements on top of that.
It was really needed!
>
> Signed-off-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Thanks,
Gregory
> ---
>
s
> of interest.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Thanks,
Gregory
> ---
> drivers/irqchip/irq-armada-370-xp.c | 9 +
> 1 file changed, 5 insertions(+), 4
terrupt when I connected it).
Note that I applied this patch instead of the "usb: musb: dsps: handle
the otg_state_a_wait_vrise_timeout case", is what you had in mind ?
Gregory
>
> [1] http://www.ti.com/lit/ug/spruh73l/spruh73l.pdf
>
> --
> balbi
--
Gregory Clement, Fre
};
> + };
> +
> + ethernet@7 {
> + status = "okay";
> + phy = <>;
> + phy-mode = "rgmii-id";
> +
eg = <0>;
>> +};
>> +
>> +phy1: ethernet-phy@1 { /* Marvell 88E1318 */
>> +reg = <1>;
>> +};
>> +};
>> +
>> +
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
> + rtc@10300 {
> + status = "disabled";
> + };
> +
> /* Two rear eSATA ports */
> sata@a {
>
ched_clock_register(armada_370_xp_read_sched_clock, 32, timer_clk);
> + sched_clock_register(armada_370_xp_read_sched_clock, 32, timer_clk,
> + NULL);
>
> clocksource_mmio_init(timer_base + TIMER0_VAL_OFF,
> "armada_370
of the dtb. That
means, that if we modify the dts, then the old board won't work with the
new kernel. So maybe creating a armada-388-gp-v1.5.dts could be the best
option.
What do you think of it?
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Li
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