ement is high. This setting is not required for high speed
> MMC and might cause timing violation.
>
> Signed-off-by: Nadav Haklai <nad...@marvell.com>
> Cc: <sta...@vger.kernel.org> # v4.2
Seems OK too.
Reviewed-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Tha
kernel.org> # v4.2
Good catch.
Reviewed-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Thanks,
Gregory
> ---
> drivers/mmc/host/sdhci-pxav3.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/
Hi Felipe,
On ven., août 21 2015, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
>> According to the OTG specification after a timeout of
>> OTG_TIME_A_WAIT_VRISE (the maximum value is 100ms) the driver must
>> move from the state a_wait_vrise to the st
m>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
kernel/irq/manage.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index ad1b064f94fe..dc8a80ecfc4a 100644
--- a/kernel/irq/manage.c
+++ b/k
using that structure.
Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 91 ---
1 file changed, 62 insertions(+), 29 deletions(-)
diff -
number to determine whether a given interrupt is per-cpu
or not.
Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/irqchip/
ported-by: Willy Tarreau <w...@1wt.eu>
Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
kernel/irq/manage.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/kernel/irq/manage.c b/kernel/irq/man
pard <maxime.rip...@free-electrons.com>
Cc: <sta...@vger.kernel.org> # v3.8+
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvel
m>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 143 +-
1 file changed, 142 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marv
number of assumption and takes a number of shortcuts in order to just use
that RX queue.
Remove these limitations in order to be able to specify any available
queue.
Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@fre
Hi,
As stated in the first version: "this patchset reworks the Marvell
neta driver in order to really support its per-CPU interrupts, instead
of faking them as SPI, and allow the use of any RX queue instead of
the hardcoded RX queue 0 that we have currently."
Following the review which has been
eads to wrong clock setting in the divider.
>
> Signed-off-by: Nadav Haklai <nad...@marvell.com>
> Signed-off-by: Marcin Wojtas <m...@semihalf.com>
> Cc: <sta...@vger.kernel.org> # v4.2
Seems OK.
Reviewed-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
indings/mmc/sdhci-pxa.txt | 5 +
> arch/arm/boot/dts/armada-388-gp.dts| 3 +-
> drivers/mmc/host/sdhci-pxav3.c | 101
> -
> drivers/mmc/host/sdhci.c | 14 ++-
> drivers/mmc/host/sdhci.h
mv_mbus_dram_info());
I would find it cleaner to not rely on the device tree outise the probe
function. What about just testing pxa->mbus_win_regs ? As it is set only
if we need it, it should be a good test.
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embed
reg = <0x7 0x4000>;
> interrupts-extended = < 8>;
> clocks = < 4>;
> + tx-csum-limit = <9800>;
> status = "disabled";
>
Hi Felipe,
On lun., déc. 07 2015, Felipe Balbi <ba...@ti.com> wrote:
> Hi,
>
> Gregory CLEMENT <gregory.clem...@free-electrons.com> writes:
>> Hi Felipe,
>>
>> I am going back on this subject (again :) )
>>
>> On mar., oct. 20 2015,
{include/mach => }/bridge-regs.h (92%)
> delete mode 100644 arch/arm/mach-orion5x/include/mach/entry-macro.S
> delete mode 100644 arch/arm/mach-orion5x/include/mach/hardware.h
> delete mode 100644 arch/arm/mach-orion5x/include/mach/uncompress.h
> rename arch/arm/mach-orion5x/{incl
Hi,
On mer., déc. 02 2015, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
>>
>> So far the issue may have been not noticed, because in every IO driver
>> using mvebu_mbus_dram_info for configuring MBUS windows, there's
>> following substraction:
le conflicts between the branches as suggested by
>> Gregory Clement.
>
> Series applied, thanks.
Could you confirm that you don't apply the last patch?
I would prefer applying it on my tree to avoid merge conflict during the
merge windows.
Thanks,
Gregory
--
Gregory Clement, Free Electrons
ring boot related to the BM. However I did not
>> manage to use an ethernet interface. The udhcpc never managed to get an
>> IP and if I set the IP manually I could not ping.
>>
>> But on Armada 388 GP I didn't have any issue.
>>
>> Do you have some idea abou
Hi David,
On mer., déc. 02 2015, David Miller <da...@davemloft.net> wrote:
> From: Gregory CLEMENT <gregory.clem...@free-electrons.com>
> Date: Wed, 02 Dec 2015 09:16:06 +0100
>
>> Hi David,
>>
>> On mer., déc. 02 2015, David Miller <da...@davemlo
Hi Felipe,
I am going back on this subject (again :) )
On mar., oct. 20 2015, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
> Hi Felipe,
>
> On lun., oct. 05 2015, Felipe Balbi <ba...@ti.com> wrote:
>
>
>>> So after many tests on differe
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
Documentation/devicetree/bindings/net/macb.txt | 3 +++
drivers/net/ethernet/cadence/macb.c| 26 ++
drivers/net/ethernet/cadence/macb.h| 1 +
3 files changed, 30 insertion
,
Gregory
Gregory CLEMENT (4):
net: mvneta: Make the default queue related for each port
net: mvneta: Associate RX queues with each CPU
net: mvneta: Add naive RSS support
net: mvneta: Configure XPS support
drivers/net/ethernet/marvell/mvneta.c | 328 +-
1 fi
This patch adds the support for the RSS related ethtool
function. Currently it only uses one entry in the indirection table which
allows associating an mvneta interface to a given CPU.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Tested-by: Marcin Wojtas <m...@sem
With this patch each CPU is associated with its own set of TX queues.
It also setup the XPS with an initial configuration which set the
affinity matching the hardware configuration.
Suggested-by: Arnd Bergmann <a...@arndb.de>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-elec
This patch adds the support for the RSS related ethtool
function. Currently it only uses one entry in the indirection table which
allows associating an mvneta interface to a given CPU.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Tested-by: Marcin Wojtas <m...@sem
.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 150 ++
1 file changed, 115 insertions(+), 35 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mv
es because the mapping is
static.
Thanks,
Gregory
Gregory CLEMENT (4):
net: mvneta: Make the default queue related for each port
net: mvneta: Associate RX queues with each CPU
net: mvneta: Add naive RSS support
net: mvneta: Spread out the TX queues management on all CPUs
drivers/net/ethern
Instead of using the same default queue for all the port. Move it in the
port struct. It will allow have a different default queue for each port.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.
!), whereas with this patch it was around
0.7ms (and sometime it went to 1.2ms).
Suggested-by: Arnd Bergmann <a...@arndb.de>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 48 ++-
1 file changed, 3
Hi Andrew,
On mar., déc. 01 2015, Andrew Lunn <and...@lunn.ch> wrote:
> On Mon, Nov 30, 2015 at 02:37:31PM +0100, Gregory CLEMENT wrote:
>> Hi Arnd,
>>
>> On mer., nov. 25 2015, Arnd Bergmann <a...@arndb.de> wrote:
>>
>> > I've poste
468] orion-ehci f1051000.usb: new USB bus registered, assigned
>>> bus number 2
>>> [1.650111] orion-ehci f1051000.usb: irq 28, io mem 0xf1051000
>>> [1.672467] orion-ehci f1051000.usb: USB 2.0 started, EHCI 1.00
>>> [1.678908] hub 2-0:1.0: USB hu
ebu/for-next branch. Will git managed to automagically resolve the
conflict by getting the resolution you will do in your branch?
A another solution could be to have a separate patch for the
arch/arm/Kconfig file that you keep in arm-soc.
Grégory
--
Gregory Clement, Free Electrons
Kernel, dri
Hi Sascha,
On ven., déc. 11 2015, Sascha Hauer <s.ha...@pengutronix.de> wrote:
> On Thu, Dec 10, 2015 at 04:08:08PM +0100, Gregory CLEMENT wrote:
>> Hi Sascha,
>>
>> On jeu., déc. 10 2015, Sascha Hauer <s.ha...@pengutronix.de> wrote:
>>
>> >
the kernel creating a PHY device.
The patch introduces a new optional property "phy-reset-gpios" inspired
from the one use for the FEC.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
Since the v1, I used the gpiod functions. It allows to simplify the
code and
_led_sys_green _led_sys_orange
>> + _led_copy_green _led_copy_red
>> + _led_hdd1_green _led_hdd1_red>;
>> +pinctrl-names = "default";
>> +
>> +green-sys {
>> +label = "nsa325:green:sys";
>> +
,
>> "wakeup-source" is the new standard binding.
>>
>> This patch replaces the legacy "isil,irq2-can-wakeup-machine" with the
>> unified "wakeup-source" property in order to avoid any futher copy-paste
>> duplication.
>>
>> Cc: Jason
creating a PHY device.
The patch introduces a new optional property "reset-gpios" at PHY level.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
Hi,
I agree with Sasha to start with a good binding and indeed the reset
is more related to the PHY than
Hi Richard,
On mer., déc. 16 2015, Richard Cochran <richardcoch...@gmail.com> wrote:
> On Wed, Dec 16, 2015 at 07:31:30PM +0100, Gregory CLEMENT wrote:
>> +Optional properties for PHY child node:
>> +- reset-gpios : Should specify the gpio for phy reset
>
> reset
Hi Arnd,
On mer., déc. 16 2015, Arnd Bergmann <a...@arndb.de> wrote:
> On Wednesday 16 December 2015 19:31:30 Gregory CLEMENT wrote:
>> diff --git a/drivers/net/ethernet/cadence/macb.c
>> b/drivers/net/ethernet/cadence/macb.c
>> index 88c1e1a..35661aa 100644
&g
-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
Documentation/devicetree/bindings/net/macb.txt | 8 ++--
drivers/net/ethernet/cadence/macb.c| 15 ---
2 files changed, 18 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindin
nsg too:
http://marc.info/?l=linux-netdev=145034590619620=2
Thanks,
Gregory
>
> Fixes: 5833e0526820 ("net/macb: add support for resetting PHY using GPIO")
> Cc: Gregory CLEMENT <gregory.clem...@free-electrons.com>
> Signed-off-by: Sudip Mukherjee <su...@vector
Hi Sascha,
On jeu., déc. 10 2015, Sascha Hauer <s.ha...@pengutronix.de> wrote:
> Hi Gregory,
>
> On Wed, Dec 09, 2015 at 06:49:43PM +0100, Gregory CLEMENT wrote:
>> With device tree it is no more possible to reset the PHY at board
>> level. Furthermore, doing in the
.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 150 ++
1 file changed, 115 insertions(+), 35 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mv
Instead of using the same default queue for all the port. Move it in the
port struct. It will allow have a different default queue for each port.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.
g this you could squash the patches, however
from my point of view it's not worth doing it.
>
> Please confirm that I've understood the setup correctly, and I'll apply the
> series directly to fixes.
I think it won't apply on v4.4 because the partition change was not made
at this moment.
Hi Olof,
On mar., déc. 22 2015, Olof Johansson <o...@lixom.net> wrote:
> On Mon, Dec 21, 2015 at 05:48:48PM +0100, Gregory CLEMENT wrote:
>> Hi Geert,
>>
>> On lun., d??c. 21 2015, Geert Uytterhoeven <geert+rene...@glider.be> wrote:
>>
>> &
+++ b/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts
> @@ -131,6 +131,7 @@
> chip-delay = <40>;
> status = "okay";
> partitions {
> + compatible = "fixed-partitions";
> #address-cells = <1>;
>
gt; partitions {
> + compatible = "fixed-partitions";
> #address-cells = <1>;
> #size-cells = <1>;
>
> --
> 1.9.1
>
--
Gregory Cleme
Hi Thomas,
On mer., nov. 25 2015, Thomas Petazzoni <thomas.petazz...@free-electrons.com>
wrote:
> Gregory,
>
> On Wed, 25 Nov 2015 15:54:03 +0100, Gregory CLEMENT wrote:
>
>> pp->rxq_def = rxq_def;
>>
>> +pp->indir[0] = rxq_def;
>
>
but an mv78200 user came
with a bug fix on the gpio driver used by this platform:
http://marc.info/?l=linux-arm-kernel=140639461108781=2
While he seemed interseted to use a mainline kernel we don't have any
news for one year:
http://marc.info/?l=linux-arm-kernel=141391779222342=2
Gregory
--
Gregory
mvneta support. Because
> of that the register contents were inherited from the bootloader.
It looks OK for me and at least after applying the driver continues
working :)
I guess you find it when you tested suspend to ram.
Reviewed-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Thank
Hi Marcin,
On dim., nov. 22 2015, Marcin Wojtas <m...@semihalf.com> wrote:
> MVNETA_RXQ_HW_BUF_ALLOC bit which controls enabling hardware buffer
> allocation was mistakenly set as BIT(1). This commit fixes the
> assignment.
I confirm it from the datasheet I got:
Reviewed-by:
*/
> +
> static const struct of_device_id mvneta_match[] = {
> { .compatible = "marvell,armada-370-neta" },
> { .compatible = "marvell,armada-xp-neta" },
> @@ -3452,6 +3518,10 @@ MODULE_DEVICE_TABLE(of, mvneta_match);
> static struct platform_driver mvneta_
Instead of using the same default queue for all the port. Move it in the
port struct. It will allow have a different default queue for each port.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.
The last patch introduces a first level of RSS support through the
ethtool functions. As explained in the introduction there is only one
entry in the RSS lookup table which permits at the end to associate an
mvneta port to a CPU through the RX queues because the mapping is
static.
Thanks,
Gregory
This patch add the support for the RSS related ethtool
function. Currently it only use one entry in the indirection table which
allows associating an mveneta interface to a given CPU.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mv
.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 150 ++
1 file changed, 115 insertions(+), 35 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mv
gt; include/linux/mbus.h | 3 +
> 17 files changed, 1677 insertions(+), 64 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/net/marvell-neta-bm.txt
> create mode 100644 drivers/net/ethernet/marvell/mvneta_bm.c
> create mode 100644 drive
; comment with capital letter?:)
If I got other review, then I can fix it in the next version. But if you
have a look on the otehr commet not all of them start by capital letter.
Thanks,
Greogry
>
> Best regards,
> Marcin
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time a
s. Remove this partition as
>> the whole flash is already represented by the NAND device itself.
>>
>> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
>
> Given Benoit comment
>
> Acked-by: Andrew Lunn <and...@lunn.ch>
Applied on mv
tock partitions
> easily by removing the partitions node.
>
> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
Applied on mvebu/dt
Thanks,
Gregory
> ---
> Cc: Jason Cooper <ja...@lakedaemon.net>
> Cc: Andrew Lunn <and...@lunn.ch>
> C
98%)
> rename arch/arm/mach-orion5x/{include/mach => }/bridge-regs.h (92%)
> delete mode 100644 arch/arm/mach-orion5x/include/mach/entry-macro.S
> delete mode 100644 arch/arm/mach-orion5x/include/mach/hardware.h
> delete mode 100644 arch/arm/mach-orion5x/include/mach/uncompre
drew
>
>> ---
>> Cc: Jason Cooper <ja...@lakedaemon.net>
>> Cc: Andrew Lunn <and...@lunn.ch>
>> Cc: Gregory Clement <gregory.clem...@free-electrons.com>
>> Cc: Rob Herring <robh...@kernel.org>
>> Cc: Pawel Moll <pawel.m...
erly
> parse ONFI or at least it does not derive minimum ECC settings from it.
>
> I'll have to have a closer look at barebox' ONFI parsing capabilites
> and can live with this patch not applied even though it does no harm.
So for now, I don't apply it.
Thanks,
Gregory
--
Gregory Cl
clock to 2001-01-20 07:57:42
UTC (979977462)
[1.918901] ALSA device list:
[1.921878] No soundcards found.
[2.222505] ata2: SATA link down (SStatus 0 SControl F300)
[2.230484] Freeing unused kernel memory: 4460K (c06fd000 - c0b58000)
--
Gregory Clement, Free Electrons
Kernel, drivers,
PS_GPIO_LED_D3, .name = "d3", .active_low = 1,
> .default_trigger = "heartbeat", },
> diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
> index bd7cd8b..1080580 100644
> --- a/arch/arm/mach-pxa/spitz.c
> +++ b/arch/arm/mach-pxa/spitz.c
> @@ -464,7 +464,7 @@ static struct gpio_led spitz_gpio_leds[] = {
> },
> {
> .name = "spitz:green:hddactivity",
> - .default_trigger= "ide-disk",
> + .default_trigger= "disk-activity",
> .gpio = SPITZ_GPIO_LED_GREEN,
> },
> };
> --
> 2.8.4
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
_xp_timer_syscore_ops' was not declared. Should it be static?
>
> Signed-off-by: Ben Dooks <ben.do...@codethink.co.uk>
Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Thanks,
Gregory
> ---
> Cc: Daniel Lezcano <daniel.lezc...@linaro.org>
> Cc: Thom
This patch enables the support for the clocks drivers used on the
Armada 3700.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/Kconfig.platforms | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.pla
Add two new blocks of clocks. The peripheral clocks are the source clocks
of the peripheral of the Armada 3700 SoC.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 16
1 file changed, 16 insertions(+)
This clock is the parent of all the Armada 3700 clocks. It is a fixed
rate clock which depends on the gpio configuration read when resetting
the SoC.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/clk/mvebu/Kconfig| 3 ++
drivers/clk/mvebu/Ma
This commit adds the DT binding documentation for the peripheral clocks
used in the Marvell Armada 3700 SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
.../bindings/clock/armada3700-periph-clock.txt | 70 ++
1 file changed, 70 inse
the clocks, the binding should not be
affected. Especially, there are some holes in the clocks, but we
should be able to add them seamless.
I tried to follow the last update made in the clock framework, I hope
theses drivers will comply the new guidelines.
Thanks,
Gregory
Gregory CLEMENT (10):
arm64
This commit adds the DT binding documentation for the the Xtal clock on
Armada 3700 used in the Marvell Armada 3700 SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
.../bindings/clock/armada3700-xtal-clock.txt | 28 ++
1 file chang
each clock is a composite clock and the operations they
use are different depending of the clock.
According to the dataheet it would be possible to select the parent clock
and the ratio, however currently the driver does not support it.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
The configuration of the clock depend of the gpio latch. This information
is stored in the gpio block registers. That's why the block is shared
using a syscon node.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-37xx.dts
These clocks are children of the xtal clock and each one can be selected
as a source for the peripheral clocks.
According to the datasheet it should be possible to modify their rate,
but currently it is not supported.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.
This commit adds the DT binding documentation for the Time Base Generator
clock used in the Marvell Armada 3700 SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
.../bindings/clock/armada3700-tbg-clock.txt| 27 ++
1 file chang
Add a new block of clocks. The Time Base Generators clocks can be the
parent of the peripheral clocks.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm6
kwood-ds112.dts
>> @@ -14,7 +14,7 @@
>> #include "kirkwood-synology.dtsi"
>>
>> / {
>> -model = "Synology DS111";
>> +model = "Synology DS112";
>> compatible = "synology,ds111", "marvell,kirkwood";
>>
>> memory {
>> --
>> 2.1.4
>>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
0, );
> + of_node_put(node);
> if (err < 0)
> panic("Cannot get 'bootrom' node address");
>
> --
> 1.9.1
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
ed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 17 ++---
1 file changed, 6 insertions(+), 11 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mvneta.c
index 4c2d12423750..f496f97
itten]."
That means that each time we want to manipulate these bits we had to do
it on each cpu and not only on the current cpu.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 100 --
1
the port is stopping. It also uses the spinlock introduces
previously. To avoid the deadlock, the lock has been moved outside the
mvneta_percpu_elect function.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.
the CPUs and the queues could be wrong. During this loop the
interrupt mask is also updating for each CPUs, It should not be changed
in the same time by other part of the driver.
This patch adds spinlock to create the needed critical sections.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
cf75e2793c ("net: mvneta: Associate RX queues with each CPU")
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvneta.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/marve
Since the commit 2dcf75e2793c ("net: mvneta: Associate RX queues with
each CPU") all the percpu irq are used and disabled at initialization, so
there is no point to disable them first.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/ethernet/
ensures
that all the calls will be done all at once.
Fixes: f86428854480 ("net: mvneta: Statically assign queues to CPUs")
Reported-by: Stefan Roese <stefan.ro...@gmail.com>
Suggested-by: Jisheng Zhang <jszh...@marvell.com>
Suggested-by: Russell King <rmk+ker...@arm.linux.org.u
istake in the comments. Pointed by Sergei Shtylyov
- Add a new patch fixing the CPU choice in mvneta_percpu_elect
- Use lock in last patch to prevent remaining race condition. Pointed
by Jisheng
Gregory CLEMENT (7):
net: mvneta: Fix for_each_present_cpu usage
net: mvneta: Fix the CPU
Hi Thomas,
On mer., févr. 03 2016, Thomas Petazzoni <thomas.petazz...@free-electrons.com>
wrote:
> Hello,
>
> On Wed, 3 Feb 2016 19:41:25 +0100, Gregory CLEMENT wrote:
>> The Marvell Armada 3700 is a family of ARMv8 CA53 SoCs. This commit
>> introduces the Device
Hi Greg,
On dim., févr. 07 2016, Greg Kroah-Hartman <gre...@linuxfoundation.org> wrote:
> On Wed, Feb 03, 2016 at 07:41:20PM +0100, Gregory CLEMENT wrote:
>> +static struct console mvebu_uart_console = {
>> +.name = "ttyS",
>
> You aren't ttyS, that's
v2 -> v3
- Renamed the remaining ttyS into ttyMV: reported by Greg KH
- Fixed the order of the compatible in the example of the binding
documentation: pointed by Rob
- Fix a typo in Kconfig entry: pointed by Thomas Petazzoni
Gregory CLEMENT (9):
irqchip: armada-370-xp: do not enable it by d
Now that we support Armada 37xx, let's add this family of SoC to the
Marvell documentation, and a reference to a link with more details about
those processors. As for Armda 39x, no datasheet is publicly
available at this time.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.
Extend the mvebu entry to ARM64 device tree sources.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINT
The Marvell Armada 3700 is a family of ARMv8 CA53 SoCs. This commit
introduces the Device Tree binding that documents the top-level
compatible strings for Armada 3700 based platforms.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
.../devicetree/bindings/arm/m
by default when ARCH_MEVBU is selected is no more needed.
This patch removes this dependency, thanks to this, a kernel for ARM64
mvebu SoC can be built without error due this driver.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/irqchip/Kconfig | 1 -
1
The Armada 3700 is an mvebu ARM64 SoC using one or two Cortex-A53 cores
depending of the variant.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
---
arch/arm64/Kconfig.platforms | 6 ++
1 fil
merate]
Signed-off-by: Wilson Ding <ding...@marvell.com>
Signed-off-by: Nadav Haklai <nad...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Acked-by: Rob Herring <r...@kernel.org>
---
.../devicetree/bindings/tty/serial/mvebu-uart.txt
From: Thomas Petazzoni
Instead of building the irq-armada-370-xp driver directly when
CONFIG_ARCH_MVEBU is enabled, this commit introduces an intermediate
CONFIG_ARMADA_370_XP_IRQ hidden Kconfig option.
This allows this option to select other
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