<j...@semihalf.com>
Change the prefix to "ARM: dts: mvebu: armada-398:"
Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Thanks,
Gregory
> ---
> arch/arm/boot/dts/armada-398.dtsi | 10 +-
> 1 file changed, 9 insertions(+), 1 deletion(-)
&
Hi Grzegorz,
On jeu., juil. 21 2016, Grzegorz Jaszczyk <j...@semihalf.com> wrote:
> The whole Armada 39x SoC family of processors has GPIO's which all can be
> supported with existing driver.
>
Change the prefix to "ARM: dts: mvebu: armada-39x:"
Acked-by: Greg
Hi Grzegorz,
On jeu., juil. 21 2016, Grzegorz Jaszczyk <j...@semihalf.com> wrote:
Change the prefix to "ARM: dts: mvebu: armada-398-db:"
Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Thanks,
Gregory
> Signed-off-by: Grzegorz Jaszczyk <j...@sem
Hi Grzegorz,
On jeu., juil. 21 2016, Grzegorz Jaszczyk <j...@semihalf.com> wrote:
> The whole Armada 39x SoC family of processors has one USB2.0 and one
> USB3.0 which all can be supported with existing drivers.
>
Change the prefix to "ARM: dts: mvebu: armada-39x:"
Hi Grzegorz,
On jeu., juil. 21 2016, Grzegorz Jaszczyk <j...@semihalf.com> wrote:
> Despite that FS states that rtc is present only in A395 and A398 and not in
> A390, the rtc is working with A390.
>
Change the prefix to "ARM: dts: mvebu: armada-39x:"
Acked-by: Greg
>
> Thomas
> --
> Thomas Petazzoni, CTO, Free Electrons
> Embedded Linux, Kernel and Android engineering
> http://free-electrons.com
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
Hi Mike and Stephen,
On mar., juil. 19 2016, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
> Hi,
>
> this is the third version of the series adding clock support for the
> Armada 37xx SoCs.
>
> The main change is the use of static data for the periphera
Hi Aaro,
On jeu., août 11 2016, Aaro Koskinen <aaro.koski...@iki.fi> wrote:
> Hi,
>
> On Thu, Aug 11, 2016 at 09:03:52AM +0200, Gregory CLEMENT wrote:
>> On mer., août 10 2016, Aaro Koskinen <aaro.koski...@iki.fi> wrote:
>> > When upgrading from v4.6 --&g
nvert init
function to return error")
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
Changelog:
v1 -> v2
Move the of_clk_get_by_name out of the declaration as sugested by
Thomas Petazzoni.
drivers/clocksource/time-armada-370-xp.c | 4 ++--
1 file changed,
Hi Thomas,
On mer., août 10 2016, Thomas Petazzoni <thomas.petazz...@free-electrons.com>
wrote:
> Hello,
>
> On Wed, 10 Aug 2016 10:09:08 +0200, Gregory CLEMENT wrote:
>> While converting the init function to return an error, the wrong clock
>> was get. This lead t
nvert init
function to return error")
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/clocksource/time-armada-370-xp.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/clocksource/time-armada-370-xp.c
b/drivers/clocksource/time-armad
name should contain an address.
> Make use of the label to enable individual PCIe busses. Also, fixup
> the synology dtsi file which added a label pcie2 rather than using the
> existing pcie1 label.
>
> Signed-off-by: Andrew Lunn <and...@lunn.ch>
> Signed-o
Hi Michael,
On ven., juil. 08 2016, Michael Turquette <mturque...@baylibre.com> wrote:
> Quoting Gregory CLEMENT (2016-07-07 15:37:47)
>> This clock is the parent of all the Armada 3700 clocks. It is a fixed
>> rate clock which depends on the gpio configuration read when
Hi Paul,
On dim., juil. 10 2016, Paul Gortmaker <paul.gortma...@windriver.com> wrote:
> On Thu, Jul 7, 2016 at 6:37 PM, Gregory CLEMENT
> <gregory.clem...@free-electrons.com> wrote:
>> This clock is the parent of all the Armada 3700 clocks. It is a fixed
>> rate c
This clock is the parent of all the Armada 3700 clocks. It is a fixed
rate clock which depends on the gpio configuration read when resetting
the SoC.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/clk/mvebu/Kconfig| 3 ++
drivers/clk/mvebu/Ma
These clocks are children of the xtal clock and each one can be selected
as a source for the peripheral clocks.
According to the datasheet it should be possible to modify their rate,
but currently it is not supported.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.
This commit adds the DT binding documentation for the Time Base Generator
clock used in the Marvell Armada 3700 SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Acked-by: Rob Herring <r...@kernel.org>
---
.../bindings/clock/armada3700-tbg-clock.txt
This commit adds the DT binding documentation for the peripheral clocks
used in the Marvell Armada 3700 SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Acked-by: Rob Herring <r...@kernel.org>
---
.../bindings/clock/armada3700-periph-clock.
This commit adds the DT binding documentation for the the Xtal clock on
Armada 3700 used in the Marvell Armada 3700 SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Acked-by: Rob Herring <r...@kernel.org>
---
.../bindings/clock/armada3700-xtal-clock.tx
each clock is a composite clock and the operations they
use are different depending of the clock.
According to the datasheet it would be possible to select the parent
clock and the ratio, however currently the driver does not support it.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
ailure of the of_clk_add_hw_provider call
- Added the Acked-by from Rob Herring on the dt binding patchs
Gregory CLEMENT (6):
dt-bindings: clock: add DT binding for the Xtal clock on Armada 3700
clk: mvebu: Add the xtal clock for Armada 3700 SoC
dt-bindings: clock: add DT binding for the TBG clocks on Armad
Hi Michael,
On ven., juil. 08 2016, Michael Turquette <mturque...@baylibre.com> wrote:
> Quoting Gregory CLEMENT (2016-07-07 15:37:51)
>> +#include
>> +#include
>
> Same question as my previous email. Is clk.h necessary? Is this driver
> also a clk consumer?
Hi,
On ven., juin 10 2016, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
> Hi,
>
> this series add clock support for the Armada 37xx SoCs.
>
> The design of the drivers is as close as possible as the hardware is,
> with some clocks made of several
he birth of my last
child: I managed to find time to write this second version in time to be
merged for 4.8 but not enough to add these new function. I will try to
send a patch for it next week.
Thanks for your review,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
This commit adds the DT binding documentation for the peripheral clocks
used in the Marvell Armada 3700 SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Acked-by: Rob Herring <r...@kernel.org>
---
.../bindings/clock/armada3700-periph-clock.
each clock is a composite clock and the operations they
use are different depending of the clock.
According to the datasheet it would be possible to select the parent
clock and the ratio, however currently the driver does not support it.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
This clock is the parent of all the Armada 3700 clocks. It is a fixed
rate clock which depends on the gpio configuration read when resetting
the SoC.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/clk/mvebu/Kconfig| 3 ++
drivers/clk/mvebu/Ma
These clocks are children of the xtal clock and each one can be selected
as a source for the peripheral clocks.
According to the datasheet it should be possible to modify their rate,
but currently it is not supported.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.
This commit adds the DT binding documentation for the Time Base Generator
clock used in the Marvell Armada 3700 SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Acked-by: Rob Herring <r...@kernel.org>
---
.../bindings/clock/armada3700-tbg-clock.txt
rom Rob Herring on the dt binding patchs
Gregory CLEMENT (6):
dt-bindings: clock: add DT binding for the Xtal clock on Armada 3700
clk: mvebu: Add the xtal clock for Armada 3700 SoC
dt-bindings: clock: add DT binding for the TBG clocks on Armada 3700
clk: mvebu Add the time base generator clo
This commit adds the DT binding documentation for the the Xtal clock on
Armada 3700 used in the Marvell Armada 3700 SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Acked-by: Rob Herring <r...@kernel.org>
---
.../bindings/clock/armada3700-xtal-clock.tx
as an idea for how to make these all const, that
> would be nice.
>
> Anyway, that shouldn't stop your patch from getting merged, so
>
> Acked-by: Arnd Bergmann <a...@arndb.de>
>
> (also for patch 1/2).
So I applied both patch in mvebu/cleanup
Thanks,
Gregory
>
> Ar
Hi Thomas,
On ven., juil. 08 2016, Thomas Petazzoni <thomas.petazz...@free-electrons.com>
wrote:
> Hello,
>
> On Fri, 8 Jul 2016 00:37:46 +0200, Gregory CLEMENT wrote:
>
>> +gpio1: gpio@13800 {
>> +compatible = "marvell,mvebu-gpio-3700", "sysc
ards,
> Grzegorz
>
> Changelog:
> v1 -> v2
>
> - Add at least one line of commit log entry for those patches, which
> contained only commit title.
>
> Suggested by Andrew Lunn and Gregory Clement.
>
> - Drop patch "ARM: mvebu: enable E1000E in mvebu_v7_defconfig
o be addressed in qemu, or is it a Linux bug ?
>
> It's a Linux bug provoked by qemu not implementing the hardware
> breakpoints. Well worth fixing in Linux.
The Armada XP base platform were hit by the same bug as we can see on
kernlci:
https://storage.kernelci.org/mainline/v
endif
>
> obj-$(CONFIG_MACH_DOVE) += dove.o
> -obj-$(CONFIG_MACH_KIRKWOOD) += kirkwood.o kirkwood-pm.o
> +
> +ifeq ($(CONFIG_MACH_KIRKWOOD),y)
> +obj-y += kirkwood.o
> +obj-$(CONFIG_PM) += kirkwood-pm.o
> +endif
> --
> 2.9.0
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
arvell,mv98dx3236-corediv-clock";
> + reg = <0xf8268 0xc>;
> + #clock-cells = <1>;
> + clocks = <>;
> + clock-output-names = "nand";
> + };
>
>
Hi Chris,
On lun., janv. 30 2017, Chris Packham <chris.pack...@alliedtelesis.co.nz>
wrote:
> Hi Gregory,
>
> On 31/01/17 03:29, Gregory CLEMENT wrote:
>> Hi Chris,
>>
>> On lun., janv. 30 2017, Chris Packham <chris.pack...@alliedtelesis.co.nz>
>
squash your patch in the offending patch.
In any case, if needed you can add my
Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Thanks,
Gregory
>
> Fixes: 6cfd3cd8d836 ("ARM: dts: orion5x-lschl: More consistent naming on
> linkstation series")
&g
Hi David,
On ven., janv. 20 2017, David Miller <da...@davemloft.net> wrote:
> From: Gregory CLEMENT <gregory.clem...@free-electrons.com>
> Date: Thu, 19 Jan 2017 22:49:32 +0100
>
>> I created a new family for this switch and filled the ops structure
>>
The Marvell 88E6341 device is single-chip, 6-port Ethernet switch with
four integrated 10/100/1000Mbps Ethernet transceivers and one high speed
SerDes interfaces.
It belongs to the Topaz family and unlike the 88E6341 it does not have
a TCAM.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
,
Gregory
Changelog:
v5 -> v6:
- rebased on net-next/master (d140199af510)
- Fix the redundant check on mv88e6xxx_6341_family (reported by Julia
Lawall)
- Add support for the 88E6141
- Move support for temperature sensor in the phy part
Gregory CLEMENT (3):
net: dsa: mv88e6xxx: Add supp
The PHY with the ID 0x1410C00 can be found embedded in the Marvell Topaz
switches (88E6141/88E6341). It is compatible with the 88E1510 (at least for
the temperature information), so add support for it, using the 88E1510
specific functions.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
Hi,
On mar., janv. 24 2017, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
> From: Romain Perier <romain.per...@free-electrons.com>
>
> Some Marvell ethernet switches have internal ethernet transceivers with
> hardcoded phy addresses. These addre
Hi Andrew,
On mar., janv. 24 2017, Andrew Lunn <and...@lunn.ch> wrote:
> On Tue, Jan 24, 2017 at 09:10:26PM +0100, Gregory CLEMENT wrote:
>> The PHY with the ID 0x1410C00
>
> :-(
>
> I don't have a better reference, but
> Linux/Documentation/devicetree/bind
for this switch by describing its
capabilities to the driver and introducing a new family.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/dsa/mv88e6xxx/chip.c | 54 ++--
drivers/net/dsa/mv88e6xxx/mv88e6xxx.h | 19 +-
2
;and...@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/dsa/mv88e6xxx/chip.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index c7e08e13bb54..7d942f8a42a7 100644
--- a/d
et. There is currently
> a bug in the mv88e6390 support code. I also set it to 15s. But in fact
> it is 3.75 seconds. The 6341 might also use 3.75 seconds.
When I read your series I also thought about it and indeed it is 3.75
seconds. I will fix it.
Thanks,
Gregory
>
>Thanks
>
riction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
t;dev", "bootcs0", V_98DX3236_PLUS)),
> + MPP_VAR_FUNCTION(0x4, "dev", "bootcs", V_98DX3236_PLUS)),
> MPP_MODE(6,
>MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS),
>MPP_VAR_FUNCTION(0x2, "sd0", "clk", V_98DX4251),
> @@ -442,7 +442,8 @@ static struct mvebu_mpp_mode mv98dx3236_mpp_modes[] = {
>MPP_VAR_FUNCTION(0x3, "uart1", "txd", V_98DX3236_PLUS)),
> MPP_MODE(19,
>MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS),
> - MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V_98DX3236_PLUS)),
> + MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V_98DX3236_PLUS),
> + MPP_VAR_FUNCTION(0x4, "dev", "rb", V_98DX3236_PLUS)),
> MPP_MODE(20,
>MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS),
>MPP_VAR_FUNCTION(0x4, "dev", "we0", V_98DX3236_PLUS)),
> @@ -548,7 +549,7 @@ static struct mvebu_mpp_ctrl mv98dx3236_mpp_controls[] = {
> };
>
> static struct pinctrl_gpio_range mv98dx3236_mpp_gpio_ranges[] = {
> - MPP_GPIO_RANGE(0, 0, 0, 32),
> + MPP_GPIO_RANGE(0, 0, 0, 32),
> };
>
> static int armada_xp_pinctrl_suspend(struct platform_device *pdev,
> --
> 2.11.0.24.ge6920cf
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
status = "okay";
> + };
> +
> + mvsdio@d4000 {
> + status = "disabled";
> + };
> +
> + nand@d {
> + status = "okay";
> +
Hi Chris,
On dim., janv. 29 2017, Chris Packham <chris.pack...@alliedtelesis.co.nz>
wrote:
> On 28/01/17 07:47, Stephen Boyd wrote:
>> On 01/27, Gregory CLEMENT wrote:
>>> Hi all,
>>>
>>> On ven., janv. 27 2017, Chris Packham <
us,rd-hold-ps = <0>;
> +
> + /* Write parameters */
> + devbus,sync-enable = <0>;
> + devbus,wr-high-ps = <6>;
> + devbus,wr-low-ps = <6>;
> + devbus,ale-wr-ps = <6>;
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + clock-frequency = <10>;
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> + num-cs = <1>;
> + marvell,nand-keep-config;
> + marvell,nand-enable-arbiter;
> + nand-on-flash-bbt;
> + nand-ecc-strength = <4>;
> + nand-ecc-step-size = <512>;
> +};
> +
> + {
> + status = "okay";
> +
> + spi-flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "m25p64";
> + reg = <0>; /* Chip select 0 */
> + spi-max-frequency = <2000>;
> + m25p,fast-read;
> +
> + partition@u-boot {
> + reg = <0x 0x0010>;
> + label = "u-boot";
> + };
> + partition@u-boot-env {
> + reg = <0x0010 0x0004>;
> + label = "u-boot-env";
> + };
> + partition@unused {
> + reg = <0x0014 0x00ec>;
> + label = "unused";
> + };
> +
> + };
> +};
> --
> 2.11.0.24.ge6920cf
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
+}
> +
> +static const struct smp_operations mv98dx3236_smp_ops __initconst = {
> + .smp_init_cpus = armada_xp_smp_init_cpus,
> + .smp_prepare_cpus = armada_xp_smp_prepare_cpus,
> + .smp_boot_secondary = mv98dx3236_boot_secondary,
> + .smp_secondary_init = armada_xp_secondary_init,
> +#ifdef CONFIG_HOTPLUG_CPU
> + .cpu_die= armada_xp_cpu_die,
> + .cpu_kill = armada_xp_cpu_kill,
> +#endif
> +};
> +
> +CPU_METHOD_OF_DECLARE(mv98dx3236_smp, "marvell,98dx3236-smp",
> + _smp_ops);
> --
> 2.11.0.24.ge6920cf
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
r FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + * Contains definitions specific to the 98dx4521 SoC that are not
> + * common to all Armada XP SoCs.
> + */
> +
> +#include "armada-xp-98dx3236.dtsi"
> +
> +/ {
> + model = "Marvell 98DX4251 SoC";
> + compatible = "marvell,armadaxp-98dx4521", "marvell,armadaxp-98dx3236",
> "marvell,armadaxp", "marvell,armada-370-xp";
> +
> + cpus {
> + cpu@1 {
> + device_type = "cpu";
> + compatible = "marvell,sheeva-v7";
> + reg = <1>;
> + clocks = < 1>;
> + clock-latency = <100>;
> + };
> + };
> +
> + soc {
> + internal-regs {
> + resume@20980 {
> + compatible = "marvell,98dx3336-resume-ctrl";
> + reg = <0x20980 0x10>;
> + };
> + };
> + };
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + compatible = "marvell,98dx4251-pinctrl";
> +
> + sdio_pins: sdio-pins {
> + marvell,pins = "mpp5", "mpp6", "mpp7",
> +"mpp8", "mpp9", "mpp10";
> + marvell,function = "sd0";
> + };
> +};
> +
> + {
> + compatible = "marvell,prestera-98dx4251";
> +};
> --
> 2.11.0.24.ge6920cf
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
for this switch by describing its
capabilities to the driver and introducing a new family.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/dsa/mv88e6xxx/chip.c | 54 ++--
drivers/net/dsa/mv88e6xxx/mv88e6xxx.h | 19 +-
2
ove support for temperature sensor
v5 -> v6:
- rebased on net-next/master (d140199af510)
- Fix the redundant check on mv88e6xxx_6341_family (reported by Julia
Lawall)
- Add support for the 88E6141
- Move support for temperature sensor in the phy part
Gregory CLEMENT (2):
net: dsa: mv88e6xx
;and...@lunn.ch>
Reviewed-by: Vivien Didelot <vivien.dide...@savoirfairelinux.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/dsa/mv88e6xxx/chip.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/
The Marvell 88E6341 device is single-chip, 6-port Ethernet switch with
four integrated 10/100/1000Mbps Ethernet transceivers and one high speed
SerDes interfaces.
It belongs to the Topaz family and unlike the 88E6341 it does not have
a TCAM.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
Hi Ulf,
On jeu., janv. 26 2017, Ulf Hansson <ulf.hans...@linaro.org> wrote:
> On 11 January 2017 at 18:19, Gregory CLEMENT
> <gregory.clem...@free-electrons.com> wrote:
>> From: Hu Ziji <huz...@marvell.com>
>>
>> Marvell Xenon SDHC can support eMMC
boot.
> + */
> + ret = mvebu_cpu_reset_deassert(hw_cpu);
> + if (ret) {
> + pr_warn("unable to boot CPU: %d\n", ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static const struct smp_operations mv98dx3236_smp_ops __initconst = {
>
t;0 0x 0 0x4000>; /* 1 GB */
> +};
> ++};
> +
> -+soc {
> -+ ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf100 0x10
> -+ MBUS_ID(0x01, 0x1d) 0 0 0xfff0 0x10
> -+ MBUS_ID(0x01, 0x2f) 0 0 0xf000 0x100
> -+ MBUS_ID(0x03, 0x00) 0 0 0xa800 0x400
> -+ MBUS_ID(0x08, 0x00) 0 0 0xac00 0x10>;
> -+
> -+devbus-bootcs {
> -+status = "okay";
> ++_bootcs {
> ++status = "okay";
> +
> -+/* Device Bus parameters are required */
> ++/* Device Bus parameters are required */
> +
> -+/* Read parameters */
> -+devbus,bus-width= <16>;
> -+devbus,turn-off-ps = <6>;
> -+devbus,badr-skew-ps = <0>;
> -+devbus,acc-first-ps = <124000>;
> -+devbus,acc-next-ps = <248000>;
> -+devbus,rd-setup-ps = <0>;
> -+devbus,rd-hold-ps = <0>;
> -+
> -+/* Write parameters */
> -+devbus,sync-enable = <0>;
> -+devbus,wr-high-ps = <6>;
> -+devbus,wr-low-ps = <6>;
> -+devbus,ale-wr-ps = <6>;
> -+};
> ++/* Read parameters */
> ++devbus,bus-width= <16>;
> ++devbus,turn-off-ps = <6>;
> ++devbus,badr-skew-ps = <0>;
> ++devbus,acc-first-ps = <124000>;
> ++devbus,acc-next-ps = <248000>;
> ++devbus,rd-setup-ps = <0>;
> ++devbus,rd-hold-ps = <0>;
> ++
> ++/* Write parameters */
> ++devbus,sync-enable = <0>;
> ++devbus,wr-high-ps = <6>;
> ++devbus,wr-low-ps = <6>;
> ++devbus,ale-wr-ps = <6>;
> ++};
> +
> -+internal-regs {
> -+serial@12000 {
> -+status = "okay";
> -+};
> -+serial@12100 {
> -+status = "okay";
> -+};
> ++ {
> ++status = "okay";
> ++};
> +
> -+i2c@11000 {
> -+clock-frequency = <10>;
> -+status = "okay";
> -+};
> ++ {
> ++status = "okay";
> ++};
> +
> -+mvsdio@d4000 {
> -+status = "disabled";
> -+};
> ++ {
> ++clock-frequency = <10>;
> ++status = "okay";
> ++};
> +
> -+nand@d {
> -+status = "okay";
> -+num-cs = <1>;
> -+marvell,nand-keep-config;
> -+marvell,nand-enable-arbiter;
> -+nand-on-flash-bbt;
> -+nand-ecc-strength = <4>;
> -+nand-ecc-step-size = <512>;
> -+};
> -+};
> -+};
> ++ {
> ++status = "okay";
> ++num-cs = <1>;
> ++marvell,nand-keep-config;
> ++marvell,nand-enable-arbiter;
> ++nand-on-flash-bbt;
> ++nand-ecc-strength = <4>;
> ++nand-ecc-step-size = <512>;
> +};
> +
> + {
>
> --
> 2.11.0.24.ge6920cf
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
he main benefit is when we try to have all
the device tree file of the same SoC we just have to parse the name of
the files.
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
Hi,
On ven., janv. 27 2017, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
> Hi all,
>
> On ven., janv. 27 2017, Chris Packham <chris.pack...@alliedtelesis.co.nz>
> wrote:
>
>> The 98DX3236, 98DX3336 and 98DX4251 are a set of switch ASICs
e able to use other existing mmc DT bindings
> (perhaps also you need the brand new "mmc-ddr-3_3v"), instead of the
> "no-1-8-v".
OK I will try with this one. And if it works, I wonder if it worth
mentioning it as it is also part of the mmc binding.
Gregory
>
&
Hi Ulf,
On mar., févr. 14 2017, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
> Hello,
>
> This the sixth version of the series adding support for the SDHCI
> Xenon controller. It can be currently found on the Armada 37xx and the
> Armada 7K/8K but will
vell/iap140.dtsi| 195
> +
> drivers/clk/Kconfig| 2 +-
> drivers/mmc/host/Kconfig | 2 +-
> drivers/tty/serial/Kconfig | 2 +-
> 8 files changed, 289 insertions(+), 3 del
rom rx_desc again
> net: mvneta: avoid reading from tx_desc as much as possible
> net: mvneta: Use cacheable memory to store the rx buffer DMA address
>
> drivers/net/ethernet/marvell/mvneta.c | 80
> +++
> 1 file changed, 43 insertions(+), 37 deletions(-)
>
> --
> 2.11.0
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
ure I still remember how mvneta works in
> the details.
>
> Best regards,
>
> Thomas
> --
> Thomas Petazzoni, CTO, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
ed-off-by: Hu Ziji <huz...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/mmc/core/mmc.c | 24
include/linux/mmc/core.h | 2 ++
2 files changed, 26 insertions(+)
diff --git a/drivers/mmc/core/mmc.c b/drivers/mm
From: Hu Ziji <huz...@marvell.com>
Export sdhci_set_ios() in sdhci.c.
Thus vendor sdhci driver can implement its own set_ios() routine.
Signed-off-by: Hu Ziji <huz...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/mmc/host/sdhci.
Also enable it on the Armada 7040 DB and Armada 8040 DB boards.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-7040-db.dts | 14 +-
arch/arm64/boot/dts/marvell/armada-8040-db.dts | 20 +-
arch/arm6
lement Xenon PHY in MMC host directory.
Signed-off-by: Hu Ziji <huz...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/mmc/host/Makefile | 2 +-
drivers/mmc/host/sdhci-xenon-phy.c | 751 ++-
drivers/mmc/
From: Hu Ziji <huz...@marvell.com>
Add maintainer entry for Marvell Xenon eMMC/SD/SDIO
Host Controller drivers.
Signed-off-by: Hu Ziji <huz...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
MAINTAINERS | 7 +++
1 file changed, 7 i
Xenon SDHC conforms to SD Physical Layer Specification
Version 3.01 and is designed according to the guidelines provided
in the SD Host Controller Standard Specification Version 3.00.
Signed-off-by: Hu Ziji <huz...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@fre
This patch enables the driver for the SDHCI controller found on the
Marvell Armada 3700 and 7K/8K ARM64 SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defco
Add the eMMC support for Armada 37xx SoC and enable it in the Armada 3720
DB board.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 16
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 11
m>
Tested-by: Russell King <rmk+ker...@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/mmc/host/sdhci-xenon-phy.c | 116 +-
drivers/mmc/host/sdhci-xenon.c | 2 +-
drivers/mmc/host/sdhci-xenon.h | 2
From: Hu Ziji <huz...@marvell.com>
Marvell Xenon SDHC can support eMMC/SD/SDIO.
Add Xenon-specific properties.
Also add properties for Xenon PHY setting.
Signed-off-by: Hu Ziji <huz...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
Docume
lt;han...@marvell.com>
[fixed up conflicts, added error handling --rmk]
Signed-off-by: Russell King <rmk+ker...@armlinux.org.uk>
Acked-by: Stephen Boyd <sb...@codeaurora.org>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/arm
First version of the binding didn't have the eMMC clock. This patch
allows to not registering the eMMC clock if it is not present in the
device tree. Then the device tree can be backwards compatible.
Suggested-by: Stephen Boyd <sb...@codeaurora.org>
Signed-off-by: Gregory CLEMENT <gre
.
Re-write Xenon bindings. Ajust Xenon DT property naming.
Add a new DT property to indicate eMMC card type, instead of using
variable card_candidate.
Clear quirks SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 in Xenon platform data
Add support to HS400 retuning."
Thanks,
Gregory
Gregory CLEM
From: Hu Ziji <huz...@marvell.com>
Export sdhci_enable_sdio_irq() from sdhci.c.
Thus vendor SDHC driver can implement its specific SDIO irq
control.
Signed-off-by: Hu Ziji <huz...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/mm
From: Hu Ziji <huz...@marvell.com>
Export sdhci_start_signal_voltage_switch() from sdhci.c.
Thus vendor sdhci driver can implement its own signal voltage
switch routine.
Signed-off-by: Hu Ziji <huz...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.co
};
> +
> + wps_white@8 {
> + label = "shelby:white:wps";
> + reg = <0x8>;
> + };
> +
> +
regs";
> @@ -522,7 +522,7 @@
> marvell,crypto-sram-size = <0x800>;
> };
>
> - rtc@a3800 {
> + rtc: rtc@a3800 {
> compatible = "marvell,armada-380-rtc";
> reg = <0xa3800 0x20>, <0x184a0 0x0c>;
> reg-names = "rtc", "rtc-soc";
> @@ -561,13 +561,13 @@
> clock-output-names = "nand";
> };
>
> - thermal@e8078 {
> + thermal: thermal@e8078 {
> compatible = "marvell,armada380-thermal";
> reg = <0xe4078 0x4>, <0xe4074 0x4>;
> status = "okay";
> };
>
> - flash@d {
> + nand: flash@d {
> compatible = "marvell,armada370-nand";
> reg = <0xd 0x54>;
> #address-cells = <1>;
> @@ -577,7 +577,7 @@
> status = "disabled";
> };
>
> - sdhci@d8000 {
> + sdhci: sdhci@d8000 {
> compatible = "marvell,armada-380-sdhci";
> reg-names = "sdhci", "mbus", "conf-sdio3";
> reg = <0xd8000 0x1000>,
> --
> 2.11.0.24.ge6920cf
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
DX4251 SoC";
> - compatible = "marvell,armadaxp-98dx4521", "marvell,armadaxp-98dx3236",
> "marvell,armadaxp", "marvell,armada-370-xp";
> + compatible = "marvell,armadaxp-98dx4251", "marvell,armadaxp-98dx3236",
&
viewed-by: Andrew Lunn <and...@lunn.ch>
>
> Gregory, this is in the mvebu dt branch and need fixing there.
Applied on mvebu/dt if it can't go through arm-soc I will submitted as a
fix for v4.11-rc1.
Thanks,
Gregory
>
> [Goes away to look at the other dts files]
>
> O.K. Floria
ID and the revision by the system
> - * register and use PCI registers only if it is not possible
> + * First try to get the ID and the revision by from system controller
> + * register, then try the DFX register (if applicable), finally read it
> + * from PCI registers.
>
>
> drivers/net/ethernet/marvell/mvneta.c | 36
> ---
> 1 file changed, 21 insertions(+), 15 deletions(-)
>
> --
> 2.11.0
>
>
> ___________
> linux-arm-kernel mailing list
> linux-arm-ker...@lists
@@ static int mvneta_init(struct device *dev, struct
> mvneta_port *pp)
> rxq->buf_virt_addr = devm_kmalloc(pp->dev->dev.parent,
> rxq->size * sizeof(void *),
> GFP_K
om uncached memory is
> fairly slow. So reuse the read out rx_status to avoid the second
> reading from uncached memory.
>
> Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
> Suggested-by: Arnd Bergmann <a...@arndb.de>
This one is OK and I didn't see a regression:
Tes
arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts | 49 +++
>> arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts| 11 +
>> arch/arm/boot/dts/kirkwood-rd88f6281.dtsi | 44 +
>> 9 files changed, 415 insertions(+), 1 deletion(-)
>>
>
>
> --
> Florian
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
t 2-3 releases we may consider removing the old DSA binding entirely
>> from the kernel.
>
> Gregory, all patches have been reviewed/tested now, can you take this
> for an upcoming 4.11 pull request? Thanks!
All the series applied on mvebu/dt
Thanks,
Gregory
> --
> Florian
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
ame.
Thanks,
Gregory
Gregory CLEMENT (1):
net: dsa: mv88e6xxx: Add support for ethernet switch 88E6341
Romain Perier (1):
net: dsa: mv88e6xxx: Don't forbid MDIO I/Os for PHY addr >=
num_of_ports
drivers/net/dsa/mv88e6xxx/chip.c | 61 +--
drivers/n
for this switch by describing its
capabilities to the driver and introducing a new family.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/dsa/mv88e6xxx/chip.c | 55 +--
drivers/net/dsa/mv88e6xxx/mv88e6xxx.h | 21 ++
;and...@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/dsa/mv88e6xxx/chip.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 987b2dbbd35a..d1960ae0a618 100644
--- a/d
he same here. I've mostly been working on where the 6390 is
> different. Where it is the same i've mostly ignored it so far :-)
>
> There is also an ongoing effort to remove all these big if statements
> with a list of families.
Thanks for this answers I understand it a little bett
Hi Vvien and Andrew,
On ven., janv. 20 2017, Andrew Lunn <and...@lunn.ch> wrote:
> On Thu, Jan 19, 2017 at 05:26:03PM -0500, Vivien Didelot wrote:
>> Gregory CLEMENT <gregory.clem...@free-electrons.com> writes:
>>
>> > +static bool mv88e6xxx_634
unsigned long irq);
>
> void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
> unsigned long mapbase,
> - unsigned long irq,
> - unsigned long irq_err);
> + unsigned long irq);
>
> void __init orion_ge00_switch_init(struct dsa_platform_data *d,
> int irq);
> --
> 2.9.0
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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