[PATCH v6 09/14] regulator: qcom_spmi: Add support for SAW

Switching. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/regulator/qcom_spmi-regulator.c | 133 +++- 1 file changed, 130 insertions(+), 3 deletions(-) diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c

[PATCH v6 07/14] clk: qcom: Add ACD path to CPU clock driver for msm8996

until a pre-programmed delay has expired. This change configures ACD during the probe and switches the PMUXes to the ACD clock source. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-cpu-8996.c | 75 +++-- 1 file changed, 65 inse

[PATCH v6 13/14] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu

table when it is parsed by the OPP framework. This change adds documentation. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- .../devicetree/bindings/opp/kryo-cpufreq.txt | 680 + 1 file changed, 680 insertions(+) create mode 100644 Documentation/devicetree/bi

[PATCH v6 14/14] dt: qcom: Add qcom-cpufreq-kryo driver configuration

Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- arch/arm64/boot/dts/qcom/apq8096-db820c.dts | 2 +- arch/arm64/boot/dts/qcom/msm8996.dtsi | 310 +++- 2 files changed, 309 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/apq8096-db82

[PATCH v6 11/14] dt: qcom: Add SAW regulator for 8x96 CPUs

1. Add syscon node for the SAW CPU registers 2. Add SAW regulators gang definition for s8-s11 3. Add voltages to the OPP tables 4. Add the s11 SAW regulator as CPU regulator Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- arch/arm64/boot/dts/qcom/msm8996.dts

[PATCH v6 02/14] clk: qcom: Make clk_alpha_pll_configure available to modules

From: Rajendra Nayak <rna...@codeaurora.org> Allow clk_alpha_pll_configure to be called from loadable kernel modules. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-alpha-pll.c | 1 + 1 file ch

[PATCH v6 08/14] dt: qcom: Add opp and thermal to the msm8996

Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 269 -- 1 file changed, 260 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 37

[PATCH v6 04/14] clk: qcom: Add DT bindings for CPU clock driver for msm8996

on a single VCO range, between 600MHz and 3GHz. However the CPUs do support OPPs with frequencies between 300MHz and 600MHz. In order to support running the CPUs at those frequencies we end up having to lock the PLL at twice the rate and drive the CPU clk via the PLL/2 output and SMUX. Signed-o

[PATCH v6 12/14] cpufreq: Add Kryo CPU scaling driver

. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/cpufreq/Kconfig.arm | 11 +++ drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cpufreq-dt-platdev.c | 3 + drivers/cpufreq/qcom-cpufreq-kryo.c | 148 +++ 4 files change

[PATCH v6 10/14] dt-bindings: qcom_spmi: Add support for SAW documentation

Switching. Document it. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Reviewed-by: Rob Herring <r...@kernel.org> --- .../bindings/regulator/qcom,spmi-regulator.txt | 45 ++ 1 file changed, 45 insertions(+) diff --git a/Documentation/devicetree/bindings/re

[PATCH v6 06/14] clk: qcom: cpu-8996: Add support to switch below 600Mhz

t; SMUX(1) --> PMUX(0) --> CPU clk Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Conflicts: drivers/clk/qcom/clk-cpu-8996.c --- drivers/clk/qcom/clk-cpu-8996.c | 25 ++--- 1 file changed, 22 in

[PATCH v6 05/14] clk: qcom: cpu-8996: Add support to switch to alternate PLL

k rate change notifiers to support this. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-cpu-8996.c | 33 + 1 file changed, 33 insertions(+) diff --git a/drivers/clk/qco

[PATCH v6 03/14] clk: qcom: Add CPU clock driver for msm8996

ACD stands for Adaptive Clock Distribution and is used to detect voltage droops. We do not add support for ACD as yet. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/clk-fixed-factor.c | 2 +- drivers/clk/qcom/Kconfig

[PATCH v6 01/14] soc: qcom: Separate kryo l2 accessors from PMU driver

-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/perf/Kconfig | 1 + drivers/perf/qcom_l2_pmu.c | 90 ++-- drivers/soc/qcom/Kconfig | 3 ++ drivers/soc/qcom/Makefile| 1 + drivers/soc/qcom/kryo-l2-accessors.

[PATCH v6 00/14] CPU scaling support for msm8996

different SOC versions. The driver reads eFuse information and chooses the required OPP subset by passing the OPP supported-hw parameter. A previous post of RFC can be found here: https://patchwork.kernel.org/patch/10377887/ Ilia Lin (11): soc: qcom: Separate kryo l2 accessors from PMU driver clk

[PATCH v7 08/14] dt: qcom: Add opp and thermal to the msm8996

Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 269 -- 1 file changed, 260 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi

[PATCH v7 07/14] clk: qcom: Add ACD path to CPU clock driver for msm8996

until a pre-programmed delay has expired. This change configures ACD during the probe and switches the PMUXes to the ACD clock source. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-cpu-8996.c | 75 +++-- 1 file changed, 65 inse

[PATCH v7 04/14] clk: qcom: Add DT bindings for CPU clock driver for msm8996

on a single VCO range, between 600MHz and 3GHz. However the CPUs do support OPPs with frequencies between 300MHz and 600MHz. In order to support running the CPUs at those frequencies we end up having to lock the PLL at twice the rate and drive the CPU clk via the PLL/2 output and SMUX. Signed-o

[PATCH v7 01/14] soc: qcom: Separate kryo l2 accessors from PMU driver

-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/perf/Kconfig | 1 + drivers/perf/qcom_l2_pmu.c | 90 ++-- drivers/soc/qcom/Kconfig | 3 ++ drivers/soc/qcom/Makefile| 1 + drivers/soc/qcom/kryo-l2-accessors.

[PATCH] cpufreq: Add Kryo CPU scaling driver

. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- drivers/cpufreq/Kconfig.arm | 10 +++ drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cpufreq-dt-platdev.c | 3 + drivers/cpufreq/qcom-cpufreq-k

[PATCH v8 04/15] clk: qcom: Add CPU clock driver for msm8996

ACD stands for Adaptive Clock Distribution and is used to detect voltage droops. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/Kconfig | 9 + drivers/clk/qcom/Makefile| 1 + drivers/clk/qcom/cl

[PATCH v8 10/15] cpufreq: Add Kryo CPU scaling driver

. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- drivers/cpufreq/Kconfig.arm | 10 +++ drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cpufreq-dt-platdev.c | 3 + drivers/cpufreq/qcom-cpufreq-k

[PATCH v8 09/15] dt: qcom: Add opp and thermal to the msm8996

Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 269 -- 1 file changed, 260 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi

[PATCH v8 12/15] dt: qcom: Add qcom-cpufreq-kryo driver configuration

1. Add NVMEM node for the speedbin 2. Add definitions for all possible MSM8996 CPU OPPs. The qcom-cpufreq-kryo driver will select the appropriate subset. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- arch/arm64/boot/dts/

[PATCH v8 11/15] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu

M8996 SG, speedbin 1 6: MSM8996 SG, speedbin 2 7-31: unused Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- .../devicetree/bindings/opp/kryo-cpufreq.txt | 680 + 1 file ch

[PATCH v8 14/15] dt-bindings: qcom_spmi: Document SAW support

Document the DT bindings for the SAW regulators. The saw-leader is the only property that is configurable in DT. The saw-slave property allows ganging (grouping) of several regulators so that their outputs can be combined. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Reviewed-b

[PATCH v8 15/15] dt: qcom: Add SAW regulator for 8x96 CPUs

1. Add syscon node for the SAW CPU registers 2. Add SAW regulators gang definition for s8-s11 3. Add voltages to the OPP tables 4. Add the s11 SAW regulator as CPU regulator Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- arch/ar

[PATCH v8 00/15] CPU scaling support for msm8996

SAW regulator support to the SPMI regulator driver. The SAW regulators will be controlled through special CPU registers instead of direct SPMI accesses. Ilia Lin (13): soc: qcom: Separate kryo l2 accessors from PMU driver clk: Use devm_ in the register fixed factor clock clk: qcom: Add CPU

[PATCH v8 01/15] soc: qcom: Separate kryo l2 accessors from PMU driver

-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/perf/Kconfig | 1 + drivers/perf/qcom_l2_pmu.c | 90 ++-- drivers/soc/qcom/Kconfig | 3 ++ drivers/soc/qcom/Makefile| 1 + drivers/soc/qcom/kryo-l2-accessors.

[PATCH v8 07/15] clk: qcom: cpu-8996: Add support to switch below 600Mhz

: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-cpu-8996.c | 25 ++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-899

[PATCH v8 13/15] regulator: qcom_spmi: Add support for SAW

Switching. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/regulator/qcom_spmi-regulator.c | 133 +++- 1 file changed, 130 insertions(+), 3 deletions(-) diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c

[PATCH v8 05/15] dt-bindings: clk: qcom: Add bindings for CPU clock for msm8996

on a single VCO range, between 600MHz and 3GHz. However the CPUs do support OPPs with frequencies between 300MHz and 600MHz. In order to support running the CPUs at those frequencies we end up having to lock the PLL at twice the rate and drive the CPU clk via the PLL/2 output and SMUX. Signed-o

[PATCH v8 03/15] clk: Use devm_ in the register fixed factor clock

Use devm_clk_hw_register instead of clk_hw_register to simplify the usage of this API. This way drivers that call the clk_hw_register_fixed_factor won't need to maintain a data structure for further cleanup. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/clk-fixed-factor

[PATCH v8 06/15] clk: qcom: cpu-8996: Add support to switch to alternate PLL

k rate change notifiers to support this. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-cpu-8996.c | 33 + 1 file changed, 33 insertions(+) diff --git a/drivers/clk/qco

[PATCH v8 08/15] clk: qcom: Add ACD path to CPU clock driver for msm8996

until a pre-programmed delay has expired. This change configures ACD during the probe and switches the PMUXes to the ACD clock source. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-cpu-8996.c | 75 +++-- 1 file changed, 65 inse

[PATCH v8 02/15] clk: qcom: Make clk_alpha_pll_configure available to modules

From: Rajendra Nayak <rna...@codeaurora.org> Allow clk_alpha_pll_configure to be called from loadable kernel modules. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-alpha-pll.c | 1 + 1 file ch

[PATCH v7 12/14] cpufreq: Add Kryo CPU scaling driver

. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/cpufreq/Kconfig.arm | 11 +++ drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cpufreq-dt-platdev.c | 3 + drivers/cpufreq/qcom-cpufreq-kryo.c | 150 +++ 4 files change

[PATCH v7 14/14] dt: qcom: Add qcom-cpufreq-kryo driver configuration

Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- arch/arm64/boot/dts/qcom/apq8096-db820c.dts | 2 +- arch/arm64/boot/dts/qcom/msm8996.dtsi | 311 +++- 2 files changed, 310 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/apq8096-db82

[PATCH v7 13/14] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu

table when it is parsed by the OPP framework. This change adds documentation. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- .../devicetree/bindings/opp/kryo-cpufreq.txt | 680 + 1 file changed, 68

[PATCH v7 10/14] dt-bindings: qcom_spmi: Add support for SAW documentation

Switching. Document it. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Reviewed-by: Rob Herring <r...@kernel.org> --- .../bindings/regulator/qcom,spmi-regulator.txt | 45 ++ 1 file changed, 45 insertions(+) diff --git a/Documentation/devicetree/bindings/re

[PATCH v7 11/14] dt: qcom: Add SAW regulator for 8x96 CPUs

1. Add syscon node for the SAW CPU registers 2. Add SAW regulators gang definition for s8-s11 3. Add voltages to the OPP tables 4. Add the s11 SAW regulator as CPU regulator Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- arch/ar

[PATCH v7 05/14] clk: qcom: cpu-8996: Add support to switch to alternate PLL

k rate change notifiers to support this. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-cpu-8996.c | 33 + 1 file changed, 33 insertions(+) diff --git a/drivers/clk/qco

[PATCH v7 03/14] clk: qcom: Add CPU clock driver for msm8996

ACD stands for Adaptive Clock Distribution and is used to detect voltage droops. We do not add support for ACD as yet. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/clk-fixed-factor.c | 2 +- drivers/clk/qcom/Kconfig

[PATCH v7 06/14] clk: qcom: cpu-8996: Add support to switch below 600Mhz

t; SMUX(1) --> PMUX(0) --> CPU clk Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Conflicts: drivers/clk/qcom/clk-cpu-8996.c --- drivers/clk/qcom/clk-cpu-8996.c | 25 ++--- 1 file changed, 22 in

[PATCH v7 02/14] clk: qcom: Make clk_alpha_pll_configure available to modules

From: Rajendra Nayak <rna...@codeaurora.org> Allow clk_alpha_pll_configure to be called from loadable kernel modules. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-alpha-pll.c | 1 + 1 file ch

[PATCH v7 00/14] CPU scaling support for msm8996

/10398455/ Ilia Lin (11): soc: qcom: Separate kryo l2 accessors from PMU driver clk: qcom: Add CPU clock driver for msm8996 clk: qcom: Add DT bindings for CPU clock driver for msm8996 clk: qcom: Add ACD path to CPU clock driver for msm8996 dt: qcom: Add opp and thermal to the msm8996

[PATCH v7 09/14] regulator: qcom_spmi: Add support for SAW

Switching. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/regulator/qcom_spmi-regulator.c | 133 +++- 1 file changed, 130 insertions(+), 3 deletions(-) diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c

[PATCH v9 08/15] clk: qcom: Add ACD path to CPU clock driver for msm8996

until a pre-programmed delay has expired. This change configures ACD during the probe and switches the PMUXes to the ACD clock source. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-cpu-8996.c | 75 +++-- 1 file changed, 65 inse

[PATCH v9 07/15] clk: qcom: cpu-8996: Add support to switch below 600Mhz

: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-cpu-8996.c | 25 ++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-899

[PATCH v9 13/15] regulator: qcom_spmi: Add support for SAW

Switching. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/regulator/qcom_spmi-regulator.c | 133 +++- 1 file changed, 130 insertions(+), 3 deletions(-) diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c

[PATCH v9 12/15] dt: qcom: Add qcom-cpufreq-kryo driver configuration

1. Add NVMEM node for the speedbin 2. Add definitions for all possible MSM8996 CPU OPPs. The qcom-cpufreq-kryo driver will select the appropriate subset. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- arch/arm64/boot/dts/

[PATCH v9 15/15] dt: qcom: Add SAW regulator for 8x96 CPUs

1. Add syscon node for the SAW CPU registers 2. Add SAW regulators gang definition for s8-s11 3. Add voltages to the OPP tables 4. Add the s11 SAW regulator as CPU regulator Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- arch/ar

[PATCH v9 10/15] cpufreq: Add Kryo CPU scaling driver

. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- drivers/cpufreq/Kconfig.arm | 10 +++ drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cpufreq-dt-platdev.c | 3 + drivers/cpufreq/qcom-cpufreq-k

[PATCH] cpufreq: Add Kryo CPU scaling driver

. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- drivers/cpufreq/Kconfig.arm | 10 +++ drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cpufreq-dt-platdev.c | 3 + drivers/cpufreq/qcom-cpufreq-k

[PATCH v9 04/15] clk: qcom: Add CPU clock driver for msm8996

ACD stands for Adaptive Clock Distribution and is used to detect voltage droops. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/Kconfig | 9 + drivers/clk/qcom/Makefile| 1 + drivers/clk/qcom/cl

[PATCH v9 06/15] clk: qcom: cpu-8996: Add support to switch to alternate PLL

k rate change notifiers to support this. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-cpu-8996.c | 33 + 1 file changed, 33 insertions(+) diff --git a/drivers/clk/qco

[PATCH v9 03/15] clk: Use devm_ in the register fixed factor clock

Use devm_clk_hw_register instead of clk_hw_register to simplify the usage of this API. This way drivers that call the clk_hw_register_fixed_factor won't need to maintain a data structure for further cleanup. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/clk-fixed-factor

[PATCH v9 09/15] dt: qcom: Add opp and thermal to the msm8996

Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 269 -- 1 file changed, 260 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi

[PATCH v9 11/15] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu

M8996 SG, speedbin 1 6: MSM8996 SG, speedbin 2 7-31: unused Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- .../devicetree/bindings/opp/kryo-cpufreq.txt | 680 + 1 file ch

[PATCH v9 05/15] dt-bindings: clk: qcom: Add bindings for CPU clock for msm8996

on a single VCO range, between 600MHz and 3GHz. However the CPUs do support OPPs with frequencies between 300MHz and 600MHz. In order to support running the CPUs at those frequencies we end up having to lock the PLL at twice the rate and drive the CPU clk via the PLL/2 output and SMUX. Signed-o

[PATCH v9 14/15] dt-bindings: qcom_spmi: Document SAW support

Document the DT bindings for the SAW regulators. The saw-leader is the only property that is configurable in DT. The saw-slave property allows ganging (grouping) of several regulators so that their outputs can be combined. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Reviewed-b

[PATCH v9 00/15] CPU scaling support for msm8996

by passing the OPP supported-hw parameter. Regulators (13/15-15/15): Added SAW regulator support to the SPMI regulator driver. The SAW regulators will be controlled through special CPU registers instead of direct SPMI accesses. Ilia Lin (13): soc: qcom: Separate kryo l2 accessors from PMU

[PATCH v9 02/15] clk: qcom: Make clk_alpha_pll_configure available to modules

From: Rajendra Nayak <rna...@codeaurora.org> Allow clk_alpha_pll_configure to be called from loadable kernel modules. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-alpha-pll.c | 1 + 1 file ch

[PATCH v9 01/15] soc: qcom: Separate kryo l2 accessors from PMU driver

-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/perf/Kconfig | 1 + drivers/perf/qcom_l2_pmu.c | 90 ++-- drivers/soc/qcom/Kconfig | 3 ++ drivers/soc/qcom/Makefile| 1 + drivers/soc/qcom/kryo-l2-accessors.

[PATCH] cpufreq: Add Kryo CPU scaling driver

. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- drivers/cpufreq/Kconfig.arm | 10 +++ drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cpufreq-dt-platdev.c | 3 + drivers/cpufreq/qcom-cpufreq-k

[PATCH v10 2/2] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu

M8996 SG, speedbin 1 6: MSM8996 SG, speedbin 2 7-31: unused Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Reviewed-by: Rob Herring <r...@kernel.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- .../devicetree/bin

[PATCH v10 0/2] Kryo CPU scaling driver

parameter. The series depends on the series from Viresh: https://patchwork.kernel.org/patch/10418139/ The previous spin was here: https://patchwork.kernel.org/patch/10420751/ https://patchwork.kernel.org/patch/10414761/ Ilia Lin (2): cpufreq: Add Kryo CPU scaling driver dt-bindings: cpufreq: Document

[PATCH v10 1/2] cpufreq: Add Kryo CPU scaling driver

. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/cpufreq/Kconfig.arm | 10 +++ drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cpufreq-dt-platdev.c | 3 + drivers/cpufreq/qcom-cpufreq-kryo.c | 163 +++ 4 files change

[PATCH] cpufreq: Add Kryo CPU scaling driver

. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/cpufreq/Kconfig.arm | 10 +++ drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cpufreq-dt-platdev.c | 3 + drivers/cpufreq/qcom-cpufreq-kryo.c | 163 +++ 4 files change

[PATCH v11 1/8] soc: qcom: Separate kryo l2 accessors from PMU driver

-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/perf/Kconfig | 1 + drivers/perf/qcom_l2_pmu.c | 90 ++-- drivers/soc/qcom/Kconfig | 3 ++ drivers/soc/qcom/Makefile| 1 + drivers/soc/qcom/kryo-l2-accessors.

[PATCH v11 5/8] dt-bindings: clk: qcom: Add bindings for CPU clock for msm8996

on a single VCO range, between 600MHz and 3GHz. However the CPUs do support OPPs with frequencies between 300MHz and 600MHz. In order to support running the CPUs at those frequencies we end up having to lock the PLL at twice the rate and drive the CPU clk via the PLL/2 output and SMUX. Signed-o

[PATCH v11 4/8] clk: qcom: Add CPU clock driver for msm8996

ACD stands for Adaptive Clock Distribution and is used to detect voltage droops. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/Kconfig | 9 + drivers/clk/qcom/Makefile| 1 + drivers/clk/qcom/cl

[PATCH v11 2/8] clk: qcom: Make clk_alpha_pll_configure available to modules

From: Rajendra Nayak <rna...@codeaurora.org> Allow clk_alpha_pll_configure to be called from loadable kernel modules. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-alpha-pll.c | 1 + 1 file ch

[PATCH v11 7/8] clk: qcom: cpu-8996: Add support to switch below 600Mhz

: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-cpu-8996.c | 25 ++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-899

[PATCH v11 0/8] CPU scaling support for msm8996

): Extracts the kryo l2 accessors driver from the QCOM PMU driver Clocks (2/15-9/15): This series adds support for the CPU clocks on msm8996 devices. The driver uses the existing PLL drivers and is required to control the CPU frequency scaling on the MSM8996. Ilia Lin (6): soc: qcom: Separate kryo l2

[PATCH v11 1/2] dt: qcom: Add opp and thermal to the msm8996

Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 269 -- 1 file changed, 260 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi

[PATCH v11 0/2] CPU scaling support for msm8996 DT

[v11] * Split the series into domains The series adds OPP tables, thermal and CPU definitions in order to support the CPU frequency scaling on msm8996 CPUs. Ilia Lin (2): dt: qcom: Add opp and thermal to the msm8996 dt: qcom: Add qcom-cpufreq-kryo driver configuration arch/arm64/boot/dts

[PATCH v11 2/2] dt: qcom: Add qcom-cpufreq-kryo driver configuration

1. Add NVMEM node for the speedbin 2. Add definitions for all possible MSM8996 CPU OPPs. The qcom-cpufreq-kryo driver will select the appropriate subset. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- arch/arm64/boot/dts/

[PATCH v11 1/2] cpufreq: Add Kryo CPU scaling driver

. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/cpufreq/Kconfig.arm | 10 ++ drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cpufreq-dt-platdev.c | 3 + drivers/cpufreq/qcom-cpufreq-kryo.c | 181 +++ 4 files change

[PATCH v11 2/2] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu

M8996 SG, speedbin 1 6: MSM8996 SG, speedbin 2 7-31: unused Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Reviewed-by: Rob Herring <r...@kernel.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- .../devicetree/bin

[PATCH v11 0/2] Kryo CPU scaling driver

was here: https://patchwork.kernel.org/patch/10420809/ Ilia Lin (2): cpufreq: Add Kryo CPU scaling driver dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu .../devicetree/bindings/opp/kryo-cpufreq.txt | 680 + drivers/cpufreq/Kconfig.arm

[PATCH v11 8/8] clk: qcom: Add ACD path to CPU clock driver for msm8996

until a pre-programmed delay has expired. This change configures ACD during the probe and switches the PMUXes to the ACD clock source. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-cpu-8996.c | 75 +++-- 1 file changed, 65 inse

[PATCH v11 6/8] clk: qcom: cpu-8996: Add support to switch to alternate PLL

k rate change notifiers to support this. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-cpu-8996.c | 33 + 1 file changed, 33 insertions(+) diff --git a/drivers/clk/qco

[PATCH v11 3/8] clk: Use devm_ in the register fixed factor clock

Use devm_clk_hw_register instead of clk_hw_register to simplify the usage of this API. This way drivers that call the clk_hw_register_fixed_factor won't need to maintain a data structure for further cleanup. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/clk-fixed-factor

[PATCH v12 6/8] clk: qcom: cpu-8996: Add support to switch to alternate PLL

k rate change notifiers to support this. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-cpu-8996.c | 33 + 1 file changed, 33 insertions(+) diff --git a/drivers/clk/qco

[PATCH v12 5/8] dt-bindings: clk: qcom: Add bindings for CPU clock for msm8996

on a single VCO range, between 600MHz and 3GHz. However the CPUs do support OPPs with frequencies between 300MHz and 600MHz. In order to support running the CPUs at those frequencies we end up having to lock the PLL at twice the rate and drive the CPU clk via the PLL/2 output and SMUX. Signed-o

[PATCH v12 4/8] clk: qcom: Add CPU clock driver for msm8996

ACD stands for Adaptive Clock Distribution and is used to detect voltage droops. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/Kconfig | 10 + drivers/clk/qcom/Makefile| 1 + drivers/clk/qcom/cl

[PATCH v12 7/8] clk: qcom: cpu-8996: Add support to switch below 600Mhz

: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-cpu-8996.c | 25 ++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-899

[PATCH v12 3/8] clk: Use devm_ in the register fixed factor clock

Use devm_clk_hw_register instead of clk_hw_register to simplify the usage of this API. This way drivers that call the clk_hw_register_fixed_factor won't need to maintain a data structure for further cleanup. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/clk-fixed-factor

[PATCH v12 0/8] Clock for CPU scaling support for msm8996

on the MSM8996. Ilia Lin (6): soc: qcom: Separate kryo l2 accessors from PMU driver clk: Use devm_ in the register fixed factor clock clk: qcom: Add CPU clock driver for msm8996 dt-bindings: clk: qcom: Add bindings for CPU clock for msm8996 clk: qcom: cpu-8996: Add support to switch below

[PATCH v12 8/8] clk: qcom: Add ACD path to CPU clock driver for msm8996

until a pre-programmed delay has expired. This change configures ACD during the probe and switches the PMUXes to the ACD clock source. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-cpu-8996.c | 75 +++-- 1 file changed, 65 inse

[PATCH v12 2/8] clk: qcom: Make clk_alpha_pll_configure available to modules

From: Rajendra Nayak <rna...@codeaurora.org> Allow clk_alpha_pll_configure to be called from loadable kernel modules. Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/clk/qcom/clk-alpha-pll.c | 1 + 1 file ch

[PATCH v12 1/8] soc: qcom: Separate kryo l2 accessors from PMU driver

-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/perf/Kconfig | 1 + drivers/perf/qcom_l2_pmu.c | 90 ++-- drivers/soc/qcom/Kconfig | 3 ++ drivers/soc/qcom/Makefile| 1 + drivers/soc/qcom/kryo-l2-accessors.

[PATCH v12 2/2] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu

M8996 SG, speedbin 1 6: MSM8996 SG, speedbin 2 7-31: unused Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Reviewed-by: Rob Herring <r...@kernel.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- .../devicetree/bin

[PATCH v12 1/2] cpufreq: Add Kryo CPU scaling driver

. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- drivers/cpufreq/Kconfig.arm | 10 ++ drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cpufreq-dt-platdev.c | 3 + drivers/cpufreq/qcom-cpufreq-kryo.c | 194 +++ 4 files change

[PATCH v12 0/2] Kryo CPU scaling driver

Viresh: https://patchwork.kernel.org/patch/10418139/ The previous spin was here: https://patchwork.kernel.org/patch/10421143/ Ilia Lin (2): cpufreq: Add Kryo CPU scaling driver dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu .../devicetree/bindings/opp/kryo-cpufreq.txt | 680

[PATCH v14 2/2] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu

M8996 SG, speedbin 1 6: MSM8996 SG, speedbin 2 7-31: unused Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Reviewed-by: Rob Herring <r...@kernel.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- .../devicetree/bin

[PATCH v14 1/2] cpufreq: Add Kryo CPU scaling driver

. Signed-off-by: Ilia Lin <ilia...@codeaurora.org> --- MAINTAINERS | 7 ++ drivers/cpufreq/Kconfig.arm | 10 ++ drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cpufreq-dt-platdev.c | 3 + drivers/cpufreq/qcom-cpufreq-kryo.c

[PATCH v14 0/2] Kryo CPU scaling driver

versions. The driver reads eFuse information and chooses the required OPP subset by passing the OPP supported-hw parameter. The series depends on the series from Viresh: https://patchwork.kernel.org/patch/10418139/ The previous spin was here: https://patchwork.kernel.org/patch/10424949/ Ilia Lin (2

[PATCH v14 2/2] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu

M8996 SG, speedbin 1 6: MSM8996 SG, speedbin 2 7-31: unused Signed-off-by: Ilia Lin <ilia...@codeaurora.org> Reviewed-by: Rob Herring <r...@kernel.org> Acked-by: Viresh Kumar <viresh.ku...@linaro.org> --- .../devicetree/bin

  1   2   3   4   >