ompiler version is that with out of interest? It isn't exactly new
code.
>
> Signed-off-by: Mathieu Malaterre
Reviewed-by: James Hogan
Cheers
James
> ---
> arch/mips/kernel/setup.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/mips/ke
On Tue, Dec 26, 2017 at 12:21:38PM +0800, Jiaxun Yang wrote:
> Make loongson64 a pure 64-bit mach.
Please expand to provide some rationale behind the change. Was 32-bit
support broken at runtime, or broken at build time, or are we simply no
longer interested in supporting it?
Cheers
James
>
> S
On Thu, Dec 21, 2017 at 03:19:35PM +, Matt Redfearn wrote:
> Hi James,
>
> On 21/12/17 15:14, James Hogan wrote:
> > On Thu, Dec 21, 2017 at 11:16:02AM +, Matt Redfearn wrote:
> >> During ftrace initialisation, placeholder instructions in the prologue
> >
On Thu, Dec 21, 2017 at 11:16:02AM +, Matt Redfearn wrote:
> During ftrace initialisation, placeholder instructions in the prologue
> of every kernel function not marked "notrace" are replaced with nops.
> After the instructions are written (to the dcache), flush_icache_range()
> is used to ens
ring.
>
> To ensure these conditions, always enforce a barrier between D and I
> cache operations.
>
> Suggested-by: Leonid Yegoshin
> Suggested-by: Paul Burton
> Signed-off-by: Matt Redfearn
> Cc: James Hogan
> Cc: stable # v4.9+
Looks reasonable to me,
Reviewed-
On Fri, Dec 08, 2017 at 12:01:46PM +0800, Jiaxun Yang wrote:
> Also we're going to separate code between
> Loongson2 and Loongson3 since they are becoming more and more
> identical.
Do you mean you want to combine them?
> But It will cause a lot of changes under march of loongson64
> that curren
On Thu, Dec 07, 2017 at 09:10:10PM +0800, Jiaxun Yang wrote:
> On 2017-12-07 Thu 11:05 +0000，James Hogan Wrote：
> > On Thu, Dec 07, 2017 at 07:57:59AM +0100, Greg Kroah-Hartman wrote:
> > > On Thu, Dec 07, 2017 at 02:31:07PM +0800, Huacai Chen wrote:
> > > > Hi,
On Thu, Dec 07, 2017 at 12:17:25PM +0100, Daniel Lezcano wrote:
> On 05/12/2017 23:55, James Hogan wrote:
> > From: James Hogan
> >
> > If the hrtimer based broadcast tick device is in use, the enabling of
> > broadcast ticks by cpuidle may fail when the next bro
On Thu, Dec 07, 2017 at 07:57:59AM +0100, Greg Kroah-Hartman wrote:
> On Thu, Dec 07, 2017 at 02:31:07PM +0800, Huacai Chen wrote:
> > Hi, Linus, Stephen, Greg, Ralf and James,
> >
> > We are kernel developers from Lemote Inc. and Loongson community. We
> > have already made some contributions in
From: James Hogan
If the hrtimer based broadcast tick device is in use, the enabling of
broadcast ticks by cpuidle may fail when the next broadcast event is
brought forward to match the next event due on the local tick device,
This is because setting the next event may migrate the hrtimer based
On Thu, Nov 30, 2017 at 03:09:33PM -0800, David Daney wrote:
> On 11/30/2017 02:56 PM, James Hogan wrote:
> > On Thu, Nov 30, 2017 at 01:49:43PM -0800, David Daney wrote:
> >> On 11/30/2017 01:36 PM, James Hogan wrote:
> >>> On Tue, Nov 28, 2017 at 04:55
On Thu, Nov 30, 2017 at 01:49:43PM -0800, David Daney wrote:
> On 11/30/2017 01:36 PM, James Hogan wrote:
> > On Tue, Nov 28, 2017 at 04:55:34PM -0800, David Daney wrote:
> >> Signed-off-by: Carlos Munoz
> >> Signed-off-by: Steven J. Hill
> >> Signed-off-b
On Tue, Nov 28, 2017 at 04:55:35PM -0800, David Daney wrote:
> From: Carlos Munoz
>
> Add a global resource manager to manage tagged pointers within
> bootmem allocated memory. This is used by various functional
> blocks in the Octeon core like the FPA, Ethernet nexus, etc.
>
> Signed-off-by: Ca
eon_cvmemctl {
> /* R/W Size of local memory in cache blocks, 54 (6912
>* bytes) is max legal value. */
> __BITFIELD_FIELD(uint64_t lmemsz:6,
> - ;)
> + ;
> } s;
> };
Regardless, the patch looks good to me.
Reviewed-by: James Hogan
Cheers
James
signature.asc
Description: Digital signature
ks.com]
> Sent: Tuesday, November 21, 2017 9:53 PM
> To: Aleksandar Markovic; linux-m...@linux-mips.org
> Cc: Miodrag Dinic; Aleksandar Markovic; Andrew Morton; DengCheng Zhu; Ding
> Tianhong; Douglas Leung; Frederic Weisbecker; Goran Ferenc; Ingo Molnar;
> James Cowgill; James Hogan;
On Tue, Nov 28, 2017 at 05:53:59PM +0100, Alexandre Belloni wrote:
> On 28/11/2017 at 16:01:38 +0000, James Hogan wrote:
> > On Tue, Nov 28, 2017 at 04:26:39PM +0100, Alexandre Belloni wrote:
> > > Introduce support for the MIPS based Microsemi Ocelot SoCs.
> > > As t
On Tue, Nov 28, 2017 at 04:26:31PM +0100, Alexandre Belloni wrote:
> Microsemi Corporation provides semiconductor and system solutions for
> aerospace & defense, communications, data center and industrial markets.
>
> Signed-off-by: Alexandre Belloni
> ---
> Cc: Rob Herring
> Cc: devicet...@vger
Hi Alexandre,
On Tue, Nov 28, 2017 at 04:26:39PM +0100, Alexandre Belloni wrote:
> Introduce support for the MIPS based Microsemi Ocelot SoCs.
> As the plan is to have all SoCs supported only using device tree, the
> mach directory is simply called mscc.
Nice. Have you considered adding this to t
From: James Hogan
The MIPS_CPS_NS16550_BASE and MIPS_CPS_NS16550_SHIFT options have no
defaults for non-Malta platforms which select SYS_SUPPORTS_MIPS_CPS
(i.e. the pistachio and generic platforms). This is problematic for
automated allyesconfig and allmodconfig builds based on these platforms
On Sat, Nov 18, 2017 at 07:43:25PM -0800, Guenter Roeck wrote:
> On Fri, Aug 26, 2016 at 04:37:21PM +0100, Paul Burton wrote:
> > Introduce a "generic" platform, which aims to be board-agnostic by
> > making use of device trees passed by the boot protocol defined in the
> > MIPS UHI (Universal Host
+ count += 5000; /* round */
> + count -= count % 1;
A comment to explain the purpose of the rounding would be helpful. I
presume its there just to get a more accurate value since the frequency
will always be a round value in practice.
Either way this patch looks good to me:
R
On Tue, Nov 14, 2017 at 10:52:54AM +, Matt Redfearn wrote:
> Commit da2a68b3eb47 ("watchdog: Enable COMPILE_TEST where possible")
> enabled building the Indy watchdog driver when COMPILE_TEST is enabled.
> However, the driver makes reference to symbols that are only defined for
> certain platfo
On Thu, Oct 12, 2017 at 12:50:34PM -0700, David Daney wrote:
> The kexec/kdump tools need to know where the .bss is so it can be
> included in the core dump. This allows vmcore-dmesg to have access to
> the dmesg buffers of the crashed kernel as well as allowing the
> debugger to examine variables
On Thu, Nov 09, 2017 at 08:01:47AM -0800, Guenter Roeck wrote:
> On Thu, Nov 09, 2017 at 07:47:19AM +0000, James Hogan wrote:
> > Hi Wim,
> >
> > On Fri, Sep 08, 2017 at 08:35:54PM +0200, Mathieu Malaterre wrote:
> > > This driver works for jz4740 & jz4780
>
On Tue, Nov 07, 2017 at 07:09:20PM +, Maciej W. Rozycki wrote:
> Fix a commit 7aeb753b5353 ("MIPS: Implement task_user_regset_view.")
> regression, then activated by commit 6a9c001b7ec3 ("MIPS: Switch ELF
> core dumper to use regsets.)", that caused n32 processes to dump o32
> core files by
On Fri, Mar 31, 2017 at 10:00:40AM +0100, Zubair Lutfullah Kakakhel wrote:
> Hi,
>
> Couple of patches that convert the MIPSfpga platform to using
> the generic kernels
>
> Based on v4.11-rc4.
Thanks, Applied for 4.15.
Tweaks to fix conflicts:
- Use separate board-xilfpga.its.S.
- Add 32r2 and
On Wed, Dec 14, 2016 at 03:09:42PM +, Matt Redfearn wrote:
> The generic MIPS system type allows building a board agnostic kernel and
> should be the default starting point for users, so set it as the default
> system type in Kconfig.
> Since ip22 is no longer the default, update ip22_defconfig
teon/octeon-model.h:368:
undefined reference to `__dtb_octeon_3xxx_begin'
arch/mips/cavium-octeon/setup.o: In function `device_tree_init':
/work/mips/linux/main/arch/mips/cavium-octeon/setup.c:1188: undefined
reference to `__dtb_octeon_3xxx_begin'
/work/mips/linux/main/arch/mips/cavi
On Mon, Nov 06, 2017 at 08:00:49PM +0900, Masahiro Yamada wrote:
> 2017-11-06 19:41 GMT+09:00 James Hogan :
> > Hi,
> >
> > On Sun, Nov 05, 2017 at 11:11:38PM +0900, Masahiro Yamada wrote:
> >> +CC Ralf Baechle
> >> +CC linux-m...@linux-mips.org
> >&g
Hi Wim,
On Fri, Sep 08, 2017 at 08:35:54PM +0200, Mathieu Malaterre wrote:
> This driver works for jz4740 & jz4780
>
> Suggested-by: Maarten ter Huurne
> Signed-off-by: Mathieu Malaterre
I just noticed that though Ralf applied the other two patches in this
series (defconfig + dt), he hadn't ap
On Tue, May 30, 2017 at 06:34:34AM +0200, Martin Schiller wrote:
> ASC1 is available on every Lantiq SoC (also AmazonSE) and should be
> enabled like the other generic xway clocks instead of ASC0, which is
> only available for AR9 and Danube.
>
> Signed-off-by: Martin Schiller
> ---
> arch/mips/
Hi,
On Sun, Nov 05, 2017 at 11:11:38PM +0900, Masahiro Yamada wrote:
> +CC Ralf Baechle
> +CC linux-m...@linux-mips.org
> +CC Kevin Cernekee
> +CC Florian Fainelli
>
>
> I missed to CC MIPS maintainers.
Yes, please resend the patch so it lands in patchwork.linux-mips.org.
> 2017-11-05 14:30
On Wed, Nov 01, 2017 at 05:36:03PM -0700, David Daney wrote:
> diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig
> index 5c0b56203bae..211ef5b57214 100644
> --- a/arch/mips/cavium-octeon/Kconfig
> +++ b/arch/mips/cavium-octeon/Kconfig
> @@ -86,4 +86,14 @@ config OCTEON_
On Thu, Nov 02, 2017 at 12:47:27PM +, Miodrag Dinic wrote:
> > > +static __init uint64_t read_rtc_time(void __iomem *base)
> > > +{
> > > + u64 time_low;
> > > + u64 time_high;
> > > +
> > > + time_low = readl(base + GOLDFISH_TIMER_LOW);
> > > + time_high = readl(base + GOLDFISH
Hi Aleksandar,
On Fri, Oct 20, 2017 at 04:27:45PM +0200, Aleksandar Markovic wrote:
> From: Aleksandar Markovic
>
> Change all relevant instances of miodrag.di...@imgtec.com
> email address to miodrag.di...@mips.com.
>
> Signed-off-by: Miodrag Dinic
> Signed-off-by: Aleksandar Markovic
> ---
mir Kondratiev
>
> I looked this over pretty carefully and it looks correct to me. It
> makes no difference
> in the instructions generated by the non-EVA case. I shouldn't have
> missed this :(.
>
> Reviewed-by: Corey Minyard
Yeh, having stared at it for a little while it looks correct to me too.
Reviewed-by: James Hogan
Cheers
James
signature.asc
Description: Digital signature
On Tue, Oct 31, 2017 at 07:08:04AM +, James Hogan wrote:
> On Tue, Oct 31, 2017 at 12:35:03AM -0500, Gustavo A. R. Silva wrote:
> > Signed-off-by: Gustavo A. R. Silva
>
> Reviewed-by: James Hogan
That should of course be:
Reviewed-by: James Hogan
a Lawall
May I suggest adding:
Fixes: d6b3314b49e1 ("MIPS: uasm: Add lh uam instruction")
> Signed-off-by: Gustavo A. R. Silva
Reviewed-by: James Hogan
Probably worthy of a stable tag too (though there will be conflicts with
ce807d5f67ed309a6f357b88cc93185d89e921d3 before 4.13):
Cc:
On Mon, Oct 30, 2017 at 12:56:36PM +0100, Aleksandar Markovic wrote:
> From: Miodrag Dinic
>
> Provide amendments to the MIPS generic platform framework so that
> the new generic-based board Ranchu can be chosen to be built.
A bit more info about the board would be good here. What boot protocol
Commit-ID: 3a29ddb1c5986a6d3f941bfb1f434105203ce7f6
Gitweb: https://git.kernel.org/tip/3a29ddb1c5986a6d3f941bfb1f434105203ce7f6
Author: James Hogan
AuthorDate: Thu, 19 Oct 2017 15:17:23 +0100
Committer: Thomas Gleixner
CommitDate: Thu, 19 Oct 2017 16:29:15 +0200
clockevents: Retry
On Mon, Oct 16, 2017 at 04:28:36PM -0700, Kees Cook wrote:
> In preparation for unconditionally passing the struct timer_list pointer to
> all timer callbacks, switch to using the new timer_setup() and from_timer()
> to pass the timer pointer explicitly.
>
> Cc: James Hogan
&
On Tue, Oct 17, 2017 at 09:37:48AM +0200, Michal Hocko wrote:
> On Mon 16-10-17 21:02:09, James Hogan wrote:
> > On Mon, Oct 16, 2017 at 09:00:47PM +0200, Michal Hocko wrote:
> > > [CCing metag people for the metag elf_map implementation specific. The
> > > thread
&g
On Mon, Oct 16, 2017 at 09:00:47PM +0200, Michal Hocko wrote:
> [CCing metag people for the metag elf_map implementation specific. The thread
> starts here http://lkml.kernel.org/r/20171016134446.19910-1-mho...@kernel.org]
>
> On Mon 16-10-17 09:39:14, Kees Cook wrote:
> > On Mon, Oct 16, 2017 at
On Thu, Oct 12, 2017 at 03:54:48PM +, Aleksandar Markovic wrote:
> > This patch fixes something, I think it should
> > a) be clear in the commit message what is fixed
> > b) be tagged for stable (though that can always be done
> > retrospectively)
>
> If you agree, I am going to submit v2 of t
On Thu, Oct 12, 2017 at 03:57:50PM +0200, Aleksandar Markovic wrote:
>
> > Subject: Re: [PATCH 1/2] MIPS: math-emu: Update debugfs FP exception stats
> > for certain instructions
> > Date: Thursday, October 12, 2017 12:17 CEST
> > From: James Hogan >@badag02.ba.
On Wed, Oct 11, 2017 at 04:18:49PM +, Aleksandar Markovic wrote:
> Thanks, James, for the review.
>
> I've got a couple of points bellow that will, I hope, clarify several issues.
>
> > ____
> > From: James Hogan [james.ho.
On Fri, Oct 06, 2017 at 07:29:00PM +0200, Aleksandar Markovic wrote:
> From: Aleksandar Markovic
>
> Fix omission of updating of debugfs FP exception stats for
> instructions ..
>
> CLASS. can generate Unimplemented Operation FP exception.
> >. can generate Inexact,
nit: s/>>/>/
> Unimplemente
emu
> directory (several files will become completely warning-free),
> and thus makes easier to spot (now and in the future) other
> perhaps more significant checkpatch errors and warnings.
>
> Signed-off-by: Aleksandar Markovic
Reviewed-by: James Hogan
Cheers
James
> ---
>
On Thu, Oct 05, 2017 at 03:48:53PM +0100, Ed Blake wrote:
> On 04/10/17 15:03, James Hogan wrote:
> > Hi Ed,
> >
> > On Mon, Oct 02, 2017 at 10:55:59AM +0100, Ed Blake wrote:
> >> Pass on peripheral (RTC/IR/WD) irq masks and unmasks to the parent
> >> i
From: James Hogan
Update my imgtec.com and personal email address to my kernel.org one in
a few places as MIPS will soon no longer be part of Imagination
Technologies, and add mappings in .mailcap so get_maintainer.pl reports
the right address.
Signed-off-by: James Hogan
---
Linus: Are you
Hi Ed,
On Mon, Oct 02, 2017 at 10:55:59AM +0100, Ed Blake wrote:
>
> Pass on peripheral (RTC/IR/WD) irq masks and unmasks to the parent
> interrupt controller, as well as setting / clearing the relevant bits
> in the IRQ_ROUTE register.
>
> Clearing bits in the IRQ_ROUTE register will prevent fu
e =
> + PDC_SYS_WAKE_ACTIVE_HIGH << PDC_SYS_WAKE_POL_SHIFT |
> + PDC_SYS_WAKE_INT_NONE << PDC_SYS_WAKE_INT_MODE_SHIFT;
Looks reasonable. With a tweaked commit message or comment as mentioned
above:
Acked-by: James Hogan
Cheers
James
> pdc_write(priv, soc_sys_wake_regoff, soc_sys_wake);
> }
> }
> --
> 1.9.1
>
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Description: Digital signature
On Fri, Aug 11, 2017 at 06:47:04PM +0200, Daniel Borkmann wrote:
> Hi James,
>
> On 08/09/2017 10:34 PM, Daniel Borkmann wrote:
> > On 08/09/2017 09:39 AM, James Hogan wrote:
> > [...]
> >> time (but please consider looking at the other patch which is ce
On Fri, Aug 11, 2017 at 03:23:34PM -0700, Kees Cook wrote:
> On Fri, Aug 11, 2017 at 1:56 PM, James Hogan wrote:
> > Add a PTRACE_SET_SYSCALL ptrace operation to allow the system call to be
> > cancelled independently to the value of the v0 system call number
> > register.
&
d:
- PTRACE_SETREGS (ptrace_setregs()).
- PTRACE_SETREGSET with NT_PRSTATUS (gpr32_set() and gpr64_set()).
- PTRACE_POKEUSR with 2/v0 or 4/a0 for indirect syscall
([compat_]arch_ptrace()).
Fixes: c2d9f1775731 ("MIPS: Fix syscall_get_nr for the syscall exit tracing.")
Signed-off-by: Jam
.
This won't have any effect until the next commit, which fixes ptrace to
update thread_info::syscall.
Fixes: c2d9f1775731 ("MIPS: Fix syscall_get_nr for the syscall exit tracing.")
Signed-off-by: James Hogan
Cc: Ralf Baechle
Cc: Lars Persson
Cc: Oleg Nesterov
Cc: Kees Cook
Cc:
syscall trace
events to be fooled into thinking a different system call was being
executed.
Signed-off-by: James Hogan
Cc: Ralf Baechle
Cc: Oleg Nesterov
Cc: Kees Cook
Cc: Andy Lutomirski
Cc: Will Drewry
Cc: linux-m...@linux-mips.org
---
arch/mips/include/uapi/asm/ptrace.h | 1 +
arch/mips/kernel
the stack can't be loaded).
Reported-by: James Cowgill
Fixes: 669c4092225f ("MIPS: Give __secure_computing() access to syscall
arguments.")
Signed-off-by: James Hogan
Cc: Ralf Baechle
Cc: David Daney
Cc: Kees Cook
Cc: Andy Lutomirski
Cc: Will Drewry
Cc: Oleg Nesterov
Cc:
Daney
Cc: Kees Cook
Cc: Andy Lutomirski
Cc: Will Drewry
Cc: Oleg Nesterov
Cc: Alexei Starovoitov
Cc: Daniel Borkmann
Cc: Lars Persson
Cc: net...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-m...@linux-mips.org
James Hogan (4):
MIPS/seccomp: Fix indirect syscall args
MIP
if (IS_ERR(phy->rstdev)) {
>+ dev_err(dev, "device reset is missing\n");
>+ return PTR_ERR(phy->rstdev);
>+ }
>+
>+ phy->phy = devm_phy_create(dev, NULL, &ralink_usb_phy_ops);
>+ if (IS_ERR(phy->phy)) {
>+ dev_err(dev, "failed to create PHY\n");
>+ return PTR_ERR(phy->phy);
>+ }
>+ phy_set_drvdata(phy->phy, phy);
>+
>+ phy_provider = devm_of_phy_provider_register(dev,
>of_phy_simple_xlate);
>+
>+ return PTR_ERR_OR_ZERO(phy_provider);
>+}
>+
>+static struct platform_driver ralink_usb_phy_driver = {
>+ .probe = ralink_usb_phy_probe,
>+ .driver = {
>+ .of_match_table = ralink_usb_phy_of_match,
>+ .name = "ralink-usb-phy",
>+ }
>+};
>+module_platform_driver(ralink_usb_phy_driver);
>+
>+MODULE_DESCRIPTION("Ralink USB phy driver");
>+MODULE_AUTHOR("John Crispin ");
>+MODULE_LICENSE("GPL v2");
--
James Hogan
On Tue, Aug 08, 2017 at 02:54:33PM -0700, David Miller wrote:
> From: James Hogan
> Date: Tue, 08 Aug 2017 22:20:05 +0100
>
> > cool, i hadn't realised unmentioned elements in an initialiser are
> > always zeroed, even when non-global/static, so had interpre
On 8 August 2017 17:48:57 BST, David Miller wrote:
>From: Daniel Borkmann
>Date: Tue, 08 Aug 2017 10:46:52 +0200
>
>> On 08/08/2017 12:25 AM, James Hogan wrote:
>>> In bpf_trace_printk(), the elements in mod[] are left uninitialised,
>>> but
>>> they
A couple of RFC fixes for bpf_trace_printk(). The first affects 32-bit
architectures in particular, the second is a theoretical uninitialised
variable fix.
Cc: Alexei Starovoitov
Cc: Daniel Borkmann
Cc: Steven Rostedt
Cc: Ingo Molnar
Cc: net...@vger.kernel.org
James Hogan (2):
bpf: Fix
82 ("tracing: Allow BPF programs to call bpf_trace_printk()")
Signed-off-by: James Hogan
Cc: Alexei Starovoitov
Cc: Daniel Borkmann
Cc: Steven Rostedt
Cc: Ingo Molnar
Cc: net...@vger.kernel.org
---
I'm open to nicer ways of fixing this.
This is tested with samples/bpf/tracex5 on MIPS3
rintk()")
Signed-off-by: James Hogan
Cc: Alexei Starovoitov
Cc: Daniel Borkmann
Cc: Steven Rostedt
Cc: Ingo Molnar
Cc: net...@vger.kernel.org
---
When I checked (on MIPS32), the elements tended to have the value zero
anyway (does BPF zero the stack or something clever?), so this is a
purely t
On Thu, Mar 02, 2017 at 02:07:20PM +0100, Arnd Bergmann wrote:
> On Thu, Mar 2, 2017 at 1:46 AM, Dmitry V. Levin wrote:
> > Replace size_t with __kernel_size_t to fix asm/shmbuf.h userspace
> > compilation errors like this:
> >
> > /usr/include/asm-generic/shmbuf.h:28:2: error: unknown type name '
On Sat, Feb 20, 2016 at 12:09:28AM +, Yang Shi wrote:
> In the octeon defconfig, NR_CPUS is 32. And, some model of OCTEON II do have
> > 16 cores. Given the typical memory size equipped by Octeon boards, it sounds
> like not a big deal to set a bigger NR_CPUS value as default.
>
> Signed-off-b
On Wed, Aug 02, 2017 at 05:04:04PM +0200, Bartosz Golaszewski wrote:
> Add ashldi3.c and bswapsi.c to the list of ignored files.
>
> Signed-off-by: Bartosz Golaszewski
Reviewed-by: James Hogan
Cheers
James
> ---
> arch/mips/boot/compressed/.gitignore | 2 ++
> 1 file cha
On Thu, Jul 20, 2017 at 04:04:43PM +0100, Matt Redfearn wrote:
> Commit 1c3c5eab1715 ("sched/core: Enable might_sleep() and
> smp_processor_id() checks early") enables checks for might_sleep() and
> smp_processor_id() being used in preemptible code earlier in the boot
> than before. This results in
Hi Aleksandar,
On Mon, Jul 24, 2017 at 02:36:05PM +0100, Aleksandar Markovic wrote:
> > > diff --git a/arch/mips/math-emu/dp_fmax.c b/arch/mips/math-emu/dp_fmax.c
> > > index fd71b8d..567fc33 100644
> > > --- a/arch/mips/math-emu/dp_fmax.c
> > > +++ b/arch/mips/math-emu/dp_fmax.c
> > > @@ -47,6 +4
ke MADDF and MSUBF
> emulation code more readable and easier to maintain, and hopefully
> also prevents future bugs.
>
> Signed-off-by: Miodrag Dinic
> Signed-off-by: Goran Ferenc
> Signed-off-by: Aleksandar Markovic
Reviewed-by: James Hogan
Cheers
James
> ---
Goran Ferenc
> Signed-off-by: Aleksandar Markovic
Patch looks correct to me.
Reviewed-by: James Hogan
Cheers
James
> ---
> arch/mips/math-emu/dp_maddf.c | 8
> arch/mips/math-emu/sp_maddf.c | 8
> 2 files changed, 16 insertions(+)
>
> diff --git
g to contain -inf (without this patch, it used to contain +inf).
>
Same fixes/stable notes as previous patch.
> Signed-off-by: Douglas Leung
> Signed-off-by: Miodrag Dinic
> Signed-off-by: Goran Ferenc
> Signed-off-by: Aleksandar Markovic
Reviewed-by:
== IEEE754_CLASS_SNAN)
> + return ieee754dp_nanxcpt(z);
> + if (xc == IEEE754_CLASS_SNAN)
> + return ieee754dp_nanxcpt(x);
> + if (yc == IEEE754_CLASS_SNAN)
> + return ieee754dp_nanxcpt(y);
> +
d-off-by: Goran Ferenc
> Signed-off-by: Aleksandar Markovic
Reviewed-by: James Hogan
Cheers
James
> ---
> arch/mips/math-emu/dp_fmin.c | 4 ++--
> arch/mips/math-emu/sp_fmin.c | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/mips/math-em
-inf -inf
>
> The relevant example:
>
> MAXA.S fd,fs,ft:
> If fs contains +inf, and ft contains -inf, fd is going to contain
> +inf (without this patch, it used to contain -inf).
>
Same Fixes/stable thing
> Signed-off-by: Miodrag Dinic
> Signed-off-by: Goran Feren
ve argument" in the manual
is a bit ambiguous IMO, so I ended up checking what I6500 did).
>
Usual fixes/stable thing.
> Signed-off-by: Miodrag Dinic
> Signed-off-by: Goran Ferenc
> Signed-off-by: Aleksandar Markovic
Reviewed-by: James Hogan
Thanks
James
> ---
> a
!
>
same fixes/stable comment as for previous min/max patches
> Signed-off-by: Miodrag Dinic
> Signed-off-by: Goran Ferenc
> Signed-off-by: Aleksandar Markovic
Reviewed-by: James Hogan
Cheers
James
> ---
> arch/mips/math-emu/dp_fmax.c | 33 +
;
> MAX.S fd,fs,ft:
> If fs contains +0, and ft contains -0, fd is going to contain 0
> (without this patch, it used to contain -0).
>
Consider Fixes and Cc stable as with other patch
> Signed-off-by: Miodrag Dinic
> Signed-off-by: Goran Ferenc
> Signed-off-by:
> case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
> @@ -54,7 +57,6 @@ union ieee754dp ieee754dp_fmax(union ieee754dp x, union
> ieee754dp y)
... go somewhere around here and fall through to the existing return x
case?
and same below of course.
Otherwise:
Reviewed-by: James Hogan
ag Dinic
> Signed-off-by: Goran Ferenc
> Signed-off-by: Aleksandar Markovic
Reviewed-by: James Hogan
Cheers
James
> ---
> arch/mips/vdso/gettimeofday.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/mips/vdso/gettimeofday.c b
On Thu, Jul 13, 2017 at 09:59:53PM +1000, Michael Ellerman wrote:
> Palmer Dabbelt writes:
>
> > On Wed, 12 Jul 2017 04:04:00 PDT (-0700), m...@ellerman.id.au wrote:
> >> Palmer Dabbelt writes:
> >>
> >>> On Mon, 10 Jul 2017 23:21:07 PDT (-0700), m...@ellerman.id.au wrote:
> Palmer Dabbelt
On Wed, Jul 12, 2017 at 09:24:24AM -0700, Palmer Dabbelt wrote:
> On Wed, 12 Jul 2017 04:07:51 PDT (-0700), james.ho...@imgtec.com wrote:
> > On Tue, Jul 11, 2017 at 06:31:29PM -0700, Palmer Dabbelt wrote:
> >> diff --git a/arch/riscv/kernel/signal.c b/arch/riscv/kernel/signal.c
> >> new file mode
On Tue, Jul 11, 2017 at 06:31:17PM -0700, Palmer Dabbelt wrote:
> From: Jonathan Neuschäfer
>
> RISC-V needs a MAINTAINERS entry. Let's add one.
>
> Signed-off-by: Jonathan Neuschäfer
> Signed-off-by: Palmer Dabbelt
> ---
> MAINTAINERS | 8
> 1 file changed, 8 insertions(+)
>
> diff
On Tue, Jul 11, 2017 at 06:31:29PM -0700, Palmer Dabbelt wrote:
> diff --git a/arch/riscv/include/asm/unistd.h b/arch/riscv/include/asm/unistd.h
> new file mode 100644
> index ..9f250ed007cd
> --- /dev/null
> +++ b/arch/riscv/include/asm/unistd.h
> @@ -0,0 +1,16 @@
> +/*
> + * Copyright
Hi Christoph,
On Tue, Jul 11, 2017 at 06:39:48AM -0700, Christoph Hellwig wrote:
> > +#ifdef CONFIG_64BIT
> > +SYSCALL_DEFINE6(mmap, unsigned long, addr, unsigned long, len,
> > + unsigned long, prot, unsigned long, flags,
> > + unsigned long, fd, off_t, offset)
> > +{
> > + if (unlikely(off
On Tue, Jul 11, 2017 at 03:12:17AM +0300, Gleb Fotengauer-Malinovskiy wrote:
> This ioctl does nothing to justify an _IOC_READ or _IOC_WRITE flag
> because it doesn't copy anything from/to userspace to access the
> argument.
>
> Fixes: 54ebbfb1 ("tty: add TIOCGPTPEER ioctl")
I think its recommend
On Thu, Jul 06, 2017 at 02:12:37PM +0100, Maciej W. Rozycki wrote:
> On Thu, 6 Jul 2017, James Hogan wrote:
> > > (and would have to forcibly use the 32-bit encoding in the microMIPS
> > > case)?
> >
> > I don't believe there is a 16-bit SYSCALL encoding in m
On Thu, Jul 06, 2017 at 01:00:34AM +0100, Maciej W. Rozycki wrote:
> On Wed, 28 Jun 2017, Aleksandar Markovic wrote:
>
> > diff --git a/arch/mips/vdso/gettimeofday.c b/arch/mips/vdso/gettimeofday.c
> > index fd7d433..5f63375 100644
> > --- a/arch/mips/vdso/gettimeofday.c
> > +++ b/arch/mips/vdso/g
On Tue, Jul 04, 2017 at 12:51:01PM -0700, Palmer Dabbelt wrote:
> diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c
> new file mode 100644
> index ..2720d5e97354
> --- /dev/null
> +++ b/arch/riscv/kernel/ptrace.c
> @@ -0,0 +1,138 @@
> +/* Put registers back to task.
On Thu, Jun 29, 2017 at 02:42:38PM -0700, Palmer Dabbelt wrote:
> On Wed, 28 Jun 2017 15:42:37 PDT (-0700), james.ho...@imgtec.com wrote:
> > On Wed, Jun 28, 2017 at 11:55:37AM -0700, Palmer Dabbelt wrote:
> >> diff --git a/arch/riscv/include/uapi/asm/ucontext.h
> >> b/arch/riscv/include/uapi/asm/
On Wed, Jun 28, 2017 at 11:55:34AM -0700, Palmer Dabbelt wrote:
> diff --git a/arch/riscv/include/asm/kprobes.h
> b/arch/riscv/include/asm/kprobes.h
> new file mode 100644
> index ..1190de7a0f74
> --- /dev/null
> +++ b/arch/riscv/include/asm/kprobes.h
> @@ -0,0 +1,22 @@
...
> +#ifdef C
On Wed, Jun 28, 2017 at 11:55:36AM -0700, Palmer Dabbelt wrote:
> diff --git a/arch/riscv/include/asm/page.h b/arch/riscv/include/asm/page.h
> new file mode 100644
> index ..e1491c20d6fd
> --- /dev/null
> +++ b/arch/riscv/include/asm/page.h
...
> +#ifdef __KERNEL__
I think thats a give
On Wed, Jun 28, 2017 at 11:55:38AM -0700, Palmer Dabbelt wrote:
> diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile
> new file mode 100644
> index ..7f58cd251ab8
> --- /dev/null
> +++ b/arch/riscv/kernel/Makefile
> @@ -0,0 +1,16 @@
> +#
> +# Makefile for the RISC-V Li
Hi Palmer,
On Wed, Jun 28, 2017 at 11:55:37AM -0700, Palmer Dabbelt wrote:
> diff --git a/arch/riscv/include/asm/syscalls.h
> b/arch/riscv/include/asm/syscalls.h
> new file mode 100644
> index ..d85267c4f7ea
> --- /dev/null
> +++ b/arch/riscv/include/asm/syscalls.h
> @@ -0,0 +1,25 @@
Hi Palmer,
On Wed, Jun 28, 2017 at 11:55:38AM -0700, Palmer Dabbelt wrote:
> + select SYSRISCV_ATOMIC if !ISA_A
...
> +config SYSRISCV_ATOMIC
> + bool "Include support for atomic operation syscalls"
> + default !ISA_A
> + help
> + If atomic memory instructions are present, i.
ehavior made booting with an UHI supplied dtb erratic.
>
> Fixes: 15f37e158892 ("MIPS: store the appended dtb address in a variable")
> Cc:
> Cc: Ralf Baechle
> Cc: Jonas Gorski
> Signed-off-by: Karl Beldan
Ouch, nice catch.
Reviewed-by: James Hogan
Cheers
Jame
t USER_STACKTRACE_SUPPORT
> select USE_PMC if PERF_EVENTS
> select VIRT_TO_BUS
> + select PCI_GENERIC_SETUP
and here
Otherwise
Reviewed-by: James Hogan
Cheers
James
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st to define it so that no in-tree architectures
> are affected.
>
> Cc: Arnd Bergmann
> Cc: James Hogan
> Cc: linux-a...@vger.kernel.org
> Cc: linux-snps-...@lists.infradead.org
> Cc: Catalin Marinas
> Cc: Will Deacon
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: Mark Sa
On Mon, May 15, 2017 at 10:46:35AM +0100, Matt Redfearn wrote:
> + select HAVE_SYSCALL_TRACEPOINTS
> + select HAVE_SYSCALL_TRACEPOINTS
Maybe we could remove duplicates while we're at it?
Cheers
James
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