Re: [PATCH] ARM: sunxi: add missing include for mdelay()

-declaration] > > Signed-off-by: Josh Cartwright Acked-by: Maxime Ripard > --- > Fixes multiplatform build error seen with today's linux-next-20121129. > > arch/arm/mach-sunxi/sunxi.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/mach-sunx

[PATCH 3/7] ARM: sunxi: Rename uart nodes to serial

The other architecture use serial@address for their uart nodes, so rename our uart dt nodes to be consistent Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10-cubieboard.dts |4 ++-- arch/arm/boot/dts/sun4i-a10-hackberry.dts |2 +- arch/arm/boot/dts/sun5i-a13-olinuxino.dts

[PATCH 5/7] ARM: sunxi: dt: Add uart3 dt node

Both A10 and A13 Allwinner SoCs have a Synopsys APB uart3 device available, so add it to the sunxi.dtsi file Signed-off-by: Maxime Ripard Acked-by: Emilio López --- arch/arm/boot/dts/sunxi.dtsi | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/sunxi.dtsi b

[PATCH 7/7] ARM: sunxi: hackberry: Add UART muxing

We previously relied on the bootloader to do the muxing of the UART for the Hackberry. Don't rely on it anymore and use pinctrl. Signed-off-by: Maxime Ripard Acked-by: Emilio López --- arch/arm/boot/dts/sun4i-a10-hackberry.dts |2 ++ 1 file changed, 2 insertions(+) diff --git a/arc

[PATCH 6/7] ARM: sunxi: dt: Add A10 UARTs to the dtsi.

The Allwinner A10 SoC has 8 available UARTs, which is 6 more than on the A13, so add the missing UARTs to the sun4i-a10 dtsi. Signed-off-by: Maxime Ripard Acked-by: Emilio López --- arch/arm/boot/dts/sun4i-a10.dtsi | 50 ++ 1 file changed, 50 insertions

[PATCH 4/7] ARM: sunxi: dt: Move uart0 to sun4i-a10.dtsi

The UART0 is only available on the Allwinner A10 SoCs, and not on the A13, so move the uart0 node to sun4i-a10.dtsi. Signed-off-by: Maxime Ripard Acked-by: Emilio López Tested-by: Emilio López --- arch/arm/boot/dts/sun4i-a10.dtsi | 10 ++ arch/arm/boot/dts/sunxi.dtsi | 10

[PATCH 1/7] serial: 8250_dw: add support for clk api

From: Emilio López This commit implements support for using the clk api; this lets us use the "clocks" property with device tree, instead of having to use clock-frequency. Signed-off-by: Emilio López --- drivers/tty/serial/8250/8250_dw.c | 33 - 1 file changed

[PATCH 2/7] ARM: sunxi: dt: Use clocks property instead of clock-frequency for the UARTs

It will be especially useful when we will have the clock definitions in the device tree. Signed-off-by: Maxime Ripard Acked-by: Emilio López Tested-by: Emilio López --- arch/arm/boot/dts/sunxi.dtsi |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts

Re: [PATCH 1/7] serial: 8250_dw: add support for clk api

Hi, Le 19/03/2013 11:35, Maxime Ripard a écrit : > From: Emilio López > > This commit implements support for using the clk api; this lets us use > the "clocks" property with device tree, instead of having to use > clock-frequency. > > Signed-off-by: Emilio Lóp

[PATCH] serial: 8250_dw: add support for clk api

From: Emilio López This commit implements support for using the clk api; this lets us use the "clocks" property with device tree, instead of having to use clock-frequency. Signed-off-by: Emilio López --- drivers/tty/serial/8250/8250_dw.c | 33 - 1 file changed

Re: [PATCH 1/5] net: Add davicom wemac ethernet driver found on Allwinner A10 SoC's

any point in time. With the current code, when you have to send packets, it will: - send the packet 1 - stop the queue - wait for the packet 1 to be sent - once packet 1 is sent, restart the queue, so that it can load a packet 3 - start transmitting packet 2 if there's one, and loop

[PATCH 1/3] pinctrl: sunxi: Add of_xlate function

Since the pin controller of sunxi chips is represented as a single bank in the driver. Since this is neither convenient nor represented that way in the datasheets, define a custom of_xlate function with the layout Signed-off-by: Maxime Ripard --- drivers/pinctrl/pinctrl-sunxi.c | 20

[PATCH 3/3] sunxi: a13-olinuxino: Add user LED to the device tree

Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 20 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts index 4a1e45d..33d1c7e 100644 --- a/arch/arm/boot/dts

[PATCH 2/3] sunxi: dts: Report the pinctrl nodes as gpio-controllers

Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi |4 +++- arch/arm/boot/dts/sun5i-a13.dtsi |4 +++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index f99f60d..03d2b53 100644 --- a/arch

[PATCH] ARM: multiplatform: Sort the max gpio numbers.

When building a multiplatform kernel, we could end up with a smaller number of GPIOs than the one required by the platform the kernel was running on. Sort the max GPIO number by descending order so that we always take the highest number required. Signed-off-by: Maxime Ripard --- arch/arm

[PATCH] sunxi: Cleanup the reset code and add meaningful registers defines

Signed-off-by: Maxime Ripard --- arch/arm/mach-sunxi/sunxi.c | 19 +++ 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c index 1dc8a92..f9555c3 100644 --- a/arch/arm/mach-sunxi/sunxi.c +++ b/arch/arm/mach

Re: [PATCHv4] ARM: sunxi: gpio: Add Allwinner SoCs GPIO drivers

Hi Linus, Le 29/01/2013 23:38, Linus Walleij a écrit : > On Mon, Jan 28, 2013 at 9:33 PM, Maxime Ripard > wrote: > >> The IP responsible for the muxing on the Allwinner SoCs are also >> handling the GPIOs on the system. This patch adds the needed driver that >> relie

Re: [PATCH 1/3] pinctrl: sunxi: Add of_xlate function

Le 29/01/2013 23:41, Linus Walleij a écrit : > On Sun, Jan 27, 2013 at 8:02 PM, Maxime Ripard > wrote: > >> Since the pin controller of sunxi chips is represented as a single bank >> in the driver. >> Since this is neither convenient nor represented that way in the >

[PATCH 2/2] ARM: mxs: dts: Add rotary encoder to the CFA-10049

Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/imx28-cfa10049.dts |9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts index 5db3789..a0d3e9f 100644 --- a/arch/arm/boot/dts/imx28-cfa10049.dts +++ b/arch

[PATCH 1/2] ARM: mxs: dts: Add gpio-keys for the rotary to the CFA-10049

Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/imx28-cfa10049.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts index cabc33a..5db3789 100644 --- a/arch/arm/boot/dts/imx28-cfa10049.dts +++ b

[PATCH] spi: spi-gpio: fix compilation warning on 64 bits systems

unsigned type [-Woverflow] Signed-off-by: Maxime Ripard Reported-by: Fengguang Wu --- include/linux/spi/spi_gpio.h |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/linux/spi/spi_gpio.h b/include/linux/spi/spi_gpio.h index 369b3d7..1634ce3 100644 --- a/include/linux

[PATCH 1/2] spi: spi-gpio: Add checks for the dt properties

The bindings assumed that the gpios properties were always there, which made the NO_TX and NO_RX mode not usable from device tree. Add extra checks to make sure that the driver can work if either MOSI or MISO is not used. Signed-off-by: Maxime Ripard Cc: Mark Brown --- drivers/spi/spi-gpio.c

[PATCH 2/2] ARM: dts: cfa10049: Change the SPI3 bus to spi-gpio

The DAC found on the last chip select requires a word length of 12 bits, which is not supported by the SSP controller of the iMX28. Use bitbanging for that bus to support such a length. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/imx28-cfa10049.dts | 78

[PATCH 1/3] fb: backlight: Add the Himax HX-8357B LCD controller

Signed-off-by: Maxime Ripard Cc: Andrew Morton --- drivers/video/backlight/Kconfig |7 + drivers/video/backlight/Makefile |1 + drivers/video/backlight/hx8357.c | 482 ++ 3 files changed, 490 insertions(+) create mode 100644 drivers/video/backlight

[PATCH 3/3] ARM: dts: mxs: Add the LCD to the 10049 board

Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/imx28-cfa10049.dts | 99 ++ arch/arm/mach-mxs/mach-mxs.c | 22 2 files changed, 121 insertions(+) diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts

[PATCH 2/3] ARM: dts: mxs: Add muxing options for the third PWM

Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/imx28.dtsi | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 13b7053..7ba4966 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi

[PATCHv2] ARM: mxs: dt: Add Crystalfontz CFA-10037 device tree support

The CFA-10037 is another expansion board for the CFA-10036 module, with only a USB Host, a Ethernet device and a lot of gpios. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile |1 + arch/arm/boot/dts/imx28-cfa10037.dts | 77 ++ arch/arm

[PATCHv3] ARM: sunxi: gpio: Add Allwinner SoCs GPIO drivers

need to probe a generic driver to handle the banks available for each SoC. This driver has been tested on a A13-Olinuxino. Signed-off-by: Maxime Ripard --- Changes from v2: - Removed the call to kzalloc to build the pin name drivers/pinctrl/pinctrl-sunxi.c | 134

[PATCH 2/5] pinctrl: sunxi: Document sun5i pins functions

Signed-off-by: Maxime Ripard --- drivers/pinctrl/pinctrl-sunxi.c |8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/pinctrl-sunxi.c b/drivers/pinctrl/pinctrl-sunxi.c index 4ed0e7e..34b4e90 100644 --- a/drivers/pinctrl/pinctrl-sunxi.c +++ b/drivers

[PATCH 5/5] ARM: sunxi: Add the pin groups for UART0 and UART1 on sun4i

Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 21 + 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 73e0dd5..f99f60d 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm

[PATCH 4/5] ARM: sunxi: Add the sun4i pinctrl and gpio nodes

Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi |9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index e61fdd4..73e0dd5 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i

[PATCH 1/5] ARM: sunxi: Increase the number of GPIOs available

The Allwinner A10 has 9 banks of 32 GPIOs available, so it doesn't fit in the usual 256 limit set by gpio.h. Increase this number to 288. Signed-off-by: Maxime Ripard --- arch/arm/Kconfig |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kc

[PATCH 3/5] ARM: pinctrl: sunxi: Add the pinctrl pin set for Allwinner A10

Since the Allwinner SoCs variants don't have the same set of pins to handle, we need to declare the pin ranges available. Signed-off-by: Maxime Ripard --- drivers/pinctrl/pinctrl-sunxi.c | 554 +++ drivers/pinctrl/pinctrl-sunxi.h | 68 + 2

[PATCH 3/3] sunxi: a13-olinuxino: Add user LED to the device tree

Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 20 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts index 4a1e45d..33d1c7e 100644 --- a/arch/arm/boot/dts

[PATCH 2/3] sunxi: dts: Report the pinctrl nodes as gpio-controllers

Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi |4 +++- arch/arm/boot/dts/sun5i-a13.dtsi |4 +++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index f99f60d..03d2b53 100644 --- a/arch

[PATCH 1/3] pinctrl: sunxi: Add of_xlate function

Since the pin controller of sunxi chips is represented as a single bank in the driver. Since this is neither convenient nor represented that way in the datasheets, define a custom of_xlate function with the layout Signed-off-by: Maxime Ripard --- drivers/pinctrl/pinctrl-sunxi.c | 20

[PATCHv4] ARM: sunxi: gpio: Add Allwinner SoCs GPIO drivers

need to probe a generic driver to handle the banks available for each SoC. This driver has been tested on a A13-Olinuxino. Signed-off-by: Maxime Ripard --- drivers/pinctrl/pinctrl-sunxi.c | 134 ++- drivers/pinctrl/pinctrl-sunxi.h | 25 +++- 2 files

Re: [PATCH 1/6] serial: 8250_dw: add support for clocks property when using DeviceTree

250_serial_out; > + uart.port.private_data = data; > + uart.port.uartclk = clk_get_rate(data->clk); > > dw8250_setup_port(&uart); > ... > > Then in dw8250_probe_of() you need to use the "clock-frequency" > property only when p

[PATCH 4/6] ARM: sunxi: dt: Add uart3 dt node

Both A10 and A13 Allwinner SoCs have a Synopsys APB uart3 device available, so add it to the sunxi.dtsi file Signed-off-by: Maxime Ripard Acked-by: Emilio López --- arch/arm/boot/dts/sunxi.dtsi | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/sunxi.dtsi b

[PATCH 6/6] ARM: sunxi: hackberry: Add UART muxing

We previously relied on the bootloader to do the muxing of the UART for the Hackberry. Don't rely on it anymore and use pinctrl. Signed-off-by: Maxime Ripard Acked-by: Emilio López --- arch/arm/boot/dts/sun4i-a10-hackberry.dts |2 ++ 1 file changed, 2 insertions(+) diff --git a/arc

[PATCH 2/6] ARM: sunxi: dt: Use clocks property instead of clock-frequency for the UARTs

It will be especially useful when we will have the clock definitions in the device tree. Signed-off-by: Maxime Ripard Acked-by: Emilio López Tested-by: Emilio López --- arch/arm/boot/dts/sunxi.dtsi |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts

[PATCH 3/6] ARM: sunxi: dt: Move uart0 to sun4i-a10.dtsi

The UART0 is only available on the Allwinner A10 SoCs, and not on the A13, so move the uart0 node to sun4i-a10.dtsi. Signed-off-by: Maxime Ripard Acked-by: Emilio López Tested-by: Emilio López --- arch/arm/boot/dts/sun4i-a10.dtsi | 10 ++ arch/arm/boot/dts/sunxi.dtsi | 10

[PATCH 5/6] ARM: sunxi: dt: Add A10 UARTs to the dtsi.

The Allwinner A10 SoC has 8 available UARTs, which is 6 more than on the A13, so add the missing UARTs to the sun4i-a10 dtsi. Signed-off-by: Maxime Ripard Acked-by: Emilio López --- arch/arm/boot/dts/sun4i-a10.dtsi | 51 ++ 1 file changed, 51 insertions

[PATCH 1/6] serial: 8250_dw: add support for clk api

From: Emilio López This commit implements support for using the clk api; this lets us use the "clocks" property with device tree, instead of having to use clock-frequency. Signed-off-by: Emilio López Signed-off-by: Maxime Ripard --- drivers/tty/serial/8250/8250_d

[PATCH 4/5] ARM: cubieboard: Enable ethernet (WEMAC) support in dts

From: Stefan Roese Signed-off-by: Stefan Roese --- arch/arm/boot/dts/sun4i-a10-cubieboard.dts |6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts index 88e2dc1..7a3872d 100644 --- a/arch/arm/boot/d

[PATCH 5/5] ARM: hackberry: dt: Add Ethernet controller to the Hackberry device tree

Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10-hackberry.dts | 19 +++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts b/arch/arm/boot/dts/sun4i-a10-hackberry.dts index f84549a..3808c1a 100644 --- a/arch/arm/boot/dts/sun4i

[PATCH 1/5] net: Add davicom wemac ethernet driver found on Allwinner A10 SoC's

cleaned up. Signed-off-by: Stefan Roese Signed-off-by: Maxime Ripard --- .../devicetree/bindings/net/davicom-wemac.txt | 20 + drivers/net/ethernet/Makefile |2 +- drivers/net/ethernet/davicom/Kconfig | 31 + drivers/net/ethernet/davicom/Makefile

[PATCH 2/5] ARM: sunxi: Add wemac to sun4i dtsi

Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi |7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 03d2b53..f3c2158 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i

[PATCH 3/5] ARM: sun4i: Add muxing options for the ethernet controller

Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index f3c2158..fc4ce45 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts

Re: [PATCH 1/5] net: Add davicom wemac ethernet driver found on Allwinner A10 SoC's

Le 15/03/2013 21:50, Maxime Ripard a écrit : > From: Stefan Roese > > The Allwinner A10 has an ethernet controller that is advertised as > coming from Davicom. > > The exact feature set of this controller is unknown, since there is no > public documentation for this I

Re: [PATCH 2/2] Add sunxi-sid to dts for sun4i, sun5i and sun7i

t;allwinner,sun7i-sid"; I'd prefer to have sun7i-a20-sid here. We usually mention the soc name as well in the compatible when it's not the good ol' A10. > + reg = <0x01c23800 0x200>; > + }; > + > + Drop the extra line Thanks, Maxi

Re: [PATCH 1/2] Initial support for Allwinner's Security ID fuses

ize = sid_data->keysize; /* ugly */ Ugly? Why? > + if (device_create_bin_file(&pdev->dev, &sid_bin_attr)) /* fixme */ And what is there to fix here? For these two comments, either explain what you find so ugly/broken so that someone reading your code can get what is wrong, or just remove them, because keeping them like that is just confusing. Maxime > + return -ENODEV; > + > + entropy = kzalloc(sizeof(u8) * sid_data->keysize, GFP_KERNEL); > + for (i = 0; i < sid_data->keysize; i++) > + entropy[i] = sunxi_sid_read_byte(sid_data, i); > + add_device_randomness(entropy, sid_data->keysize); > + kfree(entropy); > + > + dev_dbg(&pdev->dev, "loaded\n"); > + > + return 0; > +} > + > +static struct platform_driver sunxi_sid_driver = { > + .probe = sunxi_sid_probe, > + .remove = sunxi_sid_remove, > + .driver = { > + .name = DRV_NAME, > + .owner = THIS_MODULE, > + .of_match_table = sunxi_sid_of_match, > + /* .groups = sunxi_sid_groups, proper way */ > + }, > +}; > +module_platform_driver(sunxi_sid_driver); > + > +MODULE_AUTHOR("Oliver Schinagl "); > +MODULE_DESCRIPTION("Allwinner sunxi security id driver"); > +MODULE_LICENSE("GPL"); > -- > 1.8.1.5 > -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature

Re: [PATCH] net: mdio-sun4i: Convert to devm_* api

> of the of_iomap(). > > Signed-off-by: Jisheng Zhang It looks fine for me. Acked-by: Maxime Ripard Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature

[PATCH] wdt: sunxi: Fix section mismatch

sunxi_wdt_driver references the function __init sunxi_wdt_probe() Signed-off-by: Maxime Ripard --- drivers/watchdog/sunxi_wdt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/watchdog/sunxi_wdt.c b/drivers/watchdog/sunxi_wdt.c index 1f94b42..f6caa77 100644 --- a

Re: MTD EEPROM support and driver integration

On Mon, Jul 08, 2013 at 09:34:26AM +0100, Mark Brown wrote: > On Sat, Jul 06, 2013 at 09:06:49PM +0200, Arnd Bergmann wrote: > > On Saturday 06 July 2013 14:01:12 Maxime Ripard wrote: > > > > > > > a) like interrupts, regs, dmas, clocks, pinctrl, reset, pwm: fix

Re: MTD EEPROM support and driver integration

On Mon, Jul 08, 2013 at 09:36:14AM +0100, Mark Brown wrote: > On Sun, Jul 07, 2013 at 09:15:01AM +0200, Maxime Ripard wrote: > > On Sat, Jul 06, 2013 at 09:06:49PM +0200, Arnd Bergmann wrote: > > > > We also have a bunch of OTP drivers spread around the kernel, it probably

Re: [PATCH RFT] irqchip: sun4i: Remove wrong irq_ack callback implementation

says that these registers are "clear" register, which might indicate that it's actually R/W. I actually used one of the code dump from Allwinner for this driver, so I'm not exactly sure about wether irq_ack is needed or not. I'll test this and let you know. Maxime -- Maxi

[PATCHv5 02/10] clocksource: sun4i: Wrap macros arguments in parenthesis

The macros were not using parenthesis to escape the arguments passed to them. It is pretty unsafe, so add those parenthesis. Signed-off-by: Maxime Ripard --- drivers/clocksource/sun4i_timer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clocksource

[PATCHv5 04/10] clocksource: sun4i: Add clocksource and sched clock drivers

Use the second timer found on the Allwinner SoCs as a clock source and sched clock, that were both not used yet on these platforms. Signed-off-by: Maxime Ripard --- drivers/clocksource/sun4i_timer.c | 15 +++ 1 file changed, 15 insertions(+) diff --git a/drivers/clocksource

[PATCHv5 09/10] clocksource: sun4i: Cleanup parent clock setup

The current bring-up code for the timer was overly complicated. The only thing we need is actually which clock we want to use as source and that's pretty much all. Let's keep it that way. Signed-off-by: Maxime Ripard --- drivers/clocksource/sun4i_timer.c | 15 +-- 1 file

[PATCHv5 10/10] clocksource: sun4i: Fix bug when switching from periodic to oneshot modes

The interval was firing at was set up at probe time, and only changed in the set_next_event, and never changed back, which is not really what is expected. When enabling the periodic mode, now set an interval to tick every jiffy. Signed-off-by: Maxime Ripard --- drivers/clocksource

[PATCHv5 01/10] clocksource: sun4i: Use the BIT macros where possible

Signed-off-by: Maxime Ripard --- drivers/clocksource/sun4i_timer.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clocksource/sun4i_timer.c b/drivers/clocksource/sun4i_timer.c index d4674e7..bdf34d9 100644 --- a/drivers/clocksource/sun4i_timer.c +++ b

[PATCHv5 08/10] clocksource: sun4i: Remove TIMER_SCAL variable

The prescaler is only used when using the internal low frequency oscillator (at 32kHz). Since we're using the higher frequency oscillator at 24MHz, we can just remove it. Signed-off-by: Maxime Ripard --- drivers/clocksource/sun4i_timer.c | 9 +++-- 1 file changed, 3 insertions(

[PATCHv5 06/10] clocksource: sun4i: Fix the next event code

it back, otherwise, it'll have no effect. Fix this logic as well since that code couldn't possibly work. Signed-off-by: Maxime Ripard --- drivers/clocksource/sun4i_timer.c | 25 ++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/c

[PATCHv5 07/10] clocksource: sun4i: Factor out some timer code

The set_next_event and set_mode callbacks share a lot of common code we can easily factor to avoid duplication and mistakes. Signed-off-by: Maxime Ripard --- drivers/clocksource/sun4i_timer.c | 48 ++- 1 file changed, 32 insertions(+), 16 deletions(-) diff

[PATCHv5 05/10] clocksource: sun4i: Don't forget to enable the clock we use

Even if in our case, this clock was non-gatable, used as a parent clock for several IPs, it still is a good idea to enable it. Signed-off-by: Maxime Ripard --- drivers/clocksource/sun4i_timer.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clocksource/sun4i_timer.c b/drivers

[PATCHv5 00/10] clocksource: sunxi: Timer fixes and cleanup

like suggested by Thomas. Maxime Ripard (10): clocksource: sun4i: Use the BIT macros where possible clocksource: sun4i: Wrap macros arguments in parenthesis clocksource: sun4i: rename AUTORELOAD define to RELOAD clocksource: sun4i: Add clocksource and sched clock drivers clocksource: sun4i:

[PATCHv5 03/10] clocksource: sun4i: rename AUTORELOAD define to RELOAD

The name AUTORELOAD was actually pretty bad since it doesn't make the register reload the previous interval when it expires, but setting this value pushes the new programmed interval to the internal timer counter. Rename it to RELOAD instead. Signed-off-by: Maxime Ripard --- drivers/clocks

Re: MTD EEPROM support and driver integration

Hi Mark, On Tue, Jul 09, 2013 at 03:55:10PM +0100, Mark Brown wrote: > On Mon, Jul 08, 2013 at 10:25:38PM +0200, Maxime Ripard wrote: > > On Mon, Jul 08, 2013 at 09:34:26AM +0100, Mark Brown wrote: > > > > I'd really like to see more discussion of this "DT pars

Re: [PATCH 1/2] fb: backlight: HX8357: Make IM pins optionnal

On Tue, Jun 25, 2013 at 03:50:15PM +0200, Maxime Ripard wrote: > > > }; > > > > > > static u8 hx8357_seq_power[] = { > > > @@ -250,9 +251,11 @@ static int hx8357_lcd_init(struct lcd_device *lcdev) > > >* Set the interface selection

Re: [PATCH 0/2] ARM: sunxi: Convert DTSI to new CPU bindings

of Johansson wrote: > > > > On Fri, Jun 28, 2013 at 1:03 PM, Maxime Ripard > > > > wrote: > > > > > On Fri, Jun 28, 2013 at 06:15:32PM +0100, Lorenzo Pieralisi wrote: > > > > >> The patch above should already be queued in next/dt right ? > &

Re: [PATCH 2/4] Add cpuconfig nodes in dts for smp configure.

ranges; > > + cc: cpuconfig@01c25c00 { > + compatible = "allwinner,sun7i-cc"; Please use the sun7i-a20 prefix, and I'd prefer cpu-config instead of "cc". Thanks for working on this! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature

Re: [PATCH] [PATCH] ARM: sunxi: doc: Add sun7i (A20) interrupt table

ed documentation is still better than no documentation. We do have the same documentation for the clocks here, mostly for the same reason. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature

Re: [PATCHv7 2/2] ARM: sunxi: dt: Add sunxi-sid to dts for sun4i, sun5i and sun7i

dt-for-3.13 branch. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature

Re: [PATCH] ARM: sunxi: dts: Add support for the cubieboard3, the CubieTruck

label = "cubietruck:blue:usr"; > + gpios = <&pio 7 21 0>; > + }; Newline > + orange { > + label = "cubietruck:orange:usr"; > + gpios = <&pio 7 20 0>

Re: [PATCH v2] ARM: sunxi: dts: Add support for the cubieboard3, the CubieTruck

which both work as expected. > > Signed-off-by: Oliver Schinagl Applied to my sunxi/dt-for-3.13 branch. Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature

Re: [PATCH 2/5] clocksource: Add Allwinner SoCs HS timers driver

Hi Stephen, Just following back on this. On Wed, Sep 25, 2013 at 04:16:14PM -0700, Stephen Boyd wrote: > On 09/25/13 07:03, Maxime Ripard wrote: > > + sun5i_clockevent.cpumask = cpumask_of(0); > > Can this timer interrupt any CPU or is it hardwired to CPU0? If the > inter

Re: [PATCH] pinctrl: sunxi: drop lock on error path

erman Yin > Cc: Maxime Ripard > Signed-off-by: Linus Walleij Acked-by: Maxime Ripard -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature

Re: [PATCHv6 1/2] ARM: sunxi: Initial support for Allwinner's Security ID fuses

been notified of the device * addition, and will never be notified that this file has been added. * * It should be properly fixed by having some way to attach a sysfs * attribute group to the device structure before the probe. * Unfortunately, this is both not possible for platform devices at the *

Re: [PATCHv6 1/2] ARM: sunxi: Initial support for Allwinner's Security ID fuses

bout "broken" > drivers, as everything is "broken". > > I'll just take this as-is and remove the "fixme" comments, ok? It's your call :) We had a few other comments, that will probably be fixed in the v7 oliver just sent, so you'd probably want to merge the v7 instead. Thanks, Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature

Re: [PATCHv7 1/2] ARM: sunxi: Initial support for Allwinner's Security ID fuses

NG. > > On sun7i additional storage is available, this is initially used for an > UEFI BOOT key, Secure JTAG key, HDMI-HDCP key and vendor specific keys. > > Currently supported are the following known chips: > Allwinner sun4i (A10) > Allwinner sun5i (A10s, A13) > Allwinner

Re: [PATCH 2/5] clocksource: Add Allwinner SoCs HS timers driver

Hi Stephen, On Wed, Sep 25, 2013 at 04:16:14PM -0700, Stephen Boyd wrote: > On 09/25/13 07:03, Maxime Ripard wrote: > > diff --git > > a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt > > b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a1

Re: [PATCH 2/5] clocksource: Add Allwinner SoCs HS timers driver

On Wed, Sep 25, 2013 at 08:23:14PM -0300, Emilio López wrote: > El 25/09/13 11:03, Maxime Ripard escribió: > >Most of the Allwinner SoCs (at this time, all but the A10) also have a > >High Speed timers that are not using the 24MHz oscillator as a source > >but rather the A

Re: [PATCH 23/26] ARM: sunxi: remove custom .init_time hook

That works for me. Tell me if the plan changes. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature

Re: [PATCH 0/5] Allwinner SoCs High Speed Timer support

Hi Thomas, On Thu, Sep 26, 2013 at 04:39:42PM +0200, Thomas Petazzoni wrote: > On Wed, 25 Sep 2013 22:50:12 +0300, Maxime Ripard wrote: > > > For all we know, so far, allwinner has released, by family: > > - sun3i (ARM926) > > * F20 (not supported) > > - s

Re: [PATCH 2/5] clocksource: Add Allwinner SoCs HS timers driver

ial clock rate > even if the apbclk changed." Hmmm, right. But still, we can have IPs that depend on this one that requires to readjust their internal rate whenever AHB is recalculated. These HS timers for example :) Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature

Re: [PATCH V3: Add Smp support for Allwinner A20. 1/3] Add smp support for Allwinner A20(sunxi 7i).

secondary cpus. So I have to use early_initcall. At least two other platforms (sti and rockchip) do it like that. And an early_initcall is not an option. Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.

Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).

BIT(0) > > static void __iomem *wdt_base; > +/* > + * CPU Configure module support > + * 1: Software reset for smp cpus > + * 2: Configure for smp cpus including boot. > + * 3: Three 64-bit idle counters and two 64-bit common counters > + * it is needed for smp cpu

Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).

Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature

Re: [PATCH V3: Add Smp support for Allwinner A20. 2/3] Add cpuconfig nodes in dts for smp configure.

cpu0: cpu@0 { > compatible = "arm,cortex-a7"; > device_type = "cpu"; > reg = <0>; > }; > > - cpu@1 { > + cpu1: cpu@1 { You still haven

Re: [PATCH V3: Add Smp support for Allwinner A20. 3/3] add arch count timer node in dts for Allwinner A20(sunxi 7i).

Hi Fang, On Sun, Sep 22, 2013 at 08:21:28PM +0800, Fan Rong wrote: > Signed-off-by: Fan Rong Please be more verbose here, especially on the consequences it has. Thanks, Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.

Re: [PATCH V3: Add Smp support for Allwinner A20. 1/3] Add smp support for Allwinner A20(sunxi 7i).

ig_map(void) > +{ > + struct device_node *np; > + > + np = of_find_matching_node(NULL, sunxi_cc_ids); > + if (WARN(!np, "unable to setup cup configure")) > + return -ENOSYS; > + sunxi7i_cc_base = of_iomap(np, 0); > + if (WARN(!sunxi7i

Re: [PATCH 1/3] Add smp support for Allwinner A20(sunxi 7i).

Hi Guenter, On Sun, Sep 22, 2013 at 08:37:23PM -0700, Guenter Roeck wrote: > On 09/21/2013 07:00 AM, Maxime Ripard wrote: > > [ ... ] > > >>+ /* assert cpu core reset */ > >>+ writel(0, sunxi7i_cc_base + CPUX_RESET_CTL(cpu)); > >>+ /* L1RSTDISA

[PATCH 4/5] ARM: sun5i: a13: Add support for the High Speed Timers

The Allwinner A13 has support for two high speed timers. Now that we have a driver to support it, we can enable them in the device tree. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi

[PATCH 2/5] clocksource: Add Allwinner SoCs HS timers driver

timers available, while the former have only 2 of them. Signed-off-by: Maxime Ripard --- .../bindings/timer/allwinner,sun5i-a13-hstimer.txt | 22 +++ arch/arm/mach-sunxi/Kconfig| 1 + drivers/clocksource/Kconfig| 4 + drivers/clocksource/Makefile

[PATCH 5/5] ARM: sun7i: a20: Add support for the High Speed Timers

The Allwinner A20 has support for four high speed timers. Apart for the number of timers (4 vs 2), it's basically the same logic than the high speed timers found in the sun5i chips. Now that we have a driver to support it, we can enable them in the device tree. Signed-off-by: Maxime R

[PATCH 3/5] ARM: sun5i: a10s: Add support for the High Speed Timers

The Allwinner A10s has support for two high speed timers. Now that we have a driver to support it, we can enable them in the device tree. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a10s.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun5i

[PATCH 1/5] clocksource: sun4i: Select CLKSRC_MMIO

The Allwinner SoCs timer use the clocksource MMIO functions. We thus need to select them in Kconfig. Signed-off-by: Maxime Ripard --- drivers/clocksource/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 41c6946..cea50f0

[PATCH 0/5] Allwinner SoCs High Speed Timer support

reset controller that first need to gain some support in the kernel first, but that's for another patchset. Thanks, Maxime Maxime Ripard (5): clocksource: sun4i: Select CLKSRC_MMIO clocksource: Add Allwinner SoCs HS timers driver ARM: sun5i: a10s: Add support for the High Speed Timers

Re: [PATCH V3: Add Smp support for Allwinner A20. 1/3] Add smp support for Allwinner A20(sunxi 7i).

whenever we boot a multiplatform kernel anyway. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature

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