[PATCH 3/3][v4] arm: dts: ls1021a: Add quirk for Erratum A009116
Add "snps,quirk-frame-length-adjustment" property to USB3 node for erratum A009116. This property provides value of GFLADJ_30MHZ for post silicon frame length adjustment. Signed-off-by: Nikhil Badola --- Changes for v4: None arch/arm/boot/dts/ls1021a.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index c70bb27..50ac0d4 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -404,6 +404,7 @@ reg = <0x0 0x310 0x0 0x1>; interrupts = ; dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; }; }; }; -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/3][v4] drivers: usb: dwc3: Add frame length adjustment quirk
Add adjust_frame_length_quirk for writing to fladj register
which adjusts (micro)frame length to value provided by
"snps,quirk-frame-length-adjustment" property thus avoiding
USB 2.0 devices to time-out over a longer run
Signed-off-by: Nikhil Badola
---
Changes for v4: Removed mixed declerations and code
drivers/usb/dwc3/core.c | 34 ++
drivers/usb/dwc3/core.h | 5 +
drivers/usb/dwc3/platform_data.h | 2 ++
3 files changed, 41 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 064123e..6270581 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -143,6 +143,32 @@ static int dwc3_soft_reset(struct dwc3 *dwc)
return 0;
}
+/*
+ * dwc3_frame_length_adjustment - Adjusts frame length if required
+ * @dwc3: Pointer to our controller context structure
+ * @fladj: Value of GFLADJ_30MHZ to adjust frame length
+ */
+static void dwc3_frame_length_adjustment(struct dwc3 *dwc, u32 fladj)
+{
+ u32 reg;
+ u32 dft;
+
+ if (dwc->revision < DWC3_REVISION_250A)
+ return;
+
+ if (fladj == 0)
+ return;
+
+ reg = dwc3_readl(dwc->regs, DWC3_GFLADJ);
+ dft = reg & DWC3_GFLADJ_30MHZ_MASK;
+ if (!dev_WARN_ONCE(dwc->dev, dft == fladj,
+ "request value same as default, ignoring\n")) {
+ reg &= ~DWC3_GFLADJ_30MHZ_MASK;
+ reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | fladj;
+ dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
+ }
+}
+
/**
* dwc3_free_one_event_buffer - Frees one event buffer
* @dwc: Pointer to our controller context structure
@@ -779,6 +805,7 @@ static int dwc3_probe(struct platform_device *pdev)
u8 lpm_nyet_threshold;
u8 tx_de_emphasis;
u8 hird_threshold;
+ u32 fladj = 0;
int ret;
@@ -886,6 +913,9 @@ static int dwc3_probe(struct platform_device *pdev)
_de_emphasis);
of_property_read_string(node, "snps,hsphy_interface",
>hsphy_interface);
+ of_property_read_u32(node,
+"snps,quirk-frame-length-adjustment",
+);
} else if (pdata) {
dwc->maximum_speed = pdata->maximum_speed;
dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -915,6 +945,7 @@ static int dwc3_probe(struct platform_device *pdev)
tx_de_emphasis = pdata->tx_de_emphasis;
dwc->hsphy_interface = pdata->hsphy_interface;
+ fladj = pdata->fladj_value;
}
/* default to superspeed if no maximum_speed passed */
@@ -971,6 +1002,9 @@ static int dwc3_probe(struct platform_device *pdev)
goto err1;
}
+ /* Adjust Frame Length */
+ dwc3_frame_length_adjustment(dwc, fladj);
+
usb_phy_set_suspend(dwc->usb2_phy, 0);
usb_phy_set_suspend(dwc->usb3_phy, 0);
ret = phy_power_on(dwc->usb2_generic_phy);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 0447788..9188745 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -124,6 +124,7 @@
#define DWC3_GEVNTCOUNT(n) (0xc40c + (n * 0x10))
#define DWC3_GHWPARAMS80xc600
+#define DWC3_GFLADJ0xc630
/* Device Registers */
#define DWC3_DCFG 0xc700
@@ -234,6 +235,10 @@
/* Global HWPARAMS6 Register */
#define DWC3_GHWPARAMS6_EN_FPGA(1 << 7)
+/* Global Frame Length Adjustment Register */
+#define DWC3_GFLADJ_30MHZ_SDBND_SEL(1 << 7)
+#define DWC3_GFLADJ_30MHZ_MASK 0x3f
+
/* Device Configuration Register */
#define DWC3_DCFG_DEVADDR(addr)((addr) << 3)
#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f)
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index d3614ec..400b197 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -46,5 +46,7 @@ struct dwc3_platform_data {
unsigned tx_de_emphasis_quirk:1;
unsigned tx_de_emphasis:2;
+ u32 fladj_value;
+
const char *hsphy_interface;
};
--
2.1.0
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[PATCH 1/3][v4] Documentation: dt: dwc3: Add snps,quirk-frame-length-adjustment property
Add snps,quirk-frame-length-adjustment property which provides value for post silicon frame length adjustment Signed-off-by: Nikhil Badola --- Changes for v4: None Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 0815eac..8c7d585 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -40,6 +40,9 @@ Optional properties: - snps,hird-threshold: HIRD threshold - snps,hsphy_interface: High-Speed PHY interface selection between "utmi" for UTMI+ and "ulpi" for ULPI when the DWC_USB3_HSPHY_INTERFACE has value 3. + - snps,quirk-frame-length-adjustment: Value for GFLADJ_30MHZ field of GFLADJ + register for post-silicon frame length adjustment when the + fladj_30mhz_sdbnd signal is invalid or incorrect. This is usually a subnode to DWC3 glue to which it is connected. -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/3][v4] Documentation: dt: dwc3: Add snps,quirk-frame-length-adjustment property
Add snps,quirk-frame-length-adjustment property which provides value for post silicon frame length adjustment Signed-off-by: Nikhil Badola <nikhil.bad...@freescale.com> --- Changes for v4: None Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 0815eac..8c7d585 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -40,6 +40,9 @@ Optional properties: - snps,hird-threshold: HIRD threshold - snps,hsphy_interface: High-Speed PHY interface selection between "utmi" for UTMI+ and "ulpi" for ULPI when the DWC_USB3_HSPHY_INTERFACE has value 3. + - snps,quirk-frame-length-adjustment: Value for GFLADJ_30MHZ field of GFLADJ + register for post-silicon frame length adjustment when the + fladj_30mhz_sdbnd signal is invalid or incorrect. This is usually a subnode to DWC3 glue to which it is connected. -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/3][v4] drivers: usb: dwc3: Add frame length adjustment quirk
Add adjust_frame_length_quirk for writing to fladj register
which adjusts (micro)frame length to value provided by
"snps,quirk-frame-length-adjustment" property thus avoiding
USB 2.0 devices to time-out over a longer run
Signed-off-by: Nikhil Badola <nikhil.bad...@freescale.com>
---
Changes for v4: Removed mixed declerations and code
drivers/usb/dwc3/core.c | 34 ++
drivers/usb/dwc3/core.h | 5 +
drivers/usb/dwc3/platform_data.h | 2 ++
3 files changed, 41 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 064123e..6270581 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -143,6 +143,32 @@ static int dwc3_soft_reset(struct dwc3 *dwc)
return 0;
}
+/*
+ * dwc3_frame_length_adjustment - Adjusts frame length if required
+ * @dwc3: Pointer to our controller context structure
+ * @fladj: Value of GFLADJ_30MHZ to adjust frame length
+ */
+static void dwc3_frame_length_adjustment(struct dwc3 *dwc, u32 fladj)
+{
+ u32 reg;
+ u32 dft;
+
+ if (dwc->revision < DWC3_REVISION_250A)
+ return;
+
+ if (fladj == 0)
+ return;
+
+ reg = dwc3_readl(dwc->regs, DWC3_GFLADJ);
+ dft = reg & DWC3_GFLADJ_30MHZ_MASK;
+ if (!dev_WARN_ONCE(dwc->dev, dft == fladj,
+ "request value same as default, ignoring\n")) {
+ reg &= ~DWC3_GFLADJ_30MHZ_MASK;
+ reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | fladj;
+ dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
+ }
+}
+
/**
* dwc3_free_one_event_buffer - Frees one event buffer
* @dwc: Pointer to our controller context structure
@@ -779,6 +805,7 @@ static int dwc3_probe(struct platform_device *pdev)
u8 lpm_nyet_threshold;
u8 tx_de_emphasis;
u8 hird_threshold;
+ u32 fladj = 0;
int ret;
@@ -886,6 +913,9 @@ static int dwc3_probe(struct platform_device *pdev)
_de_emphasis);
of_property_read_string(node, "snps,hsphy_interface",
>hsphy_interface);
+ of_property_read_u32(node,
+"snps,quirk-frame-length-adjustment",
+);
} else if (pdata) {
dwc->maximum_speed = pdata->maximum_speed;
dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -915,6 +945,7 @@ static int dwc3_probe(struct platform_device *pdev)
tx_de_emphasis = pdata->tx_de_emphasis;
dwc->hsphy_interface = pdata->hsphy_interface;
+ fladj = pdata->fladj_value;
}
/* default to superspeed if no maximum_speed passed */
@@ -971,6 +1002,9 @@ static int dwc3_probe(struct platform_device *pdev)
goto err1;
}
+ /* Adjust Frame Length */
+ dwc3_frame_length_adjustment(dwc, fladj);
+
usb_phy_set_suspend(dwc->usb2_phy, 0);
usb_phy_set_suspend(dwc->usb3_phy, 0);
ret = phy_power_on(dwc->usb2_generic_phy);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 0447788..9188745 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -124,6 +124,7 @@
#define DWC3_GEVNTCOUNT(n) (0xc40c + (n * 0x10))
#define DWC3_GHWPARAMS80xc600
+#define DWC3_GFLADJ0xc630
/* Device Registers */
#define DWC3_DCFG 0xc700
@@ -234,6 +235,10 @@
/* Global HWPARAMS6 Register */
#define DWC3_GHWPARAMS6_EN_FPGA(1 << 7)
+/* Global Frame Length Adjustment Register */
+#define DWC3_GFLADJ_30MHZ_SDBND_SEL(1 << 7)
+#define DWC3_GFLADJ_30MHZ_MASK 0x3f
+
/* Device Configuration Register */
#define DWC3_DCFG_DEVADDR(addr)((addr) << 3)
#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f)
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index d3614ec..400b197 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -46,5 +46,7 @@ struct dwc3_platform_data {
unsigned tx_de_emphasis_quirk:1;
unsigned tx_de_emphasis:2;
+ u32 fladj_value;
+
const char *hsphy_interface;
};
--
2.1.0
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 3/3][v4] arm: dts: ls1021a: Add quirk for Erratum A009116
Add "snps,quirk-frame-length-adjustment" property to USB3 node for erratum A009116. This property provides value of GFLADJ_30MHZ for post silicon frame length adjustment. Signed-off-by: Nikhil Badola <nikhil.bad...@freescale.com> --- Changes for v4: None arch/arm/boot/dts/ls1021a.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index c70bb27..50ac0d4 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -404,6 +404,7 @@ reg = <0x0 0x310 0x0 0x1>; interrupts = ; dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; }; }; }; -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 3/3][v3] arm: dts: ls1021a: Add quirk for Erratum A009116
Add "snps,quirk-frame-length-adjustment" property to USB3 node for erratum A009116. This property provides value of GFLADJ_30MHZ for post silicon frame length adjustment. Signed-off-by: Nikhil Badola --- Changes for v3 : None arch/arm/boot/dts/ls1021a.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index c70bb27..50ac0d4 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -404,6 +404,7 @@ reg = <0x0 0x310 0x0 0x1>; interrupts = ; dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; }; }; }; -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/3][v3] drivers: usb: dwc3: Add frame length adjustment quirk
Add adjust_frame_length_quirk for writing to fladj register
which adjusts (micro)frame length to value provided by
"snps,quirk-frame-length-adjustment" property thus avoiding
USB 2.0 devices to time-out over a longer run
Signed-off-by: Nikhil Badola
---
Changes for v3:
- removed unnecessary if(fladj) condition
- removed stray newline
drivers/usb/dwc3/core.c | 34 ++
drivers/usb/dwc3/core.h | 5 +
drivers/usb/dwc3/platform_data.h | 2 ++
3 files changed, 41 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 064123e..75a17bf 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -143,6 +143,32 @@ static int dwc3_soft_reset(struct dwc3 *dwc)
return 0;
}
+/*
+ * dwc3_frame_length_adjustment - Adjusts frame length if required
+ * @dwc3: Pointer to our controller context structure
+ * @fladj: Value of GFLADJ_30MHZ to adjust frame length
+ */
+static void dwc3_frame_length_adjustment(struct dwc3 *dwc, u32 fladj)
+{
+ if (dwc->revision < DWC3_REVISION_250A)
+ return;
+
+ if (fladj == 0)
+ return;
+
+ u32 reg;
+ u32 dft;
+
+ reg = dwc3_readl(dwc->regs, DWC3_GFLADJ);
+ dft = reg & DWC3_GFLADJ_30MHZ_MASK;
+ if (!dev_WARN_ONCE(dwc->dev, dft == fladj,
+ "request value same as default, ignoring\n")) {
+ reg &= ~DWC3_GFLADJ_30MHZ_MASK;
+ reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | fladj;
+ dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
+ }
+}
+
/**
* dwc3_free_one_event_buffer - Frees one event buffer
* @dwc: Pointer to our controller context structure
@@ -779,6 +805,7 @@ static int dwc3_probe(struct platform_device *pdev)
u8 lpm_nyet_threshold;
u8 tx_de_emphasis;
u8 hird_threshold;
+ u32 fladj = 0;
int ret;
@@ -886,6 +913,9 @@ static int dwc3_probe(struct platform_device *pdev)
_de_emphasis);
of_property_read_string(node, "snps,hsphy_interface",
>hsphy_interface);
+ of_property_read_u32(node,
+"snps,quirk-frame-length-adjustment",
+);
} else if (pdata) {
dwc->maximum_speed = pdata->maximum_speed;
dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -915,6 +945,7 @@ static int dwc3_probe(struct platform_device *pdev)
tx_de_emphasis = pdata->tx_de_emphasis;
dwc->hsphy_interface = pdata->hsphy_interface;
+ fladj = pdata->fladj_value;
}
/* default to superspeed if no maximum_speed passed */
@@ -971,6 +1002,9 @@ static int dwc3_probe(struct platform_device *pdev)
goto err1;
}
+ /* Adjust Frame Length */
+ dwc3_frame_length_adjustment(dwc, fladj);
+
usb_phy_set_suspend(dwc->usb2_phy, 0);
usb_phy_set_suspend(dwc->usb3_phy, 0);
ret = phy_power_on(dwc->usb2_generic_phy);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 0447788..9188745 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -124,6 +124,7 @@
#define DWC3_GEVNTCOUNT(n) (0xc40c + (n * 0x10))
#define DWC3_GHWPARAMS80xc600
+#define DWC3_GFLADJ0xc630
/* Device Registers */
#define DWC3_DCFG 0xc700
@@ -234,6 +235,10 @@
/* Global HWPARAMS6 Register */
#define DWC3_GHWPARAMS6_EN_FPGA(1 << 7)
+/* Global Frame Length Adjustment Register */
+#define DWC3_GFLADJ_30MHZ_SDBND_SEL(1 << 7)
+#define DWC3_GFLADJ_30MHZ_MASK 0x3f
+
/* Device Configuration Register */
#define DWC3_DCFG_DEVADDR(addr)((addr) << 3)
#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f)
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index d3614ec..400b197 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -46,5 +46,7 @@ struct dwc3_platform_data {
unsigned tx_de_emphasis_quirk:1;
unsigned tx_de_emphasis:2;
+ u32 fladj_value;
+
const char *hsphy_interface;
};
--
2.1.0
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/3][v3] Documentation: dt: dwc3: Add snps,quirk-frame-length-adjustment property
Add snps,quirk-frame-length-adjustment property which provides value for post silicon frame length adjustment Signed-off-by: Nikhil Badola --- Changes for v3 : None Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 0815eac..8c7d585 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -40,6 +40,9 @@ Optional properties: - snps,hird-threshold: HIRD threshold - snps,hsphy_interface: High-Speed PHY interface selection between "utmi" for UTMI+ and "ulpi" for ULPI when the DWC_USB3_HSPHY_INTERFACE has value 3. + - snps,quirk-frame-length-adjustment: Value for GFLADJ_30MHZ field of GFLADJ + register for post-silicon frame length adjustment when the + fladj_30mhz_sdbnd signal is invalid or incorrect. This is usually a subnode to DWC3 glue to which it is connected. -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/3][v3] drivers: usb: dwc3: Add frame length adjustment quirk
Add adjust_frame_length_quirk for writing to fladj register
which adjusts (micro)frame length to value provided by
"snps,quirk-frame-length-adjustment" property thus avoiding
USB 2.0 devices to time-out over a longer run
Signed-off-by: Nikhil Badola <nikhil.bad...@freescale.com>
---
Changes for v3:
- removed unnecessary if(fladj) condition
- removed stray newline
drivers/usb/dwc3/core.c | 34 ++
drivers/usb/dwc3/core.h | 5 +
drivers/usb/dwc3/platform_data.h | 2 ++
3 files changed, 41 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 064123e..75a17bf 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -143,6 +143,32 @@ static int dwc3_soft_reset(struct dwc3 *dwc)
return 0;
}
+/*
+ * dwc3_frame_length_adjustment - Adjusts frame length if required
+ * @dwc3: Pointer to our controller context structure
+ * @fladj: Value of GFLADJ_30MHZ to adjust frame length
+ */
+static void dwc3_frame_length_adjustment(struct dwc3 *dwc, u32 fladj)
+{
+ if (dwc->revision < DWC3_REVISION_250A)
+ return;
+
+ if (fladj == 0)
+ return;
+
+ u32 reg;
+ u32 dft;
+
+ reg = dwc3_readl(dwc->regs, DWC3_GFLADJ);
+ dft = reg & DWC3_GFLADJ_30MHZ_MASK;
+ if (!dev_WARN_ONCE(dwc->dev, dft == fladj,
+ "request value same as default, ignoring\n")) {
+ reg &= ~DWC3_GFLADJ_30MHZ_MASK;
+ reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | fladj;
+ dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
+ }
+}
+
/**
* dwc3_free_one_event_buffer - Frees one event buffer
* @dwc: Pointer to our controller context structure
@@ -779,6 +805,7 @@ static int dwc3_probe(struct platform_device *pdev)
u8 lpm_nyet_threshold;
u8 tx_de_emphasis;
u8 hird_threshold;
+ u32 fladj = 0;
int ret;
@@ -886,6 +913,9 @@ static int dwc3_probe(struct platform_device *pdev)
_de_emphasis);
of_property_read_string(node, "snps,hsphy_interface",
>hsphy_interface);
+ of_property_read_u32(node,
+"snps,quirk-frame-length-adjustment",
+);
} else if (pdata) {
dwc->maximum_speed = pdata->maximum_speed;
dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -915,6 +945,7 @@ static int dwc3_probe(struct platform_device *pdev)
tx_de_emphasis = pdata->tx_de_emphasis;
dwc->hsphy_interface = pdata->hsphy_interface;
+ fladj = pdata->fladj_value;
}
/* default to superspeed if no maximum_speed passed */
@@ -971,6 +1002,9 @@ static int dwc3_probe(struct platform_device *pdev)
goto err1;
}
+ /* Adjust Frame Length */
+ dwc3_frame_length_adjustment(dwc, fladj);
+
usb_phy_set_suspend(dwc->usb2_phy, 0);
usb_phy_set_suspend(dwc->usb3_phy, 0);
ret = phy_power_on(dwc->usb2_generic_phy);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 0447788..9188745 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -124,6 +124,7 @@
#define DWC3_GEVNTCOUNT(n) (0xc40c + (n * 0x10))
#define DWC3_GHWPARAMS80xc600
+#define DWC3_GFLADJ0xc630
/* Device Registers */
#define DWC3_DCFG 0xc700
@@ -234,6 +235,10 @@
/* Global HWPARAMS6 Register */
#define DWC3_GHWPARAMS6_EN_FPGA(1 << 7)
+/* Global Frame Length Adjustment Register */
+#define DWC3_GFLADJ_30MHZ_SDBND_SEL(1 << 7)
+#define DWC3_GFLADJ_30MHZ_MASK 0x3f
+
/* Device Configuration Register */
#define DWC3_DCFG_DEVADDR(addr)((addr) << 3)
#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f)
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index d3614ec..400b197 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -46,5 +46,7 @@ struct dwc3_platform_data {
unsigned tx_de_emphasis_quirk:1;
unsigned tx_de_emphasis:2;
+ u32 fladj_value;
+
const char *hsphy_interface;
};
--
2.1.0
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[PATCH 1/3][v3] Documentation: dt: dwc3: Add snps,quirk-frame-length-adjustment property
Add snps,quirk-frame-length-adjustment property which provides value for post silicon frame length adjustment Signed-off-by: Nikhil Badola <nikhil.bad...@freescale.com> --- Changes for v3 : None Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 0815eac..8c7d585 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -40,6 +40,9 @@ Optional properties: - snps,hird-threshold: HIRD threshold - snps,hsphy_interface: High-Speed PHY interface selection between "utmi" for UTMI+ and "ulpi" for ULPI when the DWC_USB3_HSPHY_INTERFACE has value 3. + - snps,quirk-frame-length-adjustment: Value for GFLADJ_30MHZ field of GFLADJ + register for post-silicon frame length adjustment when the + fladj_30mhz_sdbnd signal is invalid or incorrect. This is usually a subnode to DWC3 glue to which it is connected. -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 3/3][v3] arm: dts: ls1021a: Add quirk for Erratum A009116
Add "snps,quirk-frame-length-adjustment" property to USB3 node for erratum A009116. This property provides value of GFLADJ_30MHZ for post silicon frame length adjustment. Signed-off-by: Nikhil Badola <nikhil.bad...@freescale.com> --- Changes for v3 : None arch/arm/boot/dts/ls1021a.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index c70bb27..50ac0d4 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -404,6 +404,7 @@ reg = <0x0 0x310 0x0 0x1>; interrupts = ; dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; }; }; }; -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/3][v2] Documentation: dt: dwc3: Add snps,quirk-frame-length-adjustment property
Add snps,quirk-frame-length-adjustment property which provides value for post silicon frame length adjustment Signed-off-by: Nikhil Badola --- Changes for v2 - changed quirk name as well description Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 0815eac..8c7d585 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -40,6 +40,9 @@ Optional properties: - snps,hird-threshold: HIRD threshold - snps,hsphy_interface: High-Speed PHY interface selection between "utmi" for UTMI+ and "ulpi" for ULPI when the DWC_USB3_HSPHY_INTERFACE has value 3. + - snps,quirk-frame-length-adjustment: Value for GFLADJ_30MHZ field of GFLADJ + register for post-silicon frame length adjustment when the + fladj_30mhz_sdbnd signal is invalid or incorrect. This is usually a subnode to DWC3 glue to which it is connected. -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 3/3][v2] arm: dts: ls1021a: Add quirk for Erratum A009116
Add "snps,quirk-frame-length-adjustment" property to USB3 node for erratum A009116. This property provides value of GFLADJ_30MHZ for post silicon frame length adjustment. Signed-off-by: Nikhil Badola --- Changes for v2 : - updated property name arch/arm/boot/dts/ls1021a.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index c70bb27..50ac0d4 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -404,6 +404,7 @@ reg = <0x0 0x310 0x0 0x1>; interrupts = ; dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; }; }; }; -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/3][v2] drivers: usb: dwc3: Add frame length adjustment quirk
Add adjust_frame_length_quirk for writing to fladj register
which adjusts (micro)frame length to value provided by
"snps,quirk-frame-length-adjustment" property thus avoiding
USB 2.0 devices to time-out over a longer run
Signed-off-by: Nikhil Badola
---
changes for v2 :
- updated quirk's name
- added separate function for frame length adjustment
- added frame length adjustment for pdata users
- removed unnecessary flag from struct dwc3
drivers/usb/dwc3/core.c | 37 +
drivers/usb/dwc3/core.h | 5 +
drivers/usb/dwc3/platform_data.h | 2 ++
3 files changed, 44 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 064123e..f3beb2e 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -143,6 +143,34 @@ static int dwc3_soft_reset(struct dwc3 *dwc)
return 0;
}
+/*
+ * dwc3_frame_length_adjustment - Adjusts frame length if required
+ * @dwc3: Pointer to our controller context structure
+ * @fladj: Value of GFLADJ_30MHZ to adjust frame length
+ */
+static void dwc3_frame_length_adjustment(struct dwc3 *dwc, u32 fladj)
+{
+ if (dwc->revision < DWC3_REVISION_250A)
+ return;
+
+ if (fladj == 0)
+ return;
+
+ if (fladj) {
+ u32 reg;
+ u32 dft;
+
+ reg = dwc3_readl(dwc->regs, DWC3_GFLADJ);
+ dft = reg & DWC3_GFLADJ_30MHZ_MASK;
+ if (!dev_WARN_ONCE(dwc->dev, dft == fladj,
+ "request value same as default, ignoring\n")) {
+ reg &= ~DWC3_GFLADJ_30MHZ_MASK;
+ reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | fladj;
+ dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
+ }
+ }
+}
+
/**
* dwc3_free_one_event_buffer - Frees one event buffer
* @dwc: Pointer to our controller context structure
@@ -779,6 +807,7 @@ static int dwc3_probe(struct platform_device *pdev)
u8 lpm_nyet_threshold;
u8 tx_de_emphasis;
u8 hird_threshold;
+ u32 fladj = 0;
int ret;
@@ -886,6 +915,9 @@ static int dwc3_probe(struct platform_device *pdev)
_de_emphasis);
of_property_read_string(node, "snps,hsphy_interface",
>hsphy_interface);
+ of_property_read_u32(node,
+"snps,quirk-frame-length-adjustment",
+);
} else if (pdata) {
dwc->maximum_speed = pdata->maximum_speed;
dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -915,6 +947,7 @@ static int dwc3_probe(struct platform_device *pdev)
tx_de_emphasis = pdata->tx_de_emphasis;
dwc->hsphy_interface = pdata->hsphy_interface;
+ fladj = pdata->fladj_value;
}
/* default to superspeed if no maximum_speed passed */
@@ -957,6 +990,7 @@ static int dwc3_probe(struct platform_device *pdev)
goto err1;
}
+
if (IS_ENABLED(CONFIG_USB_DWC3_HOST))
dwc->dr_mode = USB_DR_MODE_HOST;
else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET))
@@ -971,6 +1005,9 @@ static int dwc3_probe(struct platform_device *pdev)
goto err1;
}
+ /* Adjust Frame Length */
+ dwc3_frame_length_adjustment(dwc, fladj);
+
usb_phy_set_suspend(dwc->usb2_phy, 0);
usb_phy_set_suspend(dwc->usb3_phy, 0);
ret = phy_power_on(dwc->usb2_generic_phy);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 0447788..9188745 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -124,6 +124,7 @@
#define DWC3_GEVNTCOUNT(n) (0xc40c + (n * 0x10))
#define DWC3_GHWPARAMS80xc600
+#define DWC3_GFLADJ0xc630
/* Device Registers */
#define DWC3_DCFG 0xc700
@@ -234,6 +235,10 @@
/* Global HWPARAMS6 Register */
#define DWC3_GHWPARAMS6_EN_FPGA(1 << 7)
+/* Global Frame Length Adjustment Register */
+#define DWC3_GFLADJ_30MHZ_SDBND_SEL(1 << 7)
+#define DWC3_GFLADJ_30MHZ_MASK 0x3f
+
/* Device Configuration Register */
#define DWC3_DCFG_DEVADDR(addr)((addr) << 3)
#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f)
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index d3614ec..400b197 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -46,5 +46,7 @@ struct dwc3_platform_data {
unsigned tx_de_emphasis_quirk:1;
unsigned tx_de_emphasis:2;
+ u32 fladj_value;
[PATCH 3/3][v2] arm: dts: ls1021a: Add quirk for Erratum A009116
Add snps,quirk-frame-length-adjustment property to USB3 node for erratum A009116. This property provides value of GFLADJ_30MHZ for post silicon frame length adjustment. Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com --- Changes for v2 : - updated property name arch/arm/boot/dts/ls1021a.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index c70bb27..50ac0d4 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -404,6 +404,7 @@ reg = 0x0 0x310 0x0 0x1; interrupts = GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH; dr_mode = host; + snps,quirk-frame-length-adjustment = 0x20; }; }; }; -- 2.1.0 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/3][v2] Documentation: dt: dwc3: Add snps,quirk-frame-length-adjustment property
Add snps,quirk-frame-length-adjustment property which provides value for post silicon frame length adjustment Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com --- Changes for v2 - changed quirk name as well description Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 0815eac..8c7d585 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -40,6 +40,9 @@ Optional properties: - snps,hird-threshold: HIRD threshold - snps,hsphy_interface: High-Speed PHY interface selection between utmi for UTMI+ and ulpi for ULPI when the DWC_USB3_HSPHY_INTERFACE has value 3. + - snps,quirk-frame-length-adjustment: Value for GFLADJ_30MHZ field of GFLADJ + register for post-silicon frame length adjustment when the + fladj_30mhz_sdbnd signal is invalid or incorrect. This is usually a subnode to DWC3 glue to which it is connected. -- 2.1.0 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/3][v2] drivers: usb: dwc3: Add frame length adjustment quirk
Add adjust_frame_length_quirk for writing to fladj register
which adjusts (micro)frame length to value provided by
snps,quirk-frame-length-adjustment property thus avoiding
USB 2.0 devices to time-out over a longer run
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
changes for v2 :
- updated quirk's name
- added separate function for frame length adjustment
- added frame length adjustment for pdata users
- removed unnecessary flag from struct dwc3
drivers/usb/dwc3/core.c | 37 +
drivers/usb/dwc3/core.h | 5 +
drivers/usb/dwc3/platform_data.h | 2 ++
3 files changed, 44 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 064123e..f3beb2e 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -143,6 +143,34 @@ static int dwc3_soft_reset(struct dwc3 *dwc)
return 0;
}
+/*
+ * dwc3_frame_length_adjustment - Adjusts frame length if required
+ * @dwc3: Pointer to our controller context structure
+ * @fladj: Value of GFLADJ_30MHZ to adjust frame length
+ */
+static void dwc3_frame_length_adjustment(struct dwc3 *dwc, u32 fladj)
+{
+ if (dwc-revision DWC3_REVISION_250A)
+ return;
+
+ if (fladj == 0)
+ return;
+
+ if (fladj) {
+ u32 reg;
+ u32 dft;
+
+ reg = dwc3_readl(dwc-regs, DWC3_GFLADJ);
+ dft = reg DWC3_GFLADJ_30MHZ_MASK;
+ if (!dev_WARN_ONCE(dwc-dev, dft == fladj,
+ request value same as default, ignoring\n)) {
+ reg = ~DWC3_GFLADJ_30MHZ_MASK;
+ reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | fladj;
+ dwc3_writel(dwc-regs, DWC3_GFLADJ, reg);
+ }
+ }
+}
+
/**
* dwc3_free_one_event_buffer - Frees one event buffer
* @dwc: Pointer to our controller context structure
@@ -779,6 +807,7 @@ static int dwc3_probe(struct platform_device *pdev)
u8 lpm_nyet_threshold;
u8 tx_de_emphasis;
u8 hird_threshold;
+ u32 fladj = 0;
int ret;
@@ -886,6 +915,9 @@ static int dwc3_probe(struct platform_device *pdev)
tx_de_emphasis);
of_property_read_string(node, snps,hsphy_interface,
dwc-hsphy_interface);
+ of_property_read_u32(node,
+snps,quirk-frame-length-adjustment,
+fladj);
} else if (pdata) {
dwc-maximum_speed = pdata-maximum_speed;
dwc-has_lpm_erratum = pdata-has_lpm_erratum;
@@ -915,6 +947,7 @@ static int dwc3_probe(struct platform_device *pdev)
tx_de_emphasis = pdata-tx_de_emphasis;
dwc-hsphy_interface = pdata-hsphy_interface;
+ fladj = pdata-fladj_value;
}
/* default to superspeed if no maximum_speed passed */
@@ -957,6 +990,7 @@ static int dwc3_probe(struct platform_device *pdev)
goto err1;
}
+
if (IS_ENABLED(CONFIG_USB_DWC3_HOST))
dwc-dr_mode = USB_DR_MODE_HOST;
else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET))
@@ -971,6 +1005,9 @@ static int dwc3_probe(struct platform_device *pdev)
goto err1;
}
+ /* Adjust Frame Length */
+ dwc3_frame_length_adjustment(dwc, fladj);
+
usb_phy_set_suspend(dwc-usb2_phy, 0);
usb_phy_set_suspend(dwc-usb3_phy, 0);
ret = phy_power_on(dwc-usb2_generic_phy);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 0447788..9188745 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -124,6 +124,7 @@
#define DWC3_GEVNTCOUNT(n) (0xc40c + (n * 0x10))
#define DWC3_GHWPARAMS80xc600
+#define DWC3_GFLADJ0xc630
/* Device Registers */
#define DWC3_DCFG 0xc700
@@ -234,6 +235,10 @@
/* Global HWPARAMS6 Register */
#define DWC3_GHWPARAMS6_EN_FPGA(1 7)
+/* Global Frame Length Adjustment Register */
+#define DWC3_GFLADJ_30MHZ_SDBND_SEL(1 7)
+#define DWC3_GFLADJ_30MHZ_MASK 0x3f
+
/* Device Configuration Register */
#define DWC3_DCFG_DEVADDR(addr)((addr) 3)
#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f)
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index d3614ec..400b197 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -46,5 +46,7 @@ struct dwc3_platform_data {
unsigned tx_de_emphasis_quirk:1;
unsigned tx_de_emphasis:2;
+ u32 fladj_value;
+
const char *hsphy_interface;
};
--
2.1.0
--
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[PATCH][v2] drivers: usb: fsl: Workaround for USB erratum-A005275
Incoming packets in high speed are randomly corrupted by h/w
resulting in multiple errors. This workaround makes FS as
default mode in all affected socs by disabling HS chirp
signalling.This errata does not affect FS and LS mode.
Forces all HS devices to connect in FS mode for all socs
affected by this erratum:
P3041 and P2041 rev 1.0 and 1.1
P5020 and P5010 rev 1.0 and 2.0
P5040, P1010 and T4240 rev 1.0
Signed-off-by: Ramneek Mehresh
Signed-off-by: Nikhil Badola
---
changes for v2:
- Changed PFSC bit writing hunk position
- Changed ehci_has_fsl_hs_errata(e) definition hunk position
drivers/usb/host/ehci-fsl.c | 4
drivers/usb/host/ehci-hub.c | 7 +++
drivers/usb/host/ehci.h | 12
drivers/usb/host/fsl-mph-dr-of.c | 4
include/linux/fsl_devices.h | 1 +
5 files changed, 28 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 202dafb..3b6eb21 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -278,6 +278,10 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x8000 |
SNOOP_SIZE_2GB);
}
+ /* Deal with USB erratum A-005275 */
+ if (pdata->has_fsl_erratum_a005275 == 1)
+ ehci->has_fsl_hs_errata = 1;
+
if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
(pdata->operating_mode == FSL_USB2_DR_OTG))
if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index 22abb68..086a711 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -1221,6 +1221,13 @@ int ehci_hub_control(
*/
ehci->reset_done [wIndex] = jiffies
+ msecs_to_jiffies (50);
+
+ /*
+* Force full-speed connect for FSL high-speed
+* erratum; disable HS Chirp by setting PFSC bit
+*/
+ if (ehci_has_fsl_hs_errata(ehci))
+ temp |= (1 << PORTSC_FSL_PFSC);
}
ehci_writel(ehci, temp, status_reg);
break;
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index f700157..46f62e4 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -215,6 +215,7 @@ struct ehci_hcd { /* one per controller */
/* SILICON QUIRKS */
unsignedno_selective_suspend:1;
unsignedhas_fsl_port_bug:1; /* FreeScale */
+ unsignedhas_fsl_hs_errata:1;/* Freescale HS quirk */
unsignedbig_endian_mmio:1;
unsignedbig_endian_desc:1;
unsignedbig_endian_capbase:1;
@@ -686,6 +687,17 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
#defineehci_has_fsl_portno_bug(e) (0)
#endif
+#define PORTSC_FSL_PFSC24 /* Port Force Full-Speed Connect */
+
+#if defined(CONFIG_PPC_85xx)
+/* Some Freescale processors have an erratum (USB A-005275) in which
+ * incoming packets get corrupted in HS mode
+ */
+#define ehci_has_fsl_hs_errata(e) ((e)->has_fsl_hs_errata)
+#else
+#define ehci_has_fsl_hs_errata(e) (0)
+#endif
+
/*
* While most USB host controllers implement their registers in
* little-endian format, a minority (celleb companion chip) implement
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 9f73141..534c4c5 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -221,6 +221,10 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device
*ofdev)
pdata->has_fsl_erratum_a007792 = 1;
else
pdata->has_fsl_erratum_a007792 = 0;
+ if (of_get_property(np, "fsl,usb-erratum-a005275", NULL))
+ pdata->has_fsl_erratum_a005275 = 1;
+ else
+ pdata->has_fsl_erratum_a005275 = 0;
/*
* Determine whether phy_clk_valid needs to be checked
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index cebdbbb..f291291 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -99,6 +99,7 @@ struct fsl_usb2_platform_data {
unsignedsuspended:1;
unsignedalready_suspended:1;
unsignedhas_fsl_erratum_a007792:1;
+ unsignedhas_fsl_erratum_a005275:1;
unsignedcheck_phy_clk_valid:1;
/* register save area for suspend/resume */
--
2.1.0
--
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[PATCH][v2] drivers: usb: fsl: Workaround for USB erratum-A005275
Incoming packets in high speed are randomly corrupted by h/w
resulting in multiple errors. This workaround makes FS as
default mode in all affected socs by disabling HS chirp
signalling.This errata does not affect FS and LS mode.
Forces all HS devices to connect in FS mode for all socs
affected by this erratum:
P3041 and P2041 rev 1.0 and 1.1
P5020 and P5010 rev 1.0 and 2.0
P5040, P1010 and T4240 rev 1.0
Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
changes for v2:
- Changed PFSC bit writing hunk position
- Changed ehci_has_fsl_hs_errata(e) definition hunk position
drivers/usb/host/ehci-fsl.c | 4
drivers/usb/host/ehci-hub.c | 7 +++
drivers/usb/host/ehci.h | 12
drivers/usb/host/fsl-mph-dr-of.c | 4
include/linux/fsl_devices.h | 1 +
5 files changed, 28 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 202dafb..3b6eb21 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -278,6 +278,10 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x8000 |
SNOOP_SIZE_2GB);
}
+ /* Deal with USB erratum A-005275 */
+ if (pdata-has_fsl_erratum_a005275 == 1)
+ ehci-has_fsl_hs_errata = 1;
+
if ((pdata-operating_mode == FSL_USB2_DR_HOST) ||
(pdata-operating_mode == FSL_USB2_DR_OTG))
if (ehci_fsl_setup_phy(hcd, pdata-phy_mode, 0))
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index 22abb68..086a711 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -1221,6 +1221,13 @@ int ehci_hub_control(
*/
ehci-reset_done [wIndex] = jiffies
+ msecs_to_jiffies (50);
+
+ /*
+* Force full-speed connect for FSL high-speed
+* erratum; disable HS Chirp by setting PFSC bit
+*/
+ if (ehci_has_fsl_hs_errata(ehci))
+ temp |= (1 PORTSC_FSL_PFSC);
}
ehci_writel(ehci, temp, status_reg);
break;
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index f700157..46f62e4 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -215,6 +215,7 @@ struct ehci_hcd { /* one per controller */
/* SILICON QUIRKS */
unsignedno_selective_suspend:1;
unsignedhas_fsl_port_bug:1; /* FreeScale */
+ unsignedhas_fsl_hs_errata:1;/* Freescale HS quirk */
unsignedbig_endian_mmio:1;
unsignedbig_endian_desc:1;
unsignedbig_endian_capbase:1;
@@ -686,6 +687,17 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
#defineehci_has_fsl_portno_bug(e) (0)
#endif
+#define PORTSC_FSL_PFSC24 /* Port Force Full-Speed Connect */
+
+#if defined(CONFIG_PPC_85xx)
+/* Some Freescale processors have an erratum (USB A-005275) in which
+ * incoming packets get corrupted in HS mode
+ */
+#define ehci_has_fsl_hs_errata(e) ((e)-has_fsl_hs_errata)
+#else
+#define ehci_has_fsl_hs_errata(e) (0)
+#endif
+
/*
* While most USB host controllers implement their registers in
* little-endian format, a minority (celleb companion chip) implement
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 9f73141..534c4c5 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -221,6 +221,10 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device
*ofdev)
pdata-has_fsl_erratum_a007792 = 1;
else
pdata-has_fsl_erratum_a007792 = 0;
+ if (of_get_property(np, fsl,usb-erratum-a005275, NULL))
+ pdata-has_fsl_erratum_a005275 = 1;
+ else
+ pdata-has_fsl_erratum_a005275 = 0;
/*
* Determine whether phy_clk_valid needs to be checked
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index cebdbbb..f291291 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -99,6 +99,7 @@ struct fsl_usb2_platform_data {
unsignedsuspended:1;
unsignedalready_suspended:1;
unsignedhas_fsl_erratum_a007792:1;
+ unsignedhas_fsl_erratum_a005275:1;
unsignedcheck_phy_clk_valid:1;
/* register save area for suspend/resume */
--
2.1.0
--
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the body
[PATCH] drivers: usb: fsl: Workaround for USB erratum-A005275
Incoming packets in high speed are randomly corrupted by h/w
resulting in multiple errors. This workaround makes FS as
default mode in all affected socs by disabling HS chirp
signalling.This errata does not affect FS and LS mode.
Forces all HS devices to connect in FS mode for all socs
affected by this erratum:
P3041 and P2041 rev 1.0 and 1.1
P5020 and P5010 rev 1.0 and 2.0
P5040, P1010 and T4240 rev 1.0
Signed-off-by: Ramneek Mehresh
Signed-off-by: Nikhil Badola
---
drivers/usb/host/ehci-fsl.c | 4
drivers/usb/host/ehci-hub.c | 7 +++
drivers/usb/host/ehci.h | 12
drivers/usb/host/fsl-mph-dr-of.c | 4
include/linux/fsl_devices.h | 1 +
5 files changed, 28 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 202dafb..3b6eb21 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -278,6 +278,10 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x8000 |
SNOOP_SIZE_2GB);
}
+ /* Deal with USB erratum A-005275 */
+ if (pdata->has_fsl_erratum_a005275 == 1)
+ ehci->has_fsl_hs_errata = 1;
+
if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
(pdata->operating_mode == FSL_USB2_DR_OTG))
if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index 22abb68..fb381cf 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -1222,6 +1222,13 @@ int ehci_hub_control(
ehci->reset_done [wIndex] = jiffies
+ msecs_to_jiffies (50);
}
+
+ /* Force full-speed connect for FSL high-speed erratum;
+* disable HS Chirp by setting PFSC bit
+*/
+ if (ehci_has_fsl_hs_errata(ehci))
+ temp |= (1 << PORTSC_FSL_PFSC);
+
ehci_writel(ehci, temp, status_reg);
break;
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index f700157..c232838 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -215,6 +215,7 @@ struct ehci_hcd { /* one per controller */
/* SILICON QUIRKS */
unsignedno_selective_suspend:1;
unsignedhas_fsl_port_bug:1; /* FreeScale */
+ unsignedhas_fsl_hs_errata:1;/* Freescale HS quirk */
unsignedbig_endian_mmio:1;
unsignedbig_endian_desc:1;
unsignedbig_endian_capbase:1;
@@ -675,6 +676,17 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
#defineehci_port_speed(ehci, portsc) USB_PORT_STAT_HIGH_SPEED
#endif
+#define PORTSC_FSL_PFSC24 /* Port Force Full-Speed Connect */
+
+#if defined(CONFIG_PPC_85xx)
+/* Some Freescale processors have an erratum (USB A-005275) in which
+ * incoming packets get corrupted in HS mode
+ */
+#define ehci_has_fsl_hs_errata(e) ((e)->has_fsl_hs_errata)
+#else
+#define ehci_has_fsl_hs_errata(e) (0)
+#endif
+
/*-*/
#ifdef CONFIG_PPC_83xx
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 9f73141..534c4c5 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -221,6 +221,10 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device
*ofdev)
pdata->has_fsl_erratum_a007792 = 1;
else
pdata->has_fsl_erratum_a007792 = 0;
+ if (of_get_property(np, "fsl,usb-erratum-a005275", NULL))
+ pdata->has_fsl_erratum_a005275 = 1;
+ else
+ pdata->has_fsl_erratum_a005275 = 0;
/*
* Determine whether phy_clk_valid needs to be checked
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index cebdbbb..f291291 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -99,6 +99,7 @@ struct fsl_usb2_platform_data {
unsignedsuspended:1;
unsignedalready_suspended:1;
unsignedhas_fsl_erratum_a007792:1;
+ unsignedhas_fsl_erratum_a005275:1;
unsignedcheck_phy_clk_valid:1;
/* register save area for suspend/resume */
--
2.1.0
--
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the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH] drivers: usb: fsl: Workaround for USB erratum-A005275
Incoming packets in high speed are randomly corrupted by h/w
resulting in multiple errors. This workaround makes FS as
default mode in all affected socs by disabling HS chirp
signalling.This errata does not affect FS and LS mode.
Forces all HS devices to connect in FS mode for all socs
affected by this erratum:
P3041 and P2041 rev 1.0 and 1.1
P5020 and P5010 rev 1.0 and 2.0
P5040, P1010 and T4240 rev 1.0
Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
drivers/usb/host/ehci-fsl.c | 4
drivers/usb/host/ehci-hub.c | 7 +++
drivers/usb/host/ehci.h | 12
drivers/usb/host/fsl-mph-dr-of.c | 4
include/linux/fsl_devices.h | 1 +
5 files changed, 28 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 202dafb..3b6eb21 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -278,6 +278,10 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x8000 |
SNOOP_SIZE_2GB);
}
+ /* Deal with USB erratum A-005275 */
+ if (pdata-has_fsl_erratum_a005275 == 1)
+ ehci-has_fsl_hs_errata = 1;
+
if ((pdata-operating_mode == FSL_USB2_DR_HOST) ||
(pdata-operating_mode == FSL_USB2_DR_OTG))
if (ehci_fsl_setup_phy(hcd, pdata-phy_mode, 0))
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index 22abb68..fb381cf 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -1222,6 +1222,13 @@ int ehci_hub_control(
ehci-reset_done [wIndex] = jiffies
+ msecs_to_jiffies (50);
}
+
+ /* Force full-speed connect for FSL high-speed erratum;
+* disable HS Chirp by setting PFSC bit
+*/
+ if (ehci_has_fsl_hs_errata(ehci))
+ temp |= (1 PORTSC_FSL_PFSC);
+
ehci_writel(ehci, temp, status_reg);
break;
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index f700157..c232838 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -215,6 +215,7 @@ struct ehci_hcd { /* one per controller */
/* SILICON QUIRKS */
unsignedno_selective_suspend:1;
unsignedhas_fsl_port_bug:1; /* FreeScale */
+ unsignedhas_fsl_hs_errata:1;/* Freescale HS quirk */
unsignedbig_endian_mmio:1;
unsignedbig_endian_desc:1;
unsignedbig_endian_capbase:1;
@@ -675,6 +676,17 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
#defineehci_port_speed(ehci, portsc) USB_PORT_STAT_HIGH_SPEED
#endif
+#define PORTSC_FSL_PFSC24 /* Port Force Full-Speed Connect */
+
+#if defined(CONFIG_PPC_85xx)
+/* Some Freescale processors have an erratum (USB A-005275) in which
+ * incoming packets get corrupted in HS mode
+ */
+#define ehci_has_fsl_hs_errata(e) ((e)-has_fsl_hs_errata)
+#else
+#define ehci_has_fsl_hs_errata(e) (0)
+#endif
+
/*-*/
#ifdef CONFIG_PPC_83xx
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 9f73141..534c4c5 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -221,6 +221,10 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device
*ofdev)
pdata-has_fsl_erratum_a007792 = 1;
else
pdata-has_fsl_erratum_a007792 = 0;
+ if (of_get_property(np, fsl,usb-erratum-a005275, NULL))
+ pdata-has_fsl_erratum_a005275 = 1;
+ else
+ pdata-has_fsl_erratum_a005275 = 0;
/*
* Determine whether phy_clk_valid needs to be checked
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index cebdbbb..f291291 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -99,6 +99,7 @@ struct fsl_usb2_platform_data {
unsignedsuspended:1;
unsignedalready_suspended:1;
unsignedhas_fsl_erratum_a007792:1;
+ unsignedhas_fsl_erratum_a005275:1;
unsignedcheck_phy_clk_valid:1;
/* register save area for suspend/resume */
--
2.1.0
--
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the body of a message to majord...@vger.kernel.org
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH] fsl/usb: Workaround for USB erratum-A005697
As per USB specification, in the Suspend state, the status bit does
not change until the port is suspended. However, there may be a delay
in suspending a port if there is a transaction currently in progress
on the bus.
In the USBDR controller, the PORTSCx[SUSP] bit changes immediately when
the application sets it and not when the port is actually suspended
Workaround for this issue involves waiting for a minimum of 10ms to
allow the controller to go into SUSPEND state before proceeding ahead
Signed-off-by: Ramneek Mehresh
Signed-off-by: Nikhil Badola
---
drivers/usb/host/ehci-fsl.c | 3 +++
drivers/usb/host/ehci-hub.c | 2 ++
drivers/usb/host/ehci.h | 12
drivers/usb/host/fsl-mph-dr-of.c | 5 +
include/linux/fsl_devices.h | 1 +
5 files changed, 23 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 202dafb..8904aae 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -278,6 +278,9 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x8000 |
SNOOP_SIZE_2GB);
}
+ if (pdata->has_fsl_erratum_a005697 == 1)
+ ehci->has_fsl_susp_errata = 1;
+
if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
(pdata->operating_mode == FSL_USB2_DR_OTG))
if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index 22abb68..7eac923 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -303,6 +303,8 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
USB_PORT_STAT_HIGH_SPEED)
fs_idle_delay = true;
ehci_writel(ehci, t2, reg);
+ if (ehci_has_fsl_susp_errata(ehci))
+ usleep_range(1, 2);
changed = 1;
}
}
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index f700157..817eab5 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -215,6 +215,7 @@ struct ehci_hcd { /* one per controller */
/* SILICON QUIRKS */
unsignedno_selective_suspend:1;
unsignedhas_fsl_port_bug:1; /* FreeScale */
+ unsignedhas_fsl_susp_errata;/* Freescale SUSP quirk */
unsignedbig_endian_mmio:1;
unsignedbig_endian_desc:1;
unsignedbig_endian_capbase:1;
@@ -675,6 +676,17 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
#defineehci_port_speed(ehci, portsc) USB_PORT_STAT_HIGH_SPEED
#endif
+#if defined(CONFIG_PPC_85xx)
+/*
+ * Some Freescale processors have an erratum (USB A-005697) in which
+ * we need to wait for 10ms for bus to go into suspend mode after
+ * setting SUSP bit
+ */
+#define ehci_has_fsl_susp_errata(e) ((e)->has_fsl_susp_errata)
+#else
+#define ehci_has_fsl_susp_errata(e) (0)
+#endif
+
/*-*/
#ifdef CONFIG_PPC_83xx
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 9f73141..870b50a 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -222,6 +222,11 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device
*ofdev)
else
pdata->has_fsl_erratum_a007792 = 0;
+ if (of_get_property(np, "fsl,usb-erratum-a005697", NULL))
+ pdata->has_fsl_erratum_a005697 = 1;
+ else
+ pdata->has_fsl_erratum_a005697 = 0;
+
/*
* Determine whether phy_clk_valid needs to be checked
* by reading property in device tree
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index cebdbbb..42bf841 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -100,6 +100,7 @@ struct fsl_usb2_platform_data {
unsignedalready_suspended:1;
unsignedhas_fsl_erratum_a007792:1;
unsignedcheck_phy_clk_valid:1;
+ unsignedhas_fsl_erratum_a005697:1;
/* register save area for suspend/resume */
u32 pm_command;
--
2.1.0
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH] fsl/usb: Workaround for USB erratum-A005697
As per USB specification, in the Suspend state, the status bit does
not change until the port is suspended. However, there may be a delay
in suspending a port if there is a transaction currently in progress
on the bus.
In the USBDR controller, the PORTSCx[SUSP] bit changes immediately when
the application sets it and not when the port is actually suspended
Workaround for this issue involves waiting for a minimum of 10ms to
allow the controller to go into SUSPEND state before proceeding ahead
Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
drivers/usb/host/ehci-fsl.c | 3 +++
drivers/usb/host/ehci-hub.c | 2 ++
drivers/usb/host/ehci.h | 12
drivers/usb/host/fsl-mph-dr-of.c | 5 +
include/linux/fsl_devices.h | 1 +
5 files changed, 23 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 202dafb..8904aae 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -278,6 +278,9 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x8000 |
SNOOP_SIZE_2GB);
}
+ if (pdata-has_fsl_erratum_a005697 == 1)
+ ehci-has_fsl_susp_errata = 1;
+
if ((pdata-operating_mode == FSL_USB2_DR_HOST) ||
(pdata-operating_mode == FSL_USB2_DR_OTG))
if (ehci_fsl_setup_phy(hcd, pdata-phy_mode, 0))
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index 22abb68..7eac923 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -303,6 +303,8 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
USB_PORT_STAT_HIGH_SPEED)
fs_idle_delay = true;
ehci_writel(ehci, t2, reg);
+ if (ehci_has_fsl_susp_errata(ehci))
+ usleep_range(1, 2);
changed = 1;
}
}
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index f700157..817eab5 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -215,6 +215,7 @@ struct ehci_hcd { /* one per controller */
/* SILICON QUIRKS */
unsignedno_selective_suspend:1;
unsignedhas_fsl_port_bug:1; /* FreeScale */
+ unsignedhas_fsl_susp_errata;/* Freescale SUSP quirk */
unsignedbig_endian_mmio:1;
unsignedbig_endian_desc:1;
unsignedbig_endian_capbase:1;
@@ -675,6 +676,17 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
#defineehci_port_speed(ehci, portsc) USB_PORT_STAT_HIGH_SPEED
#endif
+#if defined(CONFIG_PPC_85xx)
+/*
+ * Some Freescale processors have an erratum (USB A-005697) in which
+ * we need to wait for 10ms for bus to go into suspend mode after
+ * setting SUSP bit
+ */
+#define ehci_has_fsl_susp_errata(e) ((e)-has_fsl_susp_errata)
+#else
+#define ehci_has_fsl_susp_errata(e) (0)
+#endif
+
/*-*/
#ifdef CONFIG_PPC_83xx
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 9f73141..870b50a 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -222,6 +222,11 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device
*ofdev)
else
pdata-has_fsl_erratum_a007792 = 0;
+ if (of_get_property(np, fsl,usb-erratum-a005697, NULL))
+ pdata-has_fsl_erratum_a005697 = 1;
+ else
+ pdata-has_fsl_erratum_a005697 = 0;
+
/*
* Determine whether phy_clk_valid needs to be checked
* by reading property in device tree
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index cebdbbb..42bf841 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -100,6 +100,7 @@ struct fsl_usb2_platform_data {
unsignedalready_suspended:1;
unsignedhas_fsl_erratum_a007792:1;
unsignedcheck_phy_clk_valid:1;
+ unsignedhas_fsl_erratum_a005697:1;
/* register save area for suspend/resume */
u32 pm_command;
--
2.1.0
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[PATCH 2/3] drivers: usb: dwc3: Add adjust_frame_length_quirk
Add adjust_frame_length_quirk for writing to fladj register
which adjusts (micro)frame length to value provided by
"snps,configure-fladj" property thus avoiding USB 2.0 devices
to time-out over a longer run
Signed-off-by: Nikhil Badola
---
drivers/usb/dwc3/core.c | 12
drivers/usb/dwc3/core.h | 7 +++
2 files changed, 19 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 5c110d8..72ba025 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -779,6 +779,7 @@ static int dwc3_probe(struct platform_device *pdev)
u8 lpm_nyet_threshold;
u8 tx_de_emphasis;
u8 hird_threshold;
+ u32 fladj_value;
int ret;
@@ -886,6 +887,12 @@ static int dwc3_probe(struct platform_device *pdev)
_de_emphasis);
of_property_read_string(node, "snps,hsphy_interface",
>hsphy_interface);
+ ret = of_property_read_u32(node, "snps,configure-fladj",
+ _value);
+ if (!ret)
+ dwc->adjust_frame_length_quirk = 1;
+ else
+ dwc->adjust_frame_length_quirk = 0;
} else if (pdata) {
dwc->maximum_speed = pdata->maximum_speed;
dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -957,6 +964,11 @@ static int dwc3_probe(struct platform_device *pdev)
goto err1;
}
+ /* Adjust Frame Length */
+ if (dwc->adjust_frame_length_quirk)
+ dwc3_writel(dwc->regs, DWC3_GFLADJ, GFLADJ_30MHZ_REG_SEL |
+ GFLADJ_30MHZ(fladj_value));
+
if (IS_ENABLED(CONFIG_USB_DWC3_HOST))
dwc->dr_mode = USB_DR_MODE_HOST;
else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET))
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 0447788..b7a5119 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -124,6 +124,7 @@
#define DWC3_GEVNTCOUNT(n) (0xc40c + (n * 0x10))
#define DWC3_GHWPARAMS80xc600
+#define DWC3_GFLADJ0xc630
/* Device Registers */
#define DWC3_DCFG 0xc700
@@ -234,6 +235,10 @@
/* Global HWPARAMS6 Register */
#define DWC3_GHWPARAMS6_EN_FPGA(1 << 7)
+/* Global Frame Length Adjustment Register */
+#define GFLADJ_30MHZ_REG_SEL (1 << 7)
+#define GFLADJ_30MHZ(n)((n) & 0x3f)
+
/* Device Configuration Register */
#define DWC3_DCFG_DEVADDR(addr)((addr) << 3)
#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f)
@@ -712,6 +717,7 @@ struct dwc3_scratchpad_array {
* @rx_detect_poll_quirk: set if we enable rx_detect to polling lfps quirk
* @dis_u3_susphy_quirk: set if we disable usb3 suspend phy
* @dis_u2_susphy_quirk: set if we disable usb2 suspend phy
+ * @adjust_frame_length_quirk: enables post-silicon frame length adjustment
* @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
* @tx_de_emphasis: Tx de-emphasis value
* 0 - -6dB de-emphasis
@@ -841,6 +847,7 @@ struct dwc3 {
unsignedrx_detect_poll_quirk:1;
unsigneddis_u3_susphy_quirk:1;
unsigneddis_u2_susphy_quirk:1;
+ unsignedadjust_frame_length_quirk:1;
unsignedtx_de_emphasis_quirk:1;
unsignedtx_de_emphasis:2;
--
2.1.0
--
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[PATCH 3/3] arm: dts: ls1021a: Add snps,configure-gfladj property to USB3 node
Add "snps,configure-gfladj" boolean property to USB3 node. This property is used to determine if frame length adjustment is required Signed-off-by: Nikhil Badola --- arch/arm/boot/dts/ls1021a.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index c70bb27..f03f842 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -404,6 +404,7 @@ reg = <0x0 0x310 0x0 0x1>; interrupts = ; dr_mode = "host"; + snps,configure-fladj = <0x20>; }; }; }; -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/3] Documentation: dt: dwc3: Add snps,configure-fladj property
Add property snps,configure-fladj for enabling post silicon frame length adjustment Signed-off-by: Nikhil Badola --- Documentation/devicetree/bindings/usb/dwc3.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 0815eac..90c3972 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -40,6 +40,7 @@ Optional properties: - snps,hird-threshold: HIRD threshold - snps,hsphy_interface: High-Speed PHY interface selection between "utmi" for UTMI+ and "ulpi" for ULPI when the DWC_USB3_HSPHY_INTERFACE has value 3. + - snps,configure-fladj: enables post-silicon frame length adjustment This is usually a subnode to DWC3 glue to which it is connected. -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 3/3] arm: dts: ls1021a: Add snps,configure-gfladj property to USB3 node
Add snps,configure-gfladj boolean property to USB3 node. This property is used to determine if frame length adjustment is required Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com --- arch/arm/boot/dts/ls1021a.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index c70bb27..f03f842 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -404,6 +404,7 @@ reg = 0x0 0x310 0x0 0x1; interrupts = GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH; dr_mode = host; + snps,configure-fladj = 0x20; }; }; }; -- 2.1.0 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/3] drivers: usb: dwc3: Add adjust_frame_length_quirk
Add adjust_frame_length_quirk for writing to fladj register
which adjusts (micro)frame length to value provided by
snps,configure-fladj property thus avoiding USB 2.0 devices
to time-out over a longer run
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
drivers/usb/dwc3/core.c | 12
drivers/usb/dwc3/core.h | 7 +++
2 files changed, 19 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 5c110d8..72ba025 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -779,6 +779,7 @@ static int dwc3_probe(struct platform_device *pdev)
u8 lpm_nyet_threshold;
u8 tx_de_emphasis;
u8 hird_threshold;
+ u32 fladj_value;
int ret;
@@ -886,6 +887,12 @@ static int dwc3_probe(struct platform_device *pdev)
tx_de_emphasis);
of_property_read_string(node, snps,hsphy_interface,
dwc-hsphy_interface);
+ ret = of_property_read_u32(node, snps,configure-fladj,
+ fladj_value);
+ if (!ret)
+ dwc-adjust_frame_length_quirk = 1;
+ else
+ dwc-adjust_frame_length_quirk = 0;
} else if (pdata) {
dwc-maximum_speed = pdata-maximum_speed;
dwc-has_lpm_erratum = pdata-has_lpm_erratum;
@@ -957,6 +964,11 @@ static int dwc3_probe(struct platform_device *pdev)
goto err1;
}
+ /* Adjust Frame Length */
+ if (dwc-adjust_frame_length_quirk)
+ dwc3_writel(dwc-regs, DWC3_GFLADJ, GFLADJ_30MHZ_REG_SEL |
+ GFLADJ_30MHZ(fladj_value));
+
if (IS_ENABLED(CONFIG_USB_DWC3_HOST))
dwc-dr_mode = USB_DR_MODE_HOST;
else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET))
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 0447788..b7a5119 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -124,6 +124,7 @@
#define DWC3_GEVNTCOUNT(n) (0xc40c + (n * 0x10))
#define DWC3_GHWPARAMS80xc600
+#define DWC3_GFLADJ0xc630
/* Device Registers */
#define DWC3_DCFG 0xc700
@@ -234,6 +235,10 @@
/* Global HWPARAMS6 Register */
#define DWC3_GHWPARAMS6_EN_FPGA(1 7)
+/* Global Frame Length Adjustment Register */
+#define GFLADJ_30MHZ_REG_SEL (1 7)
+#define GFLADJ_30MHZ(n)((n) 0x3f)
+
/* Device Configuration Register */
#define DWC3_DCFG_DEVADDR(addr)((addr) 3)
#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f)
@@ -712,6 +717,7 @@ struct dwc3_scratchpad_array {
* @rx_detect_poll_quirk: set if we enable rx_detect to polling lfps quirk
* @dis_u3_susphy_quirk: set if we disable usb3 suspend phy
* @dis_u2_susphy_quirk: set if we disable usb2 suspend phy
+ * @adjust_frame_length_quirk: enables post-silicon frame length adjustment
* @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
* @tx_de_emphasis: Tx de-emphasis value
* 0 - -6dB de-emphasis
@@ -841,6 +847,7 @@ struct dwc3 {
unsignedrx_detect_poll_quirk:1;
unsigneddis_u3_susphy_quirk:1;
unsigneddis_u2_susphy_quirk:1;
+ unsignedadjust_frame_length_quirk:1;
unsignedtx_de_emphasis_quirk:1;
unsignedtx_de_emphasis:2;
--
2.1.0
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/3] Documentation: dt: dwc3: Add snps,configure-fladj property
Add property snps,configure-fladj for enabling post silicon frame length adjustment Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com --- Documentation/devicetree/bindings/usb/dwc3.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 0815eac..90c3972 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -40,6 +40,7 @@ Optional properties: - snps,hird-threshold: HIRD threshold - snps,hsphy_interface: High-Speed PHY interface selection between utmi for UTMI+ and ulpi for ULPI when the DWC_USB3_HSPHY_INTERFACE has value 3. + - snps,configure-fladj: enables post-silicon frame length adjustment This is usually a subnode to DWC3 glue to which it is connected. -- 2.1.0 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/2] drivers: usb: fsl: Modify phy clk valid bit checking
Phy_clk_valid bit is checked only when the boolean
property phy-clk-valid in present in usb node device tree.
This property is added to the usb node via device tree fixup.
Signed-off-by: Nikhil Badola
---
Dependent on patchset : https://lkml.org/lkml/2015/6/15/177
and subsequent patches
drivers/usb/host/ehci-fsl.c | 16
drivers/usb/host/fsl-mph-dr-of.c | 9 +
include/linux/fsl_devices.h | 1 +
3 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index b04c9db..05ebe3d 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -230,14 +230,14 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
break;
}
- if (pdata->have_sysif_regs &&
- pdata->controller_ver > FSL_USB_VER_1_6 &&
- (phy_mode == FSL_USB2_PHY_ULPI)) {
- /* check PHY_CLK_VALID to get phy clk valid */
- if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
- PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0) ||
- in_be32(non_ehci + FSL_SOC_USB_PRICTRL))) {
- dev_warn(hcd->self.controller, "USB PHY clock
invalid\n");
+ /*
+* check PHY_CLK_VALID to determine phy clock presence before writing
+* to portsc
+*/
+ if (pdata->check_phy_clk_valid) {
+ if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID)) {
+ dev_warn(hcd->self.controller,
+"USB PHY clock invalid\n");
return -EINVAL;
}
}
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 631fc50..9f73141 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -222,6 +222,15 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device
*ofdev)
else
pdata->has_fsl_erratum_a007792 = 0;
+ /*
+* Determine whether phy_clk_valid needs to be checked
+* by reading property in device tree
+*/
+ if (of_get_property(np, "phy-clk-valid", NULL))
+ pdata->check_phy_clk_valid = 1;
+ else
+ pdata->check_phy_clk_valid = 0;
+
if (pdata->have_sysif_regs) {
if (pdata->controller_ver == FSL_USB_VER_NONE) {
dev_warn(>dev, "Could not get controller
version\n");
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 070d9ae..cebdbbb 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -99,6 +99,7 @@ struct fsl_usb2_platform_data {
unsignedsuspended:1;
unsignedalready_suspended:1;
unsignedhas_fsl_erratum_a007792:1;
+ unsignedcheck_phy_clk_valid:1;
/* register save area for suspend/resume */
u32 pm_command;
--
2.1.0
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[PATCH 2/2] drivers: usb: fsl: Define usb control register mask for w1c bits
Define and use CONTROL_REGISTER_W1C_MASK to make sure that
w1c bits of usb control register do not get reset while
writing any other bit
Signed-off-by: Nikhil Badola
---
drivers/usb/host/ehci-fsl.c | 25 -
drivers/usb/host/ehci-fsl.h | 1 +
2 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 05ebe3d..202dafb 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -127,14 +127,16 @@ static int fsl_ehci_drv_probe(struct platform_device
*pdev)
/* Enable USB controller, 83xx or 8536 */
if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6)
- setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
+ clrsetbits_be32(hcd->regs + FSL_SOC_USB_CTRL,
+ CONTROL_REGISTER_W1C_MASK, 0x4);
/*
* Enable UTMI phy and program PTS field in UTMI mode before asserting
* controller reset for USB Controller version 2.5
*/
if (pdata->has_fsl_erratum_a007792) {
- writel_be(CTRL_UTMI_PHY_EN, hcd->regs + FSL_SOC_USB_CTRL);
+ clrsetbits_be32(hcd->regs + FSL_SOC_USB_CTRL,
+ CONTROL_REGISTER_W1C_MASK, CTRL_UTMI_PHY_EN);
writel(PORT_PTS_UTMI, hcd->regs + FSL_SOC_USB_PORTSC1);
}
@@ -200,9 +202,11 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
case FSL_USB2_PHY_ULPI:
if (pdata->have_sysif_regs && pdata->controller_ver) {
/* controller version 1.6 or above */
- clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
- setbits32(non_ehci + FSL_SOC_USB_CTRL,
- ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN);
+ clrbits32(non_ehci + FSL_SOC_USB_CTRL,
+ CONTROL_REGISTER_W1C_MASK | UTMI_PHY_EN);
+ clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
+ CONTROL_REGISTER_W1C_MASK,
+ ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN);
}
portsc |= PORT_PTS_ULPI;
break;
@@ -216,14 +220,16 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
case FSL_USB2_PHY_UTMI_DUAL:
if (pdata->have_sysif_regs && pdata->controller_ver) {
/* controller version 1.6 or above */
- setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
+ clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
+ CONTROL_REGISTER_W1C_MASK, UTMI_PHY_EN);
mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to
become stable - 10ms*/
}
/* enable UTMI PHY */
if (pdata->have_sysif_regs)
- setbits32(non_ehci + FSL_SOC_USB_CTRL,
- CTRL_UTMI_PHY_EN);
+ clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
+ CONTROL_REGISTER_W1C_MASK,
+ CTRL_UTMI_PHY_EN);
portsc |= PORT_PTS_UTMI;
break;
case FSL_USB2_PHY_NONE:
@@ -245,7 +251,8 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
ehci_writel(ehci, portsc, >regs->port_status[port_offset]);
if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs)
- setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN);
+ clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
+ CONTROL_REGISTER_W1C_MASK, USB_CTRL_USB_EN);
return 0;
}
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
index dbd292e..1a8a60a 100644
--- a/drivers/usb/host/ehci-fsl.h
+++ b/drivers/usb/host/ehci-fsl.h
@@ -52,6 +52,7 @@
#define SNOOP_SIZE_2GB 0x1e
/* control Register Bit Masks */
+#define CONTROL_REGISTER_W1C_MASK 0x0002 /* W1C: PHY_CLK_VALID */
#define ULPI_INT_EN (1<<0)
#define WU_INT_EN (1<<1)
#define USB_CTRL_USB_EN (1<<2)
--
2.1.0
--
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[PATCH 2/2] drivers: usb: fsl: Define usb control register mask for w1c bits
Define and use CONTROL_REGISTER_W1C_MASK to make sure that
w1c bits of usb control register do not get reset while
writing any other bit
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
drivers/usb/host/ehci-fsl.c | 25 -
drivers/usb/host/ehci-fsl.h | 1 +
2 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 05ebe3d..202dafb 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -127,14 +127,16 @@ static int fsl_ehci_drv_probe(struct platform_device
*pdev)
/* Enable USB controller, 83xx or 8536 */
if (pdata-have_sysif_regs pdata-controller_ver FSL_USB_VER_1_6)
- setbits32(hcd-regs + FSL_SOC_USB_CTRL, 0x4);
+ clrsetbits_be32(hcd-regs + FSL_SOC_USB_CTRL,
+ CONTROL_REGISTER_W1C_MASK, 0x4);
/*
* Enable UTMI phy and program PTS field in UTMI mode before asserting
* controller reset for USB Controller version 2.5
*/
if (pdata-has_fsl_erratum_a007792) {
- writel_be(CTRL_UTMI_PHY_EN, hcd-regs + FSL_SOC_USB_CTRL);
+ clrsetbits_be32(hcd-regs + FSL_SOC_USB_CTRL,
+ CONTROL_REGISTER_W1C_MASK, CTRL_UTMI_PHY_EN);
writel(PORT_PTS_UTMI, hcd-regs + FSL_SOC_USB_PORTSC1);
}
@@ -200,9 +202,11 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
case FSL_USB2_PHY_ULPI:
if (pdata-have_sysif_regs pdata-controller_ver) {
/* controller version 1.6 or above */
- clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
- setbits32(non_ehci + FSL_SOC_USB_CTRL,
- ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN);
+ clrbits32(non_ehci + FSL_SOC_USB_CTRL,
+ CONTROL_REGISTER_W1C_MASK | UTMI_PHY_EN);
+ clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
+ CONTROL_REGISTER_W1C_MASK,
+ ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN);
}
portsc |= PORT_PTS_ULPI;
break;
@@ -216,14 +220,16 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
case FSL_USB2_PHY_UTMI_DUAL:
if (pdata-have_sysif_regs pdata-controller_ver) {
/* controller version 1.6 or above */
- setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
+ clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
+ CONTROL_REGISTER_W1C_MASK, UTMI_PHY_EN);
mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to
become stable - 10ms*/
}
/* enable UTMI PHY */
if (pdata-have_sysif_regs)
- setbits32(non_ehci + FSL_SOC_USB_CTRL,
- CTRL_UTMI_PHY_EN);
+ clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
+ CONTROL_REGISTER_W1C_MASK,
+ CTRL_UTMI_PHY_EN);
portsc |= PORT_PTS_UTMI;
break;
case FSL_USB2_PHY_NONE:
@@ -245,7 +251,8 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
ehci_writel(ehci, portsc, ehci-regs-port_status[port_offset]);
if (phy_mode != FSL_USB2_PHY_ULPI pdata-have_sysif_regs)
- setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN);
+ clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
+ CONTROL_REGISTER_W1C_MASK, USB_CTRL_USB_EN);
return 0;
}
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
index dbd292e..1a8a60a 100644
--- a/drivers/usb/host/ehci-fsl.h
+++ b/drivers/usb/host/ehci-fsl.h
@@ -52,6 +52,7 @@
#define SNOOP_SIZE_2GB 0x1e
/* control Register Bit Masks */
+#define CONTROL_REGISTER_W1C_MASK 0x0002 /* W1C: PHY_CLK_VALID */
#define ULPI_INT_EN (10)
#define WU_INT_EN (11)
#define USB_CTRL_USB_EN (12)
--
2.1.0
--
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[PATCH 1/2] drivers: usb: fsl: Modify phy clk valid bit checking
Phy_clk_valid bit is checked only when the boolean
property phy-clk-valid in present in usb node device tree.
This property is added to the usb node via device tree fixup.
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
Dependent on patchset : https://lkml.org/lkml/2015/6/15/177
and subsequent patches
drivers/usb/host/ehci-fsl.c | 16
drivers/usb/host/fsl-mph-dr-of.c | 9 +
include/linux/fsl_devices.h | 1 +
3 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index b04c9db..05ebe3d 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -230,14 +230,14 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
break;
}
- if (pdata-have_sysif_regs
- pdata-controller_ver FSL_USB_VER_1_6
- (phy_mode == FSL_USB2_PHY_ULPI)) {
- /* check PHY_CLK_VALID to get phy clk valid */
- if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL)
- PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0) ||
- in_be32(non_ehci + FSL_SOC_USB_PRICTRL))) {
- dev_warn(hcd-self.controller, USB PHY clock
invalid\n);
+ /*
+* check PHY_CLK_VALID to determine phy clock presence before writing
+* to portsc
+*/
+ if (pdata-check_phy_clk_valid) {
+ if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) PHY_CLK_VALID)) {
+ dev_warn(hcd-self.controller,
+USB PHY clock invalid\n);
return -EINVAL;
}
}
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 631fc50..9f73141 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -222,6 +222,15 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device
*ofdev)
else
pdata-has_fsl_erratum_a007792 = 0;
+ /*
+* Determine whether phy_clk_valid needs to be checked
+* by reading property in device tree
+*/
+ if (of_get_property(np, phy-clk-valid, NULL))
+ pdata-check_phy_clk_valid = 1;
+ else
+ pdata-check_phy_clk_valid = 0;
+
if (pdata-have_sysif_regs) {
if (pdata-controller_ver == FSL_USB_VER_NONE) {
dev_warn(ofdev-dev, Could not get controller
version\n);
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 070d9ae..cebdbbb 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -99,6 +99,7 @@ struct fsl_usb2_platform_data {
unsignedsuspended:1;
unsignedalready_suspended:1;
unsignedhas_fsl_erratum_a007792:1;
+ unsignedcheck_phy_clk_valid:1;
/* register save area for suspend/resume */
u32 pm_command;
--
2.1.0
--
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[PATCH 3/3][v2] drivers:usb:fsl: Introduce FSL_USB2_PHY_UTMI_DUAL macro
Introduce FSL_USB2_PHY_UTMI_DUAL macro for setting phy mode
in SOCs such has T4240, T1040, T2080 which have utmi dual-phy
Signed-off-by: Ramneek Mehresh
Signed-off-by: Nikhil Badola
---
Changes for v2 : None
drivers/usb/host/ehci-fsl.c | 1 +
drivers/usb/host/fsl-mph-dr-of.c | 2 ++
include/linux/fsl_devices.h | 1 +
3 files changed, 4 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 716aa8b..b04c9db 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -213,6 +213,7 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
portsc |= PORT_PTS_PTW;
/* fall through */
case FSL_USB2_PHY_UTMI:
+ case FSL_USB2_PHY_UTMI_DUAL:
if (pdata->have_sysif_regs && pdata->controller_ver) {
/* controller version 1.6 or above */
setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 17e1e6b..631fc50 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -69,6 +69,8 @@ static enum fsl_usb2_phy_modes determine_usb_phy(const char
*phy_type)
return FSL_USB2_PHY_UTMI;
if (!strcasecmp(phy_type, "utmi_wide"))
return FSL_USB2_PHY_UTMI_WIDE;
+ if (!strcasecmp(phy_type, "utmi_dual"))
+ return FSL_USB2_PHY_UTMI_DUAL;
if (!strcasecmp(phy_type, "serial"))
return FSL_USB2_PHY_SERIAL;
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index bdb40f6..070d9ae 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -69,6 +69,7 @@ enum fsl_usb2_phy_modes {
FSL_USB2_PHY_UTMI,
FSL_USB2_PHY_UTMI_WIDE,
FSL_USB2_PHY_SERIAL,
+ FSL_USB2_PHY_UTMI_DUAL,
};
struct clk;
--
1.7.11.7
--
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[PATCH 2/3][v2] drivers: usb :fsl: Implement Workaround for USB Erratum A007792
USB controller version-2.5 requires to enable internal UTMI
phy and program PTS field in PORTSC register before asserting
controller reset. This is must for successful resetting of the
controller and subsequent enumeration of usb devices
Signed-off-by: Nikhil Badola
Signed-off-by: Suresh Gupta
---
Changes for v2 : None
drivers/usb/host/ehci-fsl.c | 9 +
drivers/usb/host/fsl-mph-dr-of.c | 6 ++
include/linux/fsl_devices.h | 1 +
3 files changed, 16 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 5352e74..716aa8b 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -129,6 +129,15 @@ static int fsl_ehci_drv_probe(struct platform_device *pdev)
if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6)
setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
+ /*
+* Enable UTMI phy and program PTS field in UTMI mode before asserting
+* controller reset for USB Controller version 2.5
+*/
+ if (pdata->has_fsl_erratum_a007792) {
+ writel_be(CTRL_UTMI_PHY_EN, hcd->regs + FSL_SOC_USB_CTRL);
+ writel(PORT_PTS_UTMI, hcd->regs + FSL_SOC_USB_PORTSC1);
+ }
+
/* Don't need to set host mode here. It will be done by tdi_reset() */
retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 2195956..17e1e6b 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -214,6 +214,12 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device
*ofdev)
pdata->phy_mode = determine_usb_phy(prop);
pdata->controller_ver = usb_get_ver_info(np);
+ /* Activate Erratum by reading property in device tree */
+ if (of_get_property(np, "fsl,usb-erratum-a007792", NULL))
+ pdata->has_fsl_erratum_a007792 = 1;
+ else
+ pdata->has_fsl_erratum_a007792 = 0;
+
if (pdata->have_sysif_regs) {
if (pdata->controller_ver == FSL_USB_VER_NONE) {
dev_warn(>dev, "Could not get controller
version\n");
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 0d4855cd..bdb40f6 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -97,6 +97,7 @@ struct fsl_usb2_platform_data {
unsignedsuspended:1;
unsignedalready_suspended:1;
+ unsignedhas_fsl_erratum_a007792:1;
/* register save area for suspend/resume */
u32 pm_command;
--
1.7.11.7
--
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[PATCH 1/3][v2] drivers:usb:fsl: Replace macros with enumerated type
Replace macros with enumerated type to represent usb ip
controller version
Signed-off-by: Nikhil Badola
---
Changes for v2 :
- Assigned value to each enumerator
- Changed return type of function that returns
controller version
- Introduced FSL_USB_VER_NONE for invalid controller version
drivers/usb/host/fsl-mph-dr-of.c | 8
include/linux/fsl_devices.h | 16 ++--
2 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 5e0d600..2195956 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -119,9 +119,9 @@ error:
static const struct of_device_id fsl_usb2_mph_dr_of_match[];
-static int usb_get_ver_info(struct device_node *np)
+static enum fsl_usb2_controller_ver usb_get_ver_info(struct device_node *np)
{
- int ver = -1;
+ enum fsl_usb2_controller_ver ver = FSL_USB_VER_NONE;
/*
* returns 1 for usb controller version 1.6
@@ -142,7 +142,7 @@ static int usb_get_ver_info(struct device_node *np)
else /* for previous controller versions */
ver = FSL_USB_VER_OLD;
- if (ver > -1)
+ if (ver > FSL_USB_VER_NONE)
return ver;
}
@@ -215,7 +215,7 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device
*ofdev)
pdata->controller_ver = usb_get_ver_info(np);
if (pdata->have_sysif_regs) {
- if (pdata->controller_ver < 0) {
+ if (pdata->controller_ver == FSL_USB_VER_NONE) {
dev_warn(>dev, "Could not get controller
version\n");
return -ENODEV;
}
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 2a2f56b..0d4855cd 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -20,11 +20,6 @@
#define FSL_UTMI_PHY_DLY 10 /*As per P1010RM, delay for UTMI
PHY CLK to become stable - 10ms*/
#define FSL_USB_PHY_CLK_TIMEOUT1 /* uSec */
-#define FSL_USB_VER_OLD0
-#define FSL_USB_VER_1_61
-#define FSL_USB_VER_2_22
-#define FSL_USB_VER_2_43
-#define FSL_USB_VER_2_54
#include
@@ -52,6 +47,15 @@
*
*/
+enum fsl_usb2_controller_ver {
+ FSL_USB_VER_NONE = -1,
+ FSL_USB_VER_OLD = 0,
+ FSL_USB_VER_1_6 = 1,
+ FSL_USB_VER_2_2 = 2,
+ FSL_USB_VER_2_4 = 3,
+ FSL_USB_VER_2_5 = 4,
+};
+
enum fsl_usb2_operating_modes {
FSL_USB2_MPH_HOST,
FSL_USB2_DR_HOST,
@@ -72,7 +76,7 @@ struct platform_device;
struct fsl_usb2_platform_data {
/* board specific information */
- int controller_ver;
+ enum fsl_usb2_controller_vercontroller_ver;
enum fsl_usb2_operating_modes operating_mode;
enum fsl_usb2_phy_modes phy_mode;
unsigned intport_enables;
--
1.7.11.7
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/3][v2] drivers: usb :fsl: Implement Workaround for USB Erratum A007792
USB controller version-2.5 requires to enable internal UTMI
phy and program PTS field in PORTSC register before asserting
controller reset. This is must for successful resetting of the
controller and subsequent enumeration of usb devices
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
Signed-off-by: Suresh Gupta suresh.gu...@freescale.com
---
Changes for v2 : None
drivers/usb/host/ehci-fsl.c | 9 +
drivers/usb/host/fsl-mph-dr-of.c | 6 ++
include/linux/fsl_devices.h | 1 +
3 files changed, 16 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 5352e74..716aa8b 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -129,6 +129,15 @@ static int fsl_ehci_drv_probe(struct platform_device *pdev)
if (pdata-have_sysif_regs pdata-controller_ver FSL_USB_VER_1_6)
setbits32(hcd-regs + FSL_SOC_USB_CTRL, 0x4);
+ /*
+* Enable UTMI phy and program PTS field in UTMI mode before asserting
+* controller reset for USB Controller version 2.5
+*/
+ if (pdata-has_fsl_erratum_a007792) {
+ writel_be(CTRL_UTMI_PHY_EN, hcd-regs + FSL_SOC_USB_CTRL);
+ writel(PORT_PTS_UTMI, hcd-regs + FSL_SOC_USB_PORTSC1);
+ }
+
/* Don't need to set host mode here. It will be done by tdi_reset() */
retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 2195956..17e1e6b 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -214,6 +214,12 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device
*ofdev)
pdata-phy_mode = determine_usb_phy(prop);
pdata-controller_ver = usb_get_ver_info(np);
+ /* Activate Erratum by reading property in device tree */
+ if (of_get_property(np, fsl,usb-erratum-a007792, NULL))
+ pdata-has_fsl_erratum_a007792 = 1;
+ else
+ pdata-has_fsl_erratum_a007792 = 0;
+
if (pdata-have_sysif_regs) {
if (pdata-controller_ver == FSL_USB_VER_NONE) {
dev_warn(ofdev-dev, Could not get controller
version\n);
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 0d4855cd..bdb40f6 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -97,6 +97,7 @@ struct fsl_usb2_platform_data {
unsignedsuspended:1;
unsignedalready_suspended:1;
+ unsignedhas_fsl_erratum_a007792:1;
/* register save area for suspend/resume */
u32 pm_command;
--
1.7.11.7
--
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[PATCH 3/3][v2] drivers:usb:fsl: Introduce FSL_USB2_PHY_UTMI_DUAL macro
Introduce FSL_USB2_PHY_UTMI_DUAL macro for setting phy mode
in SOCs such has T4240, T1040, T2080 which have utmi dual-phy
Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
Changes for v2 : None
drivers/usb/host/ehci-fsl.c | 1 +
drivers/usb/host/fsl-mph-dr-of.c | 2 ++
include/linux/fsl_devices.h | 1 +
3 files changed, 4 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 716aa8b..b04c9db 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -213,6 +213,7 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
portsc |= PORT_PTS_PTW;
/* fall through */
case FSL_USB2_PHY_UTMI:
+ case FSL_USB2_PHY_UTMI_DUAL:
if (pdata-have_sysif_regs pdata-controller_ver) {
/* controller version 1.6 or above */
setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 17e1e6b..631fc50 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -69,6 +69,8 @@ static enum fsl_usb2_phy_modes determine_usb_phy(const char
*phy_type)
return FSL_USB2_PHY_UTMI;
if (!strcasecmp(phy_type, utmi_wide))
return FSL_USB2_PHY_UTMI_WIDE;
+ if (!strcasecmp(phy_type, utmi_dual))
+ return FSL_USB2_PHY_UTMI_DUAL;
if (!strcasecmp(phy_type, serial))
return FSL_USB2_PHY_SERIAL;
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index bdb40f6..070d9ae 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -69,6 +69,7 @@ enum fsl_usb2_phy_modes {
FSL_USB2_PHY_UTMI,
FSL_USB2_PHY_UTMI_WIDE,
FSL_USB2_PHY_SERIAL,
+ FSL_USB2_PHY_UTMI_DUAL,
};
struct clk;
--
1.7.11.7
--
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[PATCH 1/3][v2] drivers:usb:fsl: Replace macros with enumerated type
Replace macros with enumerated type to represent usb ip
controller version
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
Changes for v2 :
- Assigned value to each enumerator
- Changed return type of function that returns
controller version
- Introduced FSL_USB_VER_NONE for invalid controller version
drivers/usb/host/fsl-mph-dr-of.c | 8
include/linux/fsl_devices.h | 16 ++--
2 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 5e0d600..2195956 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -119,9 +119,9 @@ error:
static const struct of_device_id fsl_usb2_mph_dr_of_match[];
-static int usb_get_ver_info(struct device_node *np)
+static enum fsl_usb2_controller_ver usb_get_ver_info(struct device_node *np)
{
- int ver = -1;
+ enum fsl_usb2_controller_ver ver = FSL_USB_VER_NONE;
/*
* returns 1 for usb controller version 1.6
@@ -142,7 +142,7 @@ static int usb_get_ver_info(struct device_node *np)
else /* for previous controller versions */
ver = FSL_USB_VER_OLD;
- if (ver -1)
+ if (ver FSL_USB_VER_NONE)
return ver;
}
@@ -215,7 +215,7 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device
*ofdev)
pdata-controller_ver = usb_get_ver_info(np);
if (pdata-have_sysif_regs) {
- if (pdata-controller_ver 0) {
+ if (pdata-controller_ver == FSL_USB_VER_NONE) {
dev_warn(ofdev-dev, Could not get controller
version\n);
return -ENODEV;
}
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 2a2f56b..0d4855cd 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -20,11 +20,6 @@
#define FSL_UTMI_PHY_DLY 10 /*As per P1010RM, delay for UTMI
PHY CLK to become stable - 10ms*/
#define FSL_USB_PHY_CLK_TIMEOUT1 /* uSec */
-#define FSL_USB_VER_OLD0
-#define FSL_USB_VER_1_61
-#define FSL_USB_VER_2_22
-#define FSL_USB_VER_2_43
-#define FSL_USB_VER_2_54
#include linux/types.h
@@ -52,6 +47,15 @@
*
*/
+enum fsl_usb2_controller_ver {
+ FSL_USB_VER_NONE = -1,
+ FSL_USB_VER_OLD = 0,
+ FSL_USB_VER_1_6 = 1,
+ FSL_USB_VER_2_2 = 2,
+ FSL_USB_VER_2_4 = 3,
+ FSL_USB_VER_2_5 = 4,
+};
+
enum fsl_usb2_operating_modes {
FSL_USB2_MPH_HOST,
FSL_USB2_DR_HOST,
@@ -72,7 +76,7 @@ struct platform_device;
struct fsl_usb2_platform_data {
/* board specific information */
- int controller_ver;
+ enum fsl_usb2_controller_vercontroller_ver;
enum fsl_usb2_operating_modes operating_mode;
enum fsl_usb2_phy_modes phy_mode;
unsigned intport_enables;
--
1.7.11.7
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[PATCH 3/5] drivers:usb:fsl: Replace macros with enumerated type
Replace macros with enumerated type to represent usb ip
controller version
Signed-off-by: Nikhil Badola
---
include/linux/fsl_devices.h | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 2a2f56b..6447b7b 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -20,11 +20,6 @@
#define FSL_UTMI_PHY_DLY 10 /*As per P1010RM, delay for UTMI
PHY CLK to become stable - 10ms*/
#define FSL_USB_PHY_CLK_TIMEOUT1 /* uSec */
-#define FSL_USB_VER_OLD0
-#define FSL_USB_VER_1_61
-#define FSL_USB_VER_2_22
-#define FSL_USB_VER_2_43
-#define FSL_USB_VER_2_54
#include
@@ -52,6 +47,14 @@
*
*/
+enum fsl_usb2_controller_ver {
+ FSL_USB_VER_OLD = 0,
+ FSL_USB_VER_1_6,
+ FSL_USB_VER_2_2,
+ FSL_USB_VER_2_4,
+ FSL_USB_VER_2_5,
+};
+
enum fsl_usb2_operating_modes {
FSL_USB2_MPH_HOST,
FSL_USB2_DR_HOST,
--
2.1.0
--
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[PATCH 4/5] drivers:usb:fsl: Implement Workaround for USB Erratum A007792
USB controller version-2.5 requires to enable internal UTMI
phy and program PTS field in PORTSC register before asserting
controller reset. This is must for successful resetting of the
controller and subsequent enumeration of usb devices
Signed-off-by: Nikhil Badola
Signed-off-by: Suresh Gupta
---
drivers/usb/host/ehci-fsl.c | 9 +
drivers/usb/host/fsl-mph-dr-of.c | 6 ++
include/linux/fsl_devices.h | 1 +
3 files changed, 16 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index ab4eee3..e77a379 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -119,6 +119,15 @@ static int usb_hcd_fsl_probe(const struct hc_driver
*driver,
if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6)
setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
+ /*
+* Enable UTMI phy and program PTS field in UTMI mode before asserting
+* controller reset for USB Controller version 2.5
+*/
+if (pdata->has_fsl_erratum_a007792) {
+writel_be(CTRL_UTMI_PHY_EN, hcd->regs + FSL_SOC_USB_CTRL);
+writel(PORT_PTS_UTMI, hcd->regs + FSL_SOC_USB_PORTSC1);
+}
+
/* Don't need to set host mode here. It will be done by tdi_reset() */
retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 5e0d600..5e21947 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -214,6 +214,12 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device
*ofdev)
pdata->phy_mode = determine_usb_phy(prop);
pdata->controller_ver = usb_get_ver_info(np);
+ /* Activate Erratum by reading property in device tree */
+ if (of_get_property(np, "fsl,usb-erratum-a007792", NULL))
+pdata->has_fsl_erratum_a007792 = 1;
+else
+pdata->has_fsl_erratum_a007792 = 0;
+
if (pdata->have_sysif_regs) {
if (pdata->controller_ver < 0) {
dev_warn(>dev, "Could not get controller
version\n");
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 6447b7b..63f266d 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -96,6 +96,7 @@ struct fsl_usb2_platform_data {
unsignedsuspended:1;
unsignedalready_suspended:1;
+ unsignedhas_fsl_erratum_a007792:1;
/* register save area for suspend/resume */
u32 pm_command;
--
2.1.0
--
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[PATCH 5/5] drivers:usb:fsl: Introduce FSL_USB2_PHY_UTMI_DUAL macro
Introduce FSL_USB2_PHY_UTMI_DUAL macro for setting phy mode
in SOCs such has T4240, T1040, T2080 which have utmi dual-phy
Signed-off-by: Ramneek Mehresh
Signed-off-by: Nikhil Badola
---
drivers/usb/host/ehci-fsl.c | 1 +
drivers/usb/host/fsl-mph-dr-of.c | 2 ++
include/linux/fsl_devices.h | 1 +
3 files changed, 4 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index e77a379..b6651b2 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -235,6 +235,7 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
portsc |= PORT_PTS_PTW;
/* fall through */
case FSL_USB2_PHY_UTMI:
+ case FSL_USB2_PHY_UTMI_DUAL:
if (pdata->have_sysif_regs && pdata->controller_ver) {
/* controller version 1.6 or above */
setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 5e21947..348f300 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -69,6 +69,8 @@ static enum fsl_usb2_phy_modes determine_usb_phy(const char
*phy_type)
return FSL_USB2_PHY_UTMI;
if (!strcasecmp(phy_type, "utmi_wide"))
return FSL_USB2_PHY_UTMI_WIDE;
+ if (!strcasecmp(phy_type, "utmi_dual"))
+ return FSL_USB2_PHY_UTMI_DUAL;
if (!strcasecmp(phy_type, "serial"))
return FSL_USB2_PHY_SERIAL;
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 63f266d..31639c7e 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -68,6 +68,7 @@ enum fsl_usb2_phy_modes {
FSL_USB2_PHY_UTMI,
FSL_USB2_PHY_UTMI_WIDE,
FSL_USB2_PHY_SERIAL,
+ FSL_USB2_PHY_UTMI_DUAL,
};
struct clk;
--
2.1.0
--
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[PATCH 1/5] drivers:usb:fsl: Check IP version 2.4 for mph USB controller
Check IP version 2.4 for multi port host USB controller and
return FSL_USB_VER_2_4 macro
Signed-off-by: Nikhil Badola
---
Separate patches clubbed and resent in an ordered patchset
with proper mailing list in cc
drivers/usb/host/fsl-mph-dr-of.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 7e325e9..e588ccd 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -126,6 +126,7 @@ static int usb_get_ver_info(struct device_node *np)
/*
* returns 1 for usb controller version 1.6
* returns 2 for usb controller version 2.2
+* returns 3 for usb controller version 2.4
* returns 0 otherwise
*/
if (of_device_is_compatible(np, "fsl-usb2-dr")) {
@@ -150,6 +151,8 @@ static int usb_get_ver_info(struct device_node *np)
ver = FSL_USB_VER_1_6;
else if (of_device_is_compatible(np, "fsl-usb2-mph-v2.2"))
ver = FSL_USB_VER_2_2;
+ else if (of_device_is_compatible(np, "fsl-usb2-mph-v2.4"))
+ ver = FSL_USB_VER_2_4;
else /* for previous controller versions */
ver = FSL_USB_VER_OLD;
}
--
2.1.0
--
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[PATCH 2/5] drivers:usb:fsl: Add support for USB controller version-2.5
Add support for USB controller version-2.5 used in
T4240 rev2.0, T1024, T1040, T2080, LS1021A
Signed-off-by: Nikhil Badola
---
drivers/usb/host/fsl-mph-dr-of.c | 5 +
include/linux/fsl_devices.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index e588ccd..5e0d600 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -127,6 +127,7 @@ static int usb_get_ver_info(struct device_node *np)
* returns 1 for usb controller version 1.6
* returns 2 for usb controller version 2.2
* returns 3 for usb controller version 2.4
+* returns 4 for usb controller version 2.5
* returns 0 otherwise
*/
if (of_device_is_compatible(np, "fsl-usb2-dr")) {
@@ -136,6 +137,8 @@ static int usb_get_ver_info(struct device_node *np)
ver = FSL_USB_VER_2_2;
else if (of_device_is_compatible(np, "fsl-usb2-dr-v2.4"))
ver = FSL_USB_VER_2_4;
+ else if (of_device_is_compatible(np, "fsl-usb2-dr-v2.5"))
+ ver = FSL_USB_VER_2_5;
else /* for previous controller versions */
ver = FSL_USB_VER_OLD;
@@ -153,6 +156,8 @@ static int usb_get_ver_info(struct device_node *np)
ver = FSL_USB_VER_2_2;
else if (of_device_is_compatible(np, "fsl-usb2-mph-v2.4"))
ver = FSL_USB_VER_2_4;
+ else if (of_device_is_compatible(np, "fsl-usb2-mph-v2.5"))
+ ver = FSL_USB_VER_2_5;
else /* for previous controller versions */
ver = FSL_USB_VER_OLD;
}
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index a82296a..2a2f56b 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -24,6 +24,7 @@
#define FSL_USB_VER_1_61
#define FSL_USB_VER_2_22
#define FSL_USB_VER_2_43
+#define FSL_USB_VER_2_54
#include
--
2.1.0
--
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[PATCH 3/5] drivers:usb:fsl: Replace macros with enumerated type
Replace macros with enumerated type to represent usb ip
controller version
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
include/linux/fsl_devices.h | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 2a2f56b..6447b7b 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -20,11 +20,6 @@
#define FSL_UTMI_PHY_DLY 10 /*As per P1010RM, delay for UTMI
PHY CLK to become stable - 10ms*/
#define FSL_USB_PHY_CLK_TIMEOUT1 /* uSec */
-#define FSL_USB_VER_OLD0
-#define FSL_USB_VER_1_61
-#define FSL_USB_VER_2_22
-#define FSL_USB_VER_2_43
-#define FSL_USB_VER_2_54
#include linux/types.h
@@ -52,6 +47,14 @@
*
*/
+enum fsl_usb2_controller_ver {
+ FSL_USB_VER_OLD = 0,
+ FSL_USB_VER_1_6,
+ FSL_USB_VER_2_2,
+ FSL_USB_VER_2_4,
+ FSL_USB_VER_2_5,
+};
+
enum fsl_usb2_operating_modes {
FSL_USB2_MPH_HOST,
FSL_USB2_DR_HOST,
--
2.1.0
--
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[PATCH 4/5] drivers:usb:fsl: Implement Workaround for USB Erratum A007792
USB controller version-2.5 requires to enable internal UTMI
phy and program PTS field in PORTSC register before asserting
controller reset. This is must for successful resetting of the
controller and subsequent enumeration of usb devices
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
Signed-off-by: Suresh Gupta suresh.gu...@freescale.com
---
drivers/usb/host/ehci-fsl.c | 9 +
drivers/usb/host/fsl-mph-dr-of.c | 6 ++
include/linux/fsl_devices.h | 1 +
3 files changed, 16 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index ab4eee3..e77a379 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -119,6 +119,15 @@ static int usb_hcd_fsl_probe(const struct hc_driver
*driver,
if (pdata-have_sysif_regs pdata-controller_ver FSL_USB_VER_1_6)
setbits32(hcd-regs + FSL_SOC_USB_CTRL, 0x4);
+ /*
+* Enable UTMI phy and program PTS field in UTMI mode before asserting
+* controller reset for USB Controller version 2.5
+*/
+if (pdata-has_fsl_erratum_a007792) {
+writel_be(CTRL_UTMI_PHY_EN, hcd-regs + FSL_SOC_USB_CTRL);
+writel(PORT_PTS_UTMI, hcd-regs + FSL_SOC_USB_PORTSC1);
+}
+
/* Don't need to set host mode here. It will be done by tdi_reset() */
retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 5e0d600..5e21947 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -214,6 +214,12 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device
*ofdev)
pdata-phy_mode = determine_usb_phy(prop);
pdata-controller_ver = usb_get_ver_info(np);
+ /* Activate Erratum by reading property in device tree */
+ if (of_get_property(np, fsl,usb-erratum-a007792, NULL))
+pdata-has_fsl_erratum_a007792 = 1;
+else
+pdata-has_fsl_erratum_a007792 = 0;
+
if (pdata-have_sysif_regs) {
if (pdata-controller_ver 0) {
dev_warn(ofdev-dev, Could not get controller
version\n);
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 6447b7b..63f266d 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -96,6 +96,7 @@ struct fsl_usb2_platform_data {
unsignedsuspended:1;
unsignedalready_suspended:1;
+ unsignedhas_fsl_erratum_a007792:1;
/* register save area for suspend/resume */
u32 pm_command;
--
2.1.0
--
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[PATCH 5/5] drivers:usb:fsl: Introduce FSL_USB2_PHY_UTMI_DUAL macro
Introduce FSL_USB2_PHY_UTMI_DUAL macro for setting phy mode
in SOCs such has T4240, T1040, T2080 which have utmi dual-phy
Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
drivers/usb/host/ehci-fsl.c | 1 +
drivers/usb/host/fsl-mph-dr-of.c | 2 ++
include/linux/fsl_devices.h | 1 +
3 files changed, 4 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index e77a379..b6651b2 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -235,6 +235,7 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
portsc |= PORT_PTS_PTW;
/* fall through */
case FSL_USB2_PHY_UTMI:
+ case FSL_USB2_PHY_UTMI_DUAL:
if (pdata-have_sysif_regs pdata-controller_ver) {
/* controller version 1.6 or above */
setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 5e21947..348f300 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -69,6 +69,8 @@ static enum fsl_usb2_phy_modes determine_usb_phy(const char
*phy_type)
return FSL_USB2_PHY_UTMI;
if (!strcasecmp(phy_type, utmi_wide))
return FSL_USB2_PHY_UTMI_WIDE;
+ if (!strcasecmp(phy_type, utmi_dual))
+ return FSL_USB2_PHY_UTMI_DUAL;
if (!strcasecmp(phy_type, serial))
return FSL_USB2_PHY_SERIAL;
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 63f266d..31639c7e 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -68,6 +68,7 @@ enum fsl_usb2_phy_modes {
FSL_USB2_PHY_UTMI,
FSL_USB2_PHY_UTMI_WIDE,
FSL_USB2_PHY_SERIAL,
+ FSL_USB2_PHY_UTMI_DUAL,
};
struct clk;
--
2.1.0
--
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[PATCH 1/5] drivers:usb:fsl: Check IP version 2.4 for mph USB controller
Check IP version 2.4 for multi port host USB controller and
return FSL_USB_VER_2_4 macro
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
Separate patches clubbed and resent in an ordered patchset
with proper mailing list in cc
drivers/usb/host/fsl-mph-dr-of.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 7e325e9..e588ccd 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -126,6 +126,7 @@ static int usb_get_ver_info(struct device_node *np)
/*
* returns 1 for usb controller version 1.6
* returns 2 for usb controller version 2.2
+* returns 3 for usb controller version 2.4
* returns 0 otherwise
*/
if (of_device_is_compatible(np, fsl-usb2-dr)) {
@@ -150,6 +151,8 @@ static int usb_get_ver_info(struct device_node *np)
ver = FSL_USB_VER_1_6;
else if (of_device_is_compatible(np, fsl-usb2-mph-v2.2))
ver = FSL_USB_VER_2_2;
+ else if (of_device_is_compatible(np, fsl-usb2-mph-v2.4))
+ ver = FSL_USB_VER_2_4;
else /* for previous controller versions */
ver = FSL_USB_VER_OLD;
}
--
2.1.0
--
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[PATCH 2/5] drivers:usb:fsl: Add support for USB controller version-2.5
Add support for USB controller version-2.5 used in
T4240 rev2.0, T1024, T1040, T2080, LS1021A
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
drivers/usb/host/fsl-mph-dr-of.c | 5 +
include/linux/fsl_devices.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index e588ccd..5e0d600 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -127,6 +127,7 @@ static int usb_get_ver_info(struct device_node *np)
* returns 1 for usb controller version 1.6
* returns 2 for usb controller version 2.2
* returns 3 for usb controller version 2.4
+* returns 4 for usb controller version 2.5
* returns 0 otherwise
*/
if (of_device_is_compatible(np, fsl-usb2-dr)) {
@@ -136,6 +137,8 @@ static int usb_get_ver_info(struct device_node *np)
ver = FSL_USB_VER_2_2;
else if (of_device_is_compatible(np, fsl-usb2-dr-v2.4))
ver = FSL_USB_VER_2_4;
+ else if (of_device_is_compatible(np, fsl-usb2-dr-v2.5))
+ ver = FSL_USB_VER_2_5;
else /* for previous controller versions */
ver = FSL_USB_VER_OLD;
@@ -153,6 +156,8 @@ static int usb_get_ver_info(struct device_node *np)
ver = FSL_USB_VER_2_2;
else if (of_device_is_compatible(np, fsl-usb2-mph-v2.4))
ver = FSL_USB_VER_2_4;
+ else if (of_device_is_compatible(np, fsl-usb2-mph-v2.5))
+ ver = FSL_USB_VER_2_5;
else /* for previous controller versions */
ver = FSL_USB_VER_OLD;
}
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index a82296a..2a2f56b 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -24,6 +24,7 @@
#define FSL_USB_VER_1_61
#define FSL_USB_VER_2_22
#define FSL_USB_VER_2_43
+#define FSL_USB_VER_2_54
#include linux/types.h
--
2.1.0
--
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[PATCH] drivers:usb:fsl: Introduce FSL_USB2_PHY_UTMI_DUAL macro
Introduce FSL_USB2_PHY_UTMI_DUAL macro for setting phy mode
in SOCs such has T4240, T1040, T2080 which have utmi dual-phy
Signed-off-by: Ramneek Mehresh
Signed-off-by: Nikhil Badola
---
drivers/usb/host/ehci-fsl.c | 1 +
drivers/usb/host/fsl-mph-dr-of.c | 2 ++
include/linux/fsl_devices.h | 1 +
3 files changed, 4 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index ab4eee3..1f0e4e0 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -226,6 +226,7 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
portsc |= PORT_PTS_PTW;
/* fall through */
case FSL_USB2_PHY_UTMI:
+ case FSL_USB2_PHY_UTMI_DUAL:
if (pdata->have_sysif_regs && pdata->controller_ver) {
/* controller version 1.6 or above */
setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 7e325e9..ed39081 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -69,6 +69,8 @@ static enum fsl_usb2_phy_modes determine_usb_phy(const char
*phy_type)
return FSL_USB2_PHY_UTMI;
if (!strcasecmp(phy_type, "utmi_wide"))
return FSL_USB2_PHY_UTMI_WIDE;
+ if (!strcasecmp(phy_type, "utmi_dual"))
+ return FSL_USB2_PHY_UTMI_DUAL;
if (!strcasecmp(phy_type, "serial"))
return FSL_USB2_PHY_SERIAL;
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index a82296a..dd73fad 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -64,6 +64,7 @@ enum fsl_usb2_phy_modes {
FSL_USB2_PHY_UTMI,
FSL_USB2_PHY_UTMI_WIDE,
FSL_USB2_PHY_SERIAL,
+ FSL_USB2_PHY_UTMI_DUAL,
};
struct clk;
--
2.1.0
--
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[PATCH] drivers:usb:fsl: Introduce FSL_USB2_PHY_UTMI_DUAL macro
Introduce FSL_USB2_PHY_UTMI_DUAL macro for setting phy mode
in SOCs such has T4240, T1040, T2080 which have utmi dual-phy
Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
drivers/usb/host/ehci-fsl.c | 1 +
drivers/usb/host/fsl-mph-dr-of.c | 2 ++
include/linux/fsl_devices.h | 1 +
3 files changed, 4 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index ab4eee3..1f0e4e0 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -226,6 +226,7 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
portsc |= PORT_PTS_PTW;
/* fall through */
case FSL_USB2_PHY_UTMI:
+ case FSL_USB2_PHY_UTMI_DUAL:
if (pdata-have_sysif_regs pdata-controller_ver) {
/* controller version 1.6 or above */
setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 7e325e9..ed39081 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -69,6 +69,8 @@ static enum fsl_usb2_phy_modes determine_usb_phy(const char
*phy_type)
return FSL_USB2_PHY_UTMI;
if (!strcasecmp(phy_type, utmi_wide))
return FSL_USB2_PHY_UTMI_WIDE;
+ if (!strcasecmp(phy_type, utmi_dual))
+ return FSL_USB2_PHY_UTMI_DUAL;
if (!strcasecmp(phy_type, serial))
return FSL_USB2_PHY_SERIAL;
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index a82296a..dd73fad 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -64,6 +64,7 @@ enum fsl_usb2_phy_modes {
FSL_USB2_PHY_UTMI,
FSL_USB2_PHY_UTMI_WIDE,
FSL_USB2_PHY_SERIAL,
+ FSL_USB2_PHY_UTMI_DUAL,
};
struct clk;
--
2.1.0
--
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[PATCH] drivers:usb:fsl: Replace macros with enumerated type
Replace macros with enumerated type to represent usb ip controller
version
Signed-off-by: Nikhil Badola
---
Depends on "drivers: usb :fsl: Add support for USB controller version-2.5"
include/linux/fsl_devices.h | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 2a2f56b..035ead7 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -20,11 +20,6 @@
#define FSL_UTMI_PHY_DLY 10 /*As per P1010RM, delay for UTMI
PHY CLK to become stable - 10ms*/
#define FSL_USB_PHY_CLK_TIMEOUT1 /* uSec */
-#define FSL_USB_VER_OLD0
-#define FSL_USB_VER_1_61
-#define FSL_USB_VER_2_22
-#define FSL_USB_VER_2_43
-#define FSL_USB_VER_2_54
#include
@@ -52,6 +47,14 @@
*
*/
+enum fsl_usb2_controller_ver {
+ FSL_USB_VER_OLD,
+ FSL_USB_VER_1_6,
+ FSL_USB_VER_2_2,
+ FSL_USB_VER_2_4,
+ FSL_USB_VER_2_5,
+};
+
enum fsl_usb2_operating_modes {
FSL_USB2_MPH_HOST,
FSL_USB2_DR_HOST,
--
2.1.0
--
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[PATCH] drivers:usb:fsl: Replace macros with enumerated type
Replace macros with enumerated type to represent usb ip controller
version
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
Depends on drivers: usb :fsl: Add support for USB controller version-2.5
include/linux/fsl_devices.h | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 2a2f56b..035ead7 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -20,11 +20,6 @@
#define FSL_UTMI_PHY_DLY 10 /*As per P1010RM, delay for UTMI
PHY CLK to become stable - 10ms*/
#define FSL_USB_PHY_CLK_TIMEOUT1 /* uSec */
-#define FSL_USB_VER_OLD0
-#define FSL_USB_VER_1_61
-#define FSL_USB_VER_2_22
-#define FSL_USB_VER_2_43
-#define FSL_USB_VER_2_54
#include linux/types.h
@@ -52,6 +47,14 @@
*
*/
+enum fsl_usb2_controller_ver {
+ FSL_USB_VER_OLD,
+ FSL_USB_VER_1_6,
+ FSL_USB_VER_2_2,
+ FSL_USB_VER_2_4,
+ FSL_USB_VER_2_5,
+};
+
enum fsl_usb2_operating_modes {
FSL_USB2_MPH_HOST,
FSL_USB2_DR_HOST,
--
2.1.0
--
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