> Acked-by: Daniel Vetter <daniel.vet...@ffwll.ch>
> Signed-off-by: Peter Rosin <p...@axentia.se>
Acked-by: Philippe Cornu <philippe.co...@st.com>
Note: we will update stm32 clut support after your patch. Many thanks.
> ---
> drivers/gpu/drm/stm/ltdc.c | 12
Version 1:
- Initial commit
The purpose of this set of patches is to clean up the mipi dsi dw Synopsys
drm bridge.
Philippe CORNU (2):
drm/bridge/synopsys: dsi: Constify funcs structures
drm/bridge/synopsys: dsi: Register list clean up
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 79
This patch cleans up the Synopsys mipi dsi register list:
- remove unused registers
- rename registers according to the Synopsys documentation
(1.30 & 1.31)
- fix typos
- re-order registers for a better coherency
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
---
drivers/gpu/
Constify drm funcs structures.
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
---
drivers/gpu/drm/stm/ltdc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index 628825b..92e58ba 100644
--- a/drive
Rename the platform driver name from "stm" to "stm32-display"
for a better readability in /sys/bus/platform/drivers entries.
Note: We keep "stm" as drm_driver.name because it is better
when using "modetest -M stm ..." (even if recent modetest patch
avoids u
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
---
drivers/gpu/drm/stm/ltdc.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index f4ed21a..8cd1b9b 100644
--- a/drivers/gpu/drm/stm/ltdc.c
+++ b/d
Version 1:
- Initial commit
The purpose of this set of patches is to clean up the drm stm driver.
Philippe CORNU (7):
drm/stm: drv: Rename platform driver name
drm/stm: ltdc: Cleanup signal polarity defines
drm/stm: ltdc: Lindent and minor cleanups
drm/stm: ltdc: Constify funcs
Use devm_reset_control_get to avoid resource leakage.
Also use platform_get_resource, which is more usual and
consistent with platform_get_irq called later.
Signed-off-by: Fabien Dessenne <fabien.desse...@st.com>
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
---
drivers
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
---
drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
index 16ae00e..568c5d0 100644
--- a/drivers/g
The GCR_PCPOL/DEPOL/VSPOL/HSPOL defines are sufficient to
describe the HS, VS, DE & PC signal polarities.
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
---
drivers/gpu/drm/stm/ltdc.c | 28 ++--
1 file changed, 10 insertions(+), 18 deletions(-)
Lindent then checkpatch --strict cleanups
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
---
drivers/gpu/drm/stm/ltdc.c | 172 ++---
1 file changed, 85 insertions(+), 87 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/d
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
---
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
index 36f5ccb..63c7a01
Constify dw_mipi_dsi_bridge_funcs as these functions are not supposed
to change at runtime.
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
Reviewed-by: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
---
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 2 +-
1 fil
idge.
Philippe CORNU (3):
drm/bridge/synopsys: dsi: Constify funcs structures
drm/bridge/synopsys: dsi: Register list clean up
drm/bridge/synopsys: dsi: explicitly request exclusive reset control
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 96 ---
1 file changed, 58 insert
This patch cleans up the Synopsys mipi dsi register list:
- rename registers according to the Synopsys documentation
(1.30 & 1.31)
- fix typos
- re-order registers for a better coherency
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
Reviewed-by: Laurent Pinchart <
Constify drm funcs structures.
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
Reviewed-by: Benjamin Gaignard <benjamin.gaign...@linaro.org>
---
drivers/gpu/drm/stm/ltdc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/dri
Rename the platform driver name from "stm" to "stm32-display"
for a better readability in /sys/bus/platform/drivers entries.
Note: We keep "stm" as drm_driver.name because it is better
when using "modetest -M stm ..." (even if recent modetest patch
avoids u
;fabien.desse...@st.com>
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
Reviewed-by: Benjamin Gaignard <benjamin.gaign...@linaro.org>
Cc: Philipp Zabel <p.za...@pengutronix.de>
---
drivers/gpu/drm/stm/ltdc.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --
Rename the returned value from "res" to "ret" as it is more "readable".
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
Reviewed-by: Benjamin Gaignard <benjamin.gaign...@linaro.org>
---
drivers/gpu/drm/stm/ltdc.c | 10 +-
1 file changed, 5
The GCR_PCPOL/DEPOL/VSPOL/HSPOL defines are sufficient to
describe the HS, VS, DE & PC signal polarities.
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
Reviewed-by: Benjamin Gaignard <benjamin.gaign...@linaro.org>
---
drivers/gpu/drm/stm/ltdc.c | 28 ++--
Constify dw_mipi_dsi_stm_phy_ops as these ops are not supposed
to change at runtime.
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
Reviewed-by: Benjamin Gaignard <benjamin.gaign...@linaro.org>
---
drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 2 +-
1 file changed, 1 insertion(+)
Version 2:
- Add devm_reset_control_get_exclusive to follow explicit reset API
- Add missing commit messages & reviewed-by.
Version 1:
- Initial commit
The purpose of this set of patches is to clean up the drm stm driver.
Philippe CORNU (7):
drm/stm: drv: Rename platform driver name
drm
Lindent then checkpatch --strict cleanups
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
Reviewed-by: Benjamin Gaignard <benjamin.gaign...@linaro.org>
---
drivers/gpu/drm/stm/ltdc.c | 172 ++---
1 file changed, 85 insertions(+),
shared reset
control behavior. Convert all drivers requesting exclusive resets to the
explicit API call so the temporary transition helpers can be removed.
No functional changes.
Cc: Philipp Zabel <p.za...@pengutronix.de>
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
---
dr
> Reviewed-by: Andrzej Hajda <a.ha...@samsung.com>
Reviewed-by: Philippe Cornu <philippe.co...@st.com>
Tested-by: Philippe Cornu <philippe.co...@st.com>
> ---
> drivers/gpu/drm/bridge/panel.c | 30 ++
> include/drm/drm_bridge.h | 3 +++
>
On 07/18/2017 03:39 PM, Laurent Pinchart wrote:
> Hi Philippe,
>
> Thank you for the patch.
>
> On Tuesday 18 Jul 2017 13:43:52 Philippe CORNU wrote:
>> This patch cleans up the Synopsys mipi dsi register list:
>> - remove unused registers
>
> Is the documenta
ext,
> suggest '&&' instead [-Werror=int-in-bool-context]
>
> The code here is correct, but can be easily rephrased to make
> that more obvious. I also swap out the error handling and the normal
> code path for clarity.
Hi Arnd,
And many thanks for this new & much better co
This patch cleans up the Synopsys mipi dsi register list:
- rename registers according to the Synopsys documentation
(1.30 & 1.31)
- fix typos
- re-order registers for a better coherency
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
Reviewed-by: Laurent Pinchart <
Constify dw_mipi_dsi_bridge_funcs as these functions are not supposed
to change at runtime.
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
Reviewed-by: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
---
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 2 +-
1 fil
shared reset
control behavior. Convert all drivers requesting exclusive resets to the
explicit API call so the temporary transition helpers can be removed.
No functional changes.
Cc: Philipp Zabel <p.za...@pengutronix.de>
Signed-off-by: Philippe CORNU <philippe.co...@st.com&g
pose of this set of patches is to clean up the mipi dsi dw
Synopsys drm bridge.
Philippe CORNU (3):
drm/bridge/synopsys: dsi: Constify funcs structures
drm/bridge/synopsys: dsi: Register list clean up
drm/bridge/synopsys: dsi: explicitly request exclusive reset control
drivers/gpu/drm/bridge/syno
7 03:23 PM, Philippe CORNU wrote:
> Version 3:
> - Add devm_reset_control_get_optional_exclusive (Philipp Zabel).
>
> Version 2:
> - Put back Synopsys mipi dsi unused registers.
> - Add devm_reset_control_get_exclusive to follow explicit reset API.
> - Add a missing commit messag
On 06/22/2017 10:17 AM, Archit Taneja wrote:
>
>
> On 06/22/2017 01:20 PM, Benjamin Gaignard wrote:
>> 2017-06-20 19:31 GMT+02:00 Eric Anholt :
>>> Archit Taneja writes:
>>>
On 06/16/2017 08:13 PM, Eric Anholt wrote:
> Archit Taneja
On 06/22/2017 08:06 AM, Peter Rosin wrote:
> The redundant fb helper .load_lut is no longer used, and can not
> work right without also providing the fb helpers .gamma_set and
> .gamma_get thus rendering the code in this driver suspect.
>
Hi Peter,
STM32 chipsets supports 8-bit CLUT mode but
On 06/22/2017 07:56 PM, Eric Anholt wrote:
> Signed-off-by: Eric Anholt
> ---
>
> This fixup would be squashed into patch 1 of your series.
Hi Eric,
and many thanks for the two patches, I will follow your suggestion for
the v5 serie.
By the way, do you have more comments on
;
> TO: Masahiro Yamada <yamada.masah...@socionext.com>
> CC: dri-de...@lists.freedesktop.org, Daniel Vetter <daniel.vet...@intel.com>,
> linux-kernel@vger.kernel.org, Masahiro Yamada
> <yamada.masah...@socionext.com>, Yannick Fertre <yannick.fer...@st.com>
On 05/20/2017 07:32 PM, Masahiro Yamada wrote:
> Hi Philippe,
>
>
> 2017-05-19 21:17 GMT+09:00 Philippe CORNU <philippe.co...@st.com>:
>>
>>
>> On 05/19/2017 09:49 AM, Julia Lawall wrote:
>>> On line 466, the preceeding comment suggests that the se
Fix COMPILE_TEST build issue detected with the
rule: "duplicated argument to & or |"
Signed-off-by: Philippe CORNU <philippe.co...@st.com>
---
drivers/gpu/drm/stm/ltdc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/driver
Hi Eric,
I took your patch for the panel-bridge and it works perfectly in both
DPI mode (panel RGB //) and DSI mode (bridge dw mipi dsi), bravo :-)
~160 lines have been removed from ltdc.c thanks to your panel-bridge code!
Many thanks
Philippe
On 05/11/2017 08:31 PM, Eric Anholt wrote:
>
>> On 05/31/2017 11:56 AM, Boris Brezillon wrote:
>>>> Hi Philippe,
>>>>
>>>> Le Tue, 30 May 2017 16:55:42 +,
>>>> Philippe CORNU <philippe.co...@st.com> a écrit :
>>>>
>>>>> Hi Eric,
>>>>>
Hi Benjamin,
and many thanks for this cleanup patchset.
Reviewed-by: Philippe Cornu <philippe.co...@st.com>
Tested-by: Philippe Cornu <philippe.co...@st.com>
Philippe :-)
On 09/29/2017 02:59 PM, Benjamin Gaignard wrote:
> The goal of this series is to simplify driver code
,
Philippe :-)
On 08/01/2017 03:30 PM, Philippe CORNU wrote:
> Hi Archit,
>
> The 2 first patches have been reviewed by Laurent. The 3rd one has been
> "acked" by Philipp.
>
> Do not hesitate to send me any comments so I can take them into account
> before my holida
On 09/04/2017 01:40 PM, Archit Taneja wrote:
>
>
> On 09/01/2017 07:15 PM, Andrzej Hajda wrote:
>> On 01.08.2017 15:23, Philippe CORNU wrote:
>>> Based on patch "Convert drivers to explicit reset API" from Philipp
>>> Zabel
>>>
>>>
Hi Peter,
On 11/12/2017 01:31 PM, Peter Rosin wrote:
> On 2017-11-10 17:12, Philippe CORNU wrote:
>> Hi Peter,
>>
>> On 11/07/2017 05:34 PM, Peter Rosin wrote:
>>> On 2017-11-07 16:53, Philippe CORNU wrote:
>>>> + Peter
>>>>
>>>>
s cleanup.
(please update the headline with "synopsys")
Successfully tested on stm.
Acked-by: Philippe Cornu <philippe.co...@st.com>
Many thanks,
Philippe :-)
>
> Signed-off-by: Brian Norris <briannor...@chromium.org>
> ---
> drivers
Hi Peter,
On 11/13/2017 11:40 AM, Philippe CORNU wrote:
> Hi Peter,
>
> On 11/12/2017 01:31 PM, Peter Rosin wrote:
>> On 2017-11-10 17:12, Philippe CORNU wrote:
>>> Hi Peter,
>>>
>>> On 11/07/2017 05:34 PM, Peter Rosin wrote:
>>>> On
for removal.
>
> Signed-off-by: Brian Norris <briannor...@chromium.org>
> Signed-off-by: Nickey Yang <nickey.y...@rock-chips.com>
> Reviewed-by: Matthias Kaehlcke <m...@chromium.org>
> Reviewed-by: Archit Taneja <arch...@codeaurora.org>
> Acked-by: Philippe Cor
Hi Nickey,
On 12/01/2017 10:11 AM, Nickey Yang wrote:
> Hi Philippe,
>
>
> On 2017年12月01日 16:32, Philippe CORNU wrote:
>> Dear Nickey,
>>
>> Many thanks for your patch.
>>
>> I am sorry to say that but you can not add my "Acked-by"
Hi Peter,
On 11/07/2017 05:34 PM, Peter Rosin wrote:
> On 2017-11-07 16:53, Philippe CORNU wrote:
>> + Peter
>>
>> Hi Peter,
>>
>> CLUT support on STM32 has been removed thanks to your clean up patch
>
> Support is a bit strong for what I thought w
May I ask you please a short review on this patch?
Many thanks,
Philippe :-)
On 10/26/2017 01:17 PM, Philippe Cornu wrote:
> Add the 8-bit clut mode support at crtc level.
> Useful for low memory footprint user interfaces but also for
> 8-bit old games (including color shifting visual
Hi Brian,
On 12/06/2017 10:52 PM, Brian Norris wrote:
> Hi Nickey, others,
>
> I just want to highlight a thing or two here. Otherwise, my
> 'Reviewed-by' still basically stands (FWIW).
>
> On Wed, Dec 06, 2017 at 05:08:21PM +0800, Nickey Yang wrote:
>> Add the ROCKCHIP DSI controller driver
Hi Nickey,
platform_set_drvdata() is still missing in your version.
Thanks,
Philippe :-)
On 12/06/2017 10:39 PM, Brian Norris wrote:
> On Wed, Dec 06, 2017 at 05:08:19PM +0800, Nickey Yang wrote:
>> From: Brian Norris
>>
>> Bridge drivers/helpers shouldn't be
Hi,
On 10/26/2017 06:13 AM, Archit Taneja wrote:
> Hi,
>
> On 10/26/2017 06:39 AM, Brian Norris wrote:
>> On Wed, Oct 25, 2017 at 03:57:19AM -0400, Sean Paul wrote:
>>> Archit asked a question about moving to
>>> dw-mipi-dsi
>>
>> That question made me think though: this approach seems
Rename the driver name from "dw_mipi_dsi-stm" to
"stm32-display-dsi" for a better readability
in /sys/bus/platform/drivers entries.
Signed-off-by: Philippe Cornu <philippe.co...@st.com>
---
drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 2 +-
1 file changed, 1 insertion(+),
Minor fixes detected with "scripts/checkpatch.pl --strict"
Signed-off-by: Philippe Cornu <philippe.co...@st.com>
---
drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 4 ++--
drivers/gpu/drm/stm/ltdc.c| 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/dri
Hi Rob & Laurent :)
On 04/26/2018 12:05 AM, Laurent Pinchart wrote:
> Hi Rob,
>
> On Wednesday, 25 April 2018 20:11:23 EEST Rob Herring wrote:
>> On Wed, Apr 25, 2018 at 04:17:25PM +0300, Laurent Pinchart wrote:
>>> On Wednesday, 25 April 2018 15:20:04 EEST Philipp
Hi Laurent, Archit, Andrzej & Yannick,
Do you have any comments on this v2 driver part?
(more details regarding v1/v2 differences in the cover letter
https://www.spinics.net/lists/dri-devel/msg174137.html)
Thank you,
Philippe :-)
On 04/25/2018 09:53 AM, Philippe Cornu wrote:
&
Hi Andrzej,
On 05/14/2018 12:33 PM, Andrzej Hajda wrote:
> On 14.05.2018 11:38, Philippe CORNU wrote:
>> Hi Laurent, Archit, Andrzej & Yannick,
>>
>> Do you have any comments on this v2 driver part?
>> (more details regarding v1/v2 differences in the cover letter
&
On 04/25/2018 09:13 AM, Yannick FERTRE wrote:
> Hi Philippe,
>
> Reviewed-by: Yannick Fertré <yannick.fer...@st.com>
>
Applied on drm-misc-next.
Many thanks,
Philippe :-)
>
> On 04/19/2018 03:28 PM, Philippe Cornu wrote:
>> "make C=1" returns 2 wa
On 04/25/2018 09:12 AM, Yannick FERTRE wrote:
> Hi Philippe,
>
> Reviewed-by: Yannick Fertré <yannick.fer...@st.com>
Applied on drm-misc-next.
Many thanks,
Philippe :-)
>
>
> On 04/17/2018 01:34 PM, Philippe Cornu wrote:
>> When a driver related to one of th
On 04/25/2018 09:12 AM, Yannick FERTRE wrote:
> Hi Philippe,
>
> Reviewed-by: Yannick Fertré <yannick.fer...@st.com>
>
Applied on drm-misc-next.
Many thanks,
Philippe :-)
> On 04/17/2018 01:40 PM, Philippe Cornu wrote:
>> Add mode_valid() function to filter m
37:36PM +0200, Philippe Cornu wrote:
>> Minor fixes detected with "scripts/checkpatch.pl --strict"
>>
>> Signed-off-by: Philippe Cornu <philippe.co...@st.com>
>> ---
>> Detected when merging "drm: clarify adjusted_mode documentation for bridges"
Hi,
Applied on drm-misc-next.
Many thanks,
Philippe :-)
On 04/19/2018 07:00 PM, Archit Taneja wrote:
>
>
> On Thursday 19 April 2018 09:20 PM, Philippe CORNU wrote:
>> Hi Archit & Andrzej,
>>
>> May I ask you please a short review of this documentation upd
Minor fixes detected with "scripts/checkpatch.pl --strict"
Signed-off-by: Philippe Cornu <philippe.co...@st.com>
---
Detected when merging "drm: clarify adjusted_mode documentation for bridges"
include/drm/drm_bridge.h | 10 +-
1 file changed, 5 insertions(+),
Add the DPI/RGB input pixel clock in mandatory properties
because it really offers a better preciseness for timing
computations.
Note: Fix also the DSI panel example where "ref" & "pclk"
clocks were swapped.
Signed-off-by: Philippe Cornu <philippe.co...@st.com>
ltdc can have up to 2 endpoints:
- dpi external gpios: for rgb panels or external bridge ICs.
- dpi internal ios: connected internally to dsi.
Note: Refer to the reference manual to know if the dsi is
present on your device.
Signed-off-by: Philippe Cornu <philippe.co...@st.
ltdc can have up to 2 endpoints:
- dpi external gpios: for rgb panels or external bridge ICs.
- dpi internal ios: connected internally to dsi.
Note: Refer to the reference manual to know if the dsi is
present on your device.
Signed-off-by: Philippe Cornu <philippe.co...@st.com>
---
d
Version 1:
- Initial commit
The purpose of this set of patches is to offer the possibility
to use up to 2 endpoints for the ltdc dpi video port.
Philippe Cornu (2):
dt-bindings: display: stm32: add a 2nd endpoint
drm/stm: ltdc: add a 2nd endpoint
.../devicetree/bindings/display/st,stm32
The pixel clock is optional. When available, it offers a better
preciseness for timing computations.
Signed-off-by: Philippe Cornu <philippe.co...@st.com>
---
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 24 ++--
1 file changed, 18 insertions(+), 6 deletions(-)
diff
Add the 8-bit clut mode support at crtc level.
Useful for low memory footprint user interfaces but also for
8-bit old games (including color shifting visual effects).
Tested with fbdev FBIOPUTCMAP & drm DRM_IOCTL_MODE_SETGAMMA
ioctls.
Signed-off-by: Philippe Cornu <philippe.co...
Hi Andrzej,
On 10/27/2017 08:41 AM, Andrzej Hajda wrote:
> On 26.10.2017 18:09, Philippe Cornu wrote:
>> The pixel clock is optional. When available, it offers a better
>> preciseness for timing computations.
>>
>> Signed-off-by: Philippe Cornu <philippe.co...@st.co
Hi Rob,
On 10/27/2017 04:38 PM, Rob Herring wrote:
> On Thu, Oct 26, 2017 at 06:12:36PM +0200, Philippe Cornu wrote:
>> Add the DPI/RGB input pixel clock in mandatory properties
>> because it really offers a better preciseness for timing
>> computations.
>> Note: Fix
Hi Philipp,
On 10/27/2017 10:06 AM, Philipp Zabel wrote:
> Hi Philippe,
>
> On Thu, 2017-10-26 at 18:09 +0200, Philippe Cornu wrote:
>> The pixel clock is optional. When available, it offers a better
>> preciseness for timing computations.
>>
>> Signed-of
s by Nickey Yang,
> to make the Rockchip DSI driver wrap this common driver.
>
> Signed-off-by: Brian Norris <briannor...@chromium.org>
> Reviewed-by: Philippe Cornu <philippe.co...@st.com>
> Tested-by: Philippe Cornu <philippe.co...@st.com>
> ---
> v2:
>
Hi Brian,
Reviewed-by: Philippe Cornu <philippe.co...@st.com>
Many thanks,
Philippe :-)
On 01/09/2018 09:33 PM, Brian Norris wrote:
> sparse complains:
>
> drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c:703:6: warning: symbol
> 'dw_mipi_dsi_bridge_mode_set' was not declared. S
Hi Brian,
On 01/09/2018 07:55 PM, Brian Norris wrote:
> Hi Philippe,
>
> On Tue, Jan 09, 2018 at 10:48:43AM +, Philippe CORNU wrote:
>> Hi Brian,
>>
>> And many thanks for implementing these TODOs.
>
> And thanks for adding them; it gave me a better opti
eate_packet(, msg);
> + if (ret) {
> + dev_err(dsi->dev, "failed to create packet: %d\n", ret);
> + return ret;
> }
>
> - return ret;
> + dw_mipi_message_config(dsi, msg);
> +
> + return dw_mipi_dsi_dcs_write(dsi, );
> }
>
> static const struct mipi_dsi_host_ops dw_mipi_dsi_host_ops = {
>
I performed some tests tracing all DSI_GEN_HDR & DSI_GEN_PLD_DATA reg
writes with panel/panel-orisetech-otm8009a.c (using long dcs commands)
before and after your patch and this is "100% perfect"!
So, apart the un-important "dcs" in dw_mipi_dsi_dcs_write() function name:
Reviewed-by: Philippe Cornu <philippe.co...@st.com>
Tested-by: Philippe Cornu <philippe.co...@st.com>
This clean-up will help a lot to add the dsi read feature in the future.
Very good patch Brian and big "thank you" !
Philippe :-)
Hi all,
Do you think the patch is "acceptable" or should I change it somehow?
Any opinion is welcomed : )
Many thanks,
Philippe :-)
On 11/24/2017 02:54 PM, Philippe CORNU wrote:
> Hi Peter,
>
> On 11/13/2017 11:40 AM, Philippe CORNU wrote:
>> Hi Peter,
>>
>>
Hi Archit, Andrzej & Laurent,
Regarding this patch from Brian, I think it could be nice to merge it
(1xAcked-by, 2xReviewed-by).
Could you please have a look?
Only the small "typo" in the headline needs to be changed.
Many thanks,
Philippe :-)
On 11/28/2017 10:34 AM, Philip
Hi Andrzej,
On 01/15/2018 02:52 PM, Andrzej Hajda wrote:
> On 12.01.2018 17:25, Philippe Cornu wrote:
>> The pixel clock is optional. When available, it offers a better
>> preciseness for timing computations and allows to reduce the extra dsi
>> bandwidth in burst mode (fro
Hi Gabriel,
Tested successfully on f469 disco board.
Tested-by: Philippe Cornu <philippe.co...@st.com>
Many thanks,
Philippe :-)
On 01/18/2018 03:49 PM, gabriel.fernan...@st.com wrote:
> From: Gabriel Fernandez <gabriel.fernan...@st.com>
>
> Update of END_PRIMARY_CLK
Hi Gabriel,
Tested successfully on f469 disco board.
Tested-by: Philippe Cornu <philippe.co...@st.com>
Many thanks,
Philippe :-)
On 01/18/2018 03:49 PM, gabriel.fernan...@st.com wrote:
> From: Gabriel Fernandez <gabriel.fernan...@st.com>
>
> This patch adds DSI cloc
Hi Brian,
On 01/15/2018 06:11 PM, Andrzej Hajda wrote:
> On 15.01.2018 15:40, Philippe CORNU wrote:
>> Hi Andrzej,
>>
>> On 01/15/2018 02:52 PM, Andrzej Hajda wrote:
>>> On 12.01.2018 17:25, Philippe Cornu wrote:
>>>> The pixel clock is op
Hi Andrzej,
On 01/15/2018 10:12 AM, Andrzej Hajda wrote:
> On 12.01.2018 15:48, Philippe Cornu wrote:
>> The function mipi_dsi_device_transfer() returns the number of transmitted
>> or received bytes on success or a negative error code on failure.
>>
>> The functions m
Add SPDX identifiers to OriseTech OTM8009a panel driver.
Signed-off-by: Philippe Cornu <philippe.co...@st.com>
---
drivers/gpu/drm/panel/panel-orisetech-otm8009a.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
b/d
In the dsi panel example, clock names in the "clock-names"
field have been swapped:
* "pclk" (peripheral clock) is < 1 CLK_F469_DSI> on stm32f4
* "ref" (dsi phy pll ref clock) is <_hse> on stm32f4
Signed-off-by: Philippe Cornu <philippe.co...@st.com>
Add the DPI/RGB input pixel clock in mandatory properties
because it really offers a better preciseness for timing
computations.
Signed-off-by: Philippe Cornu <philippe.co...@st.com>
---
Please apply "dt-bindings: display: stm32: correct clock-names
in dsi panel example" b
Hi Rob,
On 01/19/2018 11:43 PM, Rob Herring wrote:
> On Fri, Jan 12, 2018 at 04:30:34PM +0100, Philippe Cornu wrote:
>> Add the DPI/RGB input pixel clock in mandatory properties
>> because it really offers a better preciseness for timing
>> computations.
>> Note: Fix
Add SPDX identifiers to the Synopsys DesignWare MIPI DSI
host controller driver.
Signed-off-by: Philippe Cornu <philippe.co...@st.com>
---
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synop
To optimize data transfers, align pitch on 128 bytes & height
on 4 bytes. This optimization is not applicable without MMU.
Signed-off-by: Yannick Fertre <yannick.fer...@st.com>
Signed-off-by: Vincent Abriou <vincent.abr...@st.com>
Signed-off-by: Philippe Cornu <philippe.co...@s
Hi Laurent,
A big *thank* for your review
On 01/23/2018 12:30 AM, Laurent Pinchart wrote:
> Hi Philippe,
>
> Thank you for the patch.
>
> On Monday, 22 January 2018 12:26:08 EET Philippe Cornu wrote:
>> Add SPDX identifiers to the Synopsys DesignWare MIPI DSI
>
Hi Brian,
And a big thanks for your Tested-by
On 01/25/2018 11:47 PM, Brian Norris wrote:
> On Thu, Jan 25, 2018 at 7:55 AM, Philippe Cornu <philippe.co...@st.com> wrote:
>> The "adjusted_mode" clock value (ie the real pixel clock) is more
>> accurate than "mo
On 01/23/2018 06:08 PM, Philippe Cornu wrote:
> The pixel clock is optional. When available, it offers a better
> preciseness for timing computations and allows to reduce the extra dsi
> bandwidth in burst mode (from ~20% to ~10-12%, hw platform dependant).
>
> Reviewed-by: Andrzej H
ming computations.
Signed-off-by: Philippe Cornu <philippe.co...@st.com>
---
drivers/gpu/drm/stm/ltdc.c | 35 +--
1 file changed, 25 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index b48589343ae1..90
: dsi: use adjusted_mode in mode_set
Hope it is better, comments are welcome
Many thanks,
Philippe :-)
On 01/22/2018 04:38 PM, Philippe Cornu wrote:
> Add the DPI/RGB input pixel clock in mandatory properties
> because it really offers a better preciseness for timing
> computatio
~10-12%, hw platform dependant).
Signed-off-by: Philippe Cornu <philippe.co...@st.com>
---
Note: This patch replaces "drm/bridge/synopsys: dsi: add optional pixel clock"
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
Hi Brian,
On 01/24/2018 07:09 PM, Brian Norris wrote:
> On Wed, Jan 24, 2018 at 09:24:06AM +0000, Philippe CORNU wrote:
>> On 01/23/2018 09:49 PM, Brian Norris wrote:
>>> On Tue, Jan 23, 2018 at 06:08:06PM +0100, Philippe Cornu wrote:
>>>> --- a/drivers/gpu/drm
Hi Andrzej,
On 01/25/2018 12:07 PM, Andrzej Hajda wrote:
> On 24.01.2018 10:51, Philippe CORNU wrote:
>> Hi Brian,
>>
>> On 01/23/2018 10:15 PM, Brian Norris wrote:
>>> Hi Philippe,
>>>
>>> On Thu, Jan 18, 2018 at 11:40:48AM +, Philippe CO
The dcs/generic dsi read feature is not yet implemented so it
is important to warn the host_transfer() caller in case of
read operation requests.
Signed-off-by: Philippe Cornu <philippe.co...@st.com>
---
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 6 ++
1 file changed, 6 inse
Add a fix & a warning in the dsi_host_transfer().
Version 2:
- Simplify the 2 patches following comments from Brian Norris.
- Swap the 2 patches as the return value is only on tx and
in case of rx requests the warning is there.
Version 1:
- Initial commit
Philippe Cornu (2):
drm/br
1 - 100 of 403 matches
Mail list logo