On 30-09-20, 12:14, Peter Ujfalusi wrote:
> Glue layer users should use the device of the DMA for DMA mapping and
> allocations as it is the DMA which accesses to descriptors and buffers,
> not the clients
>
> Signed-off-by: Peter Ujfalusi
> ---
> drivers/dma/ti/k3-udma-glue.c| 14
Hi Peter,
On 30-09-20, 12:13, Peter Ujfalusi wrote:
> Additional configuration for the DMA event router might be needed for a
> channel which can not be done during device_alloc_chan_resources callback
> since the router information is not yet present for the drivers.
>
> If there is a need for
On 05-10-20, 13:38, Rob Herring wrote:
> In order to add meta-schema checks for additional/unevaluatedProperties
> being present, all schema need to make this explicit. As common/shared
> schema are included by other schemas, they should always allow for
> additionalProperties.
Ack
ma (via
> '$ref') and all possible properties and/or child nodes are not
> explicitly listed in the schema with the '$ref'.
>
> This is in preparation to add a meta-schema to check for missing
> 'unevaluatedProperties' or 'additionalProperties'. This has been a
> constant source of rev
On 04-10-20, 21:55, Dave Jiang wrote:
> > > +static bool process_fault(struct idxd_desc *desc, u64 fault_addr)
> > > +{
> > > + if ((u64)desc->hw == fault_addr ||
> > > + (u64)desc->completion == fault_addr) {
> >
> > you are casting descriptor address and completion, I can understand
> >
Hi Florian,
On 04-10-20, 19:56, Florian Fainelli wrote:
>
>
> On 9/30/2020 8:19 PM, Florian Fainelli wrote:
> > Hi Kishon,
> >
> > This patch series allows the configuration of the Broadcom SATA PHY TX
> > amplitude which may be required in order to meet specific tests.
>
> Hi Vinod,
>
>
On 28-09-20, 10:59, Rob Herring wrote:
> The default sizes in examples for 'reg' are 1 cell each. Fix the
> incorrect sizes in zynqmp examples:
>
> Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.example.dt.yaml:
> example-0: dma-controller@fd4c:reg:0: [0, 4249616384, 0, 4096]
On 20-09-20, 13:26, Julia Lawall wrote:
> sg_init_table zeroes its first argument, so the allocation of that argument
> doesn't have to.
>
> the semantic patch that makes this change is as follows:
> (http://coccinelle.lip6.fr/)
Applied, thanks
--
~Vinod
On 20-09-20, 13:26, Julia Lawall wrote:
> sg_init_table zeroes its first argument, so the allocation of that argument
> doesn't have to.
>
> the semantic patch that makes this change is as follows:
> (http://coccinelle.lip6.fr/)
Applied, thanks
--
~Vinod
On 22-09-20, 14:08, Logan Gunthorpe wrote:
> dma_alloc_coherent() is called with a fixed SZ_2M size, but frees happen
> with IOAT_CHUNK_SIZE. Recently, IOAT_CHUNK_SIZE was reduced to 512M but
> the allocation did not change. To fix, change to using the
> IOAT_CHUNK_SIZE define.
>
> This was
On 24-09-20, 11:00, Dave Jiang wrote:
> Add the sysfs attribute bits in ABI/stable for shared wq support.
OK I take back the documentation comment now
>
> Signed-off-by: Jing Lin
> Signed-off-by: Dave Jiang
> Reviewed-by: Tony Luck
> Reviewed-by: Dan Williams
> ---
>
On 24-09-20, 11:00, Dave Jiang wrote:
> Add code to "complete" a descriptor when the descriptor or its completion
> address hit a fault error when SVA mode is being used. This error can be
> triggered due to bad programming by the user. A lock is introduced in order
> to protect the descriptor
On 24-09-20, 11:00, Dave Jiang wrote:
> @@ -1154,6 +1268,8 @@ static struct attribute *idxd_wq_attributes[] = {
> _attr_wq_mode.attr,
> _attr_wq_size.attr,
> _attr_wq_priority.attr,
> + _attr_wq_block_on_fault.attr,
> + _attr_wq_threshold.attr,
>
On 04-10-20, 16:03, Paul Cercueil wrote:
> The jz4780_dma_tx_status() function would check if a channel's cookie
> state was set to 'completed', and if not, it would enter the critical
> section. However, in that time frame, the jz4780_dma_chan_irq() function
> was able to set the cookie to
gs/phy/qcom-usb-ipq4019-phy.yaml| 2 ++
For phy changes:
Acked-By: Vinod Koul
--
~Vinod
721e-wiz: fix bindings for torrent phy
Vinod Koul (3):
Merge branch 'fixes' into next
Merge branch 'topic/phy_attrs' into next
phy: qcom-qmp: initialize the pointer to NULL
Wan Ahmad Zainie (3):
phy: intel: Rename phy-intel to phy-intel-lgm
dt-bindings: phy: intel: Add
Hi Peter,
On 29-09-20, 11:06, Peter Ujfalusi wrote:
> > + * @spi: peripheral config for spi
> > + * @i2c: peripheral config for i2c
> > + */
> > +struct dmaengine_peripheral_config {
> > + enum dmaengine_peripheral peripheral;
> > + u8 set_config;
> > + u32 rx_len;
> > + struct
Hi Rob,
On 29-09-20, 13:44, Rob Herring wrote:
> > +description: |
> > + QCOM GPI DMA controller provides DMA capabilities for
> > + peripheral buses such as I2C, UART, and SPI.
> > +
> > +allOf:
> > + - $ref: "dma-controller.yaml#"
> > +
> > +properties:
> > + compatible:
> > +enum:
> >
On 01-10-20, 00:23, Stephen Boyd wrote:
> Quoting Vinod Koul (2020-10-01 00:09:11)
> > Smatch complains:
> > drivers/phy/qualcomm/phy-qcom-qmp.c:3899 qcom_qmp_phy_probe() error:
> > uninitialized symbol 'dp_cfg'.
> > drivers/phy/qualcomm/phy-qcom-qmp.c:3900
: Add support for DP in USB3+DP combo phy")
Signed-off-by: Vinod Koul
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c
b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 6171b44da050..5d33ad4d0
Vinod Koul (11):
soundwire: define and use addr bit masks
soundwire: bus: use FIELD_GET()
soundwire: slave: use SDW_DISCO_LINK_ID()
soundwire: stream: use FIELD_{GET|PREP}
soundwire: qcom : use FIELD_{GET|PREP}
soundwire: cadence: use FIELD_{GET|PREP
Hi Dave,
On 30-09-20, 15:19, Dave Jiang wrote:
>
>
> On 9/24/2020 2:51 PM, Borislav Petkov wrote:
> > On Thu, Sep 24, 2020 at 02:32:35PM -0700, Dave Jiang wrote:
> > > Hi Vinod,
> > > Looks like we are cleared on the x86 patches for this series with sign
> > > offs
> > > from maintainer Boris.
Hi Linus,
Please consider pulling to receive one small fix for dmatest module
misconfigured channels
The following changes since commit f4d51dffc6c01a9e94650d95ce0104964f8ae822:
Linux 5.9-rc4 (2020-09-06 17:11:40 -0700)
are available in the Git repository at:
On 16-09-20, 16:11, Stephen Boyd wrote:
> This patch series is based on v12 of the msm DP driver submission[1]
> plus a compliance patch[2]. In the v5 patch series review I suggested
> that the DP PHY and PLL be split out of the drm driver and moved to the
> qmp phy driver. This patch series does
Hi Greg,
We have a leak fix for TI driver, please consider for v5.9
The following changes since commit ad7a7acaedcf45071c822b6c983f9c1e084041c9:
phy: omap-usb2-phy: disable PHY charger detect (2020-08-31 14:30:59 +0530)
are available in the Git repository at:
On 21-09-20, 03:32, Bard Liao wrote:
> Test modes are required for all SoundWire IP, and help debug
> integration issues. This series adds debugfs support and data
> port test fail interrupt to enable data port test mode feature
> on Intel platforms.
Applied, thanks
--
~Vinod
Some complex dmaengine controllers have capability to program the
peripheral device, so pass on the peripheral configuration as part of
dma_slave_config
Signed-off-by: Vinod Koul
---
include/linux/dmaengine.h | 91 +++
1 file changed, 91 insertions(+)
diff
This controller provides DMAengine capabilities for a variety of peripheral
buses such as I2C, UART, and SPI. By using GPI dmaengine driver, bus
drivers can use a standardize interface that is protocol independent to
transfer data between memory and peripheral.
Signed-off-by: Vinod Koul
on testing feedback
Changes in v2:
- Update the binding and drop qcom specific properties
- Move peripheral configuration as a pointer
- Move submit queue for transactions to issue_pending
Vinod Koul (3):
dt-bindings: dmaengine: Document qcom,gpi dma binding
dmaengine: add peripheral configuration
Add devicetree binding documentation for GPI DMA controller
implemented on Qualcomm SoCs
Signed-off-by: Vinod Koul
---
.../devicetree/bindings/dma/qcom,gpi.yaml | 86 +++
include/dt-bindings/dma/qcom-gpi.h| 11 +++
2 files changed, 97 insertions(+)
create mode
On 22-09-20, 00:24, 周琰杰 (Zhou Yanjie) wrote:
> +#define USBPCR_IDPULLUP_LSB 28
> +#define USBPCR_IDPULLUP_MASK GENMASK(29, USBPCR_IDPULLUP_LSB)
> +#define USBPCR_IDPULLUP_ALWAYS (0x2 << USBPCR_IDPULLUP_LSB)
> +#define USBPCR_IDPULLUP_SUSPEND (0x1 <<
On 18-09-20, 11:37, Tomi Valkeinen wrote:
> Add reset-names as a required property.
>
> There are no dts files using torrent phy yet, so it is safe to add a new
> required property.
Applied both, thanks
--
~Vinod
On 21-09-20, 22:56, Tomasz Figa wrote:
> Fix an implicit declaration of usleep_range():
>
> drivers/phy/rockchip/phy-rockchip-dphy-rx0.c: In function 'rk_dphy_enable':
> drivers/phy/rockchip/phy-rockchip-dphy-rx0.c:203:2: error: implicit
> declaration of function 'usleep_range'
On 17-09-20, 10:51, Randy Dunlap wrote:
> From: Randy Dunlap
>
> Fix a Kconfig warning that is causing lots of build errors
> when USB_SUPPORT is not set.
>
> USB_PHY depends on USB_SUPPORT but "select" doesn't care about
> dependencies, so this driver should also depend on USB_SUPPORT.
> It
On 17-09-20, 13:01, Srinivas Kandagatla wrote:
> While testing Qualcomm soundwire controller version 1.5.1, found two issue,
> Firstly the frame shape information configured vs the bus parameters
> are out of sync. secondly some ports on this ip version require
> block packing mode support.
>
>
esource management algorithm, and set if before calling
> sdw_add_bus_master()
>
> Credits: this patch is based on an earlier internal contribution by
> Vinod Koul, Sanyog Kale, Shreyas Nc and Hardik Shah. All hard-coded
> values were removed from the initial contribution to use BIO
Hello Jonathan
On 16-09-20, 07:43, Jonathan McDowell wrote:
> From: Andy Gross
>
> (I'm not sure how best to attribute this. It's originally from Andy
> Gross, the version I picked up was a later version from Thomas Pedersen,
> and I can't find clear indication of why the latest version wasn't
On 16-09-20, 15:09, Grygorii Strashko wrote:
> Now the K3 UDMA glue layer enable functions perform RMW operation on UDMA
> RX/TX RT_CTL registers to set EN bit and enable channel, which is
> incorrect, because only EN bit has to be set in those registers to enable
> channel (all other bits should
On 18-08-20, 19:51, YueHaibing wrote:
> drivers/dma/iop-adma.c: In function ‘iop_adma_alloc_chan_resources’:
> drivers/dma/iop-adma.c:447:13: warning: cast to pointer from integer of
> different size [-Wint-to-pointer-cast]
>hw_desc = (char *) iop_chan->device->dma_desc_pool;
> ^
On 17-09-20, 15:17, Liu Shixin wrote:
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/dma/sf-pdma/sf-pdma.c: In function 'sf_pdma_donebh_tasklet':
> drivers/dma/sf-pdma/sf-pdma.c:287:23: warning: unused variable 'desc'
> [-Wunused-variable]
>
> After commit 8f6b6d060602
On 15-09-20, 11:26, Liu Shixin wrote:
> Simplify the return expression.
>
Applied, thanks
--
~Vinod
On 14-09-20, 11:23, Vinod Koul wrote:
> 'desc' variable is now defined but not used in sf_pdma_donebh_tasklet(),
> causing this warning:
>
> drivers/dma/sf-pdma/sf-pdma.c: In function 'sf_pdma_donebh_tasklet':
> drivers/dma/sf-pdma/sf-pdma.c:287:23: warning: unused variable 'des
Some complex dmaengine controllers have capability to program the
peripheral device, so pass on the peripheral configuration as part of
dma_slave_config
Signed-off-by: Vinod Koul
---
include/linux/dmaengine.h | 90 +++
1 file changed, 90 insertions(+)
diff
Add devicetree binding documentation for GPI DMA controller
implemented on Qualcomm SoCs
Signed-off-by: Vinod Koul
---
.../devicetree/bindings/dma/qcom,gpi.yaml | 86 +++
include/dt-bindings/dma/qcom-gpi.h| 11 +++
2 files changed, 97 insertions(+)
create mode
properties
- Move peripheral configuration as a pointer
- Move submit queue for transactions to issue_pending
Vinod Koul (3):
dt-bindings: dmaengine: Document qcom,gpi dma binding
dmaengine: add peripheral configuration
dmaengine: qcom: Add GPI dma driver
.../devicetree/bindings/dma/qcom
On 16-09-20, 15:47, Tomi Valkeinen wrote:
> Add reset-names as a required property.
>
> There are no dts files using torrent phy yet, so it is safe to add a new
> required property.
>
> Signed-off-by: Tomi Valkeinen
> ---
> .../devicetree/bindings/phy/phy-cadence-torrent.yaml | 5 +
On 17-09-20, 09:30, Swapnil Jakhade wrote:
> Cadence Torrent PHY is a multiprotocol PHY supporting different multilink
> PHY configurations including DisplayPort, PCIe, USB, SGMII, QSGMII etc.
> This patch series extends functionality of Torrent PHY driver to support
> following configurations:
>
On 16-09-20, 20:28, Swapnil Jakhade wrote:
> Cadence Torrent PHY is a multiprotocol PHY supporting different multilink
> PHY configurations including DisplayPort, PCIe, USB, SGMII, QSGMII etc.
> Existing Torrent PHY driver supports only DisplayPort. This patch series
> prepares Torrent PHY driver
On 16-09-20, 18:49, Manivannan Sadhasivam wrote:
> SM8250 has multiple different PHY versions:
> QMP GEN3x1 PHY - 1 lane
> QMP GEN3x2 PHY - 2 lanes
> QMP Modem PHY - 2 lanes
>
> Add support for these with relevant init sequence.
>
> Signed-off-by: Manivannan Sadhasivam
> ---
>
On 16-09-20, 17:45, Bjorn Andersson wrote:
> On Wed 16 Sep 08:19 CDT 2020, Manivannan Sadhasivam wrote:
>
> > Document the DT bindings of below PCIe PHY versions used on SM8250:
> >
> > QMP GEN3x1 PHY - 1 lane
> > QMP GEN3x2 PHY - 2 lanes
> > QMP Modem PHY - 2 lanes
>
> How about something like
On 16-09-20, 16:33, Srinivas Kandagatla wrote:
>
>
> On 16/09/2020 16:20, Greg KH wrote:
> > On Wed, Sep 16, 2020 at 04:03:33PM +0100, Srinivas Kandagatla wrote:
> > > usage of apis like u32_replace_bits() without actually catching the return
> > > value could hide problems without any warning!
On 16-09-20, 08:18, Pierre-Louis Bossart wrote:
>
> > > According to usage (bitfields.h) of REG_FIELDS,
> > > Modify is:
> > >reg &= ~REG_FIELD_C;
> > >reg |= FIELD_PREP(REG_FIELD_C, c);
>
>
> if this is indeed the case, all the code in cadence_master.c is also broken,
> e.g:
>
>
On 14-09-20, 09:44, Pierre-Louis Bossart wrote:
> > For LSB bits, I dont think this is an issue. I expect it to work, for
> > example:
> > #define CONTROL_LSB_MASK GENMASK(2, 0)
> > foo |= u32_encode_bits(control, CONTROL_LSB_MASK);
> >
> > would mask the control value and program that
On 12-09-20, 22:46, Rikard Falkeborn wrote:
> Constify a number of static structs that are never changed to allow the
> compiler to put them in read-only memory.
Applied, thanks
--
~Vinod
On 11-09-20, 14:16, Mauro Carvalho Chehab wrote:
> From: Yu Chen
>
> There are some problems at the initialization part of this phy.
> Solve them.
Why not fold this into patch 1?
>
> Signed-off-by: Yu Chen
> Signed-off-by: Mauro Carvalho Chehab
> ---
>
On 16-09-20, 15:18, Laurent Pinchart wrote:
> Hi Sekhar,
>
> On Wed, Sep 16, 2020 at 01:11:17PM +0530, Sekhar Nori wrote:
> > On 11/09/20 11:48 AM, Swapnil Jakhade wrote:
> > > This patch series adds a new PHY attribute max_link_rate.
> > > It also updates Cadence Torrent PHY driver to set
On 16-09-20, 10:21, Srinivas Kandagatla wrote:
> currently the max rows and cols values are hardcoded. In reality
> these values depend on the IP version. So get these based on
> device tree compatible strings.
>
> Signed-off-by: Srinivas Kandagatla
> ---
> drivers/soundwire/qcom.c | 50
On 11-09-20, 08:18, Swapnil Jakhade wrote:
> This patch series adds a new PHY attribute max_link_rate.
> It also updates Cadence Torrent PHY driver to set attributes bus_width,
> max_link_rate and mode for DisplayPort.
>
> It includes following patches:
>
> 1.
On 11-09-20, 14:16, Mauro Carvalho Chehab wrote:
> From: Yu Chen
>
> Add the Hisilicon Kirin 3670 USB phy driver just after the
> hi3660, using the same namespace.
>
> This driver was imported from Linaro's official Hikey 970
> tree, from the original patch, removing the addition of
> the
On 11-09-20, 14:16, Mauro Carvalho Chehab wrote:
> Use the new YAML for this physical layer.
>
> Signed-off-by: Mauro Carvalho Chehab
> ---
> .../bindings/phy/hisilicon,hi3670-usb3.yaml | 72 +++
> .../bindings/phy/phy-hi3670-usb3.txt | 25 ---
Aha we have yaml
On 14-09-20, 07:55, Wan Ahmad Zainie wrote:
> Hi.
>
> The first patch is added to rename rename
> phy-intel-{combo,emmc}.c to phy-intel-lgm-{combo,emmc}.c.
>
> The second patch is to document DT bindings for Keem Bay eMMC PHY.
>
> The the third is the driver file, loosely based on
On 16-09-20, 09:36, Pierre-Louis Bossart wrote:
>
>
> On 9/16/20 9:29 AM, Vinod Koul wrote:
> > On 16-09-20, 08:18, Pierre-Louis Bossart wrote:
> > >
> > > > > According to usage (bitfields.h) of REG_FIELDS,
> > > > > Modify is:
> > &g
Hi Sekhar,
On 16-09-20, 13:11, Sekhar Nori wrote:
> Hi Vinod,
>
> On 11/09/20 11:48 AM, Swapnil Jakhade wrote:
> > This patch series adds a new PHY attribute max_link_rate.
> > It also updates Cadence Torrent PHY driver to set attributes bus_width,
> > max_link_rate and mode for DisplayPort.
> >
Hi Srini,
On 16-09-20, 10:21, Srinivas Kandagatla wrote:
> According to usage (bitfields.h) of REG_FIELDS,
> Modify is:
> reg &= ~REG_FIELD_C;
> reg |= FIELD_PREP(REG_FIELD_C, c);
>
> Patch ("soundwire: qcom : use FIELD_{GET|PREP}") seems to have
> accidentally removed clearing bit field
Hi Swapnil,
On 08-09-20, 13:57, Swapnil Kashinath Jakhade wrote:
> > On 27-08-20, 15:28, Swapnil Jakhade wrote:
> > > Cadence Torrent PHY is a multiprotocol PHY supporting different
> > > multilink PHY configurations including DisplayPort, PCIe, USB, SGMII,
> > QSGMII etc.
> > > Existing Torrent
-by: Stephen Rothwell
Signed-off-by: Vinod Koul
---
drivers/dma/sf-pdma/sf-pdma.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
index 754994087e5f..1e66c6990d81 100644
--- a/drivers/dma/sf-pdma/sf-pdma.c
+++ b/drivers/dma/sf-pdma/sf
Hi Stephen,
On 14-09-20, 14:29, Stephen Rothwell wrote:
> Hi all,
>
> After merging the dmaengine tree, today's linux-next build (x86_64
> allmodconfig) produced this warning:
>
> drivers/dma/sf-pdma/sf-pdma.c: In function 'sf_pdma_donebh_tasklet':
> drivers/dma/sf-pdma/sf-pdma.c:287:23:
Hi Pierre,
On 11-09-20, 09:50, Pierre-Louis Bossart wrote:
> > > > > > > > > + * 25 0 (Reserved)
> > > > > > > > > + * 24:22 Function Number [2:0]
> > > > > > > > > + * 21 Entity[6]
> > > > > > > > > + * 20:19 Control Selector[5:4]
> > > > > >
On 11-09-20, 10:57, Lad Prabhakar wrote:
> rcar-dmac driver is used on Renesas R-Car Gen{2,3} and Renesas
> RZ/G{1,2} SoC's, update the same to reflect the description
> for RCAR_DMAC config.
Applied, thanks
--
~Vinod
On 10-09-20, 15:43, Peter Ujfalusi wrote:
> Use separate data for SoC dependent parameters. These parameters depends
> on the DMA integration (either in HW or in SYSFW), the DMA controller
> itself remains compatible with either the am654 or j721e variant.
>
> j7200 have the same DMA as j721e
On 10-09-20, 07:52, Mauro Carvalho Chehab wrote:
> This patch series add the PHY layer needed in order to support the USB
> functionality on Hikey 970 boards.
>
> v3:
> - split a namespace patch on two (one with code changes and another
> one with dt-bindings changes);
> - placed just the PHY
On 28-08-20, 10:23, Ramuthevar,Vadivel MuruganX wrote:
> The USB PHY provides the optimized for low power dissipation while active,
> idle, or on standby.
> Requires minimal external components, a single resistor, for best operation.
> Supports 10/5-Gbps high-speed data transmission rates through
On 10-09-20, 11:45, Kishon Vijay Abraham I wrote:
> Hi Milind,
>
> On 08/09/20 7:45 pm, Milind Parab wrote:
> > Hi Kishon,
> >
> > > -Original Message-
> > > From: Laurent Pinchart
> > > Sent: Thursday, September 3, 2020 9:00 PM
> > > To: Kishon Vijay Abraham I
> > > Cc: Swapnil
On 10-09-20, 08:53, Pierre-Louis Bossart wrote:
>
>
> On 9/10/20 1:22 AM, Vinod Koul wrote:
> > On 09-09-20, 08:48, Pierre-Louis Bossart wrote:
> > >
> > > > > > > + * 25 0 (Reserved)
> > > > > > > + *
On 10-09-20, 09:02, Pierre-Louis Bossart wrote:
>
> > > > May be we could make the enumerated devices discovery bit more verbose!
> > >
> > > Maybe adding a device number sysfs entry would help, e.g. reporting
> > > NotAttched or a value in [0,11] would tell you if the device is actually
> > >
On 09-09-20, 12:00, Pierre-Louis Bossart wrote:
> On 9/9/20 10:54 AM, Srinivas Kandagatla wrote:
> > On 09/09/2020 15:39, Pierre-Louis Bossart wrote:
> > >
> > > > > > Currently slave devices are only added either from device tree or
> > > > > > acpi
> > > > > > entries. However lets say, there
On 09-09-20, 17:09, Srinivas Kandagatla wrote:
> currently the max rows and cols values are hardcoded. In reality
> these values depend on the IP version. So get these based on
> device tree compatible strings.
>
> Signed-off-by: Srinivas Kandagatla
> ---
> drivers/soundwire/qcom.c | 46
On 09-09-20, 08:48, Pierre-Louis Bossart wrote:
>
> > > > > + * 25 0 (Reserved)
> > > > > + * 24:22 Function Number [2:0]
> > > > > + * 21 Entity[6]
> > > > > + * 20:19 Control Selector[5:4]
> > > > > + * 18 0 (Reserved)
> > > >
On 09-09-20, 08:46, Pierre-Louis Bossart wrote:
>
>
> On 9/9/20 8:15 AM, YueHaibing wrote:
> > If CONFIG_PM is not set, build warns:
> >
> > drivers/soundwire/intel.c:488:12: warning: 'intel_link_power_down' defined
> > but not used [-Wunused-function]
> >
> > Move this to #ifdef block.
>
>
On 08-09-20, 21:45, Bard Liao wrote:
> Some codecs may report fake PARITY errors in the initial state. This
> series will filter them out.
Applied, thanks
--
~Vinod
Hi Amireddy,
On 09-09-20, 07:07, Amireddy Mallikarjuna reddy wrote:
> Add DT bindings YAML schema for DMA controller driver
> of Lightning Mountain(LGM) SoC.
>
> Signed-off-by: Amireddy Mallikarjuna reddy
>
> ---
> v1:
> - Initial version.
>
> v2:
> - Fix bot errors.
>
> v3:
> - No change.
>
On 08-09-20, 13:58, Jaroslav Kysela wrote:
> Dne 28. 08. 20 v 17:14 Pierre-Louis Bossart napsal(a):
> >
> >
> >
> >> Is this timeout for suspend or resume? Somehow I was under the
> >> assumption that it is former? Or is the result seen on resume?
> >>
> >> Rereading the race describe above in
On 08-09-20, 10:08, Jonathan Marek wrote:
> Fix slimbus case being broken thanks to a typo.
>
Applied, thanks
> Fixes: 5bd773242f75 ("soundwire: qcom: avoid dependency on CONFIG_SLIMBUS")
>
No need of blank line here
> Signed-off-by: Jonathan Marek
> ---
> This should be squashed into the
On 08-09-20, 08:33, Pierre-Louis Bossart wrote:
> Thanks for the review Vinod,
>
> > This is good, thanks for adding it in changelog. Can you also add this
> > description to Documentation (that can come as an individual patch),
>
> ok
>
> > > +/*
> > > + * v1.2 device - SDCA address mapping
>
s from Intel soundwire dai".
> >
> > Reviewed-by: Vinod Koul
> >
> > Changes in v3:
> > - s/ASOC/ASoC
> >
> > Pierre-Louis Bossart (3):
> > ASoC: soc-dai: clarify return value for get_sdw_stream()
> > ASoC: Intel: sof_sdw: add dailink .tr
On 05-09-20, 15:46, Dan Carpenter wrote:
> If devm_phy_create() fails then we need to call of_clk_del_provider(node)
> to undo the call to of_clk_add_provider().
Applied, thanks
--
~Vinod
On 31-08-20, 17:21, Roger Quadros wrote:
> Move ti,omap-usb2 to its own YAML schema.
Applied, thanks
--
~Vinod
On 28-08-20, 23:19, Grygorii Strashko wrote:
> Hi Kishon,
>
> This series introduces support for multiport K3 CPSW devices like one, which
> can be found on J721E SoC (MAIN CPSW).
> The first two patches are preparation changes. The Patch 3 add support for
> retrieving number of ports and base
On 27-08-20, 15:28, Swapnil Jakhade wrote:
> Cadence Torrent PHY is a multiprotocol PHY supporting different multilink
> PHY configurations including DisplayPort, PCIe, USB, SGMII, QSGMII etc.
> Existing Torrent PHY driver supports only DisplayPort. This patch series
> prepares Torrent PHY driver
On 25-08-20, 10:03, Chunfeng Yun wrote:
> Use readl_poll_timeout_atomic() to simplify code
Applied all, thanks
--
~Vinod
Hello Tom,
On 05-09-20, 12:26, t...@redhat.com wrote:
> From: Tom Rix
>
> clang static analyzer reports this problem
>
> stream.c:872:2: warning: Argument to kfree() is a constant
> address (18446744073709551092), which is not memory
> allocated by malloc()
> kfree(stream);
>
On 07-09-20, 07:25, Tom Rix wrote:
>
> On 9/7/20 7:14 AM, Vinod Koul wrote:
> > Hello Tom,
> >
> > On 05-09-20, 12:26, t...@redhat.com wrote:
> >> From: Tom Rix
> >>
> >> clang static analyzer reports this problem
> >>
>
On 05-09-20, 13:39, Jonathan Marek wrote:
> This adds initial support for soundwire device on sm8250.
>
> Tested with the "wsa" sdw device, which is simpler than the others.
>
> v2 addresses some feedback, but I kept this series as simple as possible.
> In particular, I didn't implement
Hello Linus,
Please pull to receive couple of core fixes and odd driver fixes for
dmaengine subsystem.
The following changes since commit 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5:
Linux 5.9-rc1 (2020-08-16 13:04:57 -0700)
are available in the Git repository at:
Hi Greg,
Please pull to receive the fixes for PHY subsystem. Cooupld of fixes on
QCOM driver and one on TI driver
The following changes since commit 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5:
Linux 5.9-rc1 (2020-08-16 13:04:57 -0700)
are available in the Git repository at:
Hello Greg,
I have two fixes for soundwire subsystem, please pull.
The following changes since commit 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5:
Linux 5.9-rc1 (2020-08-16 13:04:57 -0700)
are available in the Git repository at:
On 04-09-20, 04:47, Bard Liao wrote:
> Sdw stream operation APIs can be called once per stream. Move these
> operations to dailink ops. The linked series is "ASoC: Add sdw stream
> operations to dailink ops".
Applied all, thanks
--
~Vinod
oc-dai: clarify return value for get_sdw_stream()
> ASOC: Intel: sof_sdw: add dailink .trigger callback
> ASOC: Intel: sof_sdw: add dailink .prepare and .hw_free callback
s/ASOC/ASoC
with that:
Reviewed-by: Vinod Koul
>
> include/sound/soc-dai.h | 3 +-
On 03-09-20, 09:05, Pierre-Louis Bossart wrote:
>
>
> On 9/3/20 5:42 AM, Vinod Koul wrote:
> > On 01-09-20, 23:02, Bard Liao wrote:
> > > sdw stream operation APIs can be called once per stream. dailink
> > > callbacks are good places to call these APIs.
&g
On 01-09-20, 11:22, Pierre-Louis Bossart wrote:
> The upcoming SDCA (SoundWire Device Class Audio) specification defines
> a hierarchical encoding to interface with Class-defined capabilities.
>
> The specification is not yet accessible to the general public but this
> information is released
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