[PATCH] serial: meson: add Magic SysRq support

Signed-off-by: Yixun Lan <d...@gentoo.org> --- drivers/tty/serial/meson_uart.c | 18 -- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c index 60f16795d16b..f0d9222db82f 100644 --- a/drivers/tty/

[PATCH v2] serial: meson: add Magic SysRq support

s fine. [1] Documentation/admin-guide/sysrq.rst Signed-off-by: Yixun Lan <d...@gentoo.org> --- Changes since v1 at [0]: - add changelog & a few more comments [0] https://patchwork.kernel.org/patch/9728475/ --- drivers/tty/serial/meson_uart.c | 18 -- 1 file changed, 16 inser

Re: [PATCH 1/2] pinctrl: meson: separate soc drivers

hi jerome: On Mon, Oct 9, 2017 at 7:35 PM, Neil Armstrong wrote: > On 09/10/2017 12:17, Jerome Brunet wrote: >> When meson pinctrl is enabled, all meson platforms pinctrl drivers are >> built in the kernel, with a significant amount of data. >> >> This leads to

Re: [PATCH v4 4/4] ARM64: dts: meson: drop "sana" clock from SAR ADC

Hi Kevin & others I'd like to just re-send the patch [4/4] (while leave others[1-3/4] unchanged), to have separated DT patch the for 32bit / 64bit platform. is this ok for you? On 11/12/17 09:33, Martin Blumenstingl wrote: > Hi Yixun, > > On Tue, Nov 7, 2017 at 3:10 PM, Yix

[PATCH] ARM64: dts: meson-axg: add ethernet mac controller

Add DT info for the stmmac ethernet MAC which found in the Amlogic's Meson-AXG SoC, also describe the ethernet pinctrl & clock information here. This is tested in the S400 dev board which use a RTL8211F PHY, and the pins connect to the 'eth_rgmii_y_pins' group. Signed-off-by: Yixun Lan &l

[PATCH 1/3] dt-bindings: reset: Add bindings for the Meson-AXG SoC Reset Controller

Add DT bindings for the Meson-AXG SoC Reset Controller include file, and also slightly update documentation. Signed-off-by: Yixun Lan <yixun@amlogic.com> --- .../bindings/reset/amlogic,meson-reset.txt | 3 +- .../dt-bindings/reset/amlogic,meson-axg-reset.h

[PATCH 0/3] add Reset controller driver for Meson-AXG

This patches add the Reset controller driver which found at the Amlogic Meson-AXG SoC. Yixun Lan (3): dt-bindings: reset: Add bindings for the Meson-AXG SoC Reset Controller reset: meson-axg: add compatible string for Meson-AXG SoC arm64: dts: meson-axg: add new reset DT node

[PATCH 2/3] reset: meson-axg: add compatible string for Meson-AXG SoC

Try to add compatible string explictly to support new Meson-AXG SoC. Signed-off-by: Yixun Lan <yixun@amlogic.com> --- drivers/reset/reset-meson.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c index c419a3753d00..93cbee

[PATCH 3/3] arm64: dts: meson-axg: add new reset DT node

Add reset DT node for Amlogic's Meson-AXG SoC. Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi

Re: [PATCH v2 0/2] add clk controller driver for Meson-AXG SoC

Hi jerome: On 11/27/17 21:48, Jerome Brunet wrote: > On Mon, 2017-11-27 at 17:48 +0800, Yixun Lan wrote: >> Add driver for the clk controller which found in Meson AXG SoC >> >> Note, we deliberately create a seperate source file for the Meson AXG >> seri

[PATCH v3 1/3] dt-bindings: clock: add compatible variant for the Meson-AXG

Update the documentation to support clock driver for the Amlogic's Meson-AXG SoC. Signed-off-by: Yixun Lan <yixun@amlogic.com> --- Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devi

[PATCH v3 2/3] clk: meson-axg: add clock controller drivers

From: Qiufang Dai <qiufang@amlogic.com> Add clock controller drivers for Amlogic Meson-AXG SoC. Signed-off-by: Qiufang Dai <qiufang@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/Kconfig.platforms | 1 + drivers/clk/meson/Kconfi

[PATCH v3 0/3] add clk controller driver for Meson-AXG SoC

ic/2017-November/005239.html http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005240.html http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005241.html Qiufang Dai (2): clk: meson-axg: add clock controller drivers arm64: dts: meson-axg: add clock DT info for Meso

[PATCH v3 3/3] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC

From: Qiufang Dai <qiufang@amlogic.com> Try to add Hiubus DT info, and also enable clock DT info for the Amlogic's Meson-AXG SoC. Signed-off-by: Qiufang Dai <qiufang@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/boot/dts/amlogic/m

Re: [PATCH v4 0/4] fix the clock setting for SAR ADC

On 11/11/17 08:37, Jonathan Cameron wrote: > On Tue, 7 Nov 2017 22:36:00 +0100 > Martin Blumenstingl <martin.blumensti...@googlemail.com> wrote: > >> Hi Yixun, >> >> On Tue, Nov 7, 2017 at 3:09 PM, Yixun Lan <yixun@amlogic.com> wrote: >>> pat

[PATCH 3/3] ARM64: dts: meson-axg: add the SPICC controller

From: Sunny Luo <sunny@amlogic.com> Add DT info for the SPICC controller which found in the Amlogic's Meson-AXG SoC. Signed-off-by: Sunny Luo <sunny@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/boot/dts/amlogic/m

[PATCH 0/3] spicc: meson-axg: add SPICC controller

Add the SPICC controller driver to the Amlogic's Meson-AXG SoC. The new compatible string introduced here is aiming for adding a few new features which found at the Meson-AXG platform. Sunny Luo (3): dt-bindings: spicc: update compatible string for the Meson-AXG spi: meson-axg: add SPICC

[PATCH 1/3] dt-bindings: spicc: update compatible string for the Meson-AXG

From: Sunny Luo <sunny@amlogic.com> Update the compatbile string to support Meson-AXG SoCs. Signed-off-by: Sunny Luo <sunny@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- Documentation/devicetree/bindings/spi/spi-meson.txt | 4 +++- 1 file changed,

[PATCH 2/3] spi: meson-axg: add SPICC driver support

From: Sunny Luo <sunny@amlogic.com> Add new compatible string to support SPICC controller which found at Amlogic Meson-AXG SoC. This is aiming at adding a couple of enhanced feature patches. Signed-off-by: Sunny Luo <sunny@amlogic.com> Signed-off-by: Yixun Lan <yixun.

Re: [PATCH v3 2/3] clk: meson-axg: add clock controller drivers

HI Rob On 11/29/17 00:30, Rob Herring wrote: > On Tue, Nov 28, 2017 at 08:53:29PM +0800, Yixun Lan wrote: >> From: Qiufang Dai <qiufang@amlogic.com> >> >> Add clock controller drivers for Amlogic Meson-AXG SoC. >> >> Signed-off-by: Qiufang Dai

[PATCH] pwm: meson: fix harware duty calculation

r Meson PWM Controller") Signed-off-by: Jian Hu <jian...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- drivers/pwm/pwm-meson.c | 19 ++- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c inde

Re: [PATCH v3 2/3] clk: meson-axg: add clock controller drivers

Hi Stephen On 11/30/17 03:34, Stephen Boyd wrote: > On 11/28, Yixun Lan wrote: >> diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c >> new file mode 100644 >> index ..51c5b4062715 >> --- /dev/null >> +++ b/drivers/clk/meson/axg.c >>

[PATCH v4 1/4] dt-bindings: clock: add compatible variant for the Meson-AXG

Update the documentation to support clock driver for the Amlogic's Meson-AXG SoC. Acked-by: Rob Herring <r...@kernel.org> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt | 7 +-- 1 file changed, 5 insertions(+),

[PATCH v4 3/4] clk: meson-axg: add clock controller drivers

From: Qiufang Dai <qiufang@amlogic.com> Add clock controller drivers for Amlogic Meson-AXG SoC. Signed-off-by: Qiufang Dai <qiufang@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/Kconfig.platforms | 1 + drivers/clk/meson/Kconfig|

[PATCH v4 4/4] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC

From: Qiufang Dai <qiufang@amlogic.com> Try to add Hiubus DT info, and also enable clock DT info for the Amlogic's Meson-AXG SoC. Acked-by: Rob Herring <r...@kernel.org> Signed-off-by: Qiufang Dai <qiufang@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com&

[PATCH v4 0/4] add clk controller driver for Meson-AXG SoC

5240.html http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005241.html Qiufang Dai (3): clk: meson-axg: add clocks dt-bindings required header clk: meson-axg: add clock controller drivers arm64: dts: meson-axg: add clock DT info for Meson AXG SoC Yixun Lan (1): dt-bindings: clock

[PATCH v4 2/4] clk: meson-axg: add clocks dt-bindings required header

From: Qiufang Dai <qiufang@amlogic.com> Add the required header for the clocks ID dt-bindings exported from various subsystem in the Meson-AXG SoC. Signed-off-by: Qiufang Dai <qiufang@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- include/dt-binding

[PATCH] ARM64: dts: meson-axg: enable IR controller

Enable IR remote controller which find in Amlogic's Meson-AXG SoC. Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 6 ++ arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 14 ++ 2 files changed, 20 insertions(+) diff

[PATCH v2 1/2] clk: meson-axg: add clock controller drivers

From: Qiufang Dai <qiufang@amlogic.com> Add clock controller drivers for Amlogic Meson-AXG SoC. Signed-off-by: Qiufang Dai <qiufang@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/Kconfig.platforms | 1 + drivers/clk/meson/Kconfi

[PATCH v2 0/2] add clk controller driver for Meson-AXG SoC

Add driver for the clk controller which found in Meson AXG SoC Note, we deliberately create a seperate source file for the Meson AXG series, instead of sharing code with previous GXBB/GXL - the file axg.c It would help us maintaining the code more easily. Changes since v1 [1]: - rework

[PATCH v2 2/2] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC

From: Qiufang Dai <qiufang@amlogic.com> Try to add Hiubus DT info, and also enable clock DT info for the Amlogic's Meson-AXG SoC. Signed-off-by: Qiufang Dai <qiufang@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/boot/dts/amlogic/m

Re: [PATCH v3 3/3] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC

Hi Stephen On 11/30/17 03:35, Stephen Boyd wrote: > On 11/28, Yixun Lan wrote: >> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi >> b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi >> index b932a784b02a..36a2e98338a8 100644 >> --- a/arch/arm64/boot/dts/amlogic/m

[PATCH v4 2/2] ARM64: dts: meson-axg: enable ethernet for A113D S400 board

This is tested in the S400 dev board which use a RTL8211F PHY, and the pins connect to the 'eth_rgmii_y_pins' group. Reviewed-by: Neil Armstrong <narmstr...@baylibre.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 7 +++

[PATCH v4 1/2] ARM64: dts: meson-axg: add ethernet mac controller

Add DT info for the stmmac ethernet MAC which found in the Amlogic's Meson-AXG SoC, also describe the ethernet pinctrl & clock information here. Reviewed-by: Neil Armstrong <narmstr...@baylibre.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/boot/dts/amlogi

[PATCH v4 0/2] Add ethernet support for Meson-AXG SoC

r/005735.html http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005694.html [3] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005738.html [6] git://github.com/BayLibre/clk-meson.git Yixun Lan (2): ARM64: dts: meson-axg: add ethernet mac controller ARM64: dts:

Re: [PATCH v3 1/2] ARM64: dts: meson-axg: add ethernet mac controller

HI Kevin On 12/16/2017 03:29 AM, Kevin Hilman wrote: > Yixun Lan <yixun@amlogic.com> writes: > >> Add DT info for the stmmac ethernet MAC which found in >> the Amlogic's Meson-AXG SoC, also describe the ethernet >> pinctrl & clock information here. >>

Re: [PATCH v4 0/2] dt: add pinctrl driver for Meson-AXG SoC

On 12/16/2017 03:48 AM, Kevin Hilman wrote: > Yixun Lan <yixun@amlogic.com> writes: > >> This is DT part patchset for adding pinctrl support for >> the Amlogic's Meson-AXG SoC. >> >> Changes since v3 at [3] >> -- rebase to khilman's v4.16/dt6

Re: [PATCH v2 2/5] i2c: meson: add configurable divider factors

Hi Wolfram On 11/20/2017 10:54 PM, Yixun Lan wrote: > From: Jian Hu <jian...@amlogic.com> > > This patch try to add support for I2C controller in Meson-AXG SoC, > Due to the IP changes between I2C controller, we need to introduce > a compatible data to make the divide

Re: [PATCH 2/3] reset: meson-axg: add compatible string for Meson-AXG SoC

Hi Philipp On 11/10/2017 04:46 PM, Yixun Lan wrote: > Try to add compatible string explictly to support new Meson-AXG SoC. > > Signed-off-by: Yixun Lan <yixun@amlogic.com> > --- > drivers/reset/reset-meson.c | 2 ++ > 1 file changed, 2 insertions(+) > > di

Re: [PATCH v7 0/6] add clk controller driver for Meson-AXG SoC

Hi Jerome & Kevin On 12/14/17 18:03, Jerome Brunet wrote: > On Mon, 2017-12-11 at 22:13 +0800, Yixun Lan wrote: >> Qiufang Dai (3): >> clk: meson-axg: add clocks dt-bindings required header >> clk: meson-axg: add clock controller drivers >> arm64: dts: meson-a

Re: [PATCH v7 6/6] arm64: dts: meson-axg: switch uart_ao clock to CLK81

On 12/15/17 00:47, Jerome Brunet wrote: > On Mon, 2017-12-11 at 22:13 +0800, Yixun Lan wrote: >> Switch the uart_ao pclk to CLK81 since the clock driver is ready. >> Also move the clock info to the board.dts instead in the soc.dtsi. > > Same comment as for ethmac, is it

Re: [PATCH v2] ARM64: dts: meson-axg: add ethernet mac controller

Hi Jerome: On 12/15/17 00:45, Jerome Brunet wrote: > On Thu, 2017-12-14 at 11:02 +0800, Yixun Lan wrote: >> --- >> Changes in v2 since [1]: >> - rebase to kevin's v4.16/dt64 branch >> - add Neil's Reviewed-by >> - move clock info to board.dts instead of in s

[PATCH v3 0/2] Add ethernet support for Meson-AXG SoC

768.html [2] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005735.html http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005694.html [3] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005738.html Yixun Lan (2): ARM64: dts: meson-axg: add ethernet mac contr

[PATCH v3 1/2] ARM64: dts: meson-axg: add ethernet mac controller

Add DT info for the stmmac ethernet MAC which found in the Amlogic's Meson-AXG SoC, also describe the ethernet pinctrl & clock information here. Reviewed-by: Neil Armstrong <narmstr...@baylibre.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/boot/dts/amlogi

[PATCH v3 2/2] ARM64: dts: meson-axg: enable ethernet for A113D S400 board

This is tested in the S400 dev board which use a RTL8211F PHY, and the pins connect to the 'eth_rgmii_y_pins' group. Reviewed-by: Neil Armstrong <narmstr...@baylibre.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 7 +++

[PATCH v2] ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoC

From: Jian Hu <jian...@amlogic.com> Add PWM DT info for the Amlogic's Meson-Axg SoC. Signed-off-by: Jian Hu <jian...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- Changes in v2 since [1] - drop clock DT info from soc.dtsi [1] http://lists.infradead.o

[PATCH v2] ARM64: dts: meson-axg: add the SPICC controller

From: Sunny Luo <sunny@amlogic.com> Add DT info for the SPICC controller which found in the Amlogic's Meson-AXG SoC. Signed-off-by: Sunny Luo <sunny@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- Changes int v2 since [1] - rebase to Kevin's tree,

[PATCH v8] arm64: dts: meson-axg: switch uart_ao clock to CLK81

Switch the uart_ao pclk to CLK81 since the clock driver is ready. Signed-off-by: Yixun Lan <yixun@amlogic.com> --- This is a fixup for the previous version Changes in v8 since [1] - move clock DT info into soc.dtsi [1] http://lists.infradead.org/pipermail/linux-amlogic/2017-De

Re: [PATCH v3] ARM64: dts: meson-axg: enable IR controller

Hi Jerome On 12/15/2017 11:01 PM, Jerome Brunet wrote: > On Fri, 2017-12-15 at 22:59 +0800, Yixun Lan wrote: >> Enable IR remote controller which found in Amlogic's Meson-AXG SoCs. >> >> Signed-off-by: Yixun Lan <yixun@amlogic.com> >> >> --- >

[PATCH v3] ARM64: dts: meson-axg: enable IR controller

Enable IR remote controller which found in Amlogic's Meson-AXG SoCs. Signed-off-by: Yixun Lan <yixun@amlogic.com> --- Changes since v2 at [2] - rebase to Kevin's v4.16/dt64 branch - this patch depend on pinctrl DT driver Changes since v1 at [1]: - drop the compatbile 'amlogic,me

[PATCH v2] ARM64: dts: meson-axg: add ethernet mac controller

rong <narmstr...@baylibre.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- Changes in v2 since [1]: - rebase to kevin's v4.16/dt64 branch - add Neil's Reviewed-by - move clock info to board.dts instead of in soc.dtsi - drop "meson-axg-dwmac" compatible string, since we d

Re: [PATCH 2/3] reset: meson-axg: add compatible string for Meson-AXG SoC

On 12/14/17 00:01, Philipp Zabel wrote: > Hi Yixun, > > On Wed, 2017-12-13 at 22:07 +0800, Yixun Lan wrote: >> Hi Philipp >> >> On 11/10/2017 04:46 PM, Yixun Lan wrote: >>> Try to add compatible string explictly to support new Meson-AXG SoC. >

Re: [PATCH 3/5] ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC

Hi Neil see my comments in line On 11/17/17 21:05, Neil Armstrong wrote: > Hi Yixun, Jian, > > On 17/11/2017 09:02, Yixun Lan wrote: >> From: Jian Hu <jian...@amlogic.com> >> >> There are four I2C masters in EE domain, and one I2C Master in >> AO domain

[PATCH 3/5] ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC

From: Jian Hu <jian...@amlogic.com> There are four I2C masters in EE domain, and one I2C Master in AO domain, the DT info here should describe them all. Signed-off-by: Jian Hu <jian...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/boot/dts/amlo

[PATCH 0/5] i2c: meson-axg: add I2C controller driver

This patch set try to add I2C controller driver for the Amlogic's Meson-AXG SoC. Jian Hu (5): dt-bindings: i2c: update documentation for the Meson-AXG i2c: meson: add configurable divider factors ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC ARM64: dts: meson-axg: describe pin

[PATCH 5/5] ARM64: dts: meson-axg: enable I2C Master-1 for the audio speaker

From: Jian Hu <jian...@amlogic.com> In the S400 board, The I2C master-1 is connecting to the audio speaker daughter board. Signed-off-by: Jian Hu <jian...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 6

[PATCH 1/5] dt-bindings: i2c: update documentation for the Meson-AXG

From: Jian Hu <jian...@amlogic.com> Update the doc to explicitly add Meson-AXG to support list Signed-off-by: Jian Hu <jian...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- Documentation/devicetree/bindings/i2c/i2c-meson.txt | 1 + 1 file changed, 1 insert

[PATCH 2/5] i2c: meson: add configurable divider factors

From: Jian Hu <jian...@amlogic.com> This patch try to add support for I2C controller in Meson-AXG SoC, Due to the IP changes between I2C controller, we need to introduce a compatible data to make the divider factor configurable. Signed-off-by: Jian Hu <jian...@amlogic.com> Signed-o

[PATCH 4/5] ARM64: dts: meson-axg: describe pin DT info for I2C controller

From: Jian Hu <jian...@amlogic.com> Describe all the pin mux for the I2C controller which found in Meson-AXG SoC. Signed-off-by: Jian Hu <jian...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 64 +++

[PATCH v2 2/2] pinctrl: meson-axg: Add new pinctrl driver for Meson AXG SoC

From: Xingyu Chen <xingyu.c...@amlogic.com> Add new pinctrl driver for Amlogic's Meson-AXG SoC. Reviewed-by: Neil Armstrong <narmstr...@baylibre.com> Signed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- drive

[PATCH v2 1/2] pinctrl: meson-axg: Introduce a pinctrl pinmux ops for Meson-AXG SoC

: Neil Armstrong <narmstr...@baylibre.com> Signed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- drivers/pinctrl/meson/Kconfig | 3 + drivers/pinctrl/meson/Makefile| 1 + drivers/pinctrl/m

[PATCH v2 0/2] add pinctrl driver for Meson-AXG SoC

This patchset adds pinctrl support for the Amlogic's Meson-AXG SoC. While the gpio and pin configuration part is the same the as previous meson SoCs, the pinmux part is different. This requires slightly different pinmux operations along with the actual pinctrl driver description. Changes since

[PATCH v2 0/2] dt: add pinctrl driver for Meson-AXG SoC

This is DT part patchset for adding pinctrl support for the Amlogic's Meson-AXG SoC. Changes since v1 at [1]: -- Separate DT part patches -- Add Neil Armstrong's Ack [1] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005270.html

[PATCH v2 1/2] documentation: Add compatibles for Amlogic Meson AXG pin controllers

From: Xingyu Chen <xingyu.c...@amlogic.com> Add compatibles for Amlogic Meson AXG pin controllers Reviewed-by: Neil Armstrong <narmstr...@baylibre.com> Signed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- Documenta

[RESEND PATCH v3 0/2] dt: add pinctrl driver for Meson-AXG SoC

This is DT part patchset for adding pinctrl support for the Amlogic's Meson-AXG SoC. Changes since v2 at [2]: -- Resend this patch series due to fail to send patch [2/2] Changes since v1 at [1]: -- Separate DT part patches -- Add Neil Armstrong's Ack [2]

[RESEND PATCH v3 1/2] documentation: Add compatibles for Amlogic Meson AXG pin controllers

From: Xingyu Chen <xingyu.c...@amlogic.com> Add compatibles for Amlogic Meson AXG pin controllers Reviewed-by: Neil Armstrong <narmstr...@baylibre.com> Signed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- Documenta

[RESEND PATCH v3 2/2] ARM64: dts: meson-axg: add pinctrl DT info for Meson-AXG SoC

From: Xingyu Chen <xingyu.c...@amlogic.com> Add new pinctrl DT info for the Amlogic's Meson-AXG SoC. Reviewed-by: Neil Armstrong <narmstr...@baylibre.com> Signed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm6

[PATCH v2 3/5] ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC

From: Jian Hu <jian...@amlogic.com> There are four I2C masters in EE domain, and one I2C Master in AO domain, the DT info here should describe them all. Signed-off-by: Jian Hu <jian...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/boot/dts/amlo

[PATCH v2 0/5] i2c: meson-axg: add I2C controller driver

This patch set try to add I2C controller driver for the Amlogic's Meson-AXG SoC. Changes since v1 [1] - update dt-bindings doc (Neil Armstrong) - make meson_i2c_data const (Martin Blumenstingl) - DTS: adjust naming, change from the 'i2c_m0' to 'i2c0' style [1]

[PATCH v2 2/5] i2c: meson: add configurable divider factors

; Signed-off-by: Jian Hu <jian...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- drivers/i2c/busses/i2c-meson.c | 32 1 file changed, 28 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-meson.c b/drivers/i2c/

[PATCH v2 4/5] ARM64: dts: meson-axg: describe pin DT info for I2C controller

From: Jian Hu <jian...@amlogic.com> Describe all the pin mux for the I2C controller which found in Meson-AXG SoC. Signed-off-by: Jian Hu <jian...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 64 +++

[PATCH v2 1/5] dt-bindings: i2c: update documentation for the Meson-AXG

From: Jian Hu <jian...@amlogic.com> Update the doc to explicitly add Meson-AXG to support list Signed-off-by: Jian Hu <jian...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- Documentation/devicetree/bindings/i2c/i2c-meson.txt | 6 +- 1 file changed,

[PATCH v2 5/5] ARM64: dts: meson-axg: enable I2C Master-1 for the audio speaker

From: Jian Hu <jian...@amlogic.com> In the S400 board, The I2C master-1 is connecting to the audio speaker daughter board. Signed-off-by: Jian Hu <jian...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 6

[PATCH v5 1/2] ARM64: dts: meson: drop "sana" clock from SAR ADC

From: Xingyu Chen <xingyu.c...@amlogic.com> The SAR ADC modules doesn't require The "sana" clock. Acked-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> Singed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogi

[PATCH v5 2/2] ARM: dts: meson: drop "sana" clock from SAR ADC

From: Xingyu Chen <xingyu.c...@amlogic.com> The SAR ADC modules doesn't require The "sana" clock. Acked-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> Signed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com

[PATCH v5 0/2] meson: saradc: drop the sana clock

This is a rework for the patch [v4 4/4] of previous series, which mean this will make the patch [1] obsolete. Changes since v4: * separate DTS for ARM(32bit) vs ARM64 * add ACK from Martin [1] [PATCH v4 4/4] ARM64: dts: meson: drop "sana" clock from SAR ADC

Re: [PATCH 1/5] dt-bindings: i2c: update documentation for the Meson-AXG

Hi Neil On 11/17/17 21:02, Neil Armstrong wrote: > On 17/11/2017 09:02, Yixun Lan wrote: >> From: Jian Hu <jian...@amlogic.com> >> >> Update the doc to explicitly add Meson-AXG to support list >> >> Signed-off-by: Jian Hu <jian...@amlogic.com> >&

[PATCH] clk: meson: gxbb: fix wrong clock for SARADC

According to the datasheet, the clock gate bit for SARADC is bit[22] in Meson-GXBB/GXL series. Change-Id: Ic4fa58276d2a9ea273eef0a08541fc213ac5ac89 Signed-off-by: Yixun Lan <yixun@amlogic.com> --- drivers/clk/meson/gxbb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

Re: [PATCH] clk: meson: gxbb: fix wrong clock for SARADC

Hi Neil On 11/05/17 00:40, Neil Armstrong wrote: > Hi Yixun, > > Le 04/11/2017 09:41, Yixun Lan a écrit : >> >> >> On 11/04/17 02:17, Yixun Lan wrote: >>> According to the datasheet, the clock gate bit for >>> SARADC is bit[22

[PATCH] clk: meson: gxbb: fix wrong clock for SARADC/SANA

According to the datasheet, in Meson-GXBB/GXL series, The clock gate bit for SARADC is HHI_GCLK_MPEG2 bit[22], while clock gate bit for SANA is HHI_GCLK_MPEG0 bit[10]. Test passed at gxl_skt dev board. Tested-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan

Re: [PATCH] clk: meson: gxbb: fix wrong clock for SARADC/SANA

Hi Jerome: On 11/06/17 17:10, Jerome Brunet wrote: > On Mon, 2017-11-06 at 15:52 +0800, Yixun Lan wrote: >> According to the datasheet, in Meson-GXBB/GXL series, >> The clock gate bit for SARADC is HHI_GCLK_MPEG2 bit[22], >> while clock gate bit for SANA is HHI_GCLK_MPEG

Re: [PATCH] clk: meson: gxbb: fix wrong clock for SARADC/SANA

Hi Neil: On 11/06/17 16:57, Neil Armstrong wrote: > On 06/11/2017 08:52, Yixun Lan wrote: >> According to the datasheet, in Meson-GXBB/GXL series, >> The clock gate bit for SARADC is HHI_GCLK_MPEG2 bit[22], >> while clock gate bit for SANA is HHI_GCLK_MPEG0 bit[10]. >>

Re: [PATCH] clk: meson: gxbb: fix wrong clock for SARADC/SANA

Hi Jerome: On 11/06/17 17:10, Jerome Brunet wrote: > On Mon, 2017-11-06 at 15:52 +0800, Yixun Lan wrote: >> According to the datasheet, in Meson-GXBB/GXL series, >> The clock gate bit for SARADC is HHI_GCLK_MPEG2 bit[22], >> while clock gate bit for SANA is HHI_GCLK_MPEG

[PATCH v3 0/4] fix the clock setting for SAR ADC

radead.org/pipermail/linux-amlogic/2017-November/005242.html Xingyu Chen (3): iio: adc: meson-saradc: remove irrelevant clock "sana" dt-bindings: iio: adc: update the doc for SAR ADC ARM64: dts: meson: drop "sana" clock from SAR ADC Yixun Lan (1): clk: meson: gxbb: fix wr

Re: [PATCH] clk: meson: gxbb: fix wrong clock for SARADC/SANA

Hi Martin On 11/07/17 06:03, Martin Blumenstingl wrote: > Hi Yixun, > > On Mon, Nov 6, 2017 at 10:31 AM, Yixun Lan <yixun@amlogic.com> wrote: >> Hi Neil: >> >> >> On 11/06/17 16:57, Neil Armstrong wrote: >>> On 06/11/2017 08:52, Yixun Lan wrote

Re: [PATCH v3 4/4] ARM64: dts: meson: drop "sana" clock from SARADC

Hi On 11/07/17 13:37, Yixun Lan wrote: > From: Xingyu Chen <xingyu.c...@amlogic.com> > > The SAR ADC modules doesn't require The "sana" clock. > > Singed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> > Signed-off-by: Yixun Lan <yixun@amlogic.

[PATCH v3 2/4] iio: adc: meson-saradc: remove irrelevant clock "sana"

From: Xingyu Chen <xingyu.c...@amlogic.com> The "sana" clock is not used at SAR ADC module in Amlogic Meson SoC, it is irrelevant for the SAR ADC. Signed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- drivers

[PATCH v3 4/4] ARM64: dts: meson: drop "sana" clock from SAR ADC

From: Xingyu Chen <xingyu.c...@amlogic.com> The SAR ADC modules doesn't require The "sana" clock. Singed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm/boot/dts/meson8.dtsi | 5 ++--- ar

[PATCH v3 4/4] ARM64: dts: meson: drop "sana" clock from SARADC

From: Xingyu Chen <xingyu.c...@amlogic.com> The SAR ADC modules doesn't require The "sana" clock. Singed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm/boot/dts/meson8.dtsi | 5 ++--- ar

[PATCH v3 3/4] dt-bindings: iio: adc: update the doc for SAR ADC

From: Xingyu Chen <xingyu.c...@amlogic.com> Update the doc as the SAR ADC modules doesn't require "sana" clock. Singed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- Documentation/devicetree/bindings/iio/adc/amlog

[PATCH v3 1/4] clk: meson: gxbb: fix wrong clock for SARADC/SANA

ingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- drivers/clk/meson/gxbb.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c index b2d1e8ed7152..92168348ffa6 100644 --- a/dr

[PATCH 3/4] pinctrl: meson-axg: Add new pinctrl driver for Meson AXG SoC

From: Xingyu Chen <xingyu.c...@amlogic.com> Add new pinctrl driver for Amlogic's Meson-AXG SoC. Signed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- drivers/pinctrl/meson/Kconfig | 6 + drivers/pinc

[PATCH 2/4] pinctrl: meson-axg: Introduce a pinctrl pinmux ops for Meson-AXG SoC

-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- drivers/pinctrl/meson/Kconfig | 3 + drivers/pinctrl/meson/Makefile| 1 + drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c | 118 ++ d

[PATCH 0/4] add pinctrl driver for Meson-AXG SoC

patch [1/4]: Document the new pinctrl compatible string for Meson-AXG patch [2/4]: Introduce a new pinctrl pinmux ops for Meson-AXG SoC. The pinctrl IP has been changed, and now it use 4-bit continuous bit to decribe the pin. patch [3/4]: Add pinctrl driver

[PATCH 1/4] documentation: Add compatibles for Amlogic Meson AXG pin controllers

From: Xingyu Chen <xingyu.c...@amlogic.com> Add compatibles for Amlogic Meson AXG pin controllers Signed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt | 2 ++

[PATCH 4/4] ARM64: dts: meson-axg: add pinctrl DT info for Meson-AXG SoC

From: Xingyu Chen <xingyu.c...@amlogic.com> Add new pinctrl DT info for the Amlogic's Meson-AXG SoC. Signed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 43

[PATCH v4 0/4] fix the clock setting for SAR ADC

0170314publicversion-Wesion.pdf Xingyu Chen (3): iio: adc: meson-saradc: remove irrelevant clock "sana" dt-bindings: iio: adc: update the doc for SAR ADC ARM64: dts: meson: drop "sana" clock from SAR ADC Yixun Lan (1): clk: meson: gxbb: fix wrong clock for SARADC/S

[PATCH v4 2/4] iio: adc: meson-saradc: remove irrelevant clock "sana"

From: Xingyu Chen <xingyu.c...@amlogic.com> The "sana" clock is not used at SAR ADC module in Amlogic Meson SoC, it is irrelevant for the SAR ADC. Signed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- drivers

[PATCH v4 3/4] dt-bindings: iio: adc: update the doc for SAR ADC

From: Xingyu Chen <xingyu.c...@amlogic.com> Update the doc as the SAR ADC modules doesn't require "sana" clock. Singed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- Documentation/devicetree/bindings/iio/adc/amlog

[PATCH v4 4/4] ARM64: dts: meson: drop "sana" clock from SAR ADC

From: Xingyu Chen <xingyu.c...@amlogic.com> The SAR ADC modules doesn't require The "sana" clock. Singed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Signed-off-by: Yixun Lan <yixun@amlogic.com> --- arch/arm/boot/dts/meson8.dtsi | 5 ++--- ar

  1   2   3   4   5   6   7   8   >