On 25/06/13 21:47, Olof Johansson wrote:
> On Tue, Jun 25, 2013 at 1:30 PM, Olof Johansson wrote:
>> On Tue, Jun 25, 2013 at 12:13:42PM +0100, Srinivas KANDAGATLA wrote:
>>> From: Srinivas Kandagatla
>>>
>>> This patch-set adds basic support for STMicroe
Thanks for your comments,
On 25/06/13 22:14, Sören Brinkmann wrote:
>> +Example:
>> > +
>> > + timer@2c000600 {
>> > + compatible = "arm,cortex-a9-global-timer";
>> > + reg = <0x2c000600 0x20>;
>> > + interrupts = <1 13 0xf01>;
>> > + };
> Isn't a 'clocks' entry missing
On 09/06/13 17:00, Lars-Peter Clausen wrote:
> [...]
>> +int regmap_field_write(struct regmap_field *field, unsigned int val)
>> +{
>> +int field_bits;
>> +unsigned int reg_mask;
>> +field_bits = field->msb - field->lsb + 1;
>> +reg_mask = ((BIT(field_bits) - 1) << field->lsb);
>> +
baud rates.
Signed-off-by: Srinivas Kandagatla
CC: Stephen Gallimore
CC: Stuart Menefy
CC: Arnd Bergmann
CC: Greg Kroah-Hartman
---
.../devicetree/bindings/tty/serial/st-asc.txt | 18 +
drivers/tty/serial/Kconfig | 16 +
drivers/tty/serial/Make
From: Srinivas Kandagatla
Here is new patch-set incorporating all the review comments.
This patch-set adds basic support for STMicroelectronics STi SOCs
which includes STiH415 and STiH416 with B2000 and B2020 board support.
STiH415 and STiH416 are dual-core ARM Cortex-A9 CPU, designed for
timer is
clocked by PERIPHCLK.
Signed-off-by: Stuart Menefy
Signed-off-by: Srinivas Kandagatla
CC: Arnd Bergmann
CC: Rob Herring
CC: Linus Walleij
CC: Will Deacon
CC: Thomas Gleixner
---
.../devicetree/bindings/arm/global_timer.txt | 21 ++
drivers/clocksource/Kconfig
signal.
About driver:
This pinctrl driver manages both PIO and PIO-mux block using pinctrl,
pinconf, pinmux, gpio subsystems. All the pinctrl related config
information can only come from device trees.
Signed-off-by: Srinivas Kandagatla
CC: Stephen Gallimore
CC: Stuart Menefy
CC: Arnd Bergmann
ch is usefull for
drivers like pinctrl.
This patch adds support to ST System Configuration registers, which can
be configured by the drivers.
Signed-off-by: Srinivas Kandagatla
CC: Stuart Menefy
CC: Stephen Gallimore
CC: Linus Walleij
CC: Mark Brown
---
.../devicetree/bindings/mfd/sti-sys
based on regmaps,
like some clocks or pinctrls which can work on the regmap_fields
directly without having to worry about bit positions.
Signed-off-by: Srinivas Kandagatla
CC: Mark Brown
CC: Arnd Bergmann
CC: Alexander Shiyan
CC: Lars-Peter Clausen
---
drivers/base/regmap/internal.h |8
The STiH415 is the next generation of HD, AVC set-top box processors for
satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9
1.0 GHz, dual-core CPU.
Signed-off-by: Srinivas Kandagatla
CC: Stephen Gallimore
CC: Stuart Menefy
CC: Arnd Bergmann
CC: Linus Walleij
This patch adds stih415 and stih416 support to multi_v7_defconfig.
Signed-off-by: Srinivas Kandagatla
CC: Arnd Bergmann
---
arch/arm/configs/multi_v7_defconfig | 32 +++-
1 files changed, 15 insertions(+), 17 deletions(-)
diff --git a/arch/arm/configs
This patch adds low level debug uart support to sti based SOCs.
Signed-off-by: Srinivas Kandagatla
CC: Arnd Bergmann
---
arch/arm/Kconfig.debug | 38 +++
arch/arm/include/debug/sti.S | 61 ++
arch/arm/mach-sti
B2000 board is reference board for STIH415/416 SOCs, it has
2 x UART, 4x USB, 2 x Ethernet, 1 x SATA, 1 x PCIe, and 1GB RAM.
This patch add initial support to b2000 with STiH415/416 with UART2 as
console and a heard beat LED.
Signed-off-by: Srinivas Kandagatla
CC: Stephen Gallimore
CC: Arnd
mode 100644
index 000..442b019
--- /dev/null
+++ b/arch/arm/boot/dts/stih415-b2020.dts
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2013 STMicroelectronics (R&D) Limited.
+ * Author: Srinivas Kandagatla
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under
The STiH416 is advanced HD AVC processor with 3D graphics acceleration
and 1.2-GHz ARM Cortex-A9 SMP CPU.
Signed-off-by: Srinivas Kandagatla
CC: Stephen Gallimore
CC: Stuart Menefy
CC: Arnd Bergmann
CC: Linus Walleij
---
Documentation/arm/sti/stih416-overview.txt | 12 +
arch/arm/boot
On 10/06/13 10:15, Mark Brown wrote:
> On Sun, Jun 09, 2013 at 06:00:19PM +0200, Lars-Peter Clausen wrote:
>
>>> +int regmap_field_write(struct regmap_field *field, unsigned int val)
>>> +{
>>> + int field_bits;
>>> + unsigned int reg_mask;
>>> + field_bits = field->msb - field->lsb + 1;
>>>
Thanks for testing...
On 10/06/13 11:40, Mark Rutland wrote:
> On Mon, Jun 10, 2013 at 10:27:57AM +0100, Srinivas KANDAGATLA wrote:
>> > This patch adds stih415 and stih416 support to multi_v7_defconfig.
> This seems to drop a few options also:
>
> CONFIG_ARM_ARCH_TIMER
S
On 10/06/13 12:15, Michal Simek wrote:
Thankyou for your comments,
> Hi,
>
> hmm - that's a nice bug that thunderbird is not able to send this email. :-(
> Let's comment it again via gmail.
> diff --git a/arch/arm/boot/dts/stih415.dtsi
> b/arch/arm/boot/dts/stih415.dtsi
> new file mod
Thankyou for your comment and suggestion,
I will fix the POSIX compliant issue.
On 10/06/13 10:35, Russell King - ARM Linux wrote:
> On Mon, Jun 10, 2013 at 10:21:00AM +0100, Srinivas KANDAGATLA wrote:
>> This patch adds support to ASC (asynchronous serial controller)
>> d
On 10/06/13 14:16, Linus Walleij wrote:
> On Mon, Jun 10, 2013 at 11:22 AM, Srinivas KANDAGATLA
> wrote:
>
>> This mfd driver provides higher level inialization routines for various
>> IPs like Ethernet, USB, PCIE, SATA and so on. Also it provides way to
>> get to sy
Thanks for the comments.
On 10/06/13 15:02, Arnd Bergmann wrote:
> On Monday 10 June 2013 14:52:38 Srinivas KANDAGATLA wrote:
>> On 10/06/13 14:16, Linus Walleij wrote:
>>> On Mon, Jun 10, 2013 at 11:22 AM, Srinivas KANDAGATLA
>>> wrote:
>>>
>>>> Th
Thankyou for your comments.
On 10/06/13 14:52, Arnd Bergmann wrote:
> On Monday 10 June 2013 10:27:05 Srinivas KANDAGATLA wrote:
>
>> +soc {
>> +pin-controller-sbc {
>> +#address-cells = <1>;
>> +
On 11/06/13 00:19, Russell King - ARM Linux wrote:
> On Mon, Jun 10, 2013 at 12:46:59PM +0100, Srinivas KANDAGATLA wrote:
>>> > > + aux_ctrl = (0x1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) |
>>> > > + (0
On 10/06/13 15:02, Arnd Bergmann wrote:
> There are multiple ways of doing that, e.g. you could export a function
> from syscon.c that you call to register the device node and then import
> the regmap from syscon into your high-level driver again.
>
Hi Arnd/Linus,
Thankyou for your comments,
I d
On 11/06/13 11:48, Mark Brown wrote:
> On Mon, Jun 10, 2013 at 10:21:58AM +0100, Srinivas KANDAGATLA wrote:
>> It is common to access regmap registers at bit level, using
>> regmap_update_bits or regmap_read functions, however the end user has to
>> take care of a mask or s
From: Srinivas Kandagatla
It is common to access regmap registers at bit level, using
regmap_update_bits or regmap_read functions, however the end user has to
take care of a mask or shifting. This becomes overhead when such use
cases are high. Having a common function to do this is much
On 11/06/13 21:13, Linus Walleij wrote:
> On Tue, Jun 11, 2013 at 4:05 PM, Srinivas KANDAGATLA
> wrote:
>
>> Doing this is not adding any value to the driver, because
>> 1. Currently the driver only support DT boot paths, in my previous RFC
>> patches, Arnd suggested
Thanks Peppe for the comments,
On 01/07/13 18:20, Giuseppe CAVALLARO wrote:
> On 7/1/2013 1:43 PM, Srinivas KANDAGATLA wrote:
>> From: Srinivas Kandagatla
>>
>> +
>> +plat->bus_id = of_alias_get_id(np, "ethernet");
>> +if (
From: Srinivas Kandagatla
Hi Peppe,
Thankyou for the comments on RFC patches.
This patch series adds support to new gmac versions 3.6.10 and 3.710, these
versions of IP are integrated into ST STiH415/STiH416 SOCs.
This patchset also adds phy reset capablity to stmmac-mdio driver via DT
From: Srinivas Kandagatla
In some DT use-cases platform data might be already allocated and passed
via AUXDATA. These are the cases where machine level code populates few
callbacks in the platform data.
This patch adds check and reuses platform_data if its valid, before
allocating a new one
From: Srinivas Kandagatla
This patch adds dt support to dwmac version 3.610 and 3.710 these
versions are integrated in STiH415 and STiH416 ARM A9 SOCs.
To support these IP version, some of the device tree properties are
extended.
Signed-off-by: Srinivas Kandagatla
---
Documentation/devicetree
From: Srinivas Kandagatla
This patch adds phy reset callback support for stmmac driver via device
trees. It adds three new properties to gmac device tree bindings to
define the reset signal via gpio.
With this patch users can conveniently pass reset gpio number with pre,
pulse and post delay in
On 04/07/13 00:04, David Miller wrote:
> You are going to have to fix up the following build warnings and resubmit:
>
> CC [M] drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.o
> drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c: In function
> ‘stmmac_mdio_reset’:
> drivers/net/ethernet/stmic
From: Srinivas Kandagatla
This patch adds dt support to dwmac version 3.610 and 3.710 these
versions are integrated in STiH415 and STiH416 ARM A9 SOCs.
To support these IP version, some of the device tree properties are
extended.
Signed-off-by: Srinivas Kandagatla
---
Documentation/devicetree
From: Srinivas Kandagatla
This patch adds phy reset callback support for stmmac driver via device
trees. It adds three new properties to gmac device tree bindings to
define the reset signal via gpio.
With this patch users can conveniently pass reset gpio number with pre,
pulse and post delay in
From: Srinivas Kandagatla
Hi Peppe/Dave,
Thankyou for the comments on v1 patches.
This patch series adds support to new gmac versions 3.6.10 and 3.710, these
versions of IP are integrated into ST STiH415/STiH416 SOCs.
This patchset also adds phy reset capablity to stmmac-mdio driver via DT
From: Srinivas Kandagatla
In some DT use-cases platform data might be already allocated and passed
via AUXDATA. These are the cases where machine level code populates few
callbacks in the platform data.
This patch adds check and reuses platform_data if its valid, before
allocating a new one
timer is
clocked by PERIPHCLK.
Signed-off-by: Stuart Menefy
Signed-off-by: Srinivas Kandagatla
CC: Arnd Bergmann
CC: Rob Herring
CC: Linus Walleij
CC: Will Deacon
CC: Thomas Gleixner
---
Thankyou for reveiwing the v6 patch.
This patch is split out of the orignal 10 patches submitted for
On 26/06/13 14:24, Daniel Lezcano wrote:
>> If its not too late can this patch be considered for 3.11 via clocksource
>> tree?
>> > This patch has no build dependencies.
> I took it in my tree but it is too late for a 3.11, sorry.
Thanks Daniel.
>
> Thanks
> -- Daniel
--
To unsubscribe from
Thankyou Axel for looking at this.
There is already a patch is submitted for this.
https://lkml.org/lkml/2013/6/26/494 which I have Acked.
Thanks,
srini
On 28/06/13 11:33, Axel Lin wrote:
> syscon_regmap_lookup_by_phandle() returns ERR_PTR on error.
>
> Signed-off-by: Axel Lin
> ---
> drivers/
info->pctl = pinctrl_register(pctl_desc, &pdev->dev, info);
> - if (IS_ERR(info->pctl)) {
> + if (!info->pctl) {
> dev_err(&pdev->dev, "Failed pinctrl registration\n");
> - return PTR_ERR(info->pctl);
> +
On 28/06/13 13:16, Axel Lin wrote:
> 2013/6/28 Srinivas KANDAGATLA :
>> Thankyou Axel for looking at this.
>>
>> There is already a patch is submitted for this.
>> https://lkml.org/lkml/2013/6/26/494 which I have Acked.
>
> That is strange.
> I don't thi
From: Srinivas Kandagatla
This patch adds dt support to dwmac version 3.610 and 3.710 these
versions are integrated in STiH415 and STiH416 ARM A9 SOCs.
To support these IP version, some of the device tree properties are
extended.
Signed-off-by: Srinivas Kandagatla
---
Documentation/devicetree
From: Srinivas Kandagatla
In some DT use-cases platform data might be already allocated and passed
via AUXDATA. These are the cases where machine level code populates few
callbacks in the platform data.
This patch adds check and reuses platform_data if its valid, before
allocating a new one
From: Srinivas Kandagatla
Hi Peppe,
This patch series adds support to new gmac versions 3.6.10 and 3.710, these
versions of IP are integrated into ST STiH415/STiH416 SOCs.
This patchset also adds phy reset capablity to stmmac-mdio driver via DT.
Thanks,
srini
Srinivas Kandagatla (3
From: Srinivas Kandagatla
This patch adds phy reset callback support for stmmac driver via device
trees. It adds three new properties to gmac device tree bindings to
define the reset signal via gpio.
With this patch users can conveniently pass reset gpio number with pre,
pulse and post delay in
Thanks Sean for the comments,
On 12/07/13 13:46, Sean Young wrote:
> On Fri, Jul 12, 2013 at 09:55:28AM +0100, Srinivas KANDAGATLA wrote:
>> From: Srinivas Kandagatla
>>
>> The use case is simple, if any rc device has allowed protocols =
>> RC_TYPE_LIRC and map_name =
From: Srinivas Kandagatla
This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP is common
across all the ST parts for settop box platforms.
ASC is embedded in ST COMMS IP block. It supports Rx & Tx functionality.
It sup
From: Srinivas Kandagatla
This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP is common
across all the ST parts for settop box platforms.
ASC is embedded in ST COMMS IP block. It supports Rx & Tx functionality.
It sup
t; - }
> + bank->base = devm_ioremap_resource(dev, &res);
> + if (IS_ERR(bank->base))
> + return PTR_ERR(bank->base);
>
> bank->gpio_chip = st_gpio_template;
> bank->gpio_chip.base = bank_num * ST_GPIO_PINS_PER_BANK;
>
Acked-
t; return info->nfunctions;
> }
>
> -const char *st_pmx_get_fname(struct pinctrl_dev *pctldev,
> +static const char *st_pmx_get_fname(struct pinctrl_dev *pctldev,
> unsigned selector)
> {
> struct st_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
>
Acked
From: Stephen Gallimore
Clocks implementing the get_parent() op may return an invalid parent
index if the hardware is in an undefined state when the clock is
created. However the calls of get_parent() in clk.c do not check
that the returned index is in range before using it to dereference
the clo
From: Srinivas Kandagatla
Thankyou for providing comments on RFC patch.
This patchset adds new members to rc_device structure to open rc device from
code other than rc-main. In the current code rc-device is only opened via input
driver. In cases where rc device is using lirc protocol, it will
From: Srinivas Kandagatla
This patch adds user count to rc_dev structure, the reason to add this
new member is to allow other code like lirc to open rc device directly.
In the existing code, rc device is only opened by input subsystem which
works ok if we have any input drivers to match. But in
From: Srinivas Kandagatla
The use case is simple, if any rc device has allowed protocols =
RC_TYPE_LIRC and map_name = RC_MAP_LIRC set, the driver open will be never
called. The reason for this is, all of the key maps except lirc have some
KEYS in there map, so during rc_register_device process
On 19/07/13 12:01, Sean Young wrote:
>> +int rval = 0;
>>
>> -return rdev->open(rdev);
>> +if (!rdev->users++)
>> +rval = rdev->open(rdev);
>> +
>> +if (rval)
>> +rdev->users--;
>> +
>> +return rval;
>
> This looks racey. Some locking is needed, I thi
From: Srinivas Kandagatla
Thankyou for providing comments on v1 patch.
This patchset adds new members to rc_device structure to open rc device from
code other than rc-main. In the current code rc-device is only opened via input
driver. In cases where rc device is using lirc protocol, it will
From: Srinivas Kandagatla
The use case is simple, if any rc device has allowed protocols =
RC_TYPE_LIRC and map_name = RC_MAP_LIRC set, the driver open will be never
called. The reason for this is, all of the key maps except lirc have some
KEYS in there map, so during rc_register_device process
From: Srinivas Kandagatla
This patch adds user count to rc_dev structure, the reason to add this
new member is to allow other code like lirc to open rc device directly.
In the existing code, rc device is only opened by input subsystem which
works ok if we have any input drivers to match. But in
On 23/07/13 03:35, Olof Johansson wrote:
> On Tue, Jul 09, 2013 at 08:26:33AM +0100, Srinivas KANDAGATLA wrote:
>> From: Srinivas Kandagatla
>>
>> Some of the ARM_ERRATA selection is not done in the initial SOC support
>> patches. This patch selects 2 new ARM_ERRATA&
Hi Greg,
Am not sure if you missed this patch.
Can you please consider this for 3.12.
Thanks,
srini
On 15/07/13 12:39, Srinivas KANDAGATLA wrote:
> From: Srinivas Kandagatla
>
> This patch adds support to ASC (asynchronous serial controller)
> driver, which is basically a sta
On 08/08/13 18:11, Sören Brinkmann wrote:
> Hi Daniel,
>
> On Thu, Aug 01, 2013 at 07:48:04PM +0200, Daniel Lezcano wrote:
>> On 08/01/2013 07:43 PM, Sören Brinkmann wrote:
>>> On Thu, Aug 01, 2013 at 07:29:12PM +0200, Daniel Lezcano wrote:
On 08/01/2013 01:38 AM, Sören Brinkmann wrote:
>
Hi Mark,
On 12/05/13 15:59, Mark Brown wrote:
> On Wed, May 08, 2013 at 11:20:09AM +0100, Srinivas KANDAGATLA wrote:
>> From: Srinivas Kandagatla
>>
>> If we dump syscon regmap registers via debugfs you will notice that the
>> dump contains lot of values.
From: Srinivas Kandagatla
regmap_debugfs_get_dump_start should return the offset of the register
it should start reading from, However in the current code at one point
the code does not return correct register offset.
With this patch all the returns from this function takes reg_stride in
to
From: Srinivas Kandagatla
If we dump syscon regmap registers via debufs you will notice that the
dump contains lot of values at the end.
An example configuration is:
syscon@fdde{
compatible = "syscon";
reg = <0xfdde 0x15c>;
};
e
From: Srinivas Kandagatla
If we dump syscon regmap registers via debugfs you will notice that the
dump contains lot of values.
An example configuration is:
syscon@fdde{
compatible = "syscon";
reg = <0xfdde 0x15c>;
};
example
From: Srinivas Kandagatla
The STiH416 is advanced HD AVC processor with 3D graphics acceleration
and 1.2-GHz ARM Cortex-A9 SMP CPU.
Signed-off-by: Srinivas Kandagatla
CC: Stephen Gallimore
CC: Stuart Menefy
---
Documentation/arm/STiH41x/stih416-overview.txt | 12 +
arch/arm/boot/dts
From: Srinivas Kandagatla
B2020 ADI board is reference board for STIH415/416 SOCs, it has 2 x
UART, 4x USB, 1 x Ethernet, 1 x SATA, 1 x PCIe, and 2GB RAM with
standard set-top box IPs.
This patch adds initial support to B2020 with STiH415/416 with SBC_UART1
as console and a heard beat LED
timer is
clocked by PERIPHCLK.
Signed-off-by: Stuart Menefy
Signed-off-by: Srinivas Kandagatla
---
Documentation/devicetree/bindings/arm/gt.txt | 21 ++
arch/arm/Kconfig |6 +
arch/arm/include/asm/global_timer.h | 12 +
arch/arm/kernel/Makefile
From: Srinivas Kandagatla
B2000 board is reference board for STIH415/416 SOCs, it has
2 x UART, 4x USB, 2 x Ethernet, 1 x SATA, 1 x PCIe, and 1GB RAM.
This patch add initial support to b2000 with STiH415/416 with UART2 as
console and a heard beat LED.
Signed-off-by: Srinivas Kandagatla
CC
From: Srinivas Kandagatla
This patch introduces syscon_claim, syscon_read, syscon_write,
syscon_release APIs to help drivers to use syscon registers in much more
flexible way.
With this patch, a driver can claim few/all bits in the syscon registers
and do read/write and then release them when
From: Srinivas Kandagatla
The STiH415 is the next generation of HD, AVC set-top box processors for
satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9
1.0 GHz, dual-core CPU.
Signed-off-by: Srinivas Kandagatla
CC: Stephen Gallimore
CC: Stuart Menefy
---
Documentation
Thankyou for the comments.
On 08/05/13 16:06, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 15:11 Wed 08 May , Srinivas KANDAGATLA wrote:
>> From: Srinivas Kandagatla
>>
>> This patch add pinctrl support to ST SoCs.
>>
>> About hardware:
>> ST Set-Top-B
Thankyou for the comments.
On 08/05/13 17:18, Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
>> From: Srinivas Kandagatla
>>
>> The STiH415 is the next generation of HD, AVC set-top box processors for
>> satellite, cable, terrestrial and I
On 08/05/13 17:20, Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
>> diff --git a/arch/arm/mach-stih41x/board-dt.c
>> b/arch/arm/mach-stih41x/board-dt.c
>> index 8005f71..1f23aca 100644
>> --- a/arch/arm/mach-stih41x/board-dt.c
>>
Thankyou for your comments.
On 08/05/13 15:50, Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
>> From: Srinivas Kandagatla
>>
>> This patch introduces syscon_claim, syscon_read, syscon_write,
>> syscon_release APIs to help drivers to use sy
Thankyou for the comments.
On 08/05/13 16:01, Mark Brown wrote:
> On Wed, May 08, 2013 at 04:50:22PM +0200, Arnd Bergmann wrote:
>
>>> In many cases a single syconf register contains bits related to multiple
>>> devices, and therefore it need to be shared across multiple drivers at
>>> bit level. T
Thankyou for the comments.
On 08/05/13 15:34, Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
>> From: Srinivas Kandagatla
>> +*st-asc(Serial Port)
>> +
>> +Required properties:
>> +- compatible : Should be "st,asc".
> A
On 08/05/13 15:39, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>> +
>> >
>> > Please remove all forward declarations, by reordering the functions in
>> > the way they are called.
>> >
> and drop the dummy functions
We can not remove the dummy functions, as the serial-core does not check
it before us
Hi Arnd,
Thankyou for extending the discussion.
On 08/05/13 20:48, Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
>> the pinctrl driver calls syconf_claim(np, "st,alt-control) to get a
>> field and then do a read/write on the field.
>>
>&g
On 09/05/13 10:51, Mark Brown wrote:
> On Wed, May 08, 2013 at 06:42:04PM +0100, Srinivas KANDAGATLA wrote:
>
> Fix your mailer to word wrap within paragraphs.
>
Sorry about that.
>> Ultimately the syscon_write use the regmap_update_bits, however we
>> really want is
On 09/05/13 14:26, Mark Brown wrote:
> On Thu, May 09, 2013 at 12:58:01PM +0100, Srinivas KANDAGATLA wrote:
>
>> Currently, we have two bits of information which come from device trees.
>> 1> The syscon bank/group definition itself.
>> 2> syscon register offse
On 08/05/13 15:38, Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
>> From: Stuart Menefy
>>
>> This is a simple driver for the global timer module found in the Cortex
>> A9-MP cores from revision r1p0 onwards. This should be able to perf
On 09/05/13 15:40, Mark Brown wrote:
> So what exactly is the driver doing then? If the register maps look
> nothing like each other then what's the common functionality the driver
> is providing?
What I meant here is that, sysconf registers are reassigned per SOC, so
the sysconf register definiti
On 09/05/13 15:51, Arnd Bergmann wrote:
> It won't.
>
>> > Looking at the code in clocksource_of_init it just goes through the
>> > of_device_id table, which is not used in case of non-DT.
> All new platforms are DT-only, and none of the old platforms use this
> driver, so it does not matter.
>
I
fic to ST.
This is how we did it initially in the out-of-tree kernel.
http://git.stlinux.com/?p=stm/linux-stm.git;a=blob;f=drivers/stm/sysconf.c
Any suggestions?
thanks,
srini
On 09/05/13 10:51, Mark Brown wrote:
> On Wed, May 08, 2013 at 06:42:04PM +0100, Srinivas KANDAGATLA wrote
From: Srinivas Kandagatla
When I tried booting a stih415 Dual core A9 with multi_v7_defconfig, it
failed to boot. The issues seems to be changing by enabling or disabling
VT8550 platform. Having a quick look at dt_compat list, it seems to miss
a NULL terminator, which means of_flat_dt_match will
Hi Arnd,
Thankyou for the comments.
On 17/05/13 15:36, Arnd Bergmann wrote:
> On Thursday 09 May 2013, Srinivas KANDAGATLA wrote:
>> On 08/05/13 20:48, Arnd Bergmann wrote:
>> I agree, my initial approach was having a dedicated driver specific to
>> ST syscon, however sysc
On 23/05/13 22:44, Arnd Bergmann wrote:
Thankyou Arnd for extending this discussion.
> On Monday 20 May 2013, Srinivas KANDAGATLA wrote:
>> On 17/05/13 15:36, Arnd Bergmann wrote:
>>
>> On the other hand using device trees to describe the HW
>> configuration(sysconfs)
From: Srinivas Kandagatla
It is common to access regmap registers at bit level, using
regmap_update_bits or regmap_read functions, however the end user has to
take care of a mask or shifting. This becomes overhead when such use
cases are high. Having a common function to do this is much convient
: Srinivas Kandagatla
Changes since v1:
- Selecting RESET_CONTROLLER
- Constifying reset_ops
drivers/firmware/Kconfig | 1 +
drivers/firmware/qcom_scm-32.c | 13 +
drivers/firmware/qcom_scm-64.c | 14 ++
drivers/firmware/qcom_scm.c| 30
Thanks Bjorn for this patch,
I will start playing with patch soon, but here are few comments.
On 17/06/16 18:17, Bjorn Andersson wrote:
From: Bjorn Andersson
This initial hack powers the q6v5, boots and authenticate the mba and
use that to load the mdt and subsequent bXX files.
Signed-off-by
This patch adds support to 4 pin UART0 on LS expansion connector.
Signed-off-by: Srinivas Kandagatla
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096
This patch adds apq8096 db820c basic support with serial port.
Signed-off-by: Srinivas Kandagatla
---
arch/arm64/boot/dts/qcom/Makefile| 2 +-
arch/arm64/boot/dts/qcom/apq8096-db820c.dts | 21 +
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 34
This patch adds support to LS_I2C1 on LS expansion connector.
Signed-off-by: Srinivas Kandagatla
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096
This patch adds support to LS-I2C0 on LS expansion connector.
Signed-off-by: Srinivas Kandagatla
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096
This patch adds support to i2c bus on High speed connector.
Signed-off-by: Srinivas Kandagatla
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1170562.html
Srinivas Kandagatla (8):
arm64: dts: db820c: add basic board support
arm64: dts: db820c: add support to LS-UART0
arm64: dts: db820c: add support to LS-I2C0
arm64: dts: db820c: add support to LS-I2C1
arm64: dts: db820c: add
This patch adds support to SPI on HS expansion connector.
Signed-off-by: Srinivas Kandagatla
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
This patch adds support to external sd card.
Signed-off-by: Srinivas Kandagatla
---
arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 39 +++
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 10 ++
2 files changed, 49 insertions(+)
create mode 100644 arch/arm64
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