At 2015-05-26 19:05:36, "Morten Rasmussen" wrote:
>Hi,
>
>[Adding maintainers and others to cc]
>
>On Mon, May 25, 2015 at 02:19:43AM +0100, Chao Xie wrote:
>> hi
>> I saw the patch “sched: Make sched entity usage tracking
>> scale-invariant” that w
At 2015-05-26 19:05:36, Morten Rasmussen morten.rasmus...@arm.com wrote:
Hi,
[Adding maintainers and others to cc]
On Mon, May 25, 2015 at 02:19:43AM +0100, Chao Xie wrote:
hi
I saw the patch “sched: Make sched entity usage tracking
scale-invariant” that will make the usage to be freq scaled
hi
I saw the patch “sched: Make sched entity usage tracking scale-invariant” that
will make the usage to be freq scaled.
So if delta period that the calculation of usage based on cross a frequency
change, so how can you make sure the usage calculation is correct?
The delta period may last
hi
I saw the patch “sched: Make sched entity usage tracking scale-invariant” that
will make the usage to be freq scaled.
So if delta period that the calculation of usage based on cross a frequency
change, so how can you make sure the usage calculation is correct?
The delta period may last
From: Chao Xie
Timer has external fast clock, and it is a mux clock.
Add the timer clock type for timer driver.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-of-mmp2.c | 6 ++
drivers/clk/mmp/clk-of-pxa168.c| 7 +++
drivers/clk/mmp/clk-of-pxa910.c
From: Chao Xie
USB will drive clock from USB_PLL.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-of-pxa168.c| 1 +
drivers/clk/mmp/clk-of-pxa910.c| 1 +
include/dt-bindings/clock/marvell,pxa168.h | 1 +
include/dt-bindings/clock/marvell,pxa910.h | 1 +
4 files changed
From: Chao Xie
The suggested value in the mmp2 manual is wrong.
There are only 13 bits for numerator, but some suggested
value has 14 bits.
Fix the factor tabled and remove the unused items.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-mmp2.c| 4 +---
drivers/clk/mmp/clk-of-mmp2.c | 4
From: Chao Xie
There are three patches
First two are fix patches.
The last one will add the timer clock for pxa168/mmp2/pxa910.
The timer driver will make use of the timer clock.
Chao Xie (3):
clk: mmp: add fixed clock UBS_PLL for pxa910/pxa168
clk: mmp: Fix the wrong factor table for uart
From: Chao Xie chao@marvell.com
There are three patches
First two are fix patches.
The last one will add the timer clock for pxa168/mmp2/pxa910.
The timer driver will make use of the timer clock.
Chao Xie (3):
clk: mmp: add fixed clock UBS_PLL for pxa910/pxa168
clk: mmp: Fix the wrong
From: Chao Xie chao@marvell.com
Timer has external fast clock, and it is a mux clock.
Add the timer clock type for timer driver.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/clk/mmp/clk-of-mmp2.c | 6 ++
drivers/clk/mmp/clk-of-pxa168.c| 7
From: Chao Xie chao@marvell.com
USB will drive clock from USB_PLL.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/clk/mmp/clk-of-pxa168.c| 1 +
drivers/clk/mmp/clk-of-pxa910.c| 1 +
include/dt-bindings/clock/marvell,pxa168.h | 1 +
include/dt-bindings/clock
From: Chao Xie chao@marvell.com
The suggested value in the mmp2 manual is wrong.
There are only 13 bits for numerator, but some suggested
value has 14 bits.
Fix the factor tabled and remove the unused items.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/clk/mmp/clk-mmp2.c| 4
hi, Mike
These patches are bug fix and enhancement patches for mmp clock.
If it does not have any problem, can you help to merge it?
Thanks.
At 2015-04-07 14:17:01, "Chao Xie" wrote:
>From: Chao Xie
>
>There are three patches
>First two are fix patches.
hi, Mike
These patches are bug fix and enhancement patches for mmp clock.
If it does not have any problem, can you help to merge it?
Thanks.
At 2015-04-07 14:17:01, Chao Xie chao@marvell.com wrote:
From: Chao Xie chao@marvell.com
There are three patches
First two are fix
From: Chao Xie
USB will drive clock from USB_PLL.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-of-pxa168.c| 1 +
drivers/clk/mmp/clk-of-pxa910.c| 1 +
include/dt-bindings/clock/marvell,pxa168.h | 1 +
include/dt-bindings/clock/marvell,pxa910.h | 1 +
4 files changed
From: Chao Xie
Timer has external fast clock, and it is a mux clock.
Add the timer clock type for timer driver.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-of-mmp2.c | 6 ++
drivers/clk/mmp/clk-of-pxa168.c| 7 +++
drivers/clk/mmp/clk-of-pxa910.c
From: Chao Xie
The suggested value in the mmp2 manual is wrong.
There are only 13 bits for numerator, but some suggested
value has 14 bits.
Fix the factor tabled and remove the unused items.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-mmp2.c| 4 +---
drivers/clk/mmp/clk-of-mmp2.c | 4
From: Chao Xie
There are three patches
First two are fix patches.
The last one will add the timer clock for pxa168/mmp2/pxa910.
The timer driver will make use of the timer clock.
Chao Xie (3):
clk: mmp: add fixed clock UBS_PLL for pxa910/pxa168
clk: mmp: Fix the wrong factor table for uart
From: Chao Xie chao@marvell.com
There are three patches
First two are fix patches.
The last one will add the timer clock for pxa168/mmp2/pxa910.
The timer driver will make use of the timer clock.
Chao Xie (3):
clk: mmp: add fixed clock UBS_PLL for pxa910/pxa168
clk: mmp: Fix the wrong
From: Chao Xie chao@marvell.com
USB will drive clock from USB_PLL.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/clk/mmp/clk-of-pxa168.c| 1 +
drivers/clk/mmp/clk-of-pxa910.c| 1 +
include/dt-bindings/clock/marvell,pxa168.h | 1 +
include/dt-bindings/clock
From: Chao Xie chao@marvell.com
Timer has external fast clock, and it is a mux clock.
Add the timer clock type for timer driver.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/clk/mmp/clk-of-mmp2.c | 6 ++
drivers/clk/mmp/clk-of-pxa168.c| 7
From: Chao Xie chao@marvell.com
The suggested value in the mmp2 manual is wrong.
There are only 13 bits for numerator, but some suggested
value has 14 bits.
Fix the factor tabled and remove the unused items.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/clk/mmp/clk-mmp2.c| 4
At 2015-03-17 18:25:24, "Linus Walleij" wrote:
>On Fri, Mar 6, 2015 at 3:04 AM, Chao Xie wrote:
>
>> Signed-off-by: Chao Xie
>
>First can some of the MMP people comment on this driver please?
>(Eric/Haojian)
>
>So this driver duplicates drivers/gpio/g
At 2015-03-17 18:25:24, Linus Walleij linus.wall...@linaro.org wrote:
On Fri, Mar 6, 2015 at 3:04 AM, Chao Xie chao@marvell.com wrote:
Signed-off-by: Chao Xie chao@marvell.com
First can some of the MMP people comment on this driver please?
(Eric/Haojian)
So this driver duplicates
From: Chao Xie
For some old PXA series, they used PXA GPIO driver.
The IP of GPIO changes since PXA988 which is Marvell MMP
series.
It will use new way to control the GPIO level, direction
and edge status.
Signed-off-by: Chao Xie
---
drivers/gpio/Kconfig| 10 ++
drivers/gpio/Makefile
From: Chao Xie chao@marvell.com
For some old PXA series, they used PXA GPIO driver.
The IP of GPIO changes since PXA988 which is Marvell MMP
series.
It will use new way to control the GPIO level, direction
and edge status.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/gpio
At 2015-02-03 21:21:43, "Linus Walleij" wrote:
>On Wed, Jan 28, 2015 at 3:30 AM, Chao Xie wrote:
>
>> From: Chao Xie
>>
>> For some old PXA series, they used PXA GPIO driver.
>> The IP of GPIO changes since PXA988 which is Marvell MMP
>> series.
&g
At 2015-02-03 21:21:43, Linus Walleij linus.wall...@linaro.org wrote:
On Wed, Jan 28, 2015 at 3:30 AM, Chao Xie chao@marvell.com wrote:
From: Chao Xie chao@marvell.com
For some old PXA series, they used PXA GPIO driver.
The IP of GPIO changes since PXA988 which is Marvell MMP
series
>From: Mark Rutland [mailto:mark.rutl...@arm.com]
>Sent: 2015年2月2日 18:35
>To: Chao Xie
>Cc: daniel.lezc...@linaro.org; t...@linutronix.de; haojian.zhu...@linaro.org;
>linux-kernel@vger.kernel.org; devicet...@vger.kernel.org
>Subject: Re: [PATCH 1/4] clocksource: mmp: ad
From: Chao Xie
MMP timer is attached to APB bus, It has the following
limitation.
1. When get count of timer counter, it need some delay
to get a stable count.
2. When set match register, it need disable the counter
first, and enable it after set the match register.
The disabling need
From: Chao Xie
The new timer driver has been created under
drivers/clocksource/.
After change all SOCes to use the new driver,
remove the old one.
Signed-off-by: Chao Xie
---
arch/arm/mach-mmp/Makefile | 2 +-
arch/arm/mach-mmp/time.c | 247
From: Chao Xie
These patch will create a new timer driver in drivers/clocksource/
The timer driver will support all SOCes in mach-mmp
There are two patches #2 and #3 changing the arch/mach-mmp to make
DT and no-DT supported SOCes to make use of new timer driver
The final patch will remove
From: Chao Xie
For no DT support, directly call new timer's APIs to initialize
timer.
It need to initialize the timer first, then initialize the clock
event device or clock source which are based on counter.
Signed-off-by: Chao Xie
---
arch/arm/mach-mmp/common.h | 2 --
arch/arm/mach-mmp
From: Chao Xie
Change the dtsi and DT support for mmp SOCes to make them
use the new timer driver.
Signed-off-by: Chao Xie
---
arch/arm/boot/dts/mmp2.dtsi | 19 ---
arch/arm/boot/dts/pxa168.dtsi | 20 +---
arch/arm/boot/dts/pxa910.dtsi | 26
From: Mark Rutland [mailto:mark.rutl...@arm.com]
Sent: 2015年2月2日 18:35
To: Chao Xie
Cc: daniel.lezc...@linaro.org; t...@linutronix.de; haojian.zhu...@linaro.org;
linux-kernel@vger.kernel.org; devicet...@vger.kernel.org
Subject: Re: [PATCH 1/4] clocksource: mmp: add mmp timer driver
On Mon
From: Chao Xie chao@marvell.com
The new timer driver has been created under
drivers/clocksource/.
After change all SOCes to use the new driver,
remove the old one.
Signed-off-by: Chao Xie chao@marvell.com
---
arch/arm/mach-mmp/Makefile | 2 +-
arch/arm/mach-mmp/time.c | 247
From: Chao Xie chao@marvell.com
MMP timer is attached to APB bus, It has the following
limitation.
1. When get count of timer counter, it need some delay
to get a stable count.
2. When set match register, it need disable the counter
first, and enable it after set the match register
From: Chao Xie chao@marvell.com
These patch will create a new timer driver in drivers/clocksource/
The timer driver will support all SOCes in mach-mmp
There are two patches #2 and #3 changing the arch/mach-mmp to make
DT and no-DT supported SOCes to make use of new timer driver
The final
From: Chao Xie chao@marvell.com
Change the dtsi and DT support for mmp SOCes to make them
use the new timer driver.
Signed-off-by: Chao Xie chao@marvell.com
---
arch/arm/boot/dts/mmp2.dtsi | 19 ---
arch/arm/boot/dts/pxa168.dtsi | 20 +---
arch/arm/boot
From: Chao Xie chao@marvell.com
For no DT support, directly call new timer's APIs to initialize
timer.
It need to initialize the timer first, then initialize the clock
event device or clock source which are based on counter.
Signed-off-by: Chao Xie chao@marvell.com
---
arch/arm/mach-mmp
From: Chao Xie
For some old PXA series, they used PXA GPIO driver.
The IP of GPIO changes since PXA988 which is Marvell MMP
series.
It will use new way to control the GPIO level, direction
and edge status.
Signed-off-by: Chao Xie
---
drivers/gpio/Kconfig| 7 +
drivers/gpio/Makefile
From: Chao Xie chao@marvell.com
For some old PXA series, they used PXA GPIO driver.
The IP of GPIO changes since PXA988 which is Marvell MMP
series.
It will use new way to control the GPIO level, direction
and edge status.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/gpio
From: Chao Xie
The patch set focuses at support device tree for clock.
The first part of the patches
clk: mmp: add prefix "mmp" for structures defined for clk-frac
clk: mmp: add spin lock for clk-frac
clk: mmp: add init callback for clk-frac
clk: mmp: move definiton of mm
From: Chao Xie
The register used by clk-frac may be shared with
other clocks.
So it needs to use spin lock to protect the register
access.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-frac.c | 11 ++-
drivers/clk/mmp/clk-mmp2.c | 2 +-
drivers/clk/mmp/clk-pxa168.c | 2
From: Chao Xie
In order to support DT for mmp SOC clocks, it defines
some basic APIs which are shared by all mmp SOC clock
units.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/Makefile | 2 +-
drivers/clk/mmp/clk.c| 192 +++
drivers/clk/mmp
From: Chao Xie
The structures defined for clk-frac will be used out side
of clk-frac.c.
To avoid conflicts, add prefix "mmp" for these structures'
name.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-frac.c | 23 ---
drivers/clk/mmp/clk-mmp2.c | 4 ++--
d
From: Chao Xie
For the clk-frac, we need to make sure that the initial
clock rate is one item of the table.
If it is not, we use the first item in the table by default.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-frac.c | 40
1 file changed, 40
From: Chao Xie
Move the definition of structure of mmp_clk_frac to
clk.h.
So device tree support can use this structure.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-frac.c | 8
drivers/clk/mmp/clk.h | 32 ++--
2 files changed, 22 insertions
From: Chao Xie
Some SOCes have this kind of the gate clock
1. There are some bits to control the gate not only one bit.
2. It is not always that "1" is to enable while "0" is to disable
when write register.
So we have to define the "mask", "enable_val&qu
From: Chao Xie
Some clock control regsiter has bit to reset the cotroller.
So before enable the clock, we need deassert the reset pin.
Make use of reset controller framework to export reset interface
for device drivers, then device driver can control the reset action.
Signed-off-by: Chao Xie
From: Chao Xie
Add items in arch/arm/boot/dt/Makefile to compile the dtb
for mach-mmp.
Change the dts and dtsi file to use #include instead of \include\
Signed-off-by: Chao Xie
---
arch/arm/boot/dts/Makefile| 3 +++
arch/arm/boot/dts/mmp2-brownstone.dts | 2 +-
arch/arm/boot/dts
From: Chao Xie
It adds the DT support for mmp2 clock subsystem.
Signed-off-by: Chao Xie
---
.../devicetree/bindings/clock/marvell,mmp2.txt | 21 ++
drivers/clk/mmp/Makefile | 1 +
drivers/clk/mmp/clk-of-mmp2.c | 334
From: Chao Xie
It adds the DT support for pxa910 clock subsystem.
Signed-off-by: Chao Xie
---
.../devicetree/bindings/clock/marvell,pxa910.txt | 21 ++
drivers/clk/mmp/Makefile | 2 +-
drivers/clk/mmp/clk-of-pxa910.c| 301
From: Chao Xie
It adds the DT support for pxa168 clock subsystem.
Signed-off-by: Chao Xie
---
.../devicetree/bindings/clock/marvell,pxa168.txt | 21 ++
drivers/clk/mmp/Makefile | 2 +
drivers/clk/mmp/clk-of-pxa168.c| 279
From: Chao Xie
Change the dtsi and dts file, soc initialization code to make
use of DT support clock.
So now in the code we do only need call of_clk_init to initialize
the clocks.
Signed-off-by: Chao Xie
---
arch/arm/boot/dts/mmp2.dtsi | 27
arch/arm/boot/dts/pxa168
From: Chao Xie
The clock type mix is a kind of clock combines "div" and "mux".
This kind of clock can not allow to change div first then
mux or change mux first or div.
The reason is
1. Some clock has frequency change bit. Each time want to change
the frequency, there
From: Chao Xie chao@marvell.com
Change the dtsi and dts file, soc initialization code to make
use of DT support clock.
So now in the code we do only need call of_clk_init to initialize
the clocks.
Signed-off-by: Chao Xie chao@marvell.com
---
arch/arm/boot/dts/mmp2.dtsi | 27
From: Chao Xie chao@marvell.com
The clock type mix is a kind of clock combines div and mux.
This kind of clock can not allow to change div first then
mux or change mux first or div.
The reason is
1. Some clock has frequency change bit. Each time want to change
the frequency, there are some
From: Chao Xie chao@marvell.com
It adds the DT support for pxa910 clock subsystem.
Signed-off-by: Chao Xie chao@marvell.com
---
.../devicetree/bindings/clock/marvell,pxa910.txt | 21 ++
drivers/clk/mmp/Makefile | 2 +-
drivers/clk/mmp/clk-of-pxa910.c
From: Chao Xie chao@marvell.com
It adds the DT support for pxa168 clock subsystem.
Signed-off-by: Chao Xie chao@marvell.com
---
.../devicetree/bindings/clock/marvell,pxa168.txt | 21 ++
drivers/clk/mmp/Makefile | 2 +
drivers/clk/mmp/clk-of-pxa168.c
From: Chao Xie chao@marvell.com
It adds the DT support for mmp2 clock subsystem.
Signed-off-by: Chao Xie chao@marvell.com
---
.../devicetree/bindings/clock/marvell,mmp2.txt | 21 ++
drivers/clk/mmp/Makefile | 1 +
drivers/clk/mmp/clk-of-mmp2.c
From: Chao Xie chao@marvell.com
Add items in arch/arm/boot/dt/Makefile to compile the dtb
for mach-mmp.
Change the dts and dtsi file to use #include instead of \include\
Signed-off-by: Chao Xie chao@marvell.com
---
arch/arm/boot/dts/Makefile| 3 +++
arch/arm/boot/dts/mmp2
From: Chao Xie chao@marvell.com
Some clock control regsiter has bit to reset the cotroller.
So before enable the clock, we need deassert the reset pin.
Make use of reset controller framework to export reset interface
for device drivers, then device driver can control the reset action.
Signed
From: Chao Xie chao@marvell.com
Move the definition of structure of mmp_clk_frac to
clk.h.
So device tree support can use this structure.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/clk/mmp/clk-frac.c | 8
drivers/clk/mmp/clk.h | 32
From: Chao Xie chao@marvell.com
Some SOCes have this kind of the gate clock
1. There are some bits to control the gate not only one bit.
2. It is not always that 1 is to enable while 0 is to disable
when write register.
So we have to define the mask, enable_val, disable_val for
this kind
From: Chao Xie chao@marvell.com
The structures defined for clk-frac will be used out side
of clk-frac.c.
To avoid conflicts, add prefix mmp for these structures'
name.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/clk/mmp/clk-frac.c | 23 ---
drivers/clk/mmp
From: Chao Xie chao@marvell.com
For the clk-frac, we need to make sure that the initial
clock rate is one item of the table.
If it is not, we use the first item in the table by default.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/clk/mmp/clk-frac.c | 40
From: Chao Xie chao@marvell.com
In order to support DT for mmp SOC clocks, it defines
some basic APIs which are shared by all mmp SOC clock
units.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/clk/mmp/Makefile | 2 +-
drivers/clk/mmp/clk.c| 192
From: Chao Xie chao@marvell.com
The register used by clk-frac may be shared with
other clocks.
So it needs to use spin lock to protect the register
access.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/clk/mmp/clk-frac.c | 11 ++-
drivers/clk/mmp/clk-mmp2.c | 2
From: Chao Xie chao@marvell.com
The patch set focuses at support device tree for clock.
The first part of the patches
clk: mmp: add prefix mmp for structures defined for clk-frac
clk: mmp: add spin lock for clk-frac
clk: mmp: add init callback for clk-frac
clk: mmp: move definiton
At 2014-09-04 02:04:24, "Mike Turquette" wrote:
>Quoting Chao Xie (2014-08-25 21:38:14)
>> From: Chao Xie
>>
>> The register used by clk-frac may be shared with
>> other clocks.
>> So it needs to use spin lock to protect the register
>> acce
At 2014-09-04 02:04:24, Mike Turquette mturque...@linaro.org wrote:
Quoting Chao Xie (2014-08-25 21:38:14)
From: Chao Xie chao@marvell.com
The register used by clk-frac may be shared with
other clocks.
So it needs to use spin lock to protect the register
access.
Signed-off-by: Chao
At 2014-09-04 01:55:37, "Mike Turquette" wrote:
>Quoting Chao Xie (2014-08-25 21:38:18)
>> From: Chao Xie
>>
>> Some SOCes have this kind of the gate clock
>> 1. There are some bits to control the gate not only one bit.
>> 2. Some clocks h
At 2014-09-04 01:55:37, Mike Turquette mturque...@linaro.org wrote:
Quoting Chao Xie (2014-08-25 21:38:18)
From: Chao Xie chao@marvell.com
Some SOCes have this kind of the gate clock
1. There are some bits to control the gate not only one bit.
2. Some clocks has operations of out
From: Chao Xie
The clock type mix is a kind of clock combines "div" and "mux".
This kind of clock can not allow to change div first then
mux or change mux first or div.
The reason is
1. Some clock has frequency change bit. Each time want to change
the frequency, there
From: Chao Xie
The patch set focuses at support device tree for clock.
The first part of the patches
clk: mmp: add prefix "mmp" for structures defined for clk-frac
clk: mmp: add spin lock for clk-frac
clk: mmp: add init callback for clk-frac
clk: mmp: move definiton of mm
From: Chao Xie
The structures defined for clk-frac will be used out side
of clk-frac.c.
To avoid conflicts, add prefix "mmp" for these structures'
name.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-frac.c | 23 ---
drivers/clk/mmp/clk-mmp2.c | 4 ++--
d
From: Chao Xie
For the clk-frac, we need to make sure that the initial
clock rate is one item of the table.
If it is not, we use the first item in the table by default.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-frac.c | 40
1 file changed, 40
From: Chao Xie
It adds the DT support for pxa168 clock subsystem.
Signed-off-by: Chao Xie
---
.../bindings/clock/marvell-pxa168-clock.txt| 20 ++
drivers/clk/mmp/Makefile | 2 +
drivers/clk/mmp/clk-of-pxa168.c| 251
From: Chao Xie
Some SOCes have this kind of the gate clock
1. There are some bits to control the gate not only one bit.
2. Some clocks has operations of "out of reset" and "enable".
To enable clock, we need do "out of reset" and "enable".
To disa
From: Chao Xie
Move the definition of structure of mmp_clk_frac to
clk.h.
So device tree support can use this structure.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-frac.c | 8
drivers/clk/mmp/clk.h | 32 ++--
2 files changed, 22 insertions
From: Chao Xie
In order to support DT for mmp SOC clocks, it defines
some basic APIs which are shared by all mmp SOC clock
units.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/Makefile | 2 +-
drivers/clk/mmp/clk.c| 192 +++
drivers/clk/mmp
From: Chao Xie
Change the dtsi and dts file, soc initialization code to make
use of DT support clock.
So now in the code we do only need call of_clk_init to initialize
the clocks.
Signed-off-by: Chao Xie
---
arch/arm/boot/dts/mmp2.dtsi | 18 ++
arch/arm/boot/dts/pxa168.dtsi | 17
From: Chao Xie
It adds the DT support for pxa910 clock subsystem.
Signed-off-by: Chao Xie
---
.../bindings/clock/marvell-pxa910-clock.txt| 20 ++
drivers/clk/mmp/Makefile | 2 +-
drivers/clk/mmp/clk-of-pxa910.c| 260
From: Chao Xie
Add items in arch/arm/boot/dt/Makefile to compile the dtb
for mach-mmp.
Change the dts and dtsi file to use #include instead of \include\
Signed-off-by: Chao Xie
---
arch/arm/boot/dts/Makefile| 3 +++
arch/arm/boot/dts/mmp2-brownstone.dts | 2 +-
arch/arm/boot/dts
From: Chao Xie
It adds the DT support for mmp2 clock subsystem.
Signed-off-by: Chao Xie
---
.../bindings/clock/marvell-mmp2-clock.txt | 20 ++
drivers/clk/mmp/Makefile | 1 +
drivers/clk/mmp/clk-of-mmp2.c | 307
From: Chao Xie
The register used by clk-frac may be shared with
other clocks.
So it needs to use spin lock to protect the register
access.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-frac.c | 11 ++-
drivers/clk/mmp/clk-mmp2.c | 2 +-
drivers/clk/mmp/clk-pxa168.c | 2
From: Chao Xie chao@marvell.com
The register used by clk-frac may be shared with
other clocks.
So it needs to use spin lock to protect the register
access.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/clk/mmp/clk-frac.c | 11 ++-
drivers/clk/mmp/clk-mmp2.c | 2
From: Chao Xie chao@marvell.com
It adds the DT support for mmp2 clock subsystem.
Signed-off-by: Chao Xie chao@marvell.com
---
.../bindings/clock/marvell-mmp2-clock.txt | 20 ++
drivers/clk/mmp/Makefile | 1 +
drivers/clk/mmp/clk-of-mmp2.c
From: Chao Xie chao@marvell.com
Add items in arch/arm/boot/dt/Makefile to compile the dtb
for mach-mmp.
Change the dts and dtsi file to use #include instead of \include\
Signed-off-by: Chao Xie chao@marvell.com
---
arch/arm/boot/dts/Makefile| 3 +++
arch/arm/boot/dts/mmp2
From: Chao Xie chao@marvell.com
Change the dtsi and dts file, soc initialization code to make
use of DT support clock.
So now in the code we do only need call of_clk_init to initialize
the clocks.
Signed-off-by: Chao Xie chao@marvell.com
---
arch/arm/boot/dts/mmp2.dtsi | 18
From: Chao Xie chao@marvell.com
It adds the DT support for pxa910 clock subsystem.
Signed-off-by: Chao Xie chao@marvell.com
---
.../bindings/clock/marvell-pxa910-clock.txt| 20 ++
drivers/clk/mmp/Makefile | 2 +-
drivers/clk/mmp/clk-of-pxa910.c
From: Chao Xie chao@marvell.com
Some SOCes have this kind of the gate clock
1. There are some bits to control the gate not only one bit.
2. Some clocks has operations of out of reset and enable.
To enable clock, we need do out of reset and enable.
To disable clock, we may not need set
From: Chao Xie chao@marvell.com
Move the definition of structure of mmp_clk_frac to
clk.h.
So device tree support can use this structure.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/clk/mmp/clk-frac.c | 8
drivers/clk/mmp/clk.h | 32
From: Chao Xie chao@marvell.com
In order to support DT for mmp SOC clocks, it defines
some basic APIs which are shared by all mmp SOC clock
units.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/clk/mmp/Makefile | 2 +-
drivers/clk/mmp/clk.c| 192
From: Chao Xie chao@marvell.com
It adds the DT support for pxa168 clock subsystem.
Signed-off-by: Chao Xie chao@marvell.com
---
.../bindings/clock/marvell-pxa168-clock.txt| 20 ++
drivers/clk/mmp/Makefile | 2 +
drivers/clk/mmp/clk-of-pxa168.c
From: Chao Xie chao@marvell.com
The structures defined for clk-frac will be used out side
of clk-frac.c.
To avoid conflicts, add prefix mmp for these structures'
name.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/clk/mmp/clk-frac.c | 23 ---
drivers/clk/mmp
From: Chao Xie chao@marvell.com
For the clk-frac, we need to make sure that the initial
clock rate is one item of the table.
If it is not, we use the first item in the table by default.
Signed-off-by: Chao Xie chao@marvell.com
---
drivers/clk/mmp/clk-frac.c | 40
From: Chao Xie chao@marvell.com
The clock type mix is a kind of clock combines div and mux.
This kind of clock can not allow to change div first then
mux or change mux first or div.
The reason is
1. Some clock has frequency change bit. Each time want to change
the frequency, there are some
From: Chao Xie chao@marvell.com
The patch set focuses at support device tree for clock.
The first part of the patches
clk: mmp: add prefix mmp for structures defined for clk-frac
clk: mmp: add spin lock for clk-frac
clk: mmp: add init callback for clk-frac
clk: mmp: move definiton
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