s fine. I've also run the selftest framework's tests for the dirty
logging and the migration loop test for arm64, and they pass fine.
You can add my (for arm64):
Tested-by: Christoffer Dall
r = kvm_arch_vcpu_create(vcpu);
> if (r)
> goto vcpu_free_run_page;
>
What a fantastically welcome piece of work! Thanks for doing this,
many's the time I waded through all those calls to ensure a patch was
doing the right thing.
Mod
On Thu, Jan 31, 2019 at 09:40:02AM +, Julien Thierry wrote:
>
>
> On 31/01/2019 09:27, Christoffer Dall wrote:
> > On Thu, Jan 31, 2019 at 08:56:04AM +, Julien Thierry wrote:
> >>
> >>
> >> On 31/01/2019 08:19, Christoffer Dall wrote:
>
On Thu, Jan 31, 2019 at 08:56:04AM +, Julien Thierry wrote:
>
>
> On 31/01/2019 08:19, Christoffer Dall wrote:
> > On Mon, Jan 28, 2019 at 03:42:42PM +, Julien Thierry wrote:
> >> Hi James,
> >>
> >> On 28/01/2019 11:48, James Morse wrote:
> &
On Mon, Jan 28, 2019 at 03:42:42PM +, Julien Thierry wrote:
> Hi James,
>
> On 28/01/2019 11:48, James Morse wrote:
> > Hi Julien,
> >
> > On 21/01/2019 15:33, Julien Thierry wrote:
> >> When using VHE, the host needs to clear HCR_EL2.TGE bit in order
> >> to interract with guest TLBs, switch
daif_restore with DAIF_PROCCTX_NOIRQ, which actually does
both of the things in (5).
> Avoid this by making sure ICC_PMR_EL1 is unmasked when we enter a guest.
>
> Signed-off-by: Julien Thierry
> Acked-by: Catalin Marinas
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> Cc: Catalin
f this work,
> the full patch set is available at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild.git
> build-test
Changes appear fine to me:
Acked-by: Christoffer Dall
guest and saves us from emulating this
timer for the guest on VHE systems.
Store the EL1 Physical Timer's IRQ number in
struct arch_timer_kvm_info on VHE systems to allow KVM to use it.
Signed-off-by: Andre Przywara
Signed-off-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
Patch
t a patch later after further discussions in the
> list.
>
For the series:
Reviewed-by: Christoffer Dall
On Tue, Dec 11, 2018 at 01:59:03PM +, Andrew Murray wrote:
> On Tue, Dec 11, 2018 at 10:06:53PM +1100, Michael Ellerman wrote:
> > [ Reviving old thread. ]
> >
> > Andrew Murray writes:
> > > On Tue, Nov 20, 2018 at 10:31:36PM +1100, Michael Ellerman wrote:
> > >> Andrew Murray writes:
> > >
e RT spinlocks are interruptible.
>
> Signed-off-by: Julien Thierry
> Cc: Christoffer Dall
> Cc: Marc Zyngier
Acked-by: Christoffer Dall
rupts are
> disabled at this point and we cannot reschedule a vcpu.
>
> Solve this by waiting for all vcpus to be halted after emmiting the halt
> request.
>
> Signed-off-by: Julien Thierry
> Suggested-by: Marc Zyngier
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> Cc: s
On Thu, Dec 06, 2018 at 09:56:30AM +0800, peng.h...@zte.com.cn wrote:
> >On Wed, Dec 05, 2018 at 09:15:51AM +0800, Peng Hao wrote:
> >> Return 0 when there is enough kvm_mmu_memory_cache object.
> >>
> >> Signed-off-by: Peng Hao
> >> ---
> >> virt/kvm/arm/mmu.c | 2 +-
> >> 1 file changed, 1 inse
On Mon, Dec 10, 2018 at 10:47:42AM +, Suzuki K Poulose wrote:
>
>
> On 10/12/2018 08:56, Christoffer Dall wrote:
> >On Mon, Dec 03, 2018 at 01:37:37PM +, Suzuki K Poulose wrote:
> >>Hi Anshuman,
> >>
> >>On 03/12/2018 12:11, Anshuman Khandual w
On Wed, Dec 05, 2018 at 05:57:51PM +, Suzuki K Poulose wrote:
>
>
> On 01/11/2018 13:38, Christoffer Dall wrote:
> >On Wed, Oct 31, 2018 at 05:57:42PM +, Punit Agrawal wrote:
> >>In preparation for creating PUD hugepages at stage 2, add support for
> >>
On Mon, Dec 03, 2018 at 07:20:08PM +0530, Anshuman Khandual wrote:
>
>
> On 10/31/2018 11:27 PM, Punit Agrawal wrote:
> > Introduce helpers to abstract architectural handling of the conversion
> > of pfn to page table entries and marking a PMD page table entry as a
> > block entry.
>
> Why is th
>when support for PUD hugepages is introduced refactor the code to
> >>share the checks needed to mark a page table entry as executable.
> >>
> >>Signed-off-by: Punit Agrawal
> >>Reviewed-by: Suzuki K Poulose
> >>Cc: Christoffer Dall
> &
he checks needed to mark a page table entry as executable.
> >
> > Signed-off-by: Punit Agrawal
> > Reviewed-by: Suzuki K Poulose
> > Cc: Christoffer Dall
> > Cc: Marc Zyngier
> > ---
> > virt/kvm/arm/mmu.c | 28 +++-
> > 1 file
izes.
> >>
> >>Signed-off-by: Punit Agrawal
> >>Reviewed-by: Suzuki K Poulose
> >>Cc: Christoffer Dall
> >>Cc: Marc Zyngier
> >>---
> >> virt/kvm/arm/mmu.c | 49 --
> >> 1 file
On Wed, Nov 21, 2018 at 12:17:45PM +, Julien Thierry wrote:
>
>
> On 21/11/18 11:06, Christoffer Dall wrote:
> >Hi,
> >
> >On Wed, Nov 21, 2018 at 04:56:54PM +0800, peng.h...@zte.com.cn wrote:
> >>>On 19/11/2018 09:10, Mark Rutland wrote:
> &g
On Tue, May 01, 2018 at 02:00:43PM +0100, Punit Agrawal wrote:
> Hi Suzuki,
>
> Thanks for having a look.
>
> Suzuki K Poulose writes:
>
> > On 01/05/18 11:26, Punit Agrawal wrote:
> >> Introduce helpers to abstract architectural handling of the conversion
> >> of pfn to page table entries and
e) which can be useful on cores that
> support mapping larger block sizes in the TLB entries.
>
> Signed-off-by: Punit Agrawal
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> Cc: Russell King
> Cc: Catalin Marinas
> Cc: Will Deacon
Reviewed-by: Christoffer Dall
the operations when we introduce
> PUD hugepages, let's share them across the different pagesizes.
>
> Signed-off-by: Punit Agrawal
> Reviewed-by: Christoffer Dall
> Cc: Marc Zyngier
> ---
> virt/kvm/arm/mmu.c | 66 +++---
> 1
On Mon, Apr 30, 2018 at 11:07:43AM +0200, Eric Auger wrote:
> Now all the internals are ready to handle multiple redistributor
> regions, let's allow the userspace to register them.
>
> Signed-off-by: Eric Auger
Reviewed-by: Christoffer Dall
>
> ---
> v4 -&g
d_region_size(struct kvm *kvm, struct
> vgic_redist_region *rdreg)
> }
> bool vgic_v3_rdist_overlap(struct kvm *kvm, gpa_t base, size_t size);
>
> +static inline bool vgic_dist_overlap(struct kvm *kvm, gpa_t base, size_t
> size)
> +{
> + struct vgic_dist *d = &kvm->arch.vgic;
> +
> + return (base + size > d->vgic_dist_base) &&
> + (base < d->vgic_dist_base + KVM_VGIC_V3_DIST_SIZE);
> +}
> +
> int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its,
>u32 devid, u32 eventid, struct vgic_irq **irq);
> struct vgic_its *vgic_msi_to_its(struct kvm *kvm, struct kvm_msi *msi);
> --
> 2.5.5
>
Besides the nit about using list_last_entry():
Reviewed-by: Christoffer Dall
DDR_TYPE_REDIST, this new attribute allows
> to declare several separate redistributor regions.
>
> So the whole redist space does not need to be contiguous anymore.
>
> Signed-off-by: Eric Auger
Acked-by: Christoffer Dall
>
> ---
> v4 -> v5:
> - Document read
tually check potential base address inconsistencies.
>
> Signed-off-by: Eric Auger
Reviewed-by: Christoffer Dall
>
> ---
>
> v3 -> v4:
> - use kvm_debug
> ---
> virt/kvm/arm/vgic/vgic-v3.c | 19 ++-
> 1 file changed, 14 insertions(+), 5 deletions(-
On Fri, Apr 27, 2018 at 04:15:05PM +0200, Eric Auger wrote:
> Let's raise the number of supported vcpus along with
> vgic v3 now that HW is looming with more physical CPUs.
>
> Signed-off-by: Eric Auger
Acked-by: Christoffer Dall
> ---
> include/kvm/arm_vgic.h | 2
has already been set. Initialize this latter
> in kvm_vgic_vcpu_early_init().
>
> Signed-off-by: Eric Auger
Acked-by: Christoffer Dall
> ---
> virt/kvm/arm/vgic/vgic-init.c| 3 +++
> virt/kvm/arm/vgic/vgic-mmio-v3.c | 3 +++
> 2 files changed, 6 insertions(+)
>
>
static inline size_t
> +vgic_v3_rd_region_size(struct kvm *kvm, struct vgic_redist_region *rdreg)
> +{
> + if (!rdreg->count)
> + return atomic_read(&kvm->online_vcpus) *
> KVM_VGIC_V3_REDIST_SIZE;
> + else
> + return rdreg->count * KVM_VGIC_V3_REDIST_SIZE;
> +}
> +bool vgic_v3_rdist_overlap(struct kvm *kvm, gpa_t base, size_t size);
> +
> int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its,
>u32 devid, u32 eventid, struct vgic_irq **irq);
> struct vgic_its *vgic_msi_to_its(struct kvm *kvm, struct kvm_msi *msi);
> --
> 2.5.5
>
Reviewed-by: Christoffer Dall
Hi Eric,
On Fri, Apr 27, 2018 at 04:15:04PM +0200, Eric Auger wrote:
> Now all the internals are ready to handle multiple redistributor
> regions, let's allow the userspace to register them.
>
> Signed-off-by: Eric Auger
>
> ---
> v3 -> v4:
> - vgic_v3_rdist_region_from_index is introduced in t
DDR_TYPE_REDIST, this new attribute allows
> to declare several separate redistributor regions.
>
> So the whole redist space does not need to be contiguous anymore.
>
> Signed-off-by: Eric Auger
> Reviewed-by: Peter Maydell
Acked-by: Christoffer Dall
>
>
On Fri, Apr 13, 2018 at 10:20:57AM +0200, Eric Auger wrote:
> Now all the internals are ready to handle multiple redistributor
> regions, let's allow the userspace to register them.
>
> Signed-off-by: Eric Auger
>
> ---
>
> v2 -> v3:
> - early exit if vgic_v3_rdist_region_from_index() fails
> -
> Also, provide trivial implementations of required kvm_s2pud_* helpers
> to allow sharing of code with arm32.
>
> Signed-off-by: Punit Agrawal
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> Cc: Russell King
> Cc: Catalin Marinas
> Cc: Will Deacon
>
g PUD hugepages
> at stage 2 - which are supported on arm64 but do not exist on arm.
>
> Signed-off-by: Punit Agrawal
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> Cc: Russell King
> Cc: Catalin Marinas
> Cc: Will Deacon
Acked-by: Christoffer Dall
> ---
> arch/
the operations when we introduce
> PUD hugepages, let's share them across the different pagesizes.
>
> Signed-off-by: Punit Agrawal
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> ---
> virt/kvm/arm/mmu.c | 36 +---
> 1 file changed, 21 in
e) which can be useful on cores that
> support mapping larger block sizes in the TLB entries.
>
> Signed-off-by: Punit Agrawal
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> Cc: Russell King
> Cc: Catalin Marinas
> Cc: Will Deacon
> ---
> arch/arm/include/asm/kvm_mmu.h
est, as if the feature were really missing.
>
> Signed-off-by: Mark Rutland
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> Cc: kvm...@lists.cs.columbia.edu
> ---
> arch/arm64/kvm/handle_exit.c | 18 ++
> arch/arm64/kvm/sys_regs.c| 9 +
> 2 files chang
it doesn't matter how we configure HCR_EL2.{API,APK}, so we don't
> bother setting them.
>
> This does not enable support for KVM guests, since KVM manages HCR_EL2
> itself when running VMs.
>
> Signed-off-by: Mark Rutland
> Cc: Christoffer Dall
>
>
> We now use mov_q to generate the HCR_EL2 value, as we use when
> configuring other registers in head.S.
>
> Signed-off-by: Mark Rutland
> Cc: Catalin Marinas
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> Cc: Will Deacon
> Cc: kvm...@lists.cs.columbia.edu
>
On Thu, Apr 26, 2018 at 11:56:10AM +0200, Auger Eric wrote:
>
>
> On 04/24/2018 11:08 PM, Christoffer Dall wrote:
> > On Fri, Apr 13, 2018 at 10:20:55AM +0200, Eric Auger wrote:
> >> On vcpu first run, we eventually know the actual number of vcpus.
> >> This is
On Thu, Apr 26, 2018 at 11:25:06AM +0200, Auger Eric wrote:
> Hi Christoffer,
>
> On 04/24/2018 11:07 PM, Christoffer Dall wrote:
> > On Fri, Apr 13, 2018 at 10:20:54AM +0200, Eric Auger wrote:
> >> As we are going to register several redist regions,
> >> vgic_re
On Thu, Apr 26, 2018 at 10:29:35AM +0200, Auger Eric wrote:
> Hi Christoffer,
> On 04/24/2018 11:07 PM, Christoffer Dall wrote:
> > On Fri, Apr 13, 2018 at 10:20:53AM +0200, Eric Auger wrote:
> >> We introduce a new helper to check there is no overlap between
> >
On Thu, Apr 26, 2018 at 09:32:49AM +0200, Auger Eric wrote:
> Hi Christoffer,
>
> On 04/24/2018 06:47 PM, Christoffer Dall wrote:
> > On Fri, Apr 13, 2018 at 10:20:52AM +0200, Eric Auger wrote:
> >> We introduce a new helper that creates and inserts a new redistributor
&g
On Tue, Apr 24, 2018 at 05:50:37PM +0100, Peter Maydell wrote:
> On 24 April 2018 at 17:46, Christoffer Dall wrote:
> > On Fri, Apr 13, 2018 at 10:20:48AM +0200, Eric Auger wrote:
> >> --- a/Documentation/virtual/kvm/devices/arm-vgic-v3.txt
> >> +++ b/Documentation/virt
On Fri, Apr 13, 2018 at 10:20:53AM +0200, Eric Auger wrote:
> We introduce a new helper to check there is no overlap between
> dist region (if set) and registered rdist regions. This both
> handles the case of legacy single rdist region (implicitly sized
> with the number of online vcpus) and the n
_VGIC_V3_ADDR_TYPE_DIST 2
> +#define KVM_VGIC_V3_ADDR_TYPE_REDIST 3
> +#define KVM_VGIC_ITS_ADDR_TYPE 4
> +#define KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION 5
>
> #define KVM_VGIC_V3_DIST_SIZESZ_64K
> #define KVM_VGIC_V3_REDIST_SIZE (2 * SZ_64K)
> --
> 2.5.5
>
Otherwise:
Acked-by: Christoffer Dall
On Fri, Apr 13, 2018 at 10:20:55AM +0200, Eric Auger wrote:
> On vcpu first run, we eventually know the actual number of vcpus.
> This is a synchronization point to check all redistributors regions
> were assigned.
Isn't it the other way around? We want to check that all redistributors
(one for e
On Fri, Apr 13, 2018 at 10:20:54AM +0200, Eric Auger wrote:
> As we are going to register several redist regions,
> vgic_register_all_redist_iodevs() may be called several times. We need
> to register a redist_iodev for a given vcpu only once.
Wouldn't it be more natural to change that caller to
free_slot(struct list_head *rdregs);
> +
> int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its,
>u32 devid, u32 eventid, struct vgic_irq **irq);
> struct vgic_its *vgic_msi_to_its(struct kvm *kvm, struct kvm_msi *msi);
> --
> 2.5.5
>
Asides from the above:
Reviewed-by: Christoffer Dall
)
> +
> + if (addr == last_rdist_typer)
> value |= GICR_TYPER_LAST;
> if (vgic_has_its(vcpu->kvm))
> value |= GICR_TYPER_PLPIS;
> --
> 2.5.5
>
Reviewed-by: Christoffer Dall
PER last bit.
>
> Signed-off-by: Eric Auger
Reviewed-by: Christoffer Dall
> ---
> include/kvm/arm_vgic.h | 14 +
> virt/kvm/arm/vgic/vgic-init.c | 16 --
> virt/kvm/arm/vgic/vgic-kvm-device.c | 13 ++
On Fri, Apr 13, 2018 at 10:20:57AM +0200, Eric Auger wrote:
> Now all the internals are ready to handle multiple redistributor
> regions, let's allow the userspace to register them.
>
> Signed-off-by: Eric Auger
>
> ---
>
> v2 -> v3:
> - early exit if vgic_v3_rdist_region_from_index() fails
> -
-off-by: Eric Auger
> Reviewed-by: Marc Zyngier
Reviewed-by: Christoffer Dall
>
> ---
>
> v2 -> v3:
> - added Marc's R-b and Fixed commit
> ---
> virt/kvm/arm/vgic/vgic-init.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/virt/kvm/arm/vgic/vgi
On Fri, Apr 13, 2018 at 10:20:52AM +0200, Eric Auger wrote:
> We introduce a new helper that creates and inserts a new redistributor
> region into the rdist region list. This helper both handles the case
> where the redistributor region size is known at registration time
> and the legacy case where
On Fri, Apr 13, 2018 at 10:20:48AM +0200, Eric Auger wrote:
> We introduce a new KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION attribute in
> KVM_DEV_ARM_VGIC_GRP_ADDR group. It allows userspace to provide the
> base address and size of a redistributor region
>
> Compared to KVM_VGIC_V3_ADDR_TYPE_REDIST, th
Update my e-mail address to a working address.
Signed-off-by: Christoffer Dall
---
MAINTAINERS | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0a1410d5a621..3e9c99d2620b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7738,7 +7738,7 @@ F
Hi Eric,
On Tue, Mar 27, 2018 at 04:04:06PM +0200, Eric Auger wrote:
> We introduce a new KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION attribute in
> KVM_DEV_ARM_VGIC_GRP_ADDR group. It allows userspace to provide the
> base address and size of a redistributor region
>
> Compared to KVM_VGIC_V3_ADDR_TYPE_
On Mon, Apr 09, 2018 at 03:57:09PM +0100, Mark Rutland wrote:
> On Tue, Feb 06, 2018 at 01:39:15PM +0100, Christoffer Dall wrote:
> > On Mon, Nov 27, 2017 at 04:38:03PM +, Mark Rutland wrote:
> > > diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
> &
On Mon, Apr 09, 2018 at 01:47:50PM +0100, Marc Zyngier wrote:
> +Drew, who's look at the whole save/restore thing extensively
>
> On 09/04/18 13:30, Christoffer Dall wrote:
> > On Thu, Mar 15, 2018 at 07:26:48PM +, Marc Zyngier wrote:
> >> On 15/03/18 19:13, Pet
Hi Mark,
[Sorry for late reply]
On Fri, Mar 09, 2018 at 02:28:38PM +, Mark Rutland wrote:
> On Tue, Feb 06, 2018 at 01:38:47PM +0100, Christoffer Dall wrote:
> > On Mon, Nov 27, 2017 at 04:38:04PM +, Mark Rutland wrote:
> > > When pointer authentication is supported, a
a
> strict superset of 0.2 (apart from the version number...).
>
> (2) A guest migrating from a "new" host to an "old" host will silently
> loose its Spectre v2 mitigation. That's quite a big deal.
>
> (3, not related to migration) A guest having a hardcode
On Sat, Mar 10, 2018 at 12:20 PM, Marc Zyngier wrote:
> On Fri, 09 Mar 2018 21:36:12 +,
> Christoffer Dall wrote:
>>
>> On Thu, Mar 08, 2018 at 05:28:44PM +, Marc Zyngier wrote:
>> > I'd be more confident if we did forbid P+A for such interrupts
>>
On Thu, Mar 08, 2018 at 05:28:44PM +, Marc Zyngier wrote:
> On Thu, 08 Mar 2018 16:19:00 +,
> Christoffer Dall wrote:
> >
> > On Thu, Mar 08, 2018 at 11:54:27AM +, Marc Zyngier wrote:
> > > On 08/03/18 09:49, Marc Zyngier wrote:
[...]
> > > Th
On Thu, Mar 08, 2018 at 11:54:27AM +, Marc Zyngier wrote:
> On 08/03/18 09:49, Marc Zyngier wrote:
> > [updated Christoffer's email address]
> >
> > Hi Shunyong,
> >
> > On 08/03/18 07:01, Shunyong Yang wrote:
> >> When resampling irqfds is enabled, level interrupt should be
> >> de-asserted
On Thu, Mar 08, 2018 at 09:49:43AM +, Marc Zyngier wrote:
> [updated Christoffer's email address]
>
> Hi Shunyong,
>
> On 08/03/18 07:01, Shunyong Yang wrote:
> > When resampling irqfds is enabled, level interrupt should be
> > de-asserted when resampling happens. On page 4-47 of GIC v3
> > s
Hi Shanker,
On Mon, Feb 19, 2018 at 09:38:07AM -0600, Shanker Donthineni wrote:
> In AArch64/AArch32, the virtual counter uses a fixed virtual offset
> of zero in the following situations as per ARMv8 specifications:
>
> 1) HCR_EL2.E2H is 1, and CNTVCT_EL0/CNTVCT are read from EL2.
> 2) HCR_EL2.{
On Tue, Feb 13, 2018 at 11:41:16AM +0100, Jérémy Fanguède wrote:
> Set the handlers to emulate read and write operations for CNTP_CTL,
> CNTP_CVAL and CNTP_TVAL registers in such a way that VMs can use the
> physical timer.
>
> Signed-off-by: Jérémy Fanguède
> ---
>
> This patch is the equivalen
On Thu, Feb 08, 2018 at 05:53:17PM +, Suzuki K Poulose wrote:
> On 08/02/18 11:14, Christoffer Dall wrote:
> >On Tue, Jan 09, 2018 at 07:04:10PM +, Suzuki K Poulose wrote:
> >>Allow the guests to choose a larger physical address space size.
> >>The default an
On Thu, Feb 08, 2018 at 05:22:29PM +, Suzuki K Poulose wrote:
> On 08/02/18 11:00, Christoffer Dall wrote:
> >On Tue, Jan 09, 2018 at 07:04:09PM +, Suzuki K Poulose wrote:
> >>Now that we can manage the stage2 page table per VM, switch the
> >>configuration det
On Thu, Feb 08, 2018 at 05:19:22PM +, Suzuki K Poulose wrote:
> On 08/02/18 11:00, Christoffer Dall wrote:
> >On Tue, Jan 09, 2018 at 07:04:03PM +, Suzuki K Poulose wrote:
> >>On arm/arm64 we pre-allocate the entry level page tables when
> >>a VM is created an
table. The common configuration for
> VTCR is still performed during the early init. But the SL0
> and T0SZ are programmed for each VM and is cleared once we
> exit the VM.
>
> Cc: Marc Zyngier
> Cc: Christoffer Dall
> Signed-off-by: Suzuki K Poulose
> ---
On Thu, Feb 08, 2018 at 11:20:02AM +, Suzuki K Poulose wrote:
> On 07/02/18 15:10, Christoffer Dall wrote:
> >Hi Suzuki,
> >
> >On Tue, Jan 09, 2018 at 07:03:57PM +, Suzuki K Poulose wrote:
> >>Add helpers for encoding/decoding 52bit address in GICv3 ITS BAS
On Thu, Feb 08, 2018 at 11:08:18AM +, Suzuki K Poulose wrote:
> On 08/02/18 11:00, Christoffer Dall wrote:
> >On Tue, Jan 09, 2018 at 07:04:00PM +, Suzuki K Poulose wrote:
> >>Add a helper to convert ID_AA64MMFR0_EL1:PARang
Hi Suzuki,
On Tue, Jan 09, 2018 at 07:03:55PM +, Suzuki K Poulose wrote:
> On arm64 we have a static limit of 40bits of physical address space
> for the VM with KVM. This series lifts the limitation and allows the
> VM to configure the physical address space upto 52bit on systems
> where it is
address for validity and may do a
> lazy mapping(e.g, VGIC).
>
> Cc: Marc Zyngier
> Cc: Christoffer Dall
> Cc: Peter Maydell
> Signed-off-by: Suzuki K Poulose
> ---
> Documentation/virtual/kvm/api.txt | 27 ++
> arch/arm/include/asm/kvm_host.h
On Tue, Jan 09, 2018 at 07:04:00PM +, Suzuki K Poulose wrote:
> Add a helper to convert ID_AA64MMFR0_EL1:PARange to they physical
*the*
> size shift. Limit the size to the maximum supported by the kernel.
Is this just a cleanup or are we ac
bles are allocated. We use
> kvm->slots_lock to serialize the allocation entry point, since
> we add hooks to the arch specific call back with the mutex held.
>
> Cc: Marc Zyngier
> Cc: Christoffer Dall
> Signed-off-by: Suzuki K Poulose
> ---
> virt/kvm
On Tue, Jan 09, 2018 at 07:04:02PM +, Suzuki K Poulose wrote:
> On a 4-level page table pgd entry can be empty, unlike a 3-level
> page table. Remove the spurious WARN_ON() in stage_get_pud().
Acked-by: Christoffer Dall
>
> Cc: Marc Zyngier
> Cc: Christoffer Dall
> Sig
yed. This would avoid issues
> of use-after-free,
do we have any of those left?
> This will be later used for delaying
> the allocation of the stage2 entry level page tables until we really
> need to do something with it.
Fine, but you don't actually explain why this chang
On Tue, Jan 09, 2018 at 07:04:01PM +, Suzuki K Poulose wrote:
> So far we have only supported 3 level page table with fixed IPA of 40bits.
> Fix stage2_flush_memslot() to accommodate for 4 level tables.
>
Acked-by: Christoffer Dall
> Cc: Marc Zyngier
> Cc: Christoffer Dal
d the number of levels).
>
> Cc: Marc Zyngier
> Cc: Christoffer Dall
> Signed-off-by: Suzuki K Poulose
> ---
> arch/arm/include/asm/kvm_mmu.h | 1 +
> arch/arm64/include/asm/kvm_host.h | 12
> arch/arm64/include/asm/kvm_mmu.h| 22
Hi Suzuki,
On Tue, Jan 09, 2018 at 07:03:57PM +, Suzuki K Poulose wrote:
> Add helpers for encoding/decoding 52bit address in GICv3 ITS BASER
> register. When ITS uses 64K page size, the 52bits of physical address
> are encoded in BASER[47:12] as follows :
>
> Bits[47:16] of the register =>
and the undef is counter productive.
>
> Instead, let's follow the SMCCC which states that -1 must be returned
> to the caller when getting an unknown function number.
Apparently I forgot to review this:
Reviewed-by: Christoffer Dall
>
> Cc:
> Tested-by: Ard B
On Wed, Feb 07, 2018 at 12:27:53PM +1100, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the kvm tree got a conflict in:
>
> arch/arm64/include/asm/pgtable-prot.h
>
> between commit:
>
> 41acec624087 ("arm64: kpti: Make use of nG dependent on
> arm64_kernel_unmapped_at_e
; Also, provide trivial implementations of required kvm_s2pud_* helpers to
> allow code to compile on arm32.
>
> Signed-off-by: Punit Agrawal
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> ---
> arch/arm/include/asm/kvm_mmu.h | 9 +
> arch/arm64/include/asm/kvm_mmu.
e
> with 4K granule and 4TB with 64k granule) which can be useful on cores
> that have support for mapping larger block sizes in the TLB entries.
>
> Signed-off-by: Punit Agrawal
> Cc: Marc Zyngier
> Cc: Christoffer Dall
> Cc: Catalin Marinas
> ---
> arch/arm/include/a
ode.
>
> For the hyp TLB maintenance code, __tlb_switch_to_host_vhe() is updated
> to toggle the TGE bit with a RMW sequence, as we already do in
> __tlb_switch_to_guest_vhe().
>
> The now unused HCR_HOST_VHE_FLAGS definition is removed.
>
> Signed-off-by: Mark Rutla
es are present if
I read the code correctly).
>
> This does not enable support for KVM guests, since KVM manages HCR_EL2
> itself.
(...when running VMs.)
Besides the nits:
Acked-by: Christoffer Dall
>
> Signed-off-by: Mark Rutland
> Cc: Catalin Marinas
> Cc: Ch
ese atetmps will result in an UNDEF
attempts
> being taken by the guest.
>
> Signed-off-by: Mark Rutland
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> Cc: kvm...@lists.cs.columbia.edu
> ---
> arch/arm64/include/asm/kvm_host.h | 23 +-
> arch/arm64/include/asm/kvm_h
On Mon, Feb 05, 2018 at 10:42:44AM +, Marc Zyngier wrote:
> On 05/02/18 09:58, Andrew Jones wrote:
> > On Mon, Feb 05, 2018 at 09:24:33AM +, Marc Zyngier wrote:
> >> On 04/02/18 12:37, Christoffer Dall wrote:
>
> [...]
>
> >>> Given the urgency
On Mon, Feb 05, 2018 at 09:08:31AM +, Marc Zyngier wrote:
> On 04/02/18 18:39, Christoffer Dall wrote:
> > On Thu, Feb 01, 2018 at 11:46:51AM +, Marc Zyngier wrote:
> >> We want SMCCC_ARCH_WORKAROUND_1 to be fast. As fast as possible.
> >> So let's in
On Sun, Feb 04, 2018 at 09:57:49PM +0100, Arnd Bergmann wrote:
> On Sun, Feb 4, 2018 at 7:45 PM, Christoffer Dall
> wrote:
> > Hi Arnd,
> >
> > On Fri, Feb 02, 2018 at 04:07:34PM +0100, Arnd Bergmann wrote:
> >> In banked-sr.c, we use a top-level '__asm__(&
o keep the asm around.
Does "not understand" mean "ignores" or do we get an error?
>
> Backporting to stable kernels (4.6+) is needed to allow those to be built
> with future compilers as well.
This builds on the toolchains I have on my machine, so:
Acked-by: C
On Thu, Feb 01, 2018 at 11:46:51AM +, Marc Zyngier wrote:
> We want SMCCC_ARCH_WORKAROUND_1 to be fast. As fast as possible.
> So let's intercept it as early as we can by testing for the
> function call number as soon as we've identified a HVC call
> coming from the guest.
Hmmm. How often is
eport that
> we deal with it using SMCCC_ARCH_WORKAROUND_1, as we apply the
> host workaround on every guest exit.
Reviewed-by: Christoffer Dall
>
> Signed-off-by: Marc Zyngier
> ---
> arch/arm/include/asm/kvm_host.h | 7 +++
> arch/arm64/include/asm/kvm_host.h | 6
On Thu, Feb 01, 2018 at 11:46:49AM +, Marc Zyngier wrote:
> We're about to need kvm_psci_version in HYP too. So let's turn it
> into a static inline, and pass the kvm structure as a second
> parameter (so that HYP can do a kern_hyp_va on it).
>
Reviewed-by: Christoffer
On Thu, Feb 01, 2018 at 11:46:48AM +, Marc Zyngier wrote:
> The new SMC Calling Convention (v1.1) allows for a reduced overhead
> when calling into the firmware, and provides a new feature discovery
> mechanism.
>
> Make it visible to KVM guests.
>
Reviewed-by: Christoff
Hi Marc,
[ I know we're discussing the overall approach in parallel, but here are
some comments on the specifics of this patch, should it end up being
used in some capacity ]
On Thu, Feb 01, 2018 at 11:46:47AM +, Marc Zyngier wrote:
> Although we've implemented PSCI 1.0 and 1.1, nothing c
On Sat, Feb 03, 2018 at 11:59:32AM +, Marc Zyngier wrote:
> On Fri, 2 Feb 2018 21:17:06 +0100
> Andrew Jones wrote:
>
> > On Thu, Feb 01, 2018 at 11:46:47AM +, Marc Zyngier wrote:
> > > Although we've implemented PSCI 1.0 and 1.1, nothing can select them
> > > Since all the new PSCI versi
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