On Tue, 19 Jan 2021 21:03:44 -0800
Drew Fustini wrote:
> Document that #pinctrl-cells can be 1 or 2 for pinctrl-single,pins
>
> Fixes: 27c90e5e48d0 ("ARM: dts: am33xx-l4: change #pinctrl-cells from 1 to 2")
> Reported-by: Emmanuel Vadot
> Link:
> https:
using the offset from the padconf physical address
> --
> 2.25.1
Based on the bindings doc a value of 2 is only acceptable if one uses
pinctrl-single,bits but all the am33xx pins still uses
pinctrl-single,pins.
I noticed this because this breaks FreeBSD when I tried with 5.9 dts.
--
Emmanuel Vadot
inux and not doing
any patches to it without sending them to the Linux ML.
> Cheers,
> Andre
Cheers,
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Emmanuel Vadot
On Thu, 30 Apr 2020 17:06:34 +0200
Maxime Ripard wrote:
> On Thu, Apr 30, 2020 at 04:55:37PM +0200, Emmanuel Vadot wrote:
> > Source file was dual licenced but the header was omitted, fix that.
> > Contributors for this file are:
> > Noralf Trønnes
> > Gerd Ho
Zimmermann
Signed-off-by: Emmanuel Vadot
---
include/drm/drm_client.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/drm/drm_client.h b/include/drm/drm_client.h
index 7402f852d3c4..eb259c2547af 100644
--- a/include/drm/drm_client.h
+++ b/include/drm/drm_client.h
@@ -1,4
Source file was dual licenced but the header was omitted, fix that.
Contributors for this file are:
Noralf Trønnes
Gerd Hoffmann
Thomas Gleixner
Acked-by: Gerd Hoffmann
Acked-by: Noralf Trønnes
Signed-off-by: Emmanuel Vadot
---
Change in v2:
Retain the GPL-2.0-or-later SPDF identifier
Source file was dual licenced but the header was omitted, fix that.
Contributors for this file are:
Noralf Trønnes
Gerd Hoffmann
Thomas Gleixner
Acked-by: Gerd Hoffmann
Acked-by: Noralf Trønnes
Signed-off-by: Emmanuel Vadot
---
include/drm/drm_format_helper.h | 2 +-
1 file changed, 1
Source file was dual licenced but the header was omitted, fix that.
Contributors for this file are:
Daniel Vetter
Matt Roper
Maxime Ripard
Noralf Trønnes
Thomas Zimmermann
Acked-by: Noralf Trønnes
Acked-by: Matt Roper
Acked-by: Daniel Vetter
Signed-off-by: Emmanuel Vadot
---
include/drm
On Mon, 7 Oct 2019 09:58:59 -0700
Tony Lindgren wrote:
> * Emmanuel Vadot [191007 16:39]:
> > On Mon, 7 Oct 2019 09:16:34 -0700
> > Tony Lindgren wrote:
> >
> > > Hi,
> > >
> > > * Emmanuel Vadot [191007 08:04]:
> > > > Commit 5
On Mon, 7 Oct 2019 09:16:34 -0700
Tony Lindgren wrote:
> Hi,
>
> * Emmanuel Vadot [191007 08:04]:
> > Commit 5b63fb90adb95 ("ARM: dts: Fix incomplete dts data for am3 and am4
> > mmc")
> > fixed the mmc instances on the l3 interconnect but removed the d
am3 and am4 mmc")
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/am33xx.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index fb6b8aa12cc5..b3a1fd9e39fa 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/a
As seen on the AM335x TRM all the UARTs controller only are 0x1000 in size.
Fix this in the DTS.
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/am33xx-l4.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot
.
Emmanuel Vadot (1):
ARM: dts: am335x: Fix UARTs length
arch/arm/boot/dts/am33xx-l4.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
--
2.22.0
:51 PM Maxime Ripard
> wrote:
> >
> > On Thu, Sep 06, 2018 at 01:47:47PM +0200, Philipp Rossak wrote:
> > > On 04.09.2018 18:46, Emmanuel Vadot wrote:
> > > > > + /* Data cells */
> > > > > + thermal_cal
07ffb49ea
>
>
> x18: 7fb0fdd8 x19: 0040
>
>
> x20: 0400 x21: 0400
>
>
> x22: 7ffacff1 x23: 0008
>
>
> x24: 0004 x25: 0004
>
>
> x26: 0004 x27: 7fb0a268
>
>
> x28: x29: 7fb0a1e0
>
>
>
> Resetting CPU ...
>
> In Linux 4.20 without my patch I regularly experience crashes like the
> one below. With the patch I never experience such a crash.
For me this is 100% reproducible with the FreeBSD kernel, not the same
kind of crash but a hang as soon as we try to call PSCI/SMCCC functions.
I don't care personnaly which patch is taken as long as it's applied.
Cheers,
--
Emmanuel Vadot
Like 4436a371 for 37xx, reserve the PSCI area memory region so kernels
can call the code there.
Region address is taken from the ATF code [1] and is 2MiB aligned.
[1] plat/marvell/a8k/common/include/platform_def.h
Signed-off-by: Emmanuel Vadot
---
arch/arm64/boot/dts/marvell/armada-ap806.dtsi
Hi,
On Fri, 24 Aug 2018 16:03:40 -0700
Eduardo Valentin wrote:
> On Fri, Aug 24, 2018 at 09:59:21PM +0200, Emmanuel Vadot wrote:
> >
> > Hi,
> >
> > On Fri, 24 Aug 2018 16:58:40 +0200
> > Maxime Ripard wrote:
> >
> > > Hi,
> > >
Hi,
On Fri, 24 Aug 2018 16:58:40 +0200
Maxime Ripard wrote:
> Hi,
>
> On Mon, Aug 20, 2018 at 04:27:15PM +0200, Emmanuel Vadot wrote:
> > On Mon, 20 Aug 2018 16:07:37 +0200
> > Maxime Ripard wrote:
> >
> > > On Mon, Aug 20, 2018 at 07:41:22AM -0600, Ro
On Mon, 20 Aug 2018 16:07:37 +0200
Maxime Ripard wrote:
> On Mon, Aug 20, 2018 at 07:41:22AM -0600, Rob Herring wrote:
> > On Mon, Aug 20, 2018 at 5:17 AM Maxime Ripard
> > wrote:
> > >
> > > On Sat, Aug 04, 2018 at 09:03:49AM +0200, Emmanuel Vadot wrote:
>
On Mon, 20 Aug 2018 07:41:22 -0600
Rob Herring wrote:
> On Mon, Aug 20, 2018 at 5:17 AM Maxime Ripard
> wrote:
> >
> > On Sat, Aug 04, 2018 at 09:03:49AM +0200, Emmanuel Vadot wrote:
> > > This patch adds documentation for Device-Tree bindings for the Allwinner
>
Enable the Thermal Sensor Controller on all H5 boards.
Signed-off-by: Emmanuel Vadot
---
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 4
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 4
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
This add the ths controller for the H3 and the nvmem cell for the
calibration data on the sid node.
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/sun8i-h3.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts
Enable the Thermal Sensor Controller on all H3 boards.
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 4
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 4
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 4
arch/arm/boot/dts/sun8i-h3
Enable the Thermal Sensor Controller on all A64 boards.
Signed-off-by: Emmanuel Vadot
---
arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts| 4
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 4
arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
This patch adds documentation for Device-Tree bindings for the Allwinner
Thermal Sensor Controller found on the H3, H5 and A64 SoCs
Signed-off-by: Emmanuel Vadot
---
.../bindings/thermal/allwinner-thermal.txt| 41 +++
1 file changed, 41 insertions(+)
create mode 100644
This add the ths controller for the H5 and the nvmem cell for the
calibration data on the sid node.
Signed-off-by: Emmanuel Vadot
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5
This add the ths controller for the A64 and the nvmem cell for the
calibration data on the sid node.
Signed-off-by: Emmanuel Vadot
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64
The H5 SoC have a SID controller like the others Allwinner SoC.
Add a node for it.
Signed-off-by: Emmanuel Vadot
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
b/arch/arm64/boot/dts
The A64 have a SID controller which consist of EFUSE (starting at 0x200)
and three registers to read/write some of the protected efuses.
Signed-off-by: Emmanuel Vadot
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts
The H5 SoC have a SID controller that looks like the one in A64, the
cells are in the same offset but doesn't contain the same data (thermal
sensor calibration for example).
Add a binding for it.
Signed-off-by: Emmanuel Vadot
---
Documentation/devicetree/bindings/nvmem/allwinner,sunxi-si
The SID controller on H3 already have a binding but isn't present in the
dtsi file.
Add a node for it.
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/sun8i-h3.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3
On Fri, 27 Jul 2018 12:56:54 +0200
Emmanuel Vadot wrote:
> On Thu, 26 Jul 2018 13:54:09 +0200
> Maxime Ripard wrote:
>
> > On Tue, Jul 24, 2018 at 04:55:01PM +0200, Emmanuel Vadot wrote:
> > > On Tue, 24 Jul 2018 16:42:18 +0200
> > > Maxime Ripard wrote:
>
On Thu, 26 Jul 2018 13:54:09 +0200
Maxime Ripard wrote:
> On Tue, Jul 24, 2018 at 04:55:01PM +0200, Emmanuel Vadot wrote:
> > On Tue, 24 Jul 2018 16:42:18 +0200
> > Maxime Ripard wrote:
> >
> > > On Tue, Jul 24, 2018 at 03:34:32PM +0200, Emmanuel Vadot wrote:
>
d dts. Why is that?
There is still no dts for Pine64-LTS (Andre latest serie address that).
Note that the sopine.dtsi already have the SPI node, the patch is
present in sunxi/dt64-for-4.19
> Maxime
>
> --
> Maxime Ripard, Bootlin (formerly Free Electrons)
> Embedded Linux and Kernel engineering
> https://bootlin.com
--
Emmanuel Vadot
S node?
> > > > > > >
> > > > > > > Maxime
> > > > > > >
> > > > > >
> > > > > > Oh seems like I forgot that.
> > > > > > As related to the wiki [1] this should be 64 bit wide at the address
> > > > >
> > > > > 0x34. I
> > > > > > will add that in the next version.
> > > > > >
> > > > > >
> > > > > > [1]: http://linux-sunxi.org/SID_Register_Guide#eFUSE
> > > > > >
> > > > > > Thanks,
> > > > > > Philipp
> > > > > >
> > > > >
> > > > > Hi,
> > > > >
> > > > > Any chance this will see a v3 soon? I'm kind of interested in sid node
> > > > > for h3. =)
> > > >
> > > > This patch is independent and can be easily sent out
> > > > by its own.
> > > >
> > >
> > > Right- I had considered doing so, but wanted to make sure I wasn't
> > > going to collide with this series if a v3 is imminent.
> > >
> >
> >
> --
> Developer of free digital technology and hardware support.
>
> Website: https://www.paulk.fr/
> Coding blog: https://code.paulk.fr/
> Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/
--
Emmanuel Vadot
On Tue, 24 Jul 2018 16:42:18 +0200
Maxime Ripard wrote:
> On Tue, Jul 24, 2018 at 03:34:32PM +0200, Emmanuel Vadot wrote:
> > On Tue, 24 Jul 2018 15:00:04 +0200
> > Maxime Ripard wrote:
> >
> > > On Tue, Jul 24, 2018 at 12:15:22PM +0200, Emmanuel Vadot wrote:
&g
On Tue, 24 Jul 2018 15:00:04 +0200
Maxime Ripard wrote:
> On Tue, Jul 24, 2018 at 12:15:22PM +0200, Emmanuel Vadot wrote:
> > The SID controller on H5 look the same as the one present in the A64.
> > But in case we find some difference one day at a compatible string
> &
The H5 SoC have a SID controller that looks like the one in A64, but
in case we find some difference in the futur at a binding for it.
Signed-off-by: Emmanuel Vadot
---
Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a
The SID controller on H5 look the same as the one present in the A64.
But in case we find some difference one day at a compatible string
of it's own and a fallback to the A64 one.
Signed-off-by: Emmanuel Vadot
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 5 +
1 file chang
The SID controller on H3 is one of it's kind (at least from what we
know).
Add a compatible string for it in the SoC dtsi.
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/sun8i-h3.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm
Both H3 and H5 and a SID controller at the same address.
They are know to be different, the H5 one is the same as the A64 so add
a node in the common dtsi and we will override the compatible string in
the SoC dts.
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 4
1
The A64 have a SID controller which consist on EFUSE (starting at 0x200)
and three registers to read/write the efuses.
Signed-off-by: Emmanuel Vadot
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i
The SID controller on H3 is one of it's kind (at least from what we
know).
Add a compatible string for it in the SoC dtsi.
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/sun8i-h3.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm
The SID controller on H5 look the same as the one present in the A64.
But in case we find some difference one day at a compatible string
of it's own and a fallback to the A64 one.
Signed-off-by: Emmanuel Vadot
---
.../devicetree/bindings/nvmem/allwinner,sunxi-sid.txt| 1 +
arch/
Both H3 and H5 and a SID controller at the same address.
They are know to be different, the H5 one is the same as the A64 so add
a node in the common dtsi and we will override the compatible string in
the SoC dts.
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 4
1
The A64 have a SID controller which consist on EFUSE (starting at 0x200)
and three registers to read/write the efuses.
Signed-off-by: Emmanuel Vadot
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i
The card detect GPIO for Sopine and Pine64-LTS is PF6.
Add this to the dts.
Signed-off-by: Emmanuel Vadot
---
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
b/arch/arm64/boot/dts
On Mon, 18 Jun 2018 18:03:17 +0200
Lucas Stach wrote:
> Am Montag, den 18.06.2018, 17:42 +0200 schrieb Emmanuel Vadot:
> > The RIoTboard debug uart is connected to serial1.
> > Add a chosen property in the DTS so OS knows what serial port to use for
> > the console.
>
The RIoTboard debug uart is connected to serial1.
Add a chosen property in the DTS so OS knows what serial port to use for
the console.
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/imx6dl-riotboard.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/imx6dl
The OrangePi PC2 have an mx25l1606e spi flash.
Add a node for it.
Signed-off-by: Emmanuel Vadot
---
Changes in v2:
- Only use the compatible 'jedec,spi-nor' since the device answer to
the jedec command 0x9F
arch/arm64//boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts| 12 +
The Sopine and Pine64-LTS have a winbond w25q128 spi flash on spi0.
Add a node for it.
Signed-off-by: Emmanuel Vadot
---
Changes in v2:
- Only use the compatible 'jedec,spi-nor' since the device answer to
the jedec command 0x9F
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine
The Sopine and Pine64-LTS have a winbond w25q128 spi flash on spi0.
Add a node for it.
Signed-off-by: Emmanuel Vadot
---
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
b
The OrangePi PC2 have an mx25l1606e spi flash.
Add a node for it.
Signed-off-by: Emmanuel Vadot
---
.../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts| 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
b/arch/arm64/boot
othwell
I don't even know how I managed to screw this patch.
Maxime, Chen-Yu, how would you like this problem to be handled ?
Cheers,
--
Emmanuel Vadot
The NanoPi-M1-Plus have a 8GB eMMC, add a node for it.
This eMMC is always powered with 3.3V.
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
b/arch/arm
On Tue, 13 Feb 2018 18:36:24 +0800
Chen-Yu Tsai wrote:
> On Sat, Feb 10, 2018 at 5:20 AM, Emmanuel Vadot wrote:
> > On 2018-02-05 10:05, Icenowy Zheng wrote:
> >>
> >> ? 2018?2?5? GMT+08:00 ??4:55:58, Emmanuel Vadot
> >> ??:
> >>>
> >&g
On 2018-02-05 10:05, Icenowy Zheng wrote:
于 2018年2月5日 GMT+08:00 下午4:55:58, Emmanuel Vadot
写到:
Hello,
On Sat, 3 Feb 2018 19:23:53 +0800
Icenowy Zheng wrote:
This reverts commit 7daa213700758b5b08fc0daab09bb139dd334165.
The original commit has several problems:
- vdd-cpus and aldo3 (AVCC
0>;
> - regulator-name = "vdd-cpu";
> -};
> -
> -®_dcdc4 {
> - regulator-always-on;
> - regulator-min-microvolt = <70>;
> - regulator-max-microvolt = <132>;
> - regulator-name = "vdd-sys-dll";
> -};
> -
> -®_dcdc5 {
> - regulator-always-on;
> - regulator-min-microvolt = <150>;
> - regulator-max-microvolt = <150>;
> - regulator-name = "vcc-dram";
> -};
> -
> &uart0 {
> pinctrl-names = "default";
> pinctrl-0 = <&uart0_pins_a>;
> --
> 2.15.1
>
>
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Emmanuel Vadot
On Sat, 23 Dec 2017 17:58:46 +0100
Heiko Stuebner wrote:
> Am Samstag, 23. Dezember 2017, 17:53:45 CET schrieb Emmanuel Vadot:
> > On Sat, 23 Dec 2017 17:15:06 +0100
> > Heiko Stuebner wrote:
> >
> > > Hi Emmanuel,
> > >
> > > Am Samstag, 23. De
On Sat, 23 Dec 2017 17:15:06 +0100
Heiko Stuebner wrote:
> Hi Emmanuel,
>
> Am Samstag, 23. Dezember 2017, 16:22:54 CET schrieb Emmanuel Vadot:
> > Since those files are also needed kernel side, switch their licences
> > to GPL/X11 so it can be used in BSD kernels.
&
On Sat, 23 Dec 2017 17:19:58 +0100
Philippe Ombredanne wrote:
> Dear Emmanuel,
>
> On Sat, Dec 23, 2017 at 4:22 PM, Emmanuel Vadot wrote:
> > Since those files are also needed kernel side, switch their licences
> > to GPL/X11 so it can be used in BSD kernels.
> >
Since those files are also needed kernel side, switch their licences
to GPL/X11 so it can be used in BSD kernels.
Signed-off-by: Emmanuel Vadot
---
include/dt-bindings/clock/rk3328-cru.h | 44 ++--
include/dt-bindings/power/rk3328-power.h | 2 +-
2 files changed
On Fri, 22 Dec 2017 09:35:08 +0100
Maxime Ripard wrote:
> On Thu, Dec 21, 2017 at 07:09:03PM +0100, Emmanuel Vadot wrote:
> >
> > Hi Maxime,
> >
> > On Thu, 21 Dec 2017 16:26:30 +0100
> > Maxime Ripard wrote:
> >
> > > Hi,
> > >
&
ng itself looks fine, so as
> far as FreeBSD goes, there shouldn't be anything preventing you from
> using it I guess.
>
> Chen-Yu, what do you think?
>
> Thanks!
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
--
Emmanuel Vadot
The A13 Olinuxino have an headphone jack and audio is supported
so enable it.
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
b/arch/arm/boot/dts/sun5i-a13
On Thu, 29 Jun 2017 11:57:05 +0100
Andre Przywara wrote:
> Hi,
>
> On 25/06/17 21:45, Priit Laes wrote:
> > Convert sun7i-a20.dtsi to new CCU driver.
>
> I know that some people hat^Wget annoyed by me asking this, but anyway:
>
> Why do we actually need this?
No. I can understand the need fo
x27;function' (i.e. without the 'allwinner,' prefix).
> mmc0_pins_a: mmc0@0 {
> pins = "PF0", "PF1", "PF2",
> "PF3", "PF4", "PF5";
> --
> 2.13.1
>
>
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
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--
Emmanuel Vadot
RST_DE_MP 8
> +#define RST_TCON0 9
> +#define RST_TCON1 10
> +#define RST_CSI011
> +#define RST_CSI1 12
> +#define RST_VE 13
> +#define RST_ACE 14
> +#define RST_LVDS15
> +#define RST_GPU 16
> +#define RST_HDMI_H 17
> +#define RST_HDMI_SYS18
> +#define RST_HDMI_AUDIO_DMA 19
> +
> +#endif /* _RST_SUN7I_H_ */
> --
> 2.9.3
>
>
> ___
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--
Emmanuel Vadot
Add the needed node for DFVS on Sinovoip BPI-M2.
This add the axp221 under the p2wi node, the regulators and
the cpu-supply property for cpu0.
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 57
1 file changed, 57 insertions(+)
diff
Hi,
On Thu, 5 Jan 2017 18:16:01 +0100
Maxime Ripard wrote:
> Hi,
>
> On Mon, Dec 26, 2016 at 06:53:49PM +0100, Emmanuel Vadot wrote:
> > Enable the spi1 and spi2 node since the pins are exposed on the UEXT
> > connectors.
> >
> > Signed-off-by: Emmanuel Vado
On Thu, 5 Jan 2017 19:01:51 +0100
Maxime Ripard wrote:
> On Thu, Jan 05, 2017 at 06:37:34PM +0100, Emmanuel Vadot wrote:
> >
> > Hi,
> >
> > On Thu, 5 Jan 2017 18:16:01 +0100
> > Maxime Ripard wrote:
> >
> > > Hi,
> > >
> > &
The spi0 controller on the A20 have up to 4 CS (Chip Select) while the
others three only have 1.
Add the num-cs property to each node.
The current driver doesn't read this property but this is useful for
downstream user of DTS (FreeBSD for example).
Signed-off-by: Emmanuel Vadot
---
Chang
have a typical value of 3.0V
LD03/4 are used for Port-E/Port-G Power pin, and the schematics recommands
to set them to 2.8V as they can be used for CSI0/1.
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 90 -
1 file changed, 42 insertions
Enable the spi1 and spi2 node since the pins are exposed on the UEXT
connectors.
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
b/arch/arm/boot/dts/sun7i-a20
The spi0 controller on the A20 have up to 4 CS (Chip Select) while the
others three only have 1.
Add the num-cs property to each node.
The current driver doesn't read this property but this is useful for
downstream user of DTS (FreeBSD for example).
Signed-off-by: Emmanuel Vadot
---
Chang
Hi Maxime,
On Wed, 14 Dec 2016 16:30:13 +0100
Maxime Ripard wrote:
> On Wed, Dec 14, 2016 at 03:57:24PM +0100, Emmanuel Vadot wrote:
> > The node name for the power seq pin is mmc2@0 like the mmc2_pins_a one.
> > This makes the original node (mmc2_pins_a) scrapped out
ff-by: Emmanuel Vadot
---
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts
b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts
index 5ea4915..10d3074 100644
--- a/arc
On Mon, 5 Dec 2016 10:28:21 +0100
Maxime Ripard wrote:
> On Thu, Dec 01, 2016 at 11:24:14AM +0100, Emmanuel Vadot wrote:
> > > > > > If num-cs isn't present nothing prevent to start a transfer
> > > > > > with a non-valid CS pin, resulting in an err
Hi Maxime,
On Thu, 1 Dec 2016 10:21:50 +0100
Maxime Ripard wrote:
> Hi Emmanuel,
>
> On Fri, Nov 25, 2016 at 10:07:52PM +0100, Emmanuel Vadot wrote:
> > On Fri, 25 Nov 2016 16:20:47 +0100
> > Maxime Ripard wrote:
> >
> > > On Thu, Nov 24, 2016 at 09
On Fri, 25 Nov 2016 16:20:47 +0100
Maxime Ripard wrote:
> On Thu, Nov 24, 2016 at 09:05:09PM +0100, Emmanuel Vadot wrote:
> > On Thu, 24 Nov 2016 20:55:17 +0100
> > Maxime Ripard wrote:
> >
> > > On Tue, Nov 22, 2016 at 06:06:16PM +0100, Emmanuel Vadot wrote:
>
On Wed, 23 Nov 2016 18:16:10 +0100
Emmanuel Vadot wrote:
> On Wed, 23 Nov 2016 09:03:50 +0100
> Maxime Ripard wrote:
>
> > On Mon, Nov 21, 2016 at 05:49:11PM +0100, Emmanuel Vadot wrote:
> > > UEXT are Universal EXTension connector from Olimex. They embed i2c, spi
&
On Thu, 24 Nov 2016 20:55:17 +0100
Maxime Ripard wrote:
> On Tue, Nov 22, 2016 at 06:06:16PM +0100, Emmanuel Vadot wrote:
> > The spi0 controller on the A20 have up to 4 CS (Chip Select) while the
> > others three only have 1.
> > Add the num-cs property to each node.
&
On Wed, 23 Nov 2016 09:03:50 +0100
Maxime Ripard wrote:
> On Mon, Nov 21, 2016 at 05:49:11PM +0100, Emmanuel Vadot wrote:
> > UEXT are Universal EXTension connector from Olimex. They embed i2c, spi
> > and uart pins along power in one connector and are found on most,
> &g
The spi0 controller on the A20 have up to 4 CS (Chip Select) while the
others three only have 1.
Add the num-cs property to each node.
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/sun7i-a20.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b
UEXT are Universal EXTension connector from Olimex. They embed i2c, spi
and uart pins along power in one connector and are found on most,
if not all, Olimex boards.
The Olimex A20 SOM EVB have two UEXT connector so enable the nodes found on
those two connectors.
Signed-off-by: Emmanuel Vadot
sun7i-a20-olimex-som-evb.dts doesn't contain cpu-supply needed for
voltage-scaling with cpufreq-dt so define it.
The default voltages are defined in sun7i-a20.dtsi.
Signed-off-by: Emmanuel Vadot
---
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 4
1 file changed, 4 insertions(+)
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