Re: [net-next PATCH 0/8] configuration support for switch headers & phy
> -Original Message-
> From: Andrew Lunn
> Sent: Sunday, March 28, 2021 11:17 PM
> To: Sunil Kovvuri
> Cc: Hariprasad Kelam ; net...@vger.kernel.org;
> linux-kernel@vger.kernel.org; k...@kernel.org; da...@davemloft.net;
> Sunil Kovvuri Goutham ; Linu Cherian
> ; Geethasowjanya Akula ;
> Jerin Jacob Kollanukkaran ; Subbaraya Sundeep Bhatta
>
> Subject: [EXT] Re: [net-next PATCH 0/8] configuration support for switch
> headers & phy
>
> > The usecase is simple, unlike DSA tag, this 4byte FDSA tag doesn't
> > have a ethertype, so HW cannot recognize this header. If such packers
> > arise, then HW parsing will fail and RSS will not work.
> >
> > Hypothetically if we introduce some communication between MAC driver
> > and DSA driver, wouldn't that also become specific to the device, what
> > generic usecase that communication will have ?
>
> Hi Sunil
>
> We need to be careful with wording. Due to history, the Linux kernel uses
> dsa to mean any driver to control an Ethernet switch. It does not imply the
> {E}DSA protocol used by Marvell switches, or even that the switch is a
> Marvell switch.
>
> netdev_uses_dsa(ndev) will tell you if the MAC is being used to connect to a
> switch. It is set by the Linux DSA core when the switch cluster is setup. That
> could be before or after the MAC is configured up, which makes it a bit hard
> to use, since you don't have a clear indicator when to evaluate to determine
> if you need to change your packet parsing.
>
> netdev_uses_dsa() looks at ndev->dsa_ptr. This is a pointer to the structure
> which represents the port on the switch the MAC is connected to. In Linux
> DSA terms, this is the CPU port. You can follow dsa_ptr->tag_ops which gives
> you the tagger operations, i.e. those used to add and remove the
> header/trailer. One member of that is proto. This contains the tagging
> protocol, so EDSA, DSA, or potentially FDSA, if that is ever supported. And
> this is all within the core DSA code, so is generic. It should work for any
> tagging protocol used by any switch which Linux DSA supports.
>
> So actually, everything you need is already present, you don't need a private
> flag. But adding a notifier that the MAC has been connected to a switch and
> ndev->dsa_ptr is set would be useful. We could maybe use NETDEV_CHANGE
> for that, or NETDEV_CHANGELOWERSTATE, since the MAC is below the
> switch slave interfaces.
Hi Andrew,
We are looking into DSA to MAC driver communication options, will get
back once we have clear picture.
Thanks,
Hariprasad k
>
> Andrew
Re: [net-next PATCH 2/8] octeontx2-pf: Add ethtool priv flag to control PAM4 on/off
Hi Andrew, Please see inline, > -Original Message- > From: Andrew Lunn > Sent: Sunday, March 21, 2021 7:58 PM > To: Hariprasad Kelam > Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org; k...@kernel.org; > da...@davemloft.net; Sunil Kovvuri Goutham ; > Linu Cherian ; Geethasowjanya Akula > ; Jerin Jacob Kollanukkaran ; > Subbaraya Sundeep Bhatta > Subject: Re: [net-next PATCH 2/8] octeontx2-pf: Add ethtool priv flag to > control PAM4 on/off > > On Sun, Mar 21, 2021 at 05:39:52PM +0530, Hariprasad Kelam wrote: > > From: Felix Manlunas > > > > For PHYs that support changing modulation type (NRZ or PAM4), enable > > these > > commands: > > > > ethtool --set-priv-flags ethX pam4 on > > ethtool --set-priv-flags ethX pam4 off# means NRZ modulation > > ethtool --show-priv-flags ethX > > Why is this not derived from the link mode? How do other Vendors support > this in their high speed MAC/PHY combinations. > > Please stop using priv flags like this. This is not a Marvell specific > problem. > Any high speed MAC/PHY combination is going to need some way to > configure this. So please think about the best generic solution. > > This combined with your DSA changes give me a bad feeling. It seems like you > are just trying to dump your SDK features into the kernel, without properly > integrating the features in a vendor neutral way. > Thanks for your suggestion . Will try to evaluate this can be achieved through link mode or any generic solution. Will try to submit his feature as a separate patch. Thanks, Hariprasad k > Andrew
Re: [net-next PATCH 0/8] configuration support for switch headers & phy
Hi Andrew , Please see inline, > -Original Message- > From: Andrew Lunn > Sent: Sunday, March 21, 2021 7:45 PM > To: Hariprasad Kelam > Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org; k...@kernel.org; > da...@davemloft.net; Sunil Kovvuri Goutham ; > Linu Cherian ; Geethasowjanya Akula > ; Jerin Jacob Kollanukkaran ; > Subbaraya Sundeep Bhatta > Subject: [EXT] Re: [net-next PATCH 0/8] configuration support for switch > headers & phy > > On Sun, Mar 21, 2021 at 05:39:50PM +0530, Hariprasad Kelam wrote: > > This series of patches add support for parsing switch headers and > > configuration support for phy modulation type(NRZ or PAM4). > > > > PHYs that support changing modulation type ,user can configure it > > through private flags pam4. > > > > Marvell switches support DSA(distributed switch architecture) with > > different switch headers like FDSA and EDSA. This patch series adds > > private flags to enable user to configure interface in fdsa/edsa mode > > such that flow steering (forwading packets to pf/vf depending on > > switch header fields) and packet parsing can be acheived. > > Hi Hariprasad > > Private flags sound very wrong here. I would expect to see some integration > between the switchdev/DSA driver and the MAC driver. > Please show how this works in combination with drivers/net/dsa/mv88e6xxx > or drivers/net/ethernet/marvell/prestera. > Octeontx2 silicon supports NPC (network parser and cam) unit , through which packet parsing and packet classification is achieved. Packet parsing extracting different fields from each layer. DMAC + SMAC --> LA VLAN ID --> LB SIP + DIP --> LC TCP SPORT + DPORT --> LD And packet classification is achieved through flow identification in key extraction and mcam search key . User can install mcam rules With action as forward packet to PF and to receive queue 0 forward packet to VF and with as RSS ( Receive side scaling) drop the packet etc.. Now with switch header ( EDSA /FDSA) and HIGIG2 appended to regular packet , NPC can not parse these Ingress packets as these headers does not have fixed headers. To achieve this Special PKIND( port kind) is allocated in hardware which will help NPC to parse the packets. For example incase of EDSA 8 byte header which is placed right after SMAC , special PKIND reserved for EDSA helps NPC to Identify the input packet is EDSA . Such that NPC can extract fields in this header and forward to Parse rest of the headers. Same is the case with higig2 header where 16 bytes header is placed at start of the packet. In this case private flags helps user to configure interface in EDSA/FDSA or HIGIG2. Such that special PKIND reserved for that header are assigned to the interface. The scope of the patch series is how User can configure interface mode as switch header(HIGIG2/EDSA etc) .In our case no DSA logical Ports are created as these headers can be stripped by NPC. Thanks, Hariprasad k > Andrew
[net-next PATCH 8/8] octeontx2-pf: Add ntuple filter support for FDSA
Marvell switches support FDSA (Forward DSA). FDSA has
4 bytes length and it contains Src port and vlan field.
KPU profile is updated to parse FDSA packet and extract Src port.
The extracted Src port is placed in vlan field of KEX key.
This patch adds ntuple filter support to FDSA tag.
So that user can send traffic to either PF or VF based on
Src port or Vlan id. All rules installed for FDSA has default
action as RSS. Upon enabling FDSA , vf vlan rules will be disabled.
To enable fdsa tag
ethtool --set-priv-flags eth0 fdsa on
To send traffic with Srcport 30 to PF
ethtool -U eth0 flow-type ether user-def 0x1e
To send traffic with vlan id 30 to PF
ethtool -U eth0 flow-type ether dst xx vlan 30 m 0xf000
To send traffic with Srcport 20 to vf 0
ethtool -U eth0 flow-type ether vf 0 user-def 0x14
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Goutham
---
.../marvell/octeontx2/nic/otx2_common.h | 16 -
.../marvell/octeontx2/nic/otx2_ethtool.c | 49 +++-
.../marvell/octeontx2/nic/otx2_flows.c| 58 ---
.../ethernet/marvell/octeontx2/nic/otx2_pf.c | 13 -
4 files changed, 121 insertions(+), 15 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
index 73e927a7843..3aa61125f84 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
@@ -223,6 +223,12 @@ struct otx2_hw {
u64 *nix_lmt_base;
};
+struct vfvlan {
+ u16 vlan;
+ __be16 proto;
+ u8 qos;
+};
+
struct otx2_vf_config {
struct otx2_nic *pf;
struct delayed_work link_event_work;
@@ -230,6 +236,7 @@ struct otx2_vf_config {
u8 mac[ETH_ALEN];
u16 vlan;
int tx_vtag_idx;
+ struct vfvlan rule;
};
struct flr_work {
@@ -350,7 +357,9 @@ struct otx2_nic {
#define OTX2_PRIV_FLAG_PAM4BIT(0)
#define OTX2_PRIV_FLAG_EDSA_HDRBIT(1)
#define OTX2_PRIV_FLAG_HIGIG2_HDR BIT(2)
-#define OTX2_PRIV_FLAG_DEF_MODEBIT(3)
+#define OTX2_PRIV_FLAG_FDSA_HDRBIT(3)
+#define OTX2_INTF_MOD_MASK GENMASK(3, 1)
+#define OTX2_PRIV_FLAG_DEF_MODEBIT(4)
#define OTX2_IS_EDSA_ENABLED(flags)((flags) & \
OTX2_PRIV_FLAG_EDSA_HDR)
#define OTX2_IS_HIGIG2_ENABLED(flags) ((flags) & \
@@ -364,6 +373,7 @@ struct otx2_nic {
*/
#define OTX2_EDSA_HDR_LEN 16
#define OTX2_HIGIG2_HDR_LEN16
+#define OTX2_FDSA_HDR_LEN 4
u32 addl_mtu;
struct otx2_mac_table *mac_table;
@@ -831,14 +841,14 @@ int otx2_get_all_flows(struct otx2_nic *pfvf,
int otx2_add_flow(struct otx2_nic *pfvf,
struct ethtool_rxnfc *nfc);
int otx2_remove_flow(struct otx2_nic *pfvf, u32 location);
-int otx2_prepare_flow_request(struct ethtool_rx_flow_spec *fsp,
- struct npc_install_flow_req *req);
void otx2_rss_ctx_flow_del(struct otx2_nic *pfvf, int ctx_id);
int otx2_del_macfilter(struct net_device *netdev, const u8 *mac);
int otx2_add_macfilter(struct net_device *netdev, const u8 *mac);
int otx2_enable_rxvlan(struct otx2_nic *pf, bool enable);
int otx2_install_rxvlan_offload_flow(struct otx2_nic *pfvf);
u16 otx2_get_max_mtu(struct otx2_nic *pfvf);
+int otx2_do_set_vf_vlan(struct otx2_nic *pf, int vf, u16 vlan, u8 qos,
+ __be16 proto);
/* tc support */
int otx2_init_tc(struct otx2_nic *nic);
void otx2_shutdown_tc(struct otx2_nic *nic);
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index c1405611489..523bb089b9e 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -26,6 +26,7 @@ static const char otx2_priv_flags_strings[][ETH_GSTRING_LEN]
= {
"pam4",
"edsa",
"higig2",
+ "fdsa",
};
struct otx2_stat {
@@ -1286,6 +1287,9 @@ int otx2_set_npc_parse_mode(struct otx2_nic *pfvf, bool
unbind)
} else if (OTX2_IS_EDSA_ENABLED(pfvf->ethtool_flags)) {
req->mode = OTX2_PRIV_FLAGS_EDSA;
interface_mode = OTX2_PRIV_FLAG_EDSA_HDR;
+ } else if (pfvf->ethtool_flags & OTX2_PRIV_FLAG_FDSA_HDR) {
+ req->mode = OTX2_PRIV_FLAGS_FDSA;
+ interface_mode = OTX2_PRIV_FLAG_FDSA_HDR;
} else {
req->mode = OTX2_PRIV_FLAGS_DEFAULT;
interface_mode = OTX2_PRIV_FLAG_DEF_MODE;
@@ -1364,6 +1368,28 @@ static int otx2_enable_a
[net-next PATCH 7/8] octeontx2-af: Add flow steering support for FDSA tag
Marvell switches support distributed switch architecture (DSA) by
implementing FORWARD(FDSA). Special pkind 62 is reserved to parse
this tag.
This patch adds support to configure pkind and flow steering for
the same. To distribute fdsa packets among PF/VF , one can
specify NPC_FDSA_VAL in mcam features .Rx vtag Type 6 is reserved
to strip FDSA tag.
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 1 +
drivers/net/ethernet/marvell/octeontx2/af/npc.h| 8
drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 1 +
.../ethernet/marvell/octeontx2/af/rvu_debugfs.c| 3 ++-
.../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 9 +++--
.../net/ethernet/marvell/octeontx2/af/rvu_npc.c| 10 +-
.../net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c | 14 --
7 files changed, 40 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index a1f71ee9e98..8e0d1e47876 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -482,6 +482,7 @@ struct npc_set_pkind {
#define OTX2_PRIV_FLAGS_DEFAULT BIT_ULL(0)
#define OTX2_PRIV_FLAGS_EDSA BIT_ULL(1)
#define OTX2_PRIV_FLAGS_HIGIGBIT_ULL(2)
+#define OTX2_PRIV_FLAGS_FDSA BIT_ULL(3)
#define OTX2_PRIV_FLAGS_CUSTOM BIT_ULL(63)
u64 mode;
#define PKIND_TX BIT_ULL(0)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc.h
b/drivers/net/ethernet/marvell/octeontx2/af/npc.h
index e60f1fa2d55..059de54a4dd 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/npc.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/npc.h
@@ -179,6 +179,7 @@ enum key_fields {
NPC_DPORT_UDP,
NPC_SPORT_SCTP,
NPC_DPORT_SCTP,
+ NPC_FDSA_VAL,
NPC_HEADER_FIELDS_MAX,
NPC_CHAN = NPC_HEADER_FIELDS_MAX, /* Valid when Rx */
NPC_PF_FUNC, /* Valid when Tx */
@@ -208,6 +209,13 @@ enum key_fields {
NPC_KEY_FIELDS_MAX,
};
+enum npc_interface_type {
+ NPC_INTF_MODE_DEF,
+ NPC_INTF_MODE_EDSA,
+ NPC_INTF_MODE_HIGIG,
+ NPC_INTF_MODE_FDSA,
+};
+
struct npc_kpu_profile_cam {
u8 state;
u8 state_mask;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index ae51937ee46..f9fd443a34d 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -239,6 +239,7 @@ struct rvu_pfvf {
u8 nix_blkaddr; /* BLKADDR_NIX0/1 assigned to this PF */
u8 nix_rx_intf; /* NIX0_RX/NIX1_RX interface to NPC */
u8 nix_tx_intf; /* NIX0_TX/NIX1_TX interface to NPC */
+ int intf_mode;
};
struct nix_txsch {
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
index 741da112fdf..791eaf5e2ca 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
@@ -2002,7 +2002,8 @@ static void rvu_dbg_npc_mcam_show_flows(struct seq_file
*s,
seq_printf(s, "mask 0x%x\n", ntohs(rule->mask.etype));
break;
case NPC_OUTER_VID:
- seq_printf(s, "0x%x ", ntohs(rule->packet.vlan_tci));
+ case NPC_FDSA_VAL:
+ seq_printf(s, "%d ", ntohs(rule->packet.vlan_tci));
seq_printf(s, "mask 0x%x\n",
ntohs(rule->mask.vlan_tci));
break;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index 56ade799011..8959f03867f 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -1217,6 +1217,11 @@ int rvu_mbox_handler_nix_lf_alloc(struct rvu *rvu,
rvu_write64(rvu, blkaddr,
NIX_AF_LFX_RX_VTAG_TYPEX(nixlf, NIX_AF_LFX_RX_VTAG_TYPE7),
VTAGSIZE_T4 | VTAG_STRIP);
+ /* Configure RX VTAG Type 6 (strip) for fdsa */
+ rvu_write64(rvu, blkaddr,
+ NIX_AF_LFX_RX_VTAG_TYPEX(nixlf, NIX_AF_LFX_RX_VTAG_TYPE6),
+ VTAGSIZE_T4 | VTAG_STRIP | VTAG_CAPTURE);
+
goto exit;
@@ -2016,8 +2021,8 @@ static int nix_rx_vtag_cfg(struct rvu *rvu, int nixlf,
int blkaddr,
req->vtag_size > VTAGSIZE_T8)
return -EINVAL;
- /* RX VTAG Type 7 reserved for vf vlan */
- if (req->rx.vtag_type == NIX_AF_LFX_RX_VTAG_TYPE7)
+ /* RX VTAG Type 7,6 are reserved for vf vlan& FDSA tag strip */
+ if (req->rx.vtag_type >= NIX_AF_LFX_RX_VTAG_TYPE6)
[net-next PATCH 5/8] octeontx2-af: Put CGX LMAC also in Higig2 mode
Currently upon user request to enable Higig2 mode, only NPC packet
parsing related settings are done. This patch adds config to put
CGX LMAC also in Higig2 mode. Actual hardware config is done by firmware,
so send a request to firmware to get the config done.
Adds support for higig2 pause frames such that when user enables
higig2, 802.3 pause frames are disabled and higig2 pause frames
are enabled vice versa.
Other changes
- CGX HW doesn't support timestamping when in Higig2 mode, so
made PTP and Higig2 settings mutually exclusive.
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Goutham
---
.../net/ethernet/marvell/octeontx2/af/cgx.c | 136 --
.../net/ethernet/marvell/octeontx2/af/cgx.h | 16 ++-
.../net/ethernet/marvell/octeontx2/af/mbox.h | 14 +-
.../net/ethernet/marvell/octeontx2/af/rvu.h | 3 +
.../ethernet/marvell/octeontx2/af/rvu_cgx.c | 34 +
.../ethernet/marvell/octeontx2/af/rvu_nix.c | 17 +++
.../ethernet/marvell/octeontx2/af/rvu_npc.c | 14 ++
7 files changed, 214 insertions(+), 20 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index aa86691885d..1cbd1ffe039 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -460,18 +460,32 @@ int cgx_lmac_tx_enable(void *cgxd, int lmac_id, bool
enable)
return !!(last & DATA_PKT_TX_EN);
}
-static int cgx_lmac_get_pause_frm_status(void *cgxd, int lmac_id,
-u8 *tx_pause, u8 *rx_pause)
+static int cgx_lmac_get_higig2_pause_frm_status(void *cgxd, int lmac_id,
+ u8 *tx_pause, u8 *rx_pause)
{
struct cgx *cgx = cgxd;
u64 cfg;
- if (is_dev_rpm(cgx))
- return 0;
+ cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_HG2_CONTROL);
+
+ *rx_pause = !!(cfg & CGXX_SMUX_HG2_CONTROL_RX_ENABLE);
+ *tx_pause = !!(cfg & CGXX_SMUX_HG2_CONTROL_TX_ENABLE);
+ return 0;
+}
+
+int cgx_lmac_get_pause_frm_status(void *cgxd, int lmac_id,
+ u8 *tx_pause, u8 *rx_pause)
+{
+ struct cgx *cgx = cgxd;
+ u64 cfg;
if (!is_lmac_valid(cgx, lmac_id))
return -ENODEV;
+ if (is_higig2_enabled(cgxd, lmac_id))
+ return cgx_lmac_get_higig2_pause_frm_status(cgxd, lmac_id,
+ tx_pause, rx_pause);
+
cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL);
*rx_pause = !!(cfg & CGX_SMUX_RX_FRM_CTL_CTL_BCK);
@@ -480,17 +494,51 @@ static int cgx_lmac_get_pause_frm_status(void *cgxd, int
lmac_id,
return 0;
}
-static int cgx_lmac_enadis_pause_frm(void *cgxd, int lmac_id,
-u8 tx_pause, u8 rx_pause)
+static int cgx_lmac_enadis_higig2_pause_frm(void *cgxd, int lmac_id,
+ u8 tx_pause, u8 rx_pause)
{
struct cgx *cgx = cgxd;
u64 cfg;
- if (is_dev_rpm(cgx))
- return 0;
+ cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_HG2_CONTROL);
+ cfg &= ~CGXX_SMUX_HG2_CONTROL_RX_ENABLE;
+ cfg |= rx_pause ? CGXX_SMUX_HG2_CONTROL_RX_ENABLE : 0x0;
+ cgx_write(cgx, lmac_id, CGXX_SMUX_HG2_CONTROL, cfg);
- if (!is_lmac_valid(cgx, lmac_id))
- return -ENODEV;
+ /* Forward PAUSE information to TX block */
+ cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL);
+ cfg &= ~CGX_SMUX_RX_FRM_CTL_CTL_BCK;
+ cfg |= rx_pause ? CGX_SMUX_RX_FRM_CTL_CTL_BCK : 0x0;
+ cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg);
+
+ cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_HG2_CONTROL);
+ cfg &= ~CGXX_SMUX_HG2_CONTROL_TX_ENABLE;
+ cfg |= tx_pause ? CGXX_SMUX_HG2_CONTROL_TX_ENABLE : 0x0;
+ cgx_write(cgx, lmac_id, CGXX_SMUX_HG2_CONTROL, cfg);
+
+ /* allow intra packet hg2 generation */
+ cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_TX_PAUSE_PKT_INTERVAL);
+ cfg &= ~CGXX_SMUX_TX_PAUSE_PKT_HG2_INTRA_EN;
+ cfg |= tx_pause ? CGXX_SMUX_TX_PAUSE_PKT_HG2_INTRA_EN : 0x0;
+ cgx_write(cgx, lmac_id, CGXX_SMUX_TX_PAUSE_PKT_INTERVAL, cfg);
+
+ cfg = cgx_read(cgx, 0, CGXX_CMR_RX_OVR_BP);
+ if (tx_pause) {
+ cfg &= ~CGX_CMR_RX_OVR_BP_EN(lmac_id);
+ } else {
+ cfg |= CGX_CMR_RX_OVR_BP_EN(lmac_id);
+ cfg &= ~CGX_CMR_RX_OVR_BP_BP(lmac_id);
+ }
+
+ cgx_write(cgx, 0, CGXX_CMR_RX_OVR_BP, cfg);
+ return 0;
+}
+
+static int cgx_lmac_enadis_8023_pause_frm(void *cgxd, int lmac_id,
+ u8 tx_pause, u8 rx_pause)
+{
+ struct cgx *cgx = cgxd;
+ u64 cfg;
cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL);
cfg &= ~CGX_SMUX_RX_FRM_CTL_CTL_BCK;
@@ -513,6 +561,22 @@ sta
[net-next PATCH 4/8] octeontx2-af: Do not allow VFs to overwrite PKIND config
When switch headers like EDSA, Higig2 etc are present in ingress
or egress packets the packet parsing done by NPC needs to take additional
headers into account. KPU profile handles these using specific
PKINDs (the iKPU index) to parse these packets differently.
AF writes these pkinds to HW upon receiving NPC_SET_PKIND mbox request.
But in nix_lf_alloc mbox request from VF, AF writes default RX/TX
pkinds to HW. Since PF and its VFs share same CGX/LMAC pair, earlier
configuration is getting overwritten. Ideally VF should not override PF
configuration. This patch adds proper validation to ensure the same.
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Goutham
---
.../net/ethernet/marvell/octeontx2/af/cgx.c | 12 +++
.../net/ethernet/marvell/octeontx2/af/cgx.h | 1 +
.../net/ethernet/marvell/octeontx2/af/rvu.h | 1 +
.../ethernet/marvell/octeontx2/af/rvu_cgx.c | 36 +++
.../ethernet/marvell/octeontx2/af/rvu_nix.c | 14 +---
5 files changed, 60 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 294e7d12f15..aa86691885d 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -231,6 +231,18 @@ int cgx_set_pkind(void *cgxd, u8 lmac_id, int pkind)
return 0;
}
+int cgx_get_pkind(void *cgxd, u8 lmac_id, int *pkind)
+{
+ struct cgx *cgx = cgxd;
+
+ if (!is_lmac_valid(cgx, lmac_id))
+ return -ENODEV;
+
+ *pkind = cgx_read(cgx, lmac_id, CGXX_CMRX_RX_ID_MAP);
+ *pkind = *pkind & 0x3F;
+ return 0;
+}
+
static u8 cgx_get_lmac_type(void *cgxd, int lmac_id)
{
struct cgx *cgx = cgxd;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index 10b5611a3b4..237a91b801e 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -167,4 +167,5 @@ void cgx_lmac_write(int cgx_id, int lmac_id, u64 offset,
u64 val);
u64 cgx_lmac_read(int cgx_id, int lmac_id, u64 offset);
int cgx_set_phy_mod_type(int mod, void *cgxd, int lmac_id);
int cgx_get_phy_mod_type(void *cgxd, int lmac_id);
+int cgx_get_pkind(void *cgxd, u8 lmac_id, int *pkind);
#endif /* CGX_H */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index 2b31ecd3d21..292351bad5b 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -617,6 +617,7 @@ int rvu_cgx_start_stop_io(struct rvu *rvu, u16 pcifunc,
bool start);
int rvu_cgx_nix_cuml_stats(struct rvu *rvu, void *cgxd, int lmac_id, int index,
int rxtxflag, u64 *stat);
bool is_cgx_config_permitted(struct rvu *rvu, u16 pcifunc);
+bool rvu_cgx_is_pkind_config_permitted(struct rvu *rvu, u16 pcifunc);
/* NPA APIs */
int rvu_npa_init(struct rvu *rvu);
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
index 992e53e56c3..9c30692070b 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
@@ -970,3 +970,39 @@ int rvu_mbox_handler_cgx_get_phy_mod_type(struct rvu *rvu,
struct msg_req *req,
return rsp->mod;
return 0;
}
+
+/* Dont allow cgx mapped VFs to overwrite PKIND config
+ * incase of special PKINDs are configured like (HIGIG/EDSA)
+ */
+bool rvu_cgx_is_pkind_config_permitted(struct rvu *rvu, u16 pcifunc)
+{
+ int rc, pf, rxpkind;
+ u8 cgx_id, lmac_id;
+
+ pf = rvu_get_pf(pcifunc);
+
+ /* Ret here for PFs or non cgx interfaces */
+ if (!(pcifunc & RVU_PFVF_FUNC_MASK))
+ return true;
+
+ if (!is_pf_cgxmapped(rvu, pf))
+ return true;
+
+ rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], _id, _id);
+
+ rc = cgx_get_pkind(rvu_cgx_pdata(cgx_id, rvu), lmac_id, );
+ if (rc)
+ return false;
+
+ switch (rxpkind) {
+ /* Add here specific pkinds reserved for pkt parsing */
+ case NPC_RX_HIGIG_PKIND:
+ case NPC_RX_EDSA_PKIND:
+ rc = false;
+ break;
+ default:
+ rc = true;
+ }
+
+ return rc;
+}
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index 42cc443e6e8..ed96ebc4022 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -239,8 +239,12 @@ static int nix_interface_init(struct rvu *rvu, u16
pcifunc, int type, int nixlf)
pfvf->tx_chan_base = pfvf->rx_chan_base;
pfvf->rx_chan_cnt = 1;
pfvf->tx_chan_cnt = 1;
- cgx_set_pkind(rvu_cgx_pdata(cg
[net-next PATCH 6/8] octeontx2-pf: Support to enable EDSA/Higig2 pkts parsing
When switch headers like EDSA, Higig2 etc are present in ingress
or egress pkts the pkt parsing done by NPC needs to take additional
headers into account. KPU profile handles these using specific PKINDs
(the iKPU index) to start parsing pkts differently.
This patch enables user to configure these PKINDs into hardware for
proper pkt parsing. Patch also handles changes to max frame size due to
additional headers in pkt.
higig2:
ethtool --set-priv-flags eth0 higig2 on/off
edsa:
ethtool --set-priv-flags eth0 edsa on/off
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Goutham
---
.../marvell/octeontx2/nic/otx2_common.c | 2 +
.../marvell/octeontx2/nic/otx2_common.h | 22 +++
.../marvell/octeontx2/nic/otx2_ethtool.c | 153 +-
.../ethernet/marvell/octeontx2/nic/otx2_pf.c | 8 +
.../marvell/octeontx2/nic/otx2_txrx.c | 1 +
.../ethernet/marvell/octeontx2/nic/otx2_vf.c | 10 ++
6 files changed, 188 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
index cf7875d51d8..b9a5cd35061 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
@@ -230,6 +230,8 @@ int otx2_hw_set_mtu(struct otx2_nic *pfvf, int mtu)
return -ENOMEM;
}
+ /* Add EDSA/HIGIG2 header len to maxlen */
+ pfvf->max_frs = mtu + OTX2_ETH_HLEN + pfvf->addl_mtu;
req->maxlen = pfvf->max_frs;
err = otx2_sync_mbox_msg(>mbox);
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
index 45730d0d92f..73e927a7843 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
@@ -303,6 +303,7 @@ struct otx2_nic {
struct net_device *netdev;
struct dev_hw_ops *hw_ops;
void*iommu_domain;
+ u16 xtra_hdr;
u16 max_frs;
u16 rbsize; /* Receive buffer size */
@@ -345,6 +346,25 @@ struct otx2_nic {
struct refill_work *refill_wrk;
struct workqueue_struct *otx2_wq;
struct work_struct rx_mode_work;
+
+#define OTX2_PRIV_FLAG_PAM4BIT(0)
+#define OTX2_PRIV_FLAG_EDSA_HDRBIT(1)
+#define OTX2_PRIV_FLAG_HIGIG2_HDR BIT(2)
+#define OTX2_PRIV_FLAG_DEF_MODEBIT(3)
+#define OTX2_IS_EDSA_ENABLED(flags)((flags) & \
+OTX2_PRIV_FLAG_EDSA_HDR)
+#define OTX2_IS_HIGIG2_ENABLED(flags) ((flags) & \
+OTX2_PRIV_FLAG_HIGIG2_HDR)
+#define OTX2_IS_DEF_MODE_ENABLED(flags)((flags) &
\
+OTX2_PRIV_FLAG_DEF_MODE)
+ u32 ethtool_flags;
+
+ /* extended DSA and EDSA header lengths are 8/16 bytes
+* so take max length 16 bytes here
+*/
+#define OTX2_EDSA_HDR_LEN 16
+#define OTX2_HIGIG2_HDR_LEN16
+ u32 addl_mtu;
struct otx2_mac_table *mac_table;
/* Ethtool stuff */
@@ -796,6 +816,8 @@ int otx2_open(struct net_device *netdev);
int otx2_stop(struct net_device *netdev);
int otx2_set_real_num_queues(struct net_device *netdev,
int tx_queues, int rx_queues);
+int otx2_set_npc_parse_mode(struct otx2_nic *pfvf, bool unbind);
+
/* MCAM filter related APIs */
int otx2_mcam_flow_init(struct otx2_nic *pf);
int otx2_alloc_mcam_entries(struct otx2_nic *pfvf);
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index 552ecae1dbe..c1405611489 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -23,8 +23,9 @@
#define DRV_VF_NAME"octeontx2-nicvf"
static const char otx2_priv_flags_strings[][ETH_GSTRING_LEN] = {
-#define OTX2_PRIV_FLAGS_PAM4 BIT(0)
"pam4",
+ "edsa",
+ "higig2",
};
struct otx2_stat {
@@ -1233,7 +1234,7 @@ static int otx2_set_link_ksettings(struct net_device
*netdev,
return err;
}
-static int otx2_set_priv_flags(struct net_device *netdev, u32 priv_flags)
+static int otx2_set_phy_mod_type(struct net_device *netdev, bool enable)
{
struct otx2_nic *pfvf = netdev_priv(netdev);
struct cgx_phy_mod_type *req;
@@ -1253,7 +1254,7 @@ static int otx2_set_priv_flags(struct net_device *netdev,
u32 priv_flags)
if (!req)
[net-next PATCH 3/8] octeontx2-af: Support for parsing pkts with switch headers
Switch headers are designed to support better flow control and
loadbalancing etc. When switch headers like EDSA, Higig2 etc are
present in ingress or egress pkts default iKPU index (or PKIND)
used by NPC to parse pkts will not work as there are additional
headers appended to the pkt. Hence a separate Pkind is chosen on
Rx and/or Tx sides to tell to KPU to parse the pkts accordingly.
Signed-off-by: Hariprasad Kelam
Signed-off-by: Geetha sowjanya
Signed-off-by: Sunil Goutham
---
.../net/ethernet/marvell/octeontx2/af/mbox.h | 14 +
.../net/ethernet/marvell/octeontx2/af/npc.h | 6 ++-
.../net/ethernet/marvell/octeontx2/af/rvu.h | 4 ++
.../ethernet/marvell/octeontx2/af/rvu_cgx.c | 2 +-
.../ethernet/marvell/octeontx2/af/rvu_nix.c | 4 ++
.../ethernet/marvell/octeontx2/af/rvu_npc.c | 54 +++
6 files changed, 82 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index 66ab320b845..1ce22782260 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -222,6 +222,8 @@ M(NPC_MCAM_READ_BASE_RULE, 0x6011,
npc_read_base_steer_rule,\
M(NPC_MCAM_GET_STATS, 0x6012, npc_mcam_entry_stats, \
npc_mcam_get_stats_req, \
npc_mcam_get_stats_rsp) \
+M(NPC_SET_PKIND, 0x6013, npc_set_pkind,\
+ npc_set_pkind, msg_rsp) \
/* NIX mbox IDs (range 0x8000 - 0x) */ \
M(NIX_LF_ALLOC,0x8000, nix_lf_alloc,
\
nix_lf_alloc_req, nix_lf_alloc_rsp)\
@@ -475,6 +477,18 @@ struct cgx_fw_data {
struct cgx_lmac_fwdata_s fwdata;
};
+struct npc_set_pkind {
+ struct mbox_msghdr hdr;
+#define OTX2_PRIV_FLAGS_DEFAULT BIT_ULL(0)
+#define OTX2_PRIV_FLAGS_EDSA BIT_ULL(1)
+#define OTX2_PRIV_FLAGS_HIGIGBIT_ULL(2)
+#define OTX2_PRIV_FLAGS_CUSTOM BIT_ULL(63)
+ u64 mode;
+#define PKIND_TX BIT_ULL(0)
+#define PKIND_RX BIT_ULL(1)
+ u8 dir;
+ u8 pkind; /* valid only in case custom flag */
+};
struct cgx_set_link_mode_args {
u32 speed;
u8 duplex;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc.h
b/drivers/net/ethernet/marvell/octeontx2/af/npc.h
index 1e012e78726..e60f1fa2d55 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/npc.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/npc.h
@@ -146,7 +146,11 @@ enum npc_kpu_lh_ltype {
* Ethernet interfaces, LBK interfaces, etc.
*/
enum npc_pkind_type {
- NPC_TX_DEF_PKIND = 63ULL, /* NIX-TX PKIND */
+ NPC_TX_HIGIG_PKIND = 60ULL,
+ NPC_RX_HIGIG_PKIND,
+ NPC_RX_EDSA_PKIND,
+ NPC_TX_DEF_PKIND,
+
};
/* list of known and supported fields in packet header and
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index baaba01bd8c..2b31ecd3d21 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -616,6 +616,8 @@ void rvu_cgx_enadis_rx_bp(struct rvu *rvu, int pf, bool
enable);
int rvu_cgx_start_stop_io(struct rvu *rvu, u16 pcifunc, bool start);
int rvu_cgx_nix_cuml_stats(struct rvu *rvu, void *cgxd, int lmac_id, int index,
int rxtxflag, u64 *stat);
+bool is_cgx_config_permitted(struct rvu *rvu, u16 pcifunc);
+
/* NPA APIs */
int rvu_npa_init(struct rvu *rvu);
void rvu_npa_freemem(struct rvu *rvu);
@@ -682,6 +684,8 @@ void npc_read_mcam_entry(struct rvu *rvu, struct npc_mcam
*mcam,
u8 *intf, u8 *ena);
bool is_mac_feature_supported(struct rvu *rvu, int pf, int feature);
u32 rvu_cgx_get_fifolen(struct rvu *rvu);
+int rvu_npc_set_parse_mode(struct rvu *rvu, u16 pcifunc, u64 mode, u8 dir,
+ u64 pkind);
int npc_get_nixlf_mcam_index(struct npc_mcam *mcam, u16 pcifunc, int nixlf,
int type);
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
index b78e48d18f6..992e53e56c3 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
@@ -396,7 +396,7 @@ int rvu_cgx_exit(struct rvu *rvu)
* VF's of mapped PF and other PFs are not allowed. This fn() checks
* whether a PFFUNC is permitted to do the config or not.
*/
-static bool is_cgx_config_permitted(struct rvu *rvu, u16 pcifunc)
+bool is_cgx_config_permitted(struct rvu *rvu, u16 pcifunc)
{
if ((pcifunc & RVU_PFVF_FUNC_MASK) ||
!is_pf_cgxmapped(rvu, rvu_get_pf(pcifunc)))
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
b/dri
[net-next PATCH 2/8] octeontx2-pf: Add ethtool priv flag to control PAM4 on/off
From: Felix Manlunas
For PHYs that support changing modulation type (NRZ or PAM4), enable these
commands:
ethtool --set-priv-flags ethX pam4 on
ethtool --set-priv-flags ethX pam4 off# means NRZ modulation
ethtool --show-priv-flags ethX
Signed-off-by: Felix Manlunas
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Goutham
---
.../marvell/octeontx2/nic/otx2_ethtool.c | 62 +++
1 file changed, 62 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index f4962a97a07..552ecae1dbe 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -22,6 +22,11 @@
#define DRV_NAME "octeontx2-nicpf"
#define DRV_VF_NAME"octeontx2-nicvf"
+static const char otx2_priv_flags_strings[][ETH_GSTRING_LEN] = {
+#define OTX2_PRIV_FLAGS_PAM4 BIT(0)
+ "pam4",
+};
+
struct otx2_stat {
char name[ETH_GSTRING_LEN];
unsigned int index;
@@ -112,6 +117,12 @@ static void otx2_get_strings(struct net_device *netdev,
u32 sset, u8 *data)
struct otx2_nic *pfvf = netdev_priv(netdev);
int stats;
+ if (sset == ETH_SS_PRIV_FLAGS) {
+ memcpy(data, otx2_priv_flags_strings,
+ ARRAY_SIZE(otx2_priv_flags_strings) * ETH_GSTRING_LEN);
+ return;
+ }
+
if (sset != ETH_SS_STATS)
return;
@@ -250,6 +261,9 @@ static int otx2_get_sset_count(struct net_device *netdev,
int sset)
struct otx2_nic *pfvf = netdev_priv(netdev);
int qstats_count;
+ if (sset == ETH_SS_PRIV_FLAGS)
+ return ARRAY_SIZE(otx2_priv_flags_strings);
+
if (sset != ETH_SS_STATS)
return -EINVAL;
@@ -1219,6 +1233,52 @@ static int otx2_set_link_ksettings(struct net_device
*netdev,
return err;
}
+static int otx2_set_priv_flags(struct net_device *netdev, u32 priv_flags)
+{
+ struct otx2_nic *pfvf = netdev_priv(netdev);
+ struct cgx_phy_mod_type *req;
+ struct cgx_fw_data *fwd;
+ int rc = -ENOMEM;
+
+ fwd = otx2_get_fwdata(pfvf);
+ if (IS_ERR(fwd))
+ return PTR_ERR(fwd);
+
+ /* ret here if phy does not support this feature */
+ if (!fwd->fwdata.phy.misc.can_change_mod_type)
+ return -EOPNOTSUPP;
+
+ mutex_lock(>mbox.lock);
+ req = otx2_mbox_alloc_msg_cgx_set_phy_mod_type(>mbox);
+ if (!req)
+ goto end;
+
+ req->mod = priv_flags & OTX2_PRIV_FLAGS_PAM4;
+ if (!otx2_sync_mbox_msg(>mbox))
+ rc = 0;
+
+end:
+ mutex_unlock(>mbox.lock);
+ return rc;
+}
+
+static u32 otx2_get_priv_flags(struct net_device *netdev)
+{
+ struct otx2_nic *pfvf = netdev_priv(netdev);
+ struct cgx_fw_data *rsp;
+ u32 priv_flags = 0;
+
+ rsp = otx2_get_fwdata(pfvf);
+
+ if (IS_ERR(rsp))
+ return 0;
+
+ if (rsp->fwdata.phy.misc.mod_type)
+ priv_flags |= OTX2_PRIV_FLAGS_PAM4;
+
+ return priv_flags;
+}
+
static const struct ethtool_ops otx2_ethtool_ops = {
.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
ETHTOOL_COALESCE_MAX_FRAMES,
@@ -1250,6 +1310,8 @@ static const struct ethtool_ops otx2_ethtool_ops = {
.set_fecparam = otx2_set_fecparam,
.get_link_ksettings = otx2_get_link_ksettings,
.set_link_ksettings = otx2_set_link_ksettings,
+ .set_priv_flags = otx2_set_priv_flags,
+ .get_priv_flags = otx2_get_priv_flags,
};
void otx2_set_ethtool_ops(struct net_device *netdev)
--
2.17.1
[net-next PATCH 1/8] octeontx2-af: Add new CGX_CMDs to set and get PHY modulation type
From: Felix Manlunas
Implement commands to set and get PHY line-side modulation type
(NRZ or PAM4) from firmware.
Signed-off-by: Felix Manlunas
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Goutham
---
.../net/ethernet/marvell/octeontx2/af/cgx.c | 29 +
.../net/ethernet/marvell/octeontx2/af/cgx.h | 2 ++
.../ethernet/marvell/octeontx2/af/cgx_fw_if.h | 6
.../net/ethernet/marvell/octeontx2/af/mbox.h | 10 +-
.../ethernet/marvell/octeontx2/af/rvu_cgx.c | 31 +++
5 files changed, 77 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 68deae529bc..294e7d12f15 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -1072,6 +1072,35 @@ int cgx_get_phy_fec_stats(void *cgxd, int lmac_id)
return cgx_fwi_cmd_generic(req, , cgx, lmac_id);
}
+int cgx_set_phy_mod_type(int mod, void *cgxd, int lmac_id)
+{
+ struct cgx *cgx = cgxd;
+ u64 req = 0, resp;
+
+ if (!cgx)
+ return -ENODEV;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_SET_PHY_MOD_TYPE, req);
+ req = FIELD_SET(CMDSETPHYMODTYPE, mod, req);
+ return cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+}
+
+int cgx_get_phy_mod_type(void *cgxd, int lmac_id)
+{
+ struct cgx *cgx = cgxd;
+ u64 req = 0, resp;
+ int err;
+
+ if (!cgx)
+ return -ENODEV;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_GET_PHY_MOD_TYPE, req);
+ err = cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+ if (!err)
+ return FIELD_GET(RESP_GETPHYMODTYPE, resp);
+ return err;
+}
+
static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool enable)
{
u64 req = 0;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index 12521262164..10b5611a3b4 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -165,4 +165,6 @@ u8 cgx_get_lmacid(void *cgxd, u8 lmac_index);
unsigned long cgx_get_lmac_bmap(void *cgxd);
void cgx_lmac_write(int cgx_id, int lmac_id, u64 offset, u64 val);
u64 cgx_lmac_read(int cgx_id, int lmac_id, u64 offset);
+int cgx_set_phy_mod_type(int mod, void *cgxd, int lmac_id);
+int cgx_get_phy_mod_type(void *cgxd, int lmac_id);
#endif /* CGX_H */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
index aa4e42f78f1..6bde02c8e4b 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
@@ -264,4 +264,10 @@ struct cgx_lnk_sts {
#define CMDMODECHANGE_PORT GENMASK_ULL(21, 14)
#define CMDMODECHANGE_FLAGSGENMASK_ULL(63, 22)
+/* command argument to be passed for cmd ID - CGX_CMD_SET_PHY_MOD_TYPE */
+#define CMDSETPHYMODTYPE GENMASK_ULL(8, 8)
+
+/* response to cmd ID - RESP_GETPHYMODTYPE */
+#define RESP_GETPHYMODTYPE GENMASK_ULL(9, 9)
+
#endif /* __CGX_FW_INTF_H__ */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index 3af4d0ffcf7..66ab320b845 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -162,7 +162,10 @@ M(CGX_SET_LINK_MODE, 0x214, cgx_set_link_mode,
cgx_set_link_mode_req,\
M(CGX_FEATURES_GET,0x215, cgx_features_get, msg_req, \
cgx_features_info_msg) \
M(RPM_STATS, 0x216, rpm_stats, msg_req, rpm_stats_rsp) \
- /* NPA mbox IDs (range 0x400 - 0x5FF) */ \
+M(CGX_GET_PHY_MOD_TYPE, 0x217, cgx_get_phy_mod_type, msg_req, \
+ cgx_phy_mod_type)\
+M(CGX_SET_PHY_MOD_TYPE, 0x218, cgx_set_phy_mod_type, cgx_phy_mod_type, \
+ msg_rsp) \
/* NPA mbox IDs (range 0x400 - 0x5FF) */ \
M(NPA_LF_ALLOC,0x400, npa_lf_alloc,
\
npa_lf_alloc_req, npa_lf_alloc_rsp) \
@@ -510,6 +513,11 @@ struct rpm_stats_rsp {
u64 tx_stats[RPM_TX_STATS_COUNT];
};
+struct cgx_phy_mod_type {
+ struct mbox_msghdr hdr;
+ int mod;
+};
+
/* NPA mbox message formats */
/* NPA mailbox error codes
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
index e668e482383..b78e48d18f6 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
@@ -939,3 +939,34 @@ int rvu_mbox_handler_cgx_set_link_mode(struct rvu *rvu,
rsp->status = cgx_set_link_mode(cgxd, req->args, cgx_idx, lmac);
[net-next PATCH 0/8] configuration support for switch headers & phy
This series of patches add support for parsing switch headers and configuration support for phy modulation type(NRZ or PAM4). PHYs that support changing modulation type ,user can configure it through private flags pam4. Marvell switches support DSA(distributed switch architecture) with different switch headers like FDSA and EDSA. This patch series adds private flags to enable user to configure interface in fdsa/edsa mode such that flow steering (forwading packets to pf/vf depending on switch header fields) and packet parsing can be acheived. Also adds support for HIGIG2 protocol, user can configure interface in higig mode through higig private flage, such that packet classification and flow sterring achieved on packets with higig header Felix Manlunas (2): octeontx2-af: Add new CGX_CMDs to set and get PHY modulation type octeontx2-pf: Add ethtool priv flag to control PAM4 on/off Hariprasad Kelam (6): octeontx2-af: Support for parsing pkts with switch headers octeontx2-af: Do not allow VFs to overwrite PKIND config octeontx2-af: Put CGX LMAC also in Higig2 mode octeontx2-pf: Support to enable EDSA/Higig2 pkts parsing octeontx2-af: Add flow steering support for FDSA tag octeontx2-pf: Add ntuple filter support for FDSA .../net/ethernet/marvell/octeontx2/af/cgx.c | 177 - .../net/ethernet/marvell/octeontx2/af/cgx.h | 19 +- .../ethernet/marvell/octeontx2/af/cgx_fw_if.h | 6 + .../net/ethernet/marvell/octeontx2/af/mbox.h | 39 ++- .../net/ethernet/marvell/octeontx2/af/npc.h | 14 +- .../net/ethernet/marvell/octeontx2/af/rvu.h | 9 + .../ethernet/marvell/octeontx2/af/rvu_cgx.c | 103 +++- .../marvell/octeontx2/af/rvu_debugfs.c| 3 +- .../ethernet/marvell/octeontx2/af/rvu_nix.c | 44 +++- .../ethernet/marvell/octeontx2/af/rvu_npc.c | 76 ++ .../marvell/octeontx2/af/rvu_npc_fs.c | 14 +- .../marvell/octeontx2/nic/otx2_common.c | 2 + .../marvell/octeontx2/nic/otx2_common.h | 36 ++- .../marvell/octeontx2/nic/otx2_ethtool.c | 244 ++ .../marvell/octeontx2/nic/otx2_flows.c| 58 - .../ethernet/marvell/octeontx2/nic/otx2_pf.c | 21 +- .../marvell/octeontx2/nic/otx2_txrx.c | 1 + .../ethernet/marvell/octeontx2/nic/otx2_vf.c | 10 + 18 files changed, 832 insertions(+), 44 deletions(-) -- 2.17.1
[net PATCH v2 8/8] octeontx2-af: Fix uninitialized variable warning
From: Subbaraya Sundeep
Initialize l4_key_offset variable to fix uninitialized
variable compiler warning.
Fixes: b9b7421a01d8 ("octeontx2-af: Support ESP/AH RSS hashing")
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index d3000194e2d..3d068b7d46b 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -2629,7 +2629,7 @@ static int set_flowkey_fields(struct nix_rx_flowkey_alg
*alg, u32 flow_cfg)
struct nix_rx_flowkey_alg *field;
struct nix_rx_flowkey_alg tmp;
u32 key_type, valid_key;
- int l4_key_offset;
+ int l4_key_offset = 0;
if (!alg)
return -EINVAL;
--
2.17.1
[net PATCH v2 7/8] octeontx2-af: fix infinite loop in unmapping NPC counter
unmapping npc counter works in a way by traversing all mcam
entries to find which mcam rule is associated with counter.
But loop cursor variable 'entry' is not incremented before
checking next mcam entry which resulting in infinite loop.
This in turn hogs the kworker thread forever and no other
mbox message is processed by AF driver after that.
Fix this by updating entry value before checking next
mcam entry.
Fixes: a958dd59f9ce ("octeontx2-af: Map or unmap NPC MCAM entry and counter")
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
index 04bb0803a5c..0bd49c7080a 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
@@ -2490,10 +2490,10 @@ int rvu_mbox_handler_npc_mcam_free_counter(struct rvu
*rvu,
index = find_next_bit(mcam->bmap, mcam->bmap_entries, entry);
if (index >= mcam->bmap_entries)
break;
+ entry = index + 1;
if (mcam->entry2cntr_map[index] != req->cntr)
continue;
- entry = index + 1;
npc_unmap_mcam_entry_and_cntr(rvu, mcam, blkaddr,
index, req->cntr);
}
--
2.17.1
[net PATCH v2 6/8] octeontx2-pf: Clear RSS enable flag on interace down
From: Geetha sowjanya
RSS configuration can not be get/set when interface is in down state
as they required mbox communication. RSS enable flag status
is used for set/get configuration. Current code do not clear the
RSS enable flag on interface down which lead to mbox error while
trying to set/get RSS configuration.
Fixes: 85069e95e531 ("octeontx2-pf: Receive side scaling support")
Signed-off-by: Geetha sowjanya
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
index 53ab1814d74..2fd3d235d29 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
@@ -1672,6 +1672,7 @@ int otx2_stop(struct net_device *netdev)
struct otx2_nic *pf = netdev_priv(netdev);
struct otx2_cq_poll *cq_poll = NULL;
struct otx2_qset *qset = >qset;
+ struct otx2_rss_info *rss;
int qidx, vec, wrk;
netif_carrier_off(netdev);
@@ -1684,6 +1685,10 @@ int otx2_stop(struct net_device *netdev)
/* First stop packet Rx/Tx */
otx2_rxtx_enable(pf, false);
+ /* Clear RSS enable flag */
+ rss = >hw.rss_info;
+ rss->enable = false;
+
/* Cleanup Queue IRQ */
vec = pci_irq_vector(pf->pdev,
pf->hw.nix_msixoff + NIX_LF_QINT_VEC_START);
--
2.17.1
[net PATCH v2 4/8] octeontx2-af: Return correct CGX RX fifo size
From: Subbaraya Sundeep
CGX receive buffer size is a constant value and
cannot be read from CGX0 block always since
CGX0 may not enabled everytime. Hence return CGX
receive buffer size from first enabled CGX block
instead of CGX0.
Fixes: 6e54e1c5399a ("octeontx2-af: cn10K: MTU configuration")
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
.../net/ethernet/marvell/octeontx2/af/rvu.h| 1 +
.../ethernet/marvell/octeontx2/af/rvu_cgx.c| 18 --
.../marvell/octeontx2/af/rvu_debugfs.c | 9 +
3 files changed, 22 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index fa6e46e36ae..76f399229dd 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -678,6 +678,7 @@ void npc_read_mcam_entry(struct rvu *rvu, struct npc_mcam
*mcam,
u8 *intf, u8 *ena);
bool is_mac_feature_supported(struct rvu *rvu, int pf, int feature);
u32 rvu_cgx_get_fifolen(struct rvu *rvu);
+void *rvu_first_cgx_pdata(struct rvu *rvu);
/* CPT APIs */
int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc, int lf, int slot);
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
index e668e482383..6e2bf4fcd29 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
@@ -89,6 +89,21 @@ void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu)
return rvu->cgx_idmap[cgx_id];
}
+/* Return first enabled CGX instance if none are enabled then return NULL */
+void *rvu_first_cgx_pdata(struct rvu *rvu)
+{
+ int first_enabled_cgx = 0;
+ void *cgxd = NULL;
+
+ for (; first_enabled_cgx < rvu->cgx_cnt_max; first_enabled_cgx++) {
+ cgxd = rvu_cgx_pdata(first_enabled_cgx, rvu);
+ if (cgxd)
+ break;
+ }
+
+ return cgxd;
+}
+
/* Based on P2X connectivity find mapped NIX block for a PF */
static void rvu_map_cgx_nix_block(struct rvu *rvu, int pf,
int cgx_id, int lmac_id)
@@ -711,10 +726,9 @@ int rvu_mbox_handler_cgx_features_get(struct rvu *rvu,
u32 rvu_cgx_get_fifolen(struct rvu *rvu)
{
struct mac_ops *mac_ops;
- int rvu_def_cgx_id = 0;
u32 fifo_len;
- mac_ops = get_mac_ops(rvu_cgx_pdata(rvu_def_cgx_id, rvu));
+ mac_ops = get_mac_ops(rvu_first_cgx_pdata(rvu));
fifo_len = mac_ops ? mac_ops->fifo_len : 0;
return fifo_len;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
index dc946953af0..b4c53b19f53 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
@@ -331,7 +331,6 @@ static int rvu_dbg_rvu_pf_cgx_map_display(struct seq_file
*filp, void *unused)
struct rvu *rvu = filp->private;
struct pci_dev *pdev = NULL;
struct mac_ops *mac_ops;
- int rvu_def_cgx_id = 0;
char cgx[10], lmac[10];
struct rvu_pfvf *pfvf;
int pf, domain, blkid;
@@ -339,7 +338,10 @@ static int rvu_dbg_rvu_pf_cgx_map_display(struct seq_file
*filp, void *unused)
u16 pcifunc;
domain = 2;
- mac_ops = get_mac_ops(rvu_cgx_pdata(rvu_def_cgx_id, rvu));
+ mac_ops = get_mac_ops(rvu_first_cgx_pdata(rvu));
+ /* There can be no CGX devices at all */
+ if (!mac_ops)
+ return 0;
seq_printf(filp, "PCI dev\t\tRVU PF Func\tNIX block\t%s\tLMAC\n",
mac_ops->name);
for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
@@ -1830,7 +1832,6 @@ static void rvu_dbg_cgx_init(struct rvu *rvu)
{
struct mac_ops *mac_ops;
unsigned long lmac_bmap;
- int rvu_def_cgx_id = 0;
int i, lmac_id;
char dname[20];
void *cgx;
@@ -1838,7 +1839,7 @@ static void rvu_dbg_cgx_init(struct rvu *rvu)
if (!cgx_get_cgxcnt_max())
return;
- mac_ops = get_mac_ops(rvu_cgx_pdata(rvu_def_cgx_id, rvu));
+ mac_ops = get_mac_ops(rvu_first_cgx_pdata(rvu));
if (!mac_ops)
return;
--
2.17.1
[net PATCH v2 5/8] octeontx2-af: Fix irq free in rvu teardown
From: Geetha sowjanya
Current devlink code try to free already freed irqs as the
irq_allocate flag is not cleared after free leading to kernel
crash while removing rvu driver. The patch fixes the irq free
sequence and clears the irq_allocate flag on free.
Fixes: 7304ac4567bc ("octeontx2-af: Add mailbox IRQ and msg handlers")
Signed-off-by: Geetha sowjanya
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/rvu.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
index d9a1a71c7cc..ab24a5e8ee8 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
@@ -2462,8 +2462,10 @@ static void rvu_unregister_interrupts(struct rvu *rvu)
INTR_MASK(rvu->hw->total_pfs) & ~1ULL);
for (irq = 0; irq < rvu->num_vec; irq++) {
- if (rvu->irq_allocated[irq])
+ if (rvu->irq_allocated[irq]) {
free_irq(pci_irq_vector(rvu->pdev, irq), rvu);
+ rvu->irq_allocated[irq] = false;
+ }
}
pci_free_irq_vectors(rvu->pdev);
@@ -2975,8 +2977,8 @@ static void rvu_remove(struct pci_dev *pdev)
struct rvu *rvu = pci_get_drvdata(pdev);
rvu_dbg_exit(rvu);
- rvu_unregister_interrupts(rvu);
rvu_unregister_dl(rvu);
+ rvu_unregister_interrupts(rvu);
rvu_flr_wq_destroy(rvu);
rvu_cgx_exit(rvu);
rvu_fwdata_exit(rvu);
--
2.17.1
[net PATCH v2 3/8] octeontx2-af: Remove TOS field from MKEX TX
From: Subbaraya Sundeep
The MKEX profile describes what packet fields need to be extracted from
the input packet and how to place those packet fields in the output key
for MCAM matching. The MKEX profile can be in a way where higher layer
packet fields can overwrite lower layer packet fields in output MCAM
Key.
Hence MKEX profile is always ensured that there are no overlaps between
any of the layers. But the commit 42006910b5ea
("octeontx2-af: cleanup KPU config data") introduced TX TOS field which
overlaps with DMAC in MCAM key.
This led to AF driver returning error when TX rule is installed with
DMAC as match criteria since DMAC gets overwritten and cannot be
supported. This patch fixes the issue by removing TOS field from MKEX TX
profile.
Fixes: 42006910b5ea ("octeontx2-af: cleanup KPU config data")
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h
b/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h
index b192692b4fc..5c372d2c24a 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h
@@ -13499,8 +13499,6 @@ static struct npc_mcam_kex npc_mkex_default = {
[NPC_LT_LC_IP] = {
/* SIP+DIP: 8 bytes, KW2[63:0] */
KEX_LD_CFG(0x07, 0xc, 0x1, 0x0, 0x10),
- /* TOS: 1 byte, KW1[63:56] */
- KEX_LD_CFG(0x0, 0x1, 0x1, 0x0, 0xf),
},
/* Layer C: IPv6 */
[NPC_LT_LC_IP6] = {
--
2.17.1
[net PATCH v2 0/8] octeontx2: miscellaneous fixes
This series of patches fixes various issues related to NPC MCAM entry management, debugfs, devlink, CGX LMAC mapping, RSS config etc Change-log: v2: Fixed below review comments - corrected Fixed tag syntax with 12 digits SHA1 and providing space between SHA1 and subject line - remove code improvement patch - make commit description more clear Geetha sowjanya (2): octeontx2-af: Fix irq free in rvu teardown octeontx2-pf: Clear RSS enable flag on interace down Hariprasad Kelam (1): octeontx2-af: fix infinite loop in unmapping NPC counter Rakesh Babu (1): octeontx2-af: Formatting debugfs entry rsrc_alloc. Subbaraya Sundeep (4): octeontx2-pf: Do not modify number of rules octeontx2-af: Remove TOS field from MKEX TX octeontx2-af: Return correct CGX RX fifo size octeontx2-af: Fix uninitialized variable warning .../marvell/octeontx2/af/npc_profile.h| 2 - .../net/ethernet/marvell/octeontx2/af/rvu.c | 6 +- .../net/ethernet/marvell/octeontx2/af/rvu.h | 1 + .../ethernet/marvell/octeontx2/af/rvu_cgx.c | 18 +- .../marvell/octeontx2/af/rvu_debugfs.c| 55 --- .../ethernet/marvell/octeontx2/af/rvu_nix.c | 2 +- .../ethernet/marvell/octeontx2/af/rvu_npc.c | 2 +- .../marvell/octeontx2/nic/otx2_flows.c| 4 +- .../ethernet/marvell/octeontx2/nic/otx2_pf.c | 5 ++ 9 files changed, 65 insertions(+), 30 deletions(-) -- 2.17.1
[net PATCH v2 2/8] octeontx2-af: Formatting debugfs entry rsrc_alloc.
From: Rakesh Babu
With the existing rsrc_alloc's format, there is misalignment for the
pcifunc entries whose VF's index is a double digit. This patch fixes
this.
pcifunc NPA NIX0NIX1SSO GROUP SSOWS
TIM CPT0CPT1REE0REE1
PF0:VF0 8 5
PF0:VF1 9 3
PF0:VF1018 10
PF0:VF1119 8
PF0:VF1220 11
PF0:VF1321 9
PF0:VF1422 12
PF0:VF1523 10
PF1 0 0
Fixes: 23205e6d06d4 ("octeontx2-af: Dump current resource provisioning status")
Signed-off-by: Rakesh Babu
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
.../marvell/octeontx2/af/rvu_debugfs.c| 46 ---
1 file changed, 29 insertions(+), 17 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
index aa2ca8780b9..dc946953af0 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
@@ -234,12 +234,14 @@ static ssize_t rvu_dbg_rsrc_attach_status(struct file
*filp,
char __user *buffer,
size_t count, loff_t *ppos)
{
- int index, off = 0, flag = 0, go_back = 0, off_prev;
+ int index, off = 0, flag = 0, go_back = 0, len = 0;
struct rvu *rvu = filp->private_data;
int lf, pf, vf, pcifunc;
struct rvu_block block;
int bytes_not_copied;
+ int lf_str_size = 12;
int buf_size = 2048;
+ char *lfs;
char *buf;
/* don't allow partial reads */
@@ -249,12 +251,18 @@ static ssize_t rvu_dbg_rsrc_attach_status(struct file
*filp,
buf = kzalloc(buf_size, GFP_KERNEL);
if (!buf)
return -ENOSPC;
- off += scnprintf([off], buf_size - 1 - off, "\npcifunc\t\t");
+
+ lfs = kzalloc(lf_str_size, GFP_KERNEL);
+ if (!lfs)
+ return -ENOMEM;
+ off += scnprintf([off], buf_size - 1 - off, "%-*s", lf_str_size,
+ "pcifunc");
for (index = 0; index < BLK_COUNT; index++)
- if (strlen(rvu->hw->block[index].name))
- off += scnprintf([off], buf_size - 1 - off,
- "%*s\t", (index - 1) * 2,
- rvu->hw->block[index].name);
+ if (strlen(rvu->hw->block[index].name)) {
+ off += scnprintf([off], buf_size - 1 - off,
+"%-*s", lf_str_size,
+rvu->hw->block[index].name);
+ }
off += scnprintf([off], buf_size - 1 - off, "\n");
for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
for (vf = 0; vf <= rvu->hw->total_vfs; vf++) {
@@ -263,14 +271,15 @@ static ssize_t rvu_dbg_rsrc_attach_status(struct file
*filp,
continue;
if (vf) {
+ sprintf(lfs, "PF%d:VF%d", pf, vf - 1);
go_back = scnprintf([off],
buf_size - 1 - off,
- "PF%d:VF%d\t\t", pf,
- vf - 1);
+ "%-*s", lf_str_size, lfs);
} else {
+ sprintf(lfs, "PF%d", pf);
go_back = scnprintf([off],
buf_size - 1 - off,
- "PF%d\t\t", pf);
+ "%-*s", lf_str_size, lfs);
}
off += go_back;
@@ -278,20 +287,22 @@ static ssize_t rvu_dbg_rsrc_attach_status(struct file
*filp,
block = rvu->hw->block[index];
if (!strlen(block.name))
continue;
- off_prev = off;
+ len = 0;
+ lfs[len] = '\0';
for (lf = 0; lf < block.lf.max; lf++) {
if (block.fn_map[lf] != pcifunc)
continue;
flag = 1;
-
[net PATCH v2 1/8] octeontx2-pf: Do not modify number of rules
From: Subbaraya Sundeep
In the ETHTOOL_GRXCLSRLALL ioctl ethtool uses
below structure to read number of rules from the driver.
struct ethtool_rxnfc {
__u32 cmd;
__u32 flow_type;
__u64 data;
struct ethtool_rx_flow_spec fs;
union {
__u32 rule_cnt;
__u32 rss_context;
};
__u32 rule_locs[0];
};
Driver must not modify rule_cnt member. But currently driver
modifies it by modifying rss_context. Hence fix it by using a
local variable.
Fixes: 81a4362016e7 ("octeontx2-pf: Add RSS multi group support")
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c
index 0dbbf38e059..dc177842097 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c
@@ -257,17 +257,19 @@ int otx2_get_flow(struct otx2_nic *pfvf, struct
ethtool_rxnfc *nfc,
int otx2_get_all_flows(struct otx2_nic *pfvf, struct ethtool_rxnfc *nfc,
u32 *rule_locs)
{
+ u32 rule_cnt = nfc->rule_cnt;
u32 location = 0;
int idx = 0;
int err = 0;
nfc->data = pfvf->flow_cfg->ntuple_max_flows;
- while ((!err || err == -ENOENT) && idx < nfc->rule_cnt) {
+ while ((!err || err == -ENOENT) && idx < rule_cnt) {
err = otx2_get_flow(pfvf, nfc, location);
if (!err)
rule_locs[idx++] = location;
location++;
}
+ nfc->rule_cnt = rule_cnt;
return err;
}
--
2.17.1
[net PATCH 9/9] octeontx2-af: Fix uninitialized variable warning
From: Subbaraya Sundeep
Initialize l4_key_offset variable to fix uninitialized
variable compiler warning.
Fixes: b9b7421("octeontx2-af: Support ESP/AH RSS hashing")
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index d300019..3d068b7 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -2629,7 +2629,7 @@ static int set_flowkey_fields(struct nix_rx_flowkey_alg
*alg, u32 flow_cfg)
struct nix_rx_flowkey_alg *field;
struct nix_rx_flowkey_alg tmp;
u32 key_type, valid_key;
- int l4_key_offset;
+ int l4_key_offset = 0;
if (!alg)
return -EINVAL;
--
2.7.4
[net PATCH 8/9] octeontx2-af: fix infinite loop in unmapping counter
Current code does not break from loop due to entry value
miscalculation. Hence correct the same.
Fixes: a958dd59("octeontx2-af: Map or unmap NPC MCAM entry and counter")
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
index 04bb080..0bd49c7 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
@@ -2490,10 +2490,10 @@ int rvu_mbox_handler_npc_mcam_free_counter(struct rvu
*rvu,
index = find_next_bit(mcam->bmap, mcam->bmap_entries, entry);
if (index >= mcam->bmap_entries)
break;
+ entry = index + 1;
if (mcam->entry2cntr_map[index] != req->cntr)
continue;
- entry = index + 1;
npc_unmap_mcam_entry_and_cntr(rvu, mcam, blkaddr,
index, req->cntr);
}
--
2.7.4
[net PATCH 7/9] octeontx2-pf: Clear RSS enable flag on interace down
From: Geetha sowjanya
RSS configuration can not be get/set when interface is in down state
as they required mbox communication. RSS enable flag status
is used for set/get configuration. Current code do not clear the
RSS enable flag on interface down which lead to mbox error while
trying to set/get RSS configuration.
Fixes: 85069e95e("octeontx2-pf: Receive side scaling support")
Signed-off-by: Geetha sowjanya
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
index 53ab181..2fd3d23 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
@@ -1672,6 +1672,7 @@ int otx2_stop(struct net_device *netdev)
struct otx2_nic *pf = netdev_priv(netdev);
struct otx2_cq_poll *cq_poll = NULL;
struct otx2_qset *qset = >qset;
+ struct otx2_rss_info *rss;
int qidx, vec, wrk;
netif_carrier_off(netdev);
@@ -1684,6 +1685,10 @@ int otx2_stop(struct net_device *netdev)
/* First stop packet Rx/Tx */
otx2_rxtx_enable(pf, false);
+ /* Clear RSS enable flag */
+ rss = >hw.rss_info;
+ rss->enable = false;
+
/* Cleanup Queue IRQ */
vec = pci_irq_vector(pf->pdev,
pf->hw.nix_msixoff + NIX_LF_QINT_VEC_START);
--
2.7.4
[net PATCH 6/9] octeontx2-af: Fix irq free in rvu teardown
From: Geetha sowjanya
Current devlink code try to free already freed irqs as the
irq_allocate flag is not cleared after free leading to kernel
crash while removing rvu driver. The patch fixes the irq free
sequence and clears the irq_allocate flag on free.
Fixes: 7304ac456("octeontx2-af: Add mailbox IRQ and msg handlers")
Signed-off-by: Geetha sowjanya
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/rvu.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
index d9a1a71..ab24a5e 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
@@ -2462,8 +2462,10 @@ static void rvu_unregister_interrupts(struct rvu *rvu)
INTR_MASK(rvu->hw->total_pfs) & ~1ULL);
for (irq = 0; irq < rvu->num_vec; irq++) {
- if (rvu->irq_allocated[irq])
+ if (rvu->irq_allocated[irq]) {
free_irq(pci_irq_vector(rvu->pdev, irq), rvu);
+ rvu->irq_allocated[irq] = false;
+ }
}
pci_free_irq_vectors(rvu->pdev);
@@ -2975,8 +2977,8 @@ static void rvu_remove(struct pci_dev *pdev)
struct rvu *rvu = pci_get_drvdata(pdev);
rvu_dbg_exit(rvu);
- rvu_unregister_interrupts(rvu);
rvu_unregister_dl(rvu);
+ rvu_unregister_interrupts(rvu);
rvu_flr_wq_destroy(rvu);
rvu_cgx_exit(rvu);
rvu_fwdata_exit(rvu);
--
2.7.4
[net PATCH 5/9] octeontx2-af: Return correct CGX RX fifo size
From: Subbaraya Sundeep
CGX receive buffer size is a constant value and
cannot be read from CGX0 block always since
CGX0 may not enabled everytime. Hence return CGX
receive buffer size from first enabled CGX block
instead of CGX0.
Fixes: 6e54e1c5("octeontx2-af: cn10K: MTU configuration")
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 1 +
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 18 --
.../net/ethernet/marvell/octeontx2/af/rvu_debugfs.c| 9 +
3 files changed, 22 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index fa6e46e..76f3992 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -678,6 +678,7 @@ void npc_read_mcam_entry(struct rvu *rvu, struct npc_mcam
*mcam,
u8 *intf, u8 *ena);
bool is_mac_feature_supported(struct rvu *rvu, int pf, int feature);
u32 rvu_cgx_get_fifolen(struct rvu *rvu);
+void *rvu_first_cgx_pdata(struct rvu *rvu);
/* CPT APIs */
int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc, int lf, int slot);
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
index e668e48..6e2bf4f 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
@@ -89,6 +89,21 @@ void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu)
return rvu->cgx_idmap[cgx_id];
}
+/* Return first enabled CGX instance if none are enabled then return NULL */
+void *rvu_first_cgx_pdata(struct rvu *rvu)
+{
+ int first_enabled_cgx = 0;
+ void *cgxd = NULL;
+
+ for (; first_enabled_cgx < rvu->cgx_cnt_max; first_enabled_cgx++) {
+ cgxd = rvu_cgx_pdata(first_enabled_cgx, rvu);
+ if (cgxd)
+ break;
+ }
+
+ return cgxd;
+}
+
/* Based on P2X connectivity find mapped NIX block for a PF */
static void rvu_map_cgx_nix_block(struct rvu *rvu, int pf,
int cgx_id, int lmac_id)
@@ -711,10 +726,9 @@ int rvu_mbox_handler_cgx_features_get(struct rvu *rvu,
u32 rvu_cgx_get_fifolen(struct rvu *rvu)
{
struct mac_ops *mac_ops;
- int rvu_def_cgx_id = 0;
u32 fifo_len;
- mac_ops = get_mac_ops(rvu_cgx_pdata(rvu_def_cgx_id, rvu));
+ mac_ops = get_mac_ops(rvu_first_cgx_pdata(rvu));
fifo_len = mac_ops ? mac_ops->fifo_len : 0;
return fifo_len;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
index dc94695..b4c53b19 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
@@ -331,7 +331,6 @@ static int rvu_dbg_rvu_pf_cgx_map_display(struct seq_file
*filp, void *unused)
struct rvu *rvu = filp->private;
struct pci_dev *pdev = NULL;
struct mac_ops *mac_ops;
- int rvu_def_cgx_id = 0;
char cgx[10], lmac[10];
struct rvu_pfvf *pfvf;
int pf, domain, blkid;
@@ -339,7 +338,10 @@ static int rvu_dbg_rvu_pf_cgx_map_display(struct seq_file
*filp, void *unused)
u16 pcifunc;
domain = 2;
- mac_ops = get_mac_ops(rvu_cgx_pdata(rvu_def_cgx_id, rvu));
+ mac_ops = get_mac_ops(rvu_first_cgx_pdata(rvu));
+ /* There can be no CGX devices at all */
+ if (!mac_ops)
+ return 0;
seq_printf(filp, "PCI dev\t\tRVU PF Func\tNIX block\t%s\tLMAC\n",
mac_ops->name);
for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
@@ -1830,7 +1832,6 @@ static void rvu_dbg_cgx_init(struct rvu *rvu)
{
struct mac_ops *mac_ops;
unsigned long lmac_bmap;
- int rvu_def_cgx_id = 0;
int i, lmac_id;
char dname[20];
void *cgx;
@@ -1838,7 +1839,7 @@ static void rvu_dbg_cgx_init(struct rvu *rvu)
if (!cgx_get_cgxcnt_max())
return;
- mac_ops = get_mac_ops(rvu_cgx_pdata(rvu_def_cgx_id, rvu));
+ mac_ops = get_mac_ops(rvu_first_cgx_pdata(rvu));
if (!mac_ops)
return;
--
2.7.4
[net PATCH 3/9] octeontx2-af: Do not allocate memory for devlink private
From: Subbaraya Sundeep
Memory for driver private structure rvu_devlink is
also allocated during devlink_alloc. Hence use
the allocated memory by devlink_alloc and access it
by devlink_priv call.
Fixes: fae06da4("octeontx2-af: Add devlink suppoort to af driver")
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
index 10a98bc..d88ac90 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
@@ -1380,14 +1380,9 @@ int rvu_register_dl(struct rvu *rvu)
struct devlink *dl;
int err;
- rvu_dl = kzalloc(sizeof(*rvu_dl), GFP_KERNEL);
- if (!rvu_dl)
- return -ENOMEM;
-
dl = devlink_alloc(_devlink_ops, sizeof(struct rvu_devlink));
if (!dl) {
dev_warn(rvu->dev, "devlink_alloc failed\n");
- kfree(rvu_dl);
return -ENOMEM;
}
@@ -1395,10 +1390,10 @@ int rvu_register_dl(struct rvu *rvu)
if (err) {
dev_err(rvu->dev, "devlink register failed with error %d\n",
err);
devlink_free(dl);
- kfree(rvu_dl);
return err;
}
+ rvu_dl = devlink_priv(dl);
rvu_dl->dl = dl;
rvu_dl->rvu = rvu;
rvu->rvu_dl = rvu_dl;
--
2.7.4
[net PATCH 4/9] octeontx2-af: Remove TOS field from MKEX TX
From: Subbaraya Sundeep
TOS overlaps with DMAC field in mcam search key and hence installing
rules for TX side are failing. Hence remove TOS field from TX profile.
Fixes: 42006910("octeontx2-af: cleanup KPU config data")
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h
b/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h
index b192692..5c372d2 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h
@@ -13499,8 +13499,6 @@ static struct npc_mcam_kex npc_mkex_default = {
[NPC_LT_LC_IP] = {
/* SIP+DIP: 8 bytes, KW2[63:0] */
KEX_LD_CFG(0x07, 0xc, 0x1, 0x0, 0x10),
- /* TOS: 1 byte, KW1[63:56] */
- KEX_LD_CFG(0x0, 0x1, 0x1, 0x0, 0xf),
},
/* Layer C: IPv6 */
[NPC_LT_LC_IP6] = {
--
2.7.4
[net PATCH 1/9] octeontx2-pf: Do not modify number of rules
From: Subbaraya Sundeep
In the ETHTOOL_GRXCLSRLALL ioctl ethtool uses
below structure to read number of rules from the driver.
struct ethtool_rxnfc {
__u32 cmd;
__u32 flow_type;
__u64 data;
struct ethtool_rx_flow_spec fs;
union {
__u32 rule_cnt;
__u32 rss_context;
};
__u32 rule_locs[0];
};
Driver must not modify rule_cnt member. But currently driver
modifies it by modifying rss_context. Hence fix it by using a
local variable.
Fixes: 81a43620("octeontx2-pf: Add RSS multi group support")
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c
index 0dbbf38..dc17784 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c
@@ -257,17 +257,19 @@ int otx2_get_flow(struct otx2_nic *pfvf, struct
ethtool_rxnfc *nfc,
int otx2_get_all_flows(struct otx2_nic *pfvf, struct ethtool_rxnfc *nfc,
u32 *rule_locs)
{
+ u32 rule_cnt = nfc->rule_cnt;
u32 location = 0;
int idx = 0;
int err = 0;
nfc->data = pfvf->flow_cfg->ntuple_max_flows;
- while ((!err || err == -ENOENT) && idx < nfc->rule_cnt) {
+ while ((!err || err == -ENOENT) && idx < rule_cnt) {
err = otx2_get_flow(pfvf, nfc, location);
if (!err)
rule_locs[idx++] = location;
location++;
}
+ nfc->rule_cnt = rule_cnt;
return err;
}
--
2.7.4
[net PATCH 2/9] octeontx2-af: Formatting debugfs entry rsrc_alloc.
From: Rakesh Babu
With the existing rsrc_alloc's format, there is misalignment for the
pcifunc entries whose VF's index is a double digit. This patch fixes
this.
pcifunc NPA NIX0NIX1SSO GROUP SSOWS
TIM CPT0CPT1REE0REE1
PF0:VF0 8 5
PF0:VF1 9 3
PF0:VF1018 10
PF0:VF1119 8
PF0:VF1220 11
PF0:VF1321 9
PF0:VF1422 12
PF0:VF1523 10
PF1 0 0
Fixes: 23205e6d("octeontx2-af: Dump current resource provisioning status")
Signed-off-by: Rakesh Babu
Signed-off-by: Hariprasad Kelam
Signed-off-by: Sunil Kovvuri Goutham
---
.../ethernet/marvell/octeontx2/af/rvu_debugfs.c| 46 ++
1 file changed, 29 insertions(+), 17 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
index aa2ca87..dc94695 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
@@ -234,12 +234,14 @@ static ssize_t rvu_dbg_rsrc_attach_status(struct file
*filp,
char __user *buffer,
size_t count, loff_t *ppos)
{
- int index, off = 0, flag = 0, go_back = 0, off_prev;
+ int index, off = 0, flag = 0, go_back = 0, len = 0;
struct rvu *rvu = filp->private_data;
int lf, pf, vf, pcifunc;
struct rvu_block block;
int bytes_not_copied;
+ int lf_str_size = 12;
int buf_size = 2048;
+ char *lfs;
char *buf;
/* don't allow partial reads */
@@ -249,12 +251,18 @@ static ssize_t rvu_dbg_rsrc_attach_status(struct file
*filp,
buf = kzalloc(buf_size, GFP_KERNEL);
if (!buf)
return -ENOSPC;
- off += scnprintf([off], buf_size - 1 - off, "\npcifunc\t\t");
+
+ lfs = kzalloc(lf_str_size, GFP_KERNEL);
+ if (!lfs)
+ return -ENOMEM;
+ off += scnprintf([off], buf_size - 1 - off, "%-*s", lf_str_size,
+ "pcifunc");
for (index = 0; index < BLK_COUNT; index++)
- if (strlen(rvu->hw->block[index].name))
- off += scnprintf([off], buf_size - 1 - off,
- "%*s\t", (index - 1) * 2,
- rvu->hw->block[index].name);
+ if (strlen(rvu->hw->block[index].name)) {
+ off += scnprintf([off], buf_size - 1 - off,
+"%-*s", lf_str_size,
+rvu->hw->block[index].name);
+ }
off += scnprintf([off], buf_size - 1 - off, "\n");
for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
for (vf = 0; vf <= rvu->hw->total_vfs; vf++) {
@@ -263,14 +271,15 @@ static ssize_t rvu_dbg_rsrc_attach_status(struct file
*filp,
continue;
if (vf) {
+ sprintf(lfs, "PF%d:VF%d", pf, vf - 1);
go_back = scnprintf([off],
buf_size - 1 - off,
- "PF%d:VF%d\t\t", pf,
- vf - 1);
+ "%-*s", lf_str_size, lfs);
} else {
+ sprintf(lfs, "PF%d", pf);
go_back = scnprintf([off],
buf_size - 1 - off,
- "PF%d\t\t", pf);
+ "%-*s", lf_str_size, lfs);
}
off += go_back;
@@ -278,20 +287,22 @@ static ssize_t rvu_dbg_rsrc_attach_status(struct file
*filp,
block = rvu->hw->block[index];
if (!strlen(block.name))
continue;
- off_prev = off;
+ len = 0;
+ lfs[len] = '\0';
for (lf = 0; lf < block.lf.max; lf++) {
if (block.fn_map[lf] != pcifunc)
continue;
flag = 1;
-
[net PATCH 0/9] octeontx2: miscellaneous fixes
This series of patches fixes various issues related to NPC MCAM entry management, debugfs, devlink, CGX LMAC mapping, RSS config etc Geetha sowjanya (2): octeontx2-af: Fix irq free in rvu teardown octeontx2-pf: Clear RSS enable flag on interace down Hariprasad Kelam (1): octeontx2-af: fix infinite loop in unmapping counter Rakesh Babu (1): octeontx2-af: Formatting debugfs entry rsrc_alloc. Subbaraya Sundeep (5): octeontx2-pf: Do not modify number of rules octeontx2-af: Do not allocate memory for devlink private octeontx2-af: Remove TOS field from MKEX TX octeontx2-af: Return correct CGX RX fifo size octeontx2-af: Fix uninitialized variable warning .../ethernet/marvell/octeontx2/af/npc_profile.h| 2 - drivers/net/ethernet/marvell/octeontx2/af/rvu.c| 6 ++- drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 1 + .../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 18 ++- .../ethernet/marvell/octeontx2/af/rvu_debugfs.c| 55 +- .../ethernet/marvell/octeontx2/af/rvu_devlink.c| 7 +-- .../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 2 +- .../net/ethernet/marvell/octeontx2/af/rvu_npc.c| 2 +- .../ethernet/marvell/octeontx2/nic/otx2_flows.c| 4 +- .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 5 ++ 10 files changed, 66 insertions(+), 36 deletions(-) -- 2.7.4
[PATCH v2][next] octeontx2-pf: Fix out-of-bounds read warning in otx2_get_fecparam()
Looks good to me.
Thanks,
Hariprasad k
> -Original Message-
> From: Gustavo A. R. Silva
> Sent: Friday, February 12, 2021 8:36 PM
> To: Sunil Kovvuri Goutham ; Geethasowjanya
> Akula ; Subbaraya Sundeep Bhatta
> ; Hariprasad Kelam ; David
> S. Miller ; Jakub Kicinski ; Jesse
> Brandeburg ; Christina Jacob
>
> Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org; Gustavo A. R.
> Silva
> Subject: [EXT] [PATCH v2][next] octeontx2-pf: Fix out-of-bounds read
> warning in otx2_get_fecparam()
>
> Line at 967 implies that rsp->fwdata.supported_fec may be up to 4:
>
> if (rsp->fwdata.supported_fec <= FEC_MAX_INDEX)
>
> which would cause an out-of-bounds read at line 971:
>
> fecparam->fec = fec[rsp->fwdata.supported_fec];
>
> However, the range of values for rsp->fwdata.supported_fec is
> 0 to 3. Fix the if condition at line 967, accordingly.
>
> Link: https://urldefense.proofpoint.com/v2/url?u=https-
> 3A__lore.kernel.org_lkml_MWHPR18MB142173B5F0541ABD3D59860CDE8B9
> -
> 40MWHPR18MB1421.namprd18.prod.outlook.com_=DwIBAg=nKjWec2
> b6R0mOyPaz7xtfQ=2bd4kP44ECYFgf-
> KoNSJWqEipEtpxXnNBKy0vyoJJ8A=S9J3c0FowK6hmviWeihiqhoU9VJSXsvD
> OP4d3JS7Y2g=EUu3u67l555Q6zXvfGl9niuUM-ulJm4Ipe8KLWvNioQ=
> Fixes: d0cf9503e908 ("octeontx2-pf: ethtool fec mode support")
> Addresses-Coverity-ID: 1501722 ("Out-of-bounds read")
> Suggested-by: Hariprasad Kelam
> Signed-off-by: Gustavo A. R. Silva
> ---
> Changes in v2:
> - Fix if condition.
>
> drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
> b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
> index 237e5d3321d4..f4962a97a075 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
> +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
> @@ -964,7 +964,7 @@ static int otx2_get_fecparam(struct net_device
> *netdev,
> if (IS_ERR(rsp))
> return PTR_ERR(rsp);
>
> - if (rsp->fwdata.supported_fec <= FEC_MAX_INDEX) {
> + if (rsp->fwdata.supported_fec < FEC_MAX_INDEX) {
> if (!rsp->fwdata.supported_fec)
> fecparam->fec = ETHTOOL_FEC_NONE;
> else
> --
> 2.27.0
[PATCH][next] octeontx2-pf: Fix out-of-bounds read in otx2_get_fecparam()
Hi Gustavo ,
Please see inline,
> -Original Message-
> From: Gustavo A. R. Silva
> Sent: Friday, February 12, 2021 5:53 PM
> To: Sunil Kovvuri Goutham ; Geethasowjanya
> Akula ; Subbaraya Sundeep Bhatta
> ; Hariprasad Kelam ; David
> S. Miller ; Jakub Kicinski ; Jesse
> Brandeburg ; Christina Jacob
>
> Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org; Gustavo A. R.
> Silva ; linux-harden...@vger.kernel.org
> Subject: [EXT] [PATCH][next] octeontx2-pf: Fix out-of-bounds read in
> otx2_get_fecparam()
>
> External Email
>
> --
> Code at line 967 implies that rsp->fwdata.supported_fec may be up to 4:
>
> 967: if (rsp->fwdata.supported_fec <= FEC_MAX_INDEX)
>
Thanks for pointing this. I missed this case .
rsp->fwdata.supported_fec range is 0 to 3. Certainly 4 causes out-of-bounds.
But proper fix is
- if (rsp->fwdata.supported_fec <= FEC_MAX_INDEX)
+ : if (rsp->fwdata.supported_fec < FEC_MAX_INDEX)
Thanks,
Hariprasad k
> If rsp->fwdata.supported_fec evaluates to 4, then there is an out-of-bounds
> read at line 971 because fec is an array with a maximum of 4 elements:
>
> 954 const int fec[] = {
> 955 ETHTOOL_FEC_OFF,
> 956 ETHTOOL_FEC_BASER,
> 957 ETHTOOL_FEC_RS,
> 958 ETHTOOL_FEC_BASER | ETHTOOL_FEC_RS};
> 959 #define FEC_MAX_INDEX 4
>
> 971: fecparam->fec = fec[rsp->fwdata.supported_fec];
>
> Fix this by properly indexing fec[] with rsp->fwdata.supported_fec - 1.
> In this case the proper indexes 0 to 3 are used when
> rsp->fwdata.supported_fec evaluates to a range of 1 to 4, correspondingly.
>
> Fixes: d0cf9503e908 ("octeontx2-pf: ethtool fec mode support")
> Addresses-Coverity-ID: 1501722 ("Out-of-bounds read")
> Signed-off-by: Gustavo A. R. Silva
> ---
> drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
> b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
> index 237e5d3321d4..f7e8ada32a26 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
> +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
> @@ -968,7 +968,7 @@ static int otx2_get_fecparam(struct net_device
> *netdev,
> if (!rsp->fwdata.supported_fec)
> fecparam->fec = ETHTOOL_FEC_NONE;
> else
> - fecparam->fec = fec[rsp->fwdata.supported_fec];
> + fecparam->fec = fec[rsp->fwdata.supported_fec - 1];
> }
> return 0;
> }
> --
> 2.27.0
Re: [Patch v4 net-next 0/7] ethtool support for fec and link configuration
Hi Jakub, > -Original Message- > From: Jakub Kicinski > Sent: Tuesday, February 9, 2021 11:56 PM > To: Hariprasad Kelam > Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org; > da...@davemloft.net; willemdebruijn.ker...@gmail.com; > and...@lunn.ch; Sunil Kovvuri Goutham ; Linu > Cherian ; Geethasowjanya Akula > ; Jerin Jacob Kollanukkaran ; > Subbaraya Sundeep Bhatta > Subject: [EXT] Re: [Patch v4 net-next 0/7] ethtool support for fec and link > configuration > > On Tue, 9 Feb 2021 16:05:24 +0530 Hariprasad Kelam wrote: > > v4: > > - Corrected indentation issues > > - Use FEC_OFF if user requests for FEC_AUTO mode > > - Do not clear fec stats in case of user changes > > fec mode > > - dont hide fec stats depending on interface mode > > selection > > What about making autoneg modes symmetric between set and get? Get supports multi modes such that user can select one of the modes to advertise. For time being set only supports single mode. Do let me know if you want me to Add this in commit description. Thanks, Hariprasad k
[Patch v4 net-next 5/7] octeontx2-af: advertised link modes support on cgx
From: Christina Jacob
CGX supports setting advertised link modes on physical link.
This patch adds support to derive cgx mode from ethtool
link mode and pass it to firmware to configure the same.
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
Reviewed-by: Jesse Brandeburg
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 114 -
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 32 +-
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 3 +-
3 files changed, 146 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 5b7d858..9c62129 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -646,6 +647,7 @@ static inline void cgx_link_usertable_init(void)
cgx_speed_mbps[CGX_LINK_25G] = 25000;
cgx_speed_mbps[CGX_LINK_40G] = 4;
cgx_speed_mbps[CGX_LINK_50G] = 5;
+ cgx_speed_mbps[CGX_LINK_80G] = 8;
cgx_speed_mbps[CGX_LINK_100G] = 10;
cgx_lmactype_string[LMAC_MODE_SGMII] = "SGMII";
@@ -693,6 +695,110 @@ static int cgx_link_usertable_index_map(int speed)
return CGX_LINK_NONE;
}
+static void set_mod_args(struct cgx_set_link_mode_args *args,
+u32 speed, u8 duplex, u8 autoneg, u64 mode)
+{
+ /* Fill default values incase of user did not pass
+* valid parameters
+*/
+ if (args->duplex == DUPLEX_UNKNOWN)
+ args->duplex = duplex;
+ if (args->speed == SPEED_UNKNOWN)
+ args->speed = speed;
+ if (args->an == AUTONEG_UNKNOWN)
+ args->an = autoneg;
+ args->mode = mode;
+ args->ports = 0;
+}
+
+static void otx2_map_ethtool_link_modes(u64 bitmask,
+ struct cgx_set_link_mode_args *args)
+{
+ switch (bitmask) {
+ case ETHTOOL_LINK_MODE_10baseT_Half_BIT:
+ set_mod_args(args, 10, 1, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_10baseT_Full_BIT:
+ set_mod_args(args, 10, 0, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_100baseT_Half_BIT:
+ set_mod_args(args, 100, 1, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_100baseT_Full_BIT:
+ set_mod_args(args, 100, 0, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_1000baseT_Half_BIT:
+ set_mod_args(args, 1000, 1, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_1000baseT_Full_BIT:
+ set_mod_args(args, 1000, 0, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_1000baseX_Full_BIT:
+ set_mod_args(args, 1000, 0, 0, BIT_ULL(CGX_MODE_1000_BASEX));
+ break;
+ case ETHTOOL_LINK_MODE_1baseT_Full_BIT:
+ set_mod_args(args, 1000, 0, 1, BIT_ULL(CGX_MODE_QSGMII));
+ break;
+ case ETHTOOL_LINK_MODE_1baseSR_Full_BIT:
+ set_mod_args(args, 1, 0, 0, BIT_ULL(CGX_MODE_10G_C2C));
+ break;
+ case ETHTOOL_LINK_MODE_1baseLR_Full_BIT:
+ set_mod_args(args, 1, 0, 0, BIT_ULL(CGX_MODE_10G_C2M));
+ break;
+ case ETHTOOL_LINK_MODE_1baseKR_Full_BIT:
+ set_mod_args(args, 1, 0, 1, BIT_ULL(CGX_MODE_10G_KR));
+ break;
+ case ETHTOOL_LINK_MODE_25000baseSR_Full_BIT:
+ set_mod_args(args, 25000, 0, 0, BIT_ULL(CGX_MODE_25G_C2C));
+ break;
+ case ETHTOOL_LINK_MODE_25000baseCR_Full_BIT:
+ set_mod_args(args, 25000, 0, 1, BIT_ULL(CGX_MODE_25G_CR));
+ break;
+ case ETHTOOL_LINK_MODE_25000baseKR_Full_BIT:
+ set_mod_args(args, 25000, 0, 1, BIT_ULL(CGX_MODE_25G_KR));
+ break;
+ case ETHTOOL_LINK_MODE_4baseSR4_Full_BIT:
+ set_mod_args(args, 4, 0, 0, BIT_ULL(CGX_MODE_40G_C2C));
+ break;
+ case ETHTOOL_LINK_MODE_4baseLR4_Full_BIT:
+ set_mod_args(args, 4, 0, 0, BIT_ULL(CGX_MODE_40G_C2M));
+ break;
+ case ETHTOOL_LINK_MODE_4baseCR4_Full_BIT:
+ set_mod_args(args, 4, 0, 1, BIT_ULL(CGX_MODE_40G_CR4));
+ break;
+ case ETHTOOL_LINK_MODE_4baseKR4_Full_BIT:
+ set_mod_args(args, 4, 0, 1, BIT_ULL(CGX_MODE_40G_KR4));
+ break;
+ case ETHTOOL_LINK_MODE_5baseSR_Full_BIT:
+ set_mod_args(args, 5, 0, 0, BIT_ULL(CGX_MODE_50G_C2C));
+
[Patch v4 net-next 7/7] octeontx2-pf: ethtool physical link configuration
From: Christina Jacob
Register set_link_ksetting callback with driver such that
link configurations parameters like advertised mode,speed, duplex
and autoneg can be configured.
below command
ethtool -s eth0 advertise 0x1 speed 10 duplex full autoneg on
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
Reviewed-by: Jesse Brandeburg
---
.../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 63 ++
1 file changed, 63 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index d5d9b1d..237e5d3 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -1157,6 +1157,68 @@ static int otx2_get_link_ksettings(struct net_device
*netdev,
return 0;
}
+static void otx2_get_advertised_mode(const struct ethtool_link_ksettings *cmd,
+u64 *mode)
+{
+ u32 bit_pos;
+
+ /* Firmware does not support requesting multiple advertised modes
+* return first set bit
+*/
+ bit_pos = find_first_bit(cmd->link_modes.advertising,
+__ETHTOOL_LINK_MODE_MASK_NBITS);
+ if (bit_pos != __ETHTOOL_LINK_MODE_MASK_NBITS)
+ *mode = bit_pos;
+}
+
+static int otx2_set_link_ksettings(struct net_device *netdev,
+ const struct ethtool_link_ksettings *cmd)
+{
+ struct otx2_nic *pf = netdev_priv(netdev);
+ struct ethtool_link_ksettings cur_ks;
+ struct cgx_set_link_mode_req *req;
+ struct mbox *mbox = >mbox;
+ int err = 0;
+
+ memset(_ks, 0, sizeof(struct ethtool_link_ksettings));
+
+ if (!ethtool_validate_speed(cmd->base.speed) ||
+ !ethtool_validate_duplex(cmd->base.duplex))
+ return -EINVAL;
+
+ if (cmd->base.autoneg != AUTONEG_ENABLE &&
+ cmd->base.autoneg != AUTONEG_DISABLE)
+ return -EINVAL;
+
+ otx2_get_link_ksettings(netdev, _ks);
+
+ /* Check requested modes against supported modes by hardware */
+ if (!bitmap_subset(cmd->link_modes.advertising,
+ cur_ks.link_modes.supported,
+ __ETHTOOL_LINK_MODE_MASK_NBITS))
+ return -EINVAL;
+
+ mutex_lock(>lock);
+ req = otx2_mbox_alloc_msg_cgx_set_link_mode(>mbox);
+ if (!req) {
+ err = -ENOMEM;
+ goto end;
+ }
+
+ req->args.speed = cmd->base.speed;
+ /* firmware expects 1 for half duplex and 0 for full duplex
+* hence inverting
+*/
+ req->args.duplex = cmd->base.duplex ^ 0x1;
+ req->args.an = cmd->base.autoneg;
+ otx2_get_advertised_mode(cmd, >args.mode);
+
+ err = otx2_sync_mbox_msg(>mbox);
+end:
+ mutex_unlock(>lock);
+ return err;
+}
+
static const struct ethtool_ops otx2_ethtool_ops = {
.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
ETHTOOL_COALESCE_MAX_FRAMES,
@@ -1187,6 +1249,7 @@ static const struct ethtool_ops otx2_ethtool_ops = {
.get_fecparam = otx2_get_fecparam,
.set_fecparam = otx2_set_fecparam,
.get_link_ksettings = otx2_get_link_ksettings,
+ .set_link_ksettings = otx2_set_link_ksettings,
};
void otx2_set_ethtool_ops(struct net_device *netdev)
--
2.7.4
[Patch v4 net-next 3/7] octeontx2-pf: ethtool fec mode support
From: Christina Jacob
Add ethtool support to configure fec modes baser/rs and
support to fecth FEC stats from CGX as well PHY.
Configure fec mode
- ethtool --set-fec eth0 encoding rs/baser/off/auto
Query fec mode
- ethtool --show-fec eth0
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
Reviewed-by: Jesse Brandeburg
---
.../ethernet/marvell/octeontx2/nic/otx2_common.c | 20 +++
.../ethernet/marvell/octeontx2/nic/otx2_common.h | 6 +
.../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 160 -
.../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 3 +
4 files changed, 188 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
index 5ddedc3..1e67072 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
@@ -60,6 +60,19 @@ void otx2_update_lmac_stats(struct otx2_nic *pfvf)
mutex_unlock(>mbox.lock);
}
+void otx2_update_lmac_fec_stats(struct otx2_nic *pfvf)
+{
+ struct msg_req *req;
+
+ if (!netif_running(pfvf->netdev))
+ return;
+ mutex_lock(>mbox.lock);
+ req = otx2_mbox_alloc_msg_cgx_fec_stats(>mbox);
+ if (req)
+ otx2_sync_mbox_msg(>mbox);
+ mutex_unlock(>mbox.lock);
+}
+
int otx2_update_rq_stats(struct otx2_nic *pfvf, int qidx)
{
struct otx2_rcv_queue *rq = >qset.rq[qidx];
@@ -1492,6 +1505,13 @@ void mbox_handler_cgx_stats(struct otx2_nic *pfvf,
pfvf->hw.cgx_tx_stats[id] = rsp->tx_stats[id];
}
+void mbox_handler_cgx_fec_stats(struct otx2_nic *pfvf,
+ struct cgx_fec_stats_rsp *rsp)
+{
+ pfvf->hw.cgx_fec_corr_blks += rsp->fec_corr_blks;
+ pfvf->hw.cgx_fec_uncorr_blks += rsp->fec_uncorr_blks;
+}
+
void mbox_handler_nix_txsch_alloc(struct otx2_nic *pf,
struct nix_txsch_alloc_rsp *rsp)
{
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
index 143ae04..b3f3de9 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
@@ -204,6 +204,8 @@ struct otx2_hw {
struct otx2_drv_stats drv_stats;
u64 cgx_rx_stats[CGX_RX_STATS_COUNT];
u64 cgx_tx_stats[CGX_TX_STATS_COUNT];
+ u64 cgx_fec_corr_blks;
+ u64 cgx_fec_uncorr_blks;
u8 cgx_links; /* No. of CGX links present in HW */
u8 lbk_links; /* No. of LBK links present in HW */
};
@@ -660,6 +662,9 @@ void mbox_handler_nix_txsch_alloc(struct otx2_nic *pf,
struct nix_txsch_alloc_rsp *rsp);
void mbox_handler_cgx_stats(struct otx2_nic *pfvf,
struct cgx_stats_rsp *rsp);
+void mbox_handler_cgx_fec_stats(struct otx2_nic *pfvf,
+ struct cgx_fec_stats_rsp *rsp);
+void otx2_set_fec_stats_count(struct otx2_nic *pfvf);
void mbox_handler_nix_bp_enable(struct otx2_nic *pfvf,
struct nix_bp_cfg_rsp *rsp);
@@ -668,6 +673,7 @@ void otx2_get_dev_stats(struct otx2_nic *pfvf);
void otx2_get_stats64(struct net_device *netdev,
struct rtnl_link_stats64 *stats);
void otx2_update_lmac_stats(struct otx2_nic *pfvf);
+void otx2_update_lmac_fec_stats(struct otx2_nic *pfvf);
int otx2_update_rq_stats(struct otx2_nic *pfvf, int qidx);
int otx2_update_sq_stats(struct otx2_nic *pfvf, int qidx);
void otx2_set_ethtool_ops(struct net_device *netdev);
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index e0199f0..93a4fe4 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -66,6 +66,8 @@ static const unsigned int otx2_n_dev_stats =
ARRAY_SIZE(otx2_dev_stats);
static const unsigned int otx2_n_drv_stats = ARRAY_SIZE(otx2_drv_stats);
static const unsigned int otx2_n_queue_stats = ARRAY_SIZE(otx2_queue_stats);
+static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf);
+
static void otx2_get_drvinfo(struct net_device *netdev,
struct ethtool_drvinfo *info)
{
@@ -128,6 +130,10 @@ static void otx2_get_strings(struct net_device *netdev,
u32 sset, u8 *data)
strcpy(data, "reset_count");
data += ETH_GSTRING_LEN;
+ sprintf(data, "Fec Corrected Errors: ");
+ data += ETH_GSTRING_LEN;
+ sprintf(data, "Fec Uncorrected Errors: ");
+ data += ETH_GSTRING_LEN;
}
static void otx2_ge
[Patch v4 net-next 0/7] ethtool support for fec and link configuration
This series of patches add support for forward error correction(fec) and physical link configuration. Patches 1&2 adds necessary mbox handlers for fec mode configuration request and to fetch stats. Patch 3 registers driver callbacks for fec mode configuration and display. Patch 4&5 adds support of mbox handlers for configuring link parameters like speed/duplex and autoneg etc. Patche 6&7 registers driver callbacks for physical link configuration. Change-log: v2: - Fixed review comments - Corrected indentation issues - Return -ENOMEM incase of mbox allocation failure - added validation for input fecparams bitmask values - added more comments V3: - Removed inline functions - Make use of ethtool helpers APIs to display supported advertised modes - corrected indentation issues - code changes such that return early in case of failure to aid branch prediction v4: - Corrected indentation issues - Use FEC_OFF if user requests for FEC_AUTO mode - Do not clear fec stats in case of user changes fec mode - dont hide fec stats depending on interface mode selection Christina Jacob (6): octeontx2-af: forward error correction configuration octeontx2-pf: ethtool fec mode support octeontx2-af: Physical link configuration support octeontx2-af: advertised link modes support on cgx octeontx2-pf: ethtool physical link status octeontx2-pf: ethtool physical link configuration Felix Manlunas (1): octeontx2-af: Add new CGX_CMD to get PHY FEC statistics drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 258 +- drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 10 + .../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 70 +++- drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 89 - drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 4 + .../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 82 + .../ethernet/marvell/octeontx2/nic/otx2_common.c | 20 ++ .../ethernet/marvell/octeontx2/nic/otx2_common.h | 6 + .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 381 - .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 3 + 10 files changed, 917 insertions(+), 6 deletions(-) -- 2.7.4
[Patch v4 net-next 1/7] octeontx2-af: forward error correction configuration
From: Christina Jacob
CGX block supports forward error correction modes baseR
and RS. This patch adds support to set encoding mode
and to read corrected/uncorrected block counters
Adds new mailbox handlers set_fec to configure encoding modes
and fec_stats to read counters and also increase mbox timeout
to accomdate firmware command response timeout.
Along with new CGX_CMD_SET_FEC command add other commands to
sync with kernel enum list with firmware.
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
Reviewed-by: Jesse Brandeburg
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 76 ++
drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 7 ++
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 17 -
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 24 ++-
.../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 33 ++
5 files changed, 155 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 84a9123..fe5512d 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -340,6 +340,60 @@ int cgx_get_tx_stats(void *cgxd, int lmac_id, int idx, u64
*tx_stat)
return 0;
}
+static int cgx_set_fec_stats_count(struct cgx_link_user_info *linfo)
+{
+ if (!linfo->fec)
+ return 0;
+
+ switch (linfo->lmac_type_id) {
+ case LMAC_MODE_SGMII:
+ case LMAC_MODE_XAUI:
+ case LMAC_MODE_RXAUI:
+ case LMAC_MODE_QSGMII:
+ return 0;
+ case LMAC_MODE_10G_R:
+ case LMAC_MODE_25G_R:
+ case LMAC_MODE_100G_R:
+ case LMAC_MODE_USXGMII:
+ return 1;
+ case LMAC_MODE_40G_R:
+ return 4;
+ case LMAC_MODE_50G_R:
+ if (linfo->fec == OTX2_FEC_BASER)
+ return 2;
+ else
+ return 1;
+ default:
+ return 0;
+ }
+}
+
+int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp)
+{
+ int stats, fec_stats_count = 0;
+ int corr_reg, uncorr_reg;
+ struct cgx *cgx = cgxd;
+
+ if (!cgx || lmac_id >= cgx->lmac_count)
+ return -ENODEV;
+ fec_stats_count =
+ cgx_set_fec_stats_count(>lmac_idmap[lmac_id]->link_info);
+ if (cgx->lmac_idmap[lmac_id]->link_info.fec == OTX2_FEC_BASER) {
+ corr_reg = CGXX_SPUX_LNX_FEC_CORR_BLOCKS;
+ uncorr_reg = CGXX_SPUX_LNX_FEC_UNCORR_BLOCKS;
+ } else {
+ corr_reg = CGXX_SPUX_RSFEC_CORR;
+ uncorr_reg = CGXX_SPUX_RSFEC_UNCORR;
+ }
+ for (stats = 0; stats < fec_stats_count; stats++) {
+ rsp->fec_corr_blks +=
+ cgx_read(cgx, lmac_id, corr_reg + (stats * 8));
+ rsp->fec_uncorr_blks +=
+ cgx_read(cgx, lmac_id, uncorr_reg + (stats * 8));
+ }
+ return 0;
+}
+
int cgx_lmac_rx_tx_enable(void *cgxd, int lmac_id, bool enable)
{
struct cgx *cgx = cgxd;
@@ -615,6 +669,7 @@ static inline void link_status_user_format(u64 lstat,
linfo->link_up = FIELD_GET(RESP_LINKSTAT_UP, lstat);
linfo->full_duplex = FIELD_GET(RESP_LINKSTAT_FDUPLEX, lstat);
linfo->speed = cgx_speed_mbps[FIELD_GET(RESP_LINKSTAT_SPEED, lstat)];
+ linfo->fec = FIELD_GET(RESP_LINKSTAT_FEC, lstat);
linfo->lmac_type_id = cgx_get_lmac_type(cgx, lmac_id);
lmac_string = cgx_lmactype_string[linfo->lmac_type_id];
strncpy(linfo->lmac_type, lmac_string, LMACTYPE_STR_LEN - 1);
@@ -785,6 +840,27 @@ int cgx_get_fwdata_base(u64 *base)
return err;
}
+int cgx_set_fec(u64 fec, int cgx_id, int lmac_id)
+{
+ u64 req = 0, resp;
+ struct cgx *cgx;
+ int err = 0;
+
+ cgx = cgx_get_pdata(cgx_id);
+ if (!cgx)
+ return -ENXIO;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_SET_FEC, req);
+ req = FIELD_SET(CMDSETFEC, fec, req);
+ err = cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+ if (err)
+ return err;
+
+ cgx->lmac_idmap[lmac_id]->link_info.fec =
+ FIELD_GET(RESP_LINKSTAT_FEC, resp);
+ return cgx->lmac_idmap[lmac_id]->link_info.fec;
+}
+
static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool enable)
{
u64 req = 0;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index bcfc3e5..1824e95 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -56,6 +56,11 @@
#define CGXX_SCRATCH1_REG 0x1058
#define CGX_CONST 0x2000
#define CGXX_SPUX_CONTROL1
[Patch v4 net-next 6/7] octeontx2-pf: ethtool physical link status
From: Christina Jacob
Register get_link_ksettings callback to get link status information
from the driver. As virtual function (vf) shares same physical link
same API is used for both the drivers and for loop back drivers
simply returns the fixed values as its does not have physical link.
ethtool eth3
Settings for eth3:
Supported ports: [ ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Half 1000baseT/Full
1baseKR/Full
1000baseX/Full
Supports auto-negotiation: No
Supported FEC modes: BaseR RS
Advertised link modes: Not reported
Advertised pause frame use: No
Advertised auto-negotiation: No
Advertised FEC modes: None
ethtool lbk0
Settings for lbk0:
Speed: 10Mb/s
Duplex: Full
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
Reviewed-by: Jesse Brandeburg
---
.../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 158 +
1 file changed, 158 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index 93a4fe4..d5d9b1d 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include "otx2_common.h"
#include "otx2_ptp.h"
@@ -32,6 +33,14 @@ struct otx2_stat {
.index = offsetof(struct otx2_dev_stats, stat) / sizeof(u64), \
}
+/* Physical link config */
+#define OTX2_ETHTOOL_SUPPORTED_MODES 0x638CCBF //11000111000110011001011
+
+enum link_mode {
+ OTX2_MODE_SUPPORTED,
+ OTX2_MODE_ADVERTISED
+};
+
static const struct otx2_stat otx2_dev_stats[] = {
OTX2_DEV_STAT(rx_ucast_frames),
OTX2_DEV_STAT(rx_bcast_frames),
@@ -1015,6 +1024,139 @@ static int otx2_set_fecparam(struct net_device *netdev,
return err;
}
+static void otx2_get_fec_info(u64 index, int req_mode,
+ struct ethtool_link_ksettings *link_ksettings)
+{
+ __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_fec_modes) = { 0, };
+
+ switch (index) {
+ case OTX2_FEC_NONE:
+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
+otx2_fec_modes);
+ break;
+ case OTX2_FEC_BASER:
+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
+otx2_fec_modes);
+ break;
+ case OTX2_FEC_RS:
+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
+otx2_fec_modes);
+ break;
+ case OTX2_FEC_BASER | OTX2_FEC_RS:
+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
+otx2_fec_modes);
+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
+otx2_fec_modes);
+ break;
+ }
+
+ /* Add fec modes to existing modes */
+ if (req_mode == OTX2_MODE_ADVERTISED)
+ linkmode_or(link_ksettings->link_modes.advertising,
+ link_ksettings->link_modes.advertising,
+ otx2_fec_modes);
+ else
+ linkmode_or(link_ksettings->link_modes.supported,
+ link_ksettings->link_modes.supported,
+ otx2_fec_modes);
+}
+
+static void otx2_get_link_mode_info(u64 link_mode_bmap,
+ bool req_mode,
+ struct ethtool_link_ksettings
+ *link_ksettings)
+{
+ __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_link_modes) = { 0, };
+ const int otx2_sgmii_features[6] = {
+ ETHTOOL_LINK_MODE_10baseT_Half_BIT,
+ ETHTOOL_LINK_MODE_10baseT_Full_BIT,
+ ETHTOOL_LINK_MODE_100baseT_Half_BIT,
+ ETHTOOL_LINK_MODE_100baseT_Full_BIT,
+ ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
+ ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
+ };
+ /* CGX link modes to Ethtool link mode mapping */
+ const int cgx_link_mode[27] = {
+ 0, /* SGMII Mode */
+ ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
+ ETHTOOL_LINK_MODE_1baseT_Full_BIT,
+ ETHTOOL_LINK_MODE_1baseSR_Full_BIT,
+ ETHTOOL_LINK_MODE_1baseLR_Full_BIT,
+ ETHTOOL_LINK_MODE_1baseKR_Full_BIT,
+ 0,
+ ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
+ 0,
+ 0,
+ ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
+ ETHTOO
[Patch v4 net-next 2/7] octeontx2-af: Add new CGX_CMD to get PHY FEC statistics
From: Felix Manlunas
This patch adds support to fetch fec stats from PHY. The stats are
put in the shared data struct fwdata. A PHY driver indicates
that it has FEC stats by setting the flag fwdata.phy.misc.has_fec_stats
Besides CGX_CMD_GET_PHY_FEC_STATS, also add CGX_CMD_PRBS and
CGX_CMD_DISPLAY_EYE to enum cgx_cmd_id so that Linux's enum list is in sync
with firmware's enum list.
Signed-off-by: Felix Manlunas
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
Reviewed-by: Jesse Brandeburg
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 12 ++
drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 1 +
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 5 +++
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 43 ++
drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 4 ++
.../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 32
6 files changed, 97 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index fe5512d..b636341 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -861,6 +861,18 @@ int cgx_set_fec(u64 fec, int cgx_id, int lmac_id)
return cgx->lmac_idmap[lmac_id]->link_info.fec;
}
+int cgx_get_phy_fec_stats(void *cgxd, int lmac_id)
+{
+ struct cgx *cgx = cgxd;
+ u64 req = 0, resp;
+
+ if (!cgx)
+ return -ENODEV;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_GET_PHY_FEC_STATS, req);
+ return cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+}
+
static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool enable)
{
u64 req = 0;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index 1824e95..c5294b7 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -154,5 +154,6 @@ void cgx_lmac_ptp_config(void *cgxd, int lmac_id, bool
enable);
u8 cgx_lmac_get_p2x(int cgx_id, int lmac_id);
int cgx_set_fec(u64 fec, int cgx_id, int lmac_id);
int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp);
+int cgx_get_phy_fec_stats(void *cgxd, int lmac_id);
#endif /* CGX_H */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
index 3485596..65f832a 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
@@ -89,6 +89,11 @@ enum cgx_cmd_id {
CGX_CMD_SET_AN,
CGX_CMD_GET_ADV_LINK_MODES,
CGX_CMD_GET_ADV_FEC,
+ CGX_CMD_GET_PHY_MOD_TYPE, /* line-side modulation type: NRZ or PAM4 */
+ CGX_CMD_SET_PHY_MOD_TYPE,
+ CGX_CMD_PRBS,
+ CGX_CMD_DISPLAY_EYE,
+ CGX_CMD_GET_PHY_FEC_STATS,
};
/* async event ids */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index 0591621..b8b8cd3 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -151,6 +151,8 @@ M(CGX_CFG_PAUSE_FRM,0x20E, cgx_cfg_pause_frm,
cgx_pause_frm_cfg,\
cgx_pause_frm_cfg) \
M(CGX_FEC_SET, 0x210, cgx_set_fec_param, fec_mode, fec_mode) \
M(CGX_FEC_STATS, 0x211, cgx_fec_stats, msg_req, cgx_fec_stats_rsp) \
+M(CGX_GET_PHY_FEC_STATS, 0x212, cgx_get_phy_fec_stats, msg_req, msg_rsp) \
+M(CGX_FW_DATA_GET, 0x213, cgx_get_aux_link_info, msg_req, cgx_fw_data) \
/* NPA mbox IDs (range 0x400 - 0x5FF) */ \
/* NPA mbox IDs (range 0x400 - 0x5FF) */ \
M(NPA_LF_ALLOC,0x400, npa_lf_alloc,
\
@@ -413,6 +415,47 @@ struct fec_mode {
int fec;
};
+struct sfp_eeprom_s {
+#define SFP_EEPROM_SIZE 256
+ u16 sff_id;
+ u8 buf[SFP_EEPROM_SIZE];
+ u64 reserved;
+};
+
+struct phy_s {
+ struct {
+ u64 can_change_mod_type:1;
+ u64 mod_type:1;
+ u64 has_fec_stats:1;
+ } misc;
+ struct fec_stats_s {
+ u32 rsfec_corr_cws;
+ u32 rsfec_uncorr_cws;
+ u32 brfec_corr_blks;
+ u32 brfec_uncorr_blks;
+ } fec_stats;
+};
+
+struct cgx_lmac_fwdata_s {
+ u16 rw_valid;
+ u64 supported_fec;
+ u64 supported_an;
+ u64 supported_link_modes;
+ /* only applicable if AN is supported */
+ u64 advertised_fec;
+ u64 advertised_link_modes;
+ /* Only applicable if SFP/QSFP slot is present */
+ struct sfp_eeprom_s sfp_eeprom;
+ struct phy_s phy;
+#define LMAC_FWDATA_RESERVED_MEM 1021
+ u64 reserved[LMAC_FWDATA_RESERVED_MEM];
+};
+
+struct cgx_f
[Patch v4 net-next 4/7] octeontx2-af: Physical link configuration support
From: Christina Jacob
CGX LMAC, the physical interface support link configuration parameters
like speed, auto negotiation, duplex etc. Firmware saves these into
memory region shared between firmware and this driver.
This patch adds mailbox handler set_link_mode, fw_data_get to
configure and read these parameters.
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
Reviewed-by: Jesse Brandeburg
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 58 +-
drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 2 +
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 18 ++-
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 21
.../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 17 +++
5 files changed, 113 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index b636341..5b7d858 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -660,6 +660,39 @@ static inline void cgx_link_usertable_init(void)
cgx_lmactype_string[LMAC_MODE_USXGMII] = "USXGMII";
}
+static int cgx_link_usertable_index_map(int speed)
+{
+ switch (speed) {
+ case SPEED_10:
+ return CGX_LINK_10M;
+ case SPEED_100:
+ return CGX_LINK_100M;
+ case SPEED_1000:
+ return CGX_LINK_1G;
+ case SPEED_2500:
+ return CGX_LINK_2HG;
+ case SPEED_5000:
+ return CGX_LINK_5G;
+ case SPEED_1:
+ return CGX_LINK_10G;
+ case SPEED_2:
+ return CGX_LINK_20G;
+ case SPEED_25000:
+ return CGX_LINK_25G;
+ case SPEED_4:
+ return CGX_LINK_40G;
+ case SPEED_5:
+ return CGX_LINK_50G;
+ case 8:
+ return CGX_LINK_80G;
+ case SPEED_10:
+ return CGX_LINK_100G;
+ case SPEED_UNKNOWN:
+ return CGX_LINK_NONE;
+ }
+ return CGX_LINK_NONE;
+}
+
static inline void link_status_user_format(u64 lstat,
struct cgx_link_user_info *linfo,
struct cgx *cgx, u8 lmac_id)
@@ -669,6 +702,7 @@ static inline void link_status_user_format(u64 lstat,
linfo->link_up = FIELD_GET(RESP_LINKSTAT_UP, lstat);
linfo->full_duplex = FIELD_GET(RESP_LINKSTAT_FDUPLEX, lstat);
linfo->speed = cgx_speed_mbps[FIELD_GET(RESP_LINKSTAT_SPEED, lstat)];
+ linfo->an = FIELD_GET(RESP_LINKSTAT_AN, lstat);
linfo->fec = FIELD_GET(RESP_LINKSTAT_FEC, lstat);
linfo->lmac_type_id = cgx_get_lmac_type(cgx, lmac_id);
lmac_string = cgx_lmactype_string[linfo->lmac_type_id];
@@ -697,6 +731,9 @@ static inline void cgx_link_change_handler(u64 lstat,
lmac->link_info = event.link_uinfo;
linfo = >link_info;
+ if (err_type == CGX_ERR_SPEED_CHANGE_INVALID)
+ return;
+
/* Ensure callback doesn't get unregistered until we finish it */
spin_lock(>event_cb_lock);
@@ -725,7 +762,8 @@ static inline bool cgx_cmdresp_is_linkevent(u64 event)
id = FIELD_GET(EVTREG_ID, event);
if (id == CGX_CMD_LINK_BRING_UP ||
- id == CGX_CMD_LINK_BRING_DOWN)
+ id == CGX_CMD_LINK_BRING_DOWN ||
+ id == CGX_CMD_MODE_CHANGE)
return true;
else
return false;
@@ -840,6 +878,24 @@ int cgx_get_fwdata_base(u64 *base)
return err;
}
+int cgx_set_link_mode(void *cgxd, struct cgx_set_link_mode_args args,
+ int cgx_id, int lmac_id)
+{
+ struct cgx *cgx = cgxd;
+ u64 req = 0, resp;
+
+ if (!cgx)
+ return -ENODEV;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_MODE_CHANGE, req);
+ req = FIELD_SET(CMDMODECHANGE_SPEED,
+ cgx_link_usertable_index_map(args.speed), req);
+ req = FIELD_SET(CMDMODECHANGE_DUPLEX, args.duplex, req);
+ req = FIELD_SET(CMDMODECHANGE_AN, args.an, req);
+ req = FIELD_SET(CMDMODECHANGE_PORT, args.ports, req);
+ req = FIELD_SET(CMDMODECHANGE_FLAGS, args.flags, req);
+ return cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+}
int cgx_set_fec(u64 fec, int cgx_id, int lmac_id)
{
u64 req = 0, resp;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index c5294b7..b458ad0 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -155,5 +155,7 @@ u8 cgx_lmac_get_p2x(int cgx_id, int lmac_id);
int cgx_set_fec(u64 fec, int cgx_id, int lmac_id);
int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp);
int cgx_get_phy_fec_stats(void *cgxd, int lma
Re: [Patch v3 net-next 7/7] octeontx2-pf: ethtool physical link configuration
Hi Jakub, > -Original Message- > From: Jakub Kicinski > Sent: Saturday, February 6, 2021 12:56 AM > To: Hariprasad Kelam > Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org; > da...@davemloft.net; willemdebruijn.ker...@gmail.com; > and...@lunn.ch; Sunil Kovvuri Goutham ; Linu > Cherian ; Geethasowjanya Akula > ; Jerin Jacob Kollanukkaran ; > Subbaraya Sundeep Bhatta > Subject: [EXT] Re: [Patch v3 net-next 7/7] octeontx2-pf: ethtool physical link > configuration > > On Fri, 5 Feb 2021 14:15:01 + Hariprasad Kelam wrote: > > > > Will add multi advertised mode support in near future. > > > > > > Looking at patch 6 it seems like the get side already supports > > > multiple modes, although the example output only lists supported no > advertised. > > > > > > Is the device actually doing IEEE autoneg or just configures the > > > speed, lanes etc. according to the link mode selected? > > > > Device supports IEEE autoneg mode. Agreed get_link_ksetting returns > multiple modes . > > But set side firmware code designed in such way that it handles > > single mode. Upon Successful configuration firmware updates advertised > > modes to shared memory such that kernel will read and updates to > ethtool. > > It needs to be symmetric, get needs to reflect what set specified. Agreed. Even though set supports single mode still it is displayed with get link settings. Thanks, Hariprasad k
Re: [Patch v3 net-next 7/7] octeontx2-pf: ethtool physical link configuration
Hi Jakub, > -Original Message- > From: Jakub Kicinski > Sent: Friday, February 5, 2021 12:21 AM > To: Hariprasad Kelam > Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org; > da...@davemloft.net; willemdebruijn.ker...@gmail.com; > and...@lunn.ch; Sunil Kovvuri Goutham ; Linu > Cherian ; Geethasowjanya Akula > ; Jerin Jacob Kollanukkaran ; > Subbaraya Sundeep Bhatta > Subject: [EXT] Re: [Patch v3 net-next 7/7] octeontx2-pf: ethtool physical link > configuration > > On Thu, 4 Feb 2021 17:37:41 + Hariprasad Kelam wrote: > > > > + req->args.speed = req_ks.base.speed; > > > > + /* firmware expects 1 for half duplex and 0 for full duplex > > > > +* hence inverting > > > > +*/ > > > > + req->args.duplex = req_ks.base.duplex ^ 0x1; > > > > + req->args.an = req_ks.base.autoneg; > > > > + otx2_get_advertised_mode(_ks, >args.mode); > > > > > > But that only returns the first bit set. What does the device > > > actually do? What if the user cleared a middle bit? > > > > > This is initial patch series to support advertised modes. Current > > firmware design is such that It can handle only one advertised mode. > > Due to this limitation we are always checking The first set bit in > > advertised > modes and passing it to firmware. > > Will add multi advertised mode support in near future. > > Looking at patch 6 it seems like the get side already supports multiple modes, > although the example output only lists supported no advertised. > > Is the device actually doing IEEE autoneg or just configures the speed, lanes > etc. according to the link mode selected? Device supports IEEE autoneg mode. Agreed get_link_ksetting returns multiple modes . But set side firmware code designed in such way that it handles single mode. Upon Successful configuration firmware updates advertised modes to shared memory such that kernel will read and updates to ethtool. Thanks, Hariprasad k
Re: [Patch v3 net-next 7/7] octeontx2-pf: ethtool physical link configuration
Hi Jakub,
> -Original Message-
> From: Jakub Kicinski
> Sent: Wednesday, February 3, 2021 6:59 AM
> To: Hariprasad Kelam
> Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org;
> da...@davemloft.net; willemdebruijn.ker...@gmail.com;
> and...@lunn.ch; Sunil Kovvuri Goutham ; Linu
> Cherian ; Geethasowjanya Akula
> ; Jerin Jacob Kollanukkaran ;
> Subbaraya Sundeep Bhatta
> Subject: [EXT] Re: [Patch v3 net-next 7/7] octeontx2-pf: ethtool physical link
> configuration
>
> On Sun, 31 Jan 2021 18:41:05 +0530 Hariprasad Kelam wrote:
> > From: Christina Jacob
> >
> > Register set_link_ksetting callback with driver such that link
> > configurations parameters like advertised mode,speed, duplex and
> > autoneg can be configured.
> >
> > below command
> > ethtool -s eth0 advertise 0x1 speed 10 duplex full autoneg on
> >
> > Signed-off-by: Christina Jacob
> > Signed-off-by: Sunil Goutham
> > Signed-off-by: Hariprasad Kelam
> > ---
> > .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 67
> > ++
> > 1 file changed, 67 insertions(+)
> >
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
> > b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
> > index d637815..74a62de 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
> > +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
> > @@ -1170,6 +1170,72 @@ static int otx2_get_link_ksettings(struct
> net_device *netdev,
> > return 0;
> > }
> >
> > +static void otx2_get_advertised_mode(const struct ethtool_link_ksettings
> *cmd,
> > +u64 *mode)
> > +{
> > + u32 bit_pos;
> > +
> > + /* Firmware does not support requesting multiple advertised modes
> > +* return first set bit
> > +*/
> > + bit_pos = find_first_bit(cmd->link_modes.advertising,
> > +__ETHTOOL_LINK_MODE_MASK_NBITS);
> > + if (bit_pos != __ETHTOOL_LINK_MODE_MASK_NBITS)
> > + *mode = bit_pos;
> > +}
> > +
> > +static int otx2_set_link_ksettings(struct net_device *netdev,
> > + const struct ethtool_link_ksettings *cmd) {
> > + struct otx2_nic *pf = netdev_priv(netdev);
> > + struct ethtool_link_ksettings req_ks;
> > + struct ethtool_link_ksettings cur_ks;
> > + struct cgx_set_link_mode_req *req;
> > + struct mbox *mbox = >mbox;
> > + int err = 0;
> > +
> > + /* save requested link settings */
> > + memcpy(_ks, cmd, sizeof(struct ethtool_link_ksettings));
>
> Why do you make this copy? The comment above does not help at all.
>
Agreed copy is not necessary . Added this copy for comparing advertised modes
with supported modes.
Will fix this in next version.
> > + memset(_ks, 0, sizeof(struct ethtool_link_ksettings));
> > +
> > + if (!ethtool_validate_speed(cmd->base.speed) ||
> > + !ethtool_validate_duplex(cmd->base.duplex))
> > + return -EINVAL;
> > +
> > + if (cmd->base.autoneg != AUTONEG_ENABLE &&
> > + cmd->base.autoneg != AUTONEG_DISABLE)
> > + return -EINVAL;
> > +
> > + otx2_get_link_ksettings(netdev, _ks);
> > +
> > + /* Check requested modes against supported modes by hardware */
> > + if (!bitmap_subset(req_ks.link_modes.advertising,
> > + cur_ks.link_modes.supported,
> > + __ETHTOOL_LINK_MODE_MASK_NBITS))
> > + return -EINVAL;
> > +
> > + mutex_lock(>lock);
> > + req = otx2_mbox_alloc_msg_cgx_set_link_mode(>mbox);
> > + if (!req) {
> > + err = -ENOMEM;
> > + goto end;
> > + }
> > +
> > + req->args.speed = req_ks.base.speed;
> > + /* firmware expects 1 for half duplex and 0 for full duplex
> > +* hence inverting
> > +*/
> > + req->args.duplex = req_ks.base.duplex ^ 0x1;
> > + req->args.an = req_ks.base.autoneg;
> > + otx2_get_advertised_mode(_ks, >args.mode);
>
> But that only returns the first bit set. What does the device actually do?
> What
> if the user cleared a middle bit?
>
This is initial patch series to support advertised modes. Current firmware
design is such that
It can handle only one advertised mode. Due to this limitation we are always
checking
The first set bit in advertised modes and passing it to firmware.
Will add multi advertised mode support in near future.
Thanks,
Hariprasad k
> > +
Re: [Patch v3 net-next 6/7] octeontx2-pf: ethtool physical link status
Hi Jakub,
> -Original Message-
> From: Jakub Kicinski
> Sent: Wednesday, February 3, 2021 6:54 AM
> To: Hariprasad Kelam
> Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org;
> da...@davemloft.net; willemdebruijn.ker...@gmail.com;
> and...@lunn.ch; Sunil Kovvuri Goutham ; Linu
> Cherian ; Geethasowjanya Akula
> ; Jerin Jacob Kollanukkaran ;
> Subbaraya Sundeep Bhatta
> Subject: [EXT] Re: [Patch v3 net-next 6/7] octeontx2-pf: ethtool physical link
> status
>
> External Email
>
> --
> On Sun, 31 Jan 2021 18:41:04 +0530 Hariprasad Kelam wrote:
> > From: Christina Jacob
> >
> > Register get_link_ksettings callback to get link status information
> > from the driver. As virtual function (vf) shares same physical link
> > same API is used for both the drivers and for loop back drivers simply
> > returns the fixed values as its does not have physical link.
> >
> > ethtool eth3
> > Settings for eth3:
> > Supported ports: [ ]
> > Supported link modes: 10baseT/Half 10baseT/Full
> > 100baseT/Half 100baseT/Full
> > 1000baseT/Half 1000baseT/Full
> > 1baseKR/Full
> > 1000baseX/Full
> > Supports auto-negotiation: No
> > Supported FEC modes: BaseR RS
> > Advertised link modes: Not reported
> > Advertised pause frame use: No
> > Advertised auto-negotiation: No
> > Advertised FEC modes: None
> >
> > ethtool lbk0
> > Settings for lbk0:
> > Speed: 10Mb/s
> > Duplex: Full
> >
> > Signed-off-by: Christina Jacob
> > Signed-off-by: Sunil Goutham
> > Signed-off-by: Hariprasad Kelam
> > ---
> > .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 151
> > +
> > 1 file changed, 151 insertions(+)
> >
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
> > b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
> > index e5b1a57..d637815 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
> > +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
> > @@ -14,6 +14,7 @@
> > #include
> > #include
> > #include
> > +#include
> >
> > #include "otx2_common.h"
> > #include "otx2_ptp.h"
> > @@ -32,6 +33,24 @@ struct otx2_stat {
> > .index = offsetof(struct otx2_dev_stats, stat) / sizeof(u64), \ }
> >
> > +/* Physical link config */
> > +#define OTX2_ETHTOOL_SUPPORTED_MODES 0x638CCBF
> //11000111000110011001011
> > +#define OTX2_RESERVED_ETHTOOL_LINK_MODE0
>
> Just use 0 directly in the code.
>
Will fix this in next version.
> > +static const int otx2_sgmii_features_array[6] = {
> > + ETHTOOL_LINK_MODE_10baseT_Half_BIT,
> > + ETHTOOL_LINK_MODE_10baseT_Full_BIT,
> > + ETHTOOL_LINK_MODE_100baseT_Half_BIT,
> > + ETHTOOL_LINK_MODE_100baseT_Full_BIT,
> > + ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
> > + ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
> > +};
>
> Why is this one up at the top of the file but other arrays are not?
> It seems to be used only in once function.
>
Yes . This array used in only in once function.
Will fix in next version.
> > +enum link_mode {
> > + OTX2_MODE_SUPPORTED,
> > + OTX2_MODE_ADVERTISED
> > +};
> > +
> > static const struct otx2_stat otx2_dev_stats[] = {
> > OTX2_DEV_STAT(rx_ucast_frames),
> > OTX2_DEV_STAT(rx_bcast_frames),
> > @@ -1034,6 +1053,123 @@ static int otx2_set_fecparam(struct net_device
> *netdev,
> > return err;
> > }
> >
> > +static void otx2_get_fec_info(u64 index, int req_mode,
> > + struct ethtool_link_ksettings *link_ksettings) {
> > + __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_fec_modes) = { 0, };
> > +
> > + switch (index) {
> > + case OTX2_FEC_NONE:
> > + linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
> otx2_fec_modes);
> > + break;
> > + case OTX2_FEC_BASER:
> > + linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
> otx2_fec_modes);
> > + break;
> > + case OTX2_FEC_RS:
> > + linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
> otx2_fec_modes);
> > + break;
> > + case OTX2_FEC_BASER | OTX2_FEC_RS:
> > + linkmode_set_bit(ETHTOOL_LINK_MODE_
Re: [Patch v3 net-next 3/7] octeontx2-pf: ethtool fec mode support
Hi Jakub,
> -Original Message-
> From: Jakub Kicinski
> Sent: Wednesday, February 3, 2021 6:42 AM
> To: Hariprasad Kelam
> Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org;
> da...@davemloft.net; willemdebruijn.ker...@gmail.com;
> and...@lunn.ch; Sunil Kovvuri Goutham ; Linu
> Cherian ; Geethasowjanya Akula
> ; Jerin Jacob Kollanukkaran ;
> Subbaraya Sundeep Bhatta
> Subject: [EXT] Re: [Patch v3 net-next 3/7] octeontx2-pf: ethtool fec mode
> support
>
> On Mon, 1 Feb 2021 10:54:40 +0530 Hariprasad Kelam wrote:
> > From: Christina Jacob
> >
> > Add ethtool support to configure fec modes baser/rs and support to
> > fecth FEC stats from CGX as well PHY.
> >
> > Configure fec mode
> > - ethtool --set-fec eth0 encoding rs/baser/off/auto Query fec mode
> > - ethtool --show-fec eth0
>
> > + if (pfvf->linfo.fec) {
> > + sprintf(data, "Fec Corrected Errors: ");
> > + data += ETH_GSTRING_LEN;
> > + sprintf(data, "Fec Uncorrected Errors: ");
> > + data += ETH_GSTRING_LEN;
>
> Once again, you can't dynamically hide stats. ethtool makes 3 separate
> system calls - to get the number of stats, get the names, and get the values.
> If
> someone changes the FEC config in between those user space dumping stats
> will get confused.
>
Agreed. Will fix this in next version.
> > + }
> > }
>
> > +static int otx2_get_fecparam(struct net_device *netdev,
> > +struct ethtool_fecparam *fecparam) {
> > + struct otx2_nic *pfvf = netdev_priv(netdev);
> > + struct cgx_fw_data *rsp;
> > + const int fec[] = {
> > + ETHTOOL_FEC_OFF,
> > + ETHTOOL_FEC_BASER,
> > + ETHTOOL_FEC_RS,
> > + ETHTOOL_FEC_BASER | ETHTOOL_FEC_RS}; #define
> FEC_MAX_INDEX 3
> > + if (pfvf->linfo.fec < FEC_MAX_INDEX)
>
> This should be <
Agreed . Current code miss the "ETHTOOL_FEC_BASER | ETHTOOL_FEC_RS" condition,
will fix this in next version.
>
> > + fecparam->active_fec = fec[pfvf->linfo.fec];
>
>
> > + rsp = otx2_get_fwdata(pfvf);
> > + if (IS_ERR(rsp))
> > + return PTR_ERR(rsp);
> > +
> > + if (rsp->fwdata.supported_fec <= FEC_MAX_INDEX) {
> > + if (!rsp->fwdata.supported_fec)
> > + fecparam->fec = ETHTOOL_FEC_NONE;
> > + else
> > + fecparam->fec = fec[rsp->fwdata.supported_fec];
> > + }
> > + return 0;
> > +}
> > +
> > +static int otx2_set_fecparam(struct net_device *netdev,
> > +struct ethtool_fecparam *fecparam) {
> > + struct otx2_nic *pfvf = netdev_priv(netdev);
> > + struct mbox *mbox = >mbox;
> > + struct fec_mode *req, *rsp;
> > + int err = 0, fec = 0;
> > +
> > + switch (fecparam->fec) {
> > + /* Firmware does not support AUTO mode consider it as FEC_NONE
> */
> > + case ETHTOOL_FEC_OFF:
> > + case ETHTOOL_FEC_AUTO:
> > + case ETHTOOL_FEC_NONE:
>
> I _think_ NONE is for drivers to report that they don't support FEC settings.
> It's an output only parameter. On input OFF should be used.
>
Thanks for pointing this. Cross checked code also _NONE is output is only
parameter.
Will fix in next version.
> > + fec = OTX2_FEC_NONE;
> > + break;
> > + case ETHTOOL_FEC_RS:
> > + fec = OTX2_FEC_RS;
> > + break;
> > + case ETHTOOL_FEC_BASER:
> > + fec = OTX2_FEC_BASER;
> > + break;
> > + default:
> > + netdev_warn(pfvf->netdev, "Unsupported FEC mode: %d",
> > + fecparam->fec);
> > + return -EINVAL;
> > + }
> > +
> > + if (fec == pfvf->linfo.fec)
> > + return 0;
> > +
> > + mutex_lock(>lock);
> > + req = otx2_mbox_alloc_msg_cgx_set_fec_param(>mbox);
> > + if (!req) {
> > + err = -ENOMEM;
> > + goto end;
> > + }
> > + req->fec = fec;
> > + err = otx2_sync_mbox_msg(>mbox);
> > + if (err)
> > + goto end;
> > +
> > + rsp = (struct fec_mode *)otx2_mbox_get_rsp(>mbox.mbox,
> > + 0, >hdr);
> > + if (rsp->fec >= 0) {
> > + pfvf->linfo.fec = rsp->fec;
> > + /* clear stale counters */
> > + pfvf->hw.cgx_fec_corr_blks = 0;
> > + pfvf->hw.cgx_fec_uncorr_blks = 0;
>
> Stats are supposed to be cumulative. Don't reset the stats just because
> someone changed the FEC mode. You can miss errors this way.
>
Thanks for pointing this. Will fix in next version.
Thanks,
Hariprasad k
> > + } else {
> > + err = rsp->fec;
> > + }
[Patch v3 net-next 5/7] octeontx2-af: advertised link modes support on cgx
From: Christina Jacob
CGX supports setting advertised link modes on physical link.
This patch adds support to derive cgx mode from ethtool
link mode and pass it to firmware to configure the same.
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 114 -
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 32 +-
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 3 +-
3 files changed, 146 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 5b7d858..9c62129 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -646,6 +647,7 @@ static inline void cgx_link_usertable_init(void)
cgx_speed_mbps[CGX_LINK_25G] = 25000;
cgx_speed_mbps[CGX_LINK_40G] = 4;
cgx_speed_mbps[CGX_LINK_50G] = 5;
+ cgx_speed_mbps[CGX_LINK_80G] = 8;
cgx_speed_mbps[CGX_LINK_100G] = 10;
cgx_lmactype_string[LMAC_MODE_SGMII] = "SGMII";
@@ -693,6 +695,110 @@ static int cgx_link_usertable_index_map(int speed)
return CGX_LINK_NONE;
}
+static void set_mod_args(struct cgx_set_link_mode_args *args,
+u32 speed, u8 duplex, u8 autoneg, u64 mode)
+{
+ /* Fill default values incase of user did not pass
+* valid parameters
+*/
+ if (args->duplex == DUPLEX_UNKNOWN)
+ args->duplex = duplex;
+ if (args->speed == SPEED_UNKNOWN)
+ args->speed = speed;
+ if (args->an == AUTONEG_UNKNOWN)
+ args->an = autoneg;
+ args->mode = mode;
+ args->ports = 0;
+}
+
+static void otx2_map_ethtool_link_modes(u64 bitmask,
+ struct cgx_set_link_mode_args *args)
+{
+ switch (bitmask) {
+ case ETHTOOL_LINK_MODE_10baseT_Half_BIT:
+ set_mod_args(args, 10, 1, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_10baseT_Full_BIT:
+ set_mod_args(args, 10, 0, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_100baseT_Half_BIT:
+ set_mod_args(args, 100, 1, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_100baseT_Full_BIT:
+ set_mod_args(args, 100, 0, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_1000baseT_Half_BIT:
+ set_mod_args(args, 1000, 1, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_1000baseT_Full_BIT:
+ set_mod_args(args, 1000, 0, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_1000baseX_Full_BIT:
+ set_mod_args(args, 1000, 0, 0, BIT_ULL(CGX_MODE_1000_BASEX));
+ break;
+ case ETHTOOL_LINK_MODE_1baseT_Full_BIT:
+ set_mod_args(args, 1000, 0, 1, BIT_ULL(CGX_MODE_QSGMII));
+ break;
+ case ETHTOOL_LINK_MODE_1baseSR_Full_BIT:
+ set_mod_args(args, 1, 0, 0, BIT_ULL(CGX_MODE_10G_C2C));
+ break;
+ case ETHTOOL_LINK_MODE_1baseLR_Full_BIT:
+ set_mod_args(args, 1, 0, 0, BIT_ULL(CGX_MODE_10G_C2M));
+ break;
+ case ETHTOOL_LINK_MODE_1baseKR_Full_BIT:
+ set_mod_args(args, 1, 0, 1, BIT_ULL(CGX_MODE_10G_KR));
+ break;
+ case ETHTOOL_LINK_MODE_25000baseSR_Full_BIT:
+ set_mod_args(args, 25000, 0, 0, BIT_ULL(CGX_MODE_25G_C2C));
+ break;
+ case ETHTOOL_LINK_MODE_25000baseCR_Full_BIT:
+ set_mod_args(args, 25000, 0, 1, BIT_ULL(CGX_MODE_25G_CR));
+ break;
+ case ETHTOOL_LINK_MODE_25000baseKR_Full_BIT:
+ set_mod_args(args, 25000, 0, 1, BIT_ULL(CGX_MODE_25G_KR));
+ break;
+ case ETHTOOL_LINK_MODE_4baseSR4_Full_BIT:
+ set_mod_args(args, 4, 0, 0, BIT_ULL(CGX_MODE_40G_C2C));
+ break;
+ case ETHTOOL_LINK_MODE_4baseLR4_Full_BIT:
+ set_mod_args(args, 4, 0, 0, BIT_ULL(CGX_MODE_40G_C2M));
+ break;
+ case ETHTOOL_LINK_MODE_4baseCR4_Full_BIT:
+ set_mod_args(args, 4, 0, 1, BIT_ULL(CGX_MODE_40G_CR4));
+ break;
+ case ETHTOOL_LINK_MODE_4baseKR4_Full_BIT:
+ set_mod_args(args, 4, 0, 1, BIT_ULL(CGX_MODE_40G_KR4));
+ break;
+ case ETHTOOL_LINK_MODE_5baseSR_Full_BIT:
+ set_mod_args(args, 5, 0, 0, BIT_ULL(CGX_MODE_50G_C2C));
+ break;
+ case ETHTOOL_LI
[Patch v3 net-next 4/7] octeontx2-af: Physical link configuration support
From: Christina Jacob
CGX LMAC, the physical interface support link configuration parameters
like speed, auto negotiation, duplex etc. Firmware saves these into
memory region shared between firmware and this driver.
This patch adds mailbox handler set_link_mode, fw_data_get to
configure and read these parameters.
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 58 +-
drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 2 +
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 18 ++-
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 21
.../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 17 +++
5 files changed, 113 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index b636341..5b7d858 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -660,6 +660,39 @@ static inline void cgx_link_usertable_init(void)
cgx_lmactype_string[LMAC_MODE_USXGMII] = "USXGMII";
}
+static int cgx_link_usertable_index_map(int speed)
+{
+ switch (speed) {
+ case SPEED_10:
+ return CGX_LINK_10M;
+ case SPEED_100:
+ return CGX_LINK_100M;
+ case SPEED_1000:
+ return CGX_LINK_1G;
+ case SPEED_2500:
+ return CGX_LINK_2HG;
+ case SPEED_5000:
+ return CGX_LINK_5G;
+ case SPEED_1:
+ return CGX_LINK_10G;
+ case SPEED_2:
+ return CGX_LINK_20G;
+ case SPEED_25000:
+ return CGX_LINK_25G;
+ case SPEED_4:
+ return CGX_LINK_40G;
+ case SPEED_5:
+ return CGX_LINK_50G;
+ case 8:
+ return CGX_LINK_80G;
+ case SPEED_10:
+ return CGX_LINK_100G;
+ case SPEED_UNKNOWN:
+ return CGX_LINK_NONE;
+ }
+ return CGX_LINK_NONE;
+}
+
static inline void link_status_user_format(u64 lstat,
struct cgx_link_user_info *linfo,
struct cgx *cgx, u8 lmac_id)
@@ -669,6 +702,7 @@ static inline void link_status_user_format(u64 lstat,
linfo->link_up = FIELD_GET(RESP_LINKSTAT_UP, lstat);
linfo->full_duplex = FIELD_GET(RESP_LINKSTAT_FDUPLEX, lstat);
linfo->speed = cgx_speed_mbps[FIELD_GET(RESP_LINKSTAT_SPEED, lstat)];
+ linfo->an = FIELD_GET(RESP_LINKSTAT_AN, lstat);
linfo->fec = FIELD_GET(RESP_LINKSTAT_FEC, lstat);
linfo->lmac_type_id = cgx_get_lmac_type(cgx, lmac_id);
lmac_string = cgx_lmactype_string[linfo->lmac_type_id];
@@ -697,6 +731,9 @@ static inline void cgx_link_change_handler(u64 lstat,
lmac->link_info = event.link_uinfo;
linfo = >link_info;
+ if (err_type == CGX_ERR_SPEED_CHANGE_INVALID)
+ return;
+
/* Ensure callback doesn't get unregistered until we finish it */
spin_lock(>event_cb_lock);
@@ -725,7 +762,8 @@ static inline bool cgx_cmdresp_is_linkevent(u64 event)
id = FIELD_GET(EVTREG_ID, event);
if (id == CGX_CMD_LINK_BRING_UP ||
- id == CGX_CMD_LINK_BRING_DOWN)
+ id == CGX_CMD_LINK_BRING_DOWN ||
+ id == CGX_CMD_MODE_CHANGE)
return true;
else
return false;
@@ -840,6 +878,24 @@ int cgx_get_fwdata_base(u64 *base)
return err;
}
+int cgx_set_link_mode(void *cgxd, struct cgx_set_link_mode_args args,
+ int cgx_id, int lmac_id)
+{
+ struct cgx *cgx = cgxd;
+ u64 req = 0, resp;
+
+ if (!cgx)
+ return -ENODEV;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_MODE_CHANGE, req);
+ req = FIELD_SET(CMDMODECHANGE_SPEED,
+ cgx_link_usertable_index_map(args.speed), req);
+ req = FIELD_SET(CMDMODECHANGE_DUPLEX, args.duplex, req);
+ req = FIELD_SET(CMDMODECHANGE_AN, args.an, req);
+ req = FIELD_SET(CMDMODECHANGE_PORT, args.ports, req);
+ req = FIELD_SET(CMDMODECHANGE_FLAGS, args.flags, req);
+ return cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+}
int cgx_set_fec(u64 fec, int cgx_id, int lmac_id)
{
u64 req = 0, resp;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index c5294b7..b458ad0 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -155,5 +155,7 @@ u8 cgx_lmac_get_p2x(int cgx_id, int lmac_id);
int cgx_set_fec(u64 fec, int cgx_id, int lmac_id);
int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp);
int cgx_get_phy_fec_stats(void *cgxd, int lmac_id);
+
[Patch v3 net-next 0/7] ethtool support for fec and link configuration
This series of patches add support for forward error correction(fec) and physical link configuration. Patches 1&2 adds necessary mbox handlers for fec mode configuration request and to fetch stats. Patch 3 registers driver callbacks for fec mode configuration and display. Patch 4&5 adds support of mbox handlers for configuring link parameters like speed/duplex and autoneg etc. Patche 6&7 registers driver callbacks for physical link configuration. Change-log: v2: - Fixed review comments - Corrected indentation issues - Return -ENOMEM incase of mbox allocation failure - added validation for input fecparams bitmask values - added more comments V3: - Removed inline functions - Make use of ethtool helpers APIs to display supported advertised modes - corrected indentation issues - code changes such that return early in case of failure to aid branch prediction Christina Jacob (6): octeontx2-af: forward error correction configuration octeontx2-pf: ethtool fec mode support octeontx2-af: Physical link configuration support octeontx2-af: advertised link modes support on cgx octeontx2-pf: ethtool physical link status octeontx2-pf: ethtool physical link configuration Felix Manlunas (1): octeontx2-af: Add new CGX_CMD to get PHY FEC statistics drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 258 - drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 10 + .../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 70 +++- drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 87 - drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 4 + .../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 80 + .../ethernet/marvell/octeontx2/nic/otx2_common.c | 20 ++ .../ethernet/marvell/octeontx2/nic/otx2_common.h | 6 + .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 399 - .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 3 + 10 files changed, 930 insertions(+), 7 deletions(-) -- 2.7.4
[Patch v3 net-next 1/7] octeontx2-af: forward error correction configuration
From: Christina Jacob
CGX block supports forward error correction modes baseR
and RS. This patch adds support to set encoding mode
and to read corrected/uncorrected block counters
Adds new mailbox handlers set_fec to configure encoding modes
and fec_stats to read counters and also increase mbox timeout
to accomdate firmware command response timeout.
Along with new CGX_CMD_SET_FEC command add other commands to
sync with kernel enum list with firmware.
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 76 ++
drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 7 ++
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 17 -
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 22 ++-
.../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 31 +
5 files changed, 151 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 84a9123..fe5512d 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -340,6 +340,60 @@ int cgx_get_tx_stats(void *cgxd, int lmac_id, int idx, u64
*tx_stat)
return 0;
}
+static int cgx_set_fec_stats_count(struct cgx_link_user_info *linfo)
+{
+ if (!linfo->fec)
+ return 0;
+
+ switch (linfo->lmac_type_id) {
+ case LMAC_MODE_SGMII:
+ case LMAC_MODE_XAUI:
+ case LMAC_MODE_RXAUI:
+ case LMAC_MODE_QSGMII:
+ return 0;
+ case LMAC_MODE_10G_R:
+ case LMAC_MODE_25G_R:
+ case LMAC_MODE_100G_R:
+ case LMAC_MODE_USXGMII:
+ return 1;
+ case LMAC_MODE_40G_R:
+ return 4;
+ case LMAC_MODE_50G_R:
+ if (linfo->fec == OTX2_FEC_BASER)
+ return 2;
+ else
+ return 1;
+ default:
+ return 0;
+ }
+}
+
+int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp)
+{
+ int stats, fec_stats_count = 0;
+ int corr_reg, uncorr_reg;
+ struct cgx *cgx = cgxd;
+
+ if (!cgx || lmac_id >= cgx->lmac_count)
+ return -ENODEV;
+ fec_stats_count =
+ cgx_set_fec_stats_count(>lmac_idmap[lmac_id]->link_info);
+ if (cgx->lmac_idmap[lmac_id]->link_info.fec == OTX2_FEC_BASER) {
+ corr_reg = CGXX_SPUX_LNX_FEC_CORR_BLOCKS;
+ uncorr_reg = CGXX_SPUX_LNX_FEC_UNCORR_BLOCKS;
+ } else {
+ corr_reg = CGXX_SPUX_RSFEC_CORR;
+ uncorr_reg = CGXX_SPUX_RSFEC_UNCORR;
+ }
+ for (stats = 0; stats < fec_stats_count; stats++) {
+ rsp->fec_corr_blks +=
+ cgx_read(cgx, lmac_id, corr_reg + (stats * 8));
+ rsp->fec_uncorr_blks +=
+ cgx_read(cgx, lmac_id, uncorr_reg + (stats * 8));
+ }
+ return 0;
+}
+
int cgx_lmac_rx_tx_enable(void *cgxd, int lmac_id, bool enable)
{
struct cgx *cgx = cgxd;
@@ -615,6 +669,7 @@ static inline void link_status_user_format(u64 lstat,
linfo->link_up = FIELD_GET(RESP_LINKSTAT_UP, lstat);
linfo->full_duplex = FIELD_GET(RESP_LINKSTAT_FDUPLEX, lstat);
linfo->speed = cgx_speed_mbps[FIELD_GET(RESP_LINKSTAT_SPEED, lstat)];
+ linfo->fec = FIELD_GET(RESP_LINKSTAT_FEC, lstat);
linfo->lmac_type_id = cgx_get_lmac_type(cgx, lmac_id);
lmac_string = cgx_lmactype_string[linfo->lmac_type_id];
strncpy(linfo->lmac_type, lmac_string, LMACTYPE_STR_LEN - 1);
@@ -785,6 +840,27 @@ int cgx_get_fwdata_base(u64 *base)
return err;
}
+int cgx_set_fec(u64 fec, int cgx_id, int lmac_id)
+{
+ u64 req = 0, resp;
+ struct cgx *cgx;
+ int err = 0;
+
+ cgx = cgx_get_pdata(cgx_id);
+ if (!cgx)
+ return -ENXIO;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_SET_FEC, req);
+ req = FIELD_SET(CMDSETFEC, fec, req);
+ err = cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+ if (err)
+ return err;
+
+ cgx->lmac_idmap[lmac_id]->link_info.fec =
+ FIELD_GET(RESP_LINKSTAT_FEC, resp);
+ return cgx->lmac_idmap[lmac_id]->link_info.fec;
+}
+
static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool enable)
{
u64 req = 0;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index bcfc3e5..1824e95 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -56,6 +56,11 @@
#define CGXX_SCRATCH1_REG 0x1058
#define CGX_CONST 0x2000
#define CGXX_SPUX_CONTROL1 0x1
+#define CGXX_SPUX_LNX_FEC_CORR_BL
[Patch v3 net-next 2/7] octeontx2-af: Add new CGX_CMD to get PHY FEC statistics
From: Felix Manlunas
This patch adds support to fetch fec stats from PHY. The stats are
put in the shared data struct fwdata. A PHY driver indicates
that it has FEC stats by setting the flag fwdata.phy.misc.has_fec_stats
Besides CGX_CMD_GET_PHY_FEC_STATS, also add CGX_CMD_PRBS and
CGX_CMD_DISPLAY_EYE to enum cgx_cmd_id so that Linux's enum list is in sync
with firmware's enum list.
Signed-off-by: Felix Manlunas
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Kovvuri Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 12 ++
drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 1 +
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 5 +++
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 43 ++
drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 4 ++
.../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 32
6 files changed, 97 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index fe5512d..b636341 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -861,6 +861,18 @@ int cgx_set_fec(u64 fec, int cgx_id, int lmac_id)
return cgx->lmac_idmap[lmac_id]->link_info.fec;
}
+int cgx_get_phy_fec_stats(void *cgxd, int lmac_id)
+{
+ struct cgx *cgx = cgxd;
+ u64 req = 0, resp;
+
+ if (!cgx)
+ return -ENODEV;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_GET_PHY_FEC_STATS, req);
+ return cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+}
+
static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool enable)
{
u64 req = 0;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index 1824e95..c5294b7 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -154,5 +154,6 @@ void cgx_lmac_ptp_config(void *cgxd, int lmac_id, bool
enable);
u8 cgx_lmac_get_p2x(int cgx_id, int lmac_id);
int cgx_set_fec(u64 fec, int cgx_id, int lmac_id);
int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp);
+int cgx_get_phy_fec_stats(void *cgxd, int lmac_id);
#endif /* CGX_H */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
index 3485596..65f832a 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
@@ -89,6 +89,11 @@ enum cgx_cmd_id {
CGX_CMD_SET_AN,
CGX_CMD_GET_ADV_LINK_MODES,
CGX_CMD_GET_ADV_FEC,
+ CGX_CMD_GET_PHY_MOD_TYPE, /* line-side modulation type: NRZ or PAM4 */
+ CGX_CMD_SET_PHY_MOD_TYPE,
+ CGX_CMD_PRBS,
+ CGX_CMD_DISPLAY_EYE,
+ CGX_CMD_GET_PHY_FEC_STATS,
};
/* async event ids */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index a59a355..204040e 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -151,6 +151,8 @@ M(CGX_CFG_PAUSE_FRM,0x20E, cgx_cfg_pause_frm,
cgx_pause_frm_cfg,\
cgx_pause_frm_cfg) \
M(CGX_FEC_SET, 0x210, cgx_set_fec_param, fec_mode, fec_mode) \
M(CGX_FEC_STATS, 0x211, cgx_fec_stats, msg_req, cgx_fec_stats_rsp) \
+M(CGX_GET_PHY_FEC_STATS, 0x212, cgx_get_phy_fec_stats, msg_req, msg_rsp) \
+M(CGX_FW_DATA_GET, 0x213, cgx_get_aux_link_info, msg_req, cgx_fw_data) \
/* NPA mbox IDs (range 0x400 - 0x5FF) */ \
/* NPA mbox IDs (range 0x400 - 0x5FF) */ \
M(NPA_LF_ALLOC,0x400, npa_lf_alloc,
\
@@ -411,6 +413,47 @@ struct fec_mode {
int fec;
};
+struct sfp_eeprom_s {
+#define SFP_EEPROM_SIZE 256
+ u16 sff_id;
+ u8 buf[SFP_EEPROM_SIZE];
+ u64 reserved;
+};
+
+struct phy_s {
+ struct {
+ u64 can_change_mod_type:1;
+ u64 mod_type:1;
+ u64 has_fec_stats:1;
+ } misc;
+ struct fec_stats_s {
+ u32 rsfec_corr_cws;
+ u32 rsfec_uncorr_cws;
+ u32 brfec_corr_blks;
+ u32 brfec_uncorr_blks;
+ } fec_stats;
+};
+
+struct cgx_lmac_fwdata_s {
+ u16 rw_valid;
+ u64 supported_fec;
+ u64 supported_an;
+ u64 supported_link_modes;
+ /* only applicable if AN is supported */
+ u64 advertised_fec;
+ u64 advertised_link_modes;
+ /* Only applicable if SFP/QSFP slot is present */
+ struct sfp_eeprom_s sfp_eeprom;
+ struct phy_s phy;
+#define LMAC_FWDATA_RESERVED_MEM 1021
+ u64 reserved[LMAC_FWDATA_RESERVED_MEM];
+};
+
+struct cgx_fw_data {
+ struct mbox_
[Patch v3 net-next 3/7] octeontx2-pf: ethtool fec mode support
From: Christina Jacob
Add ethtool support to configure fec modes baser/rs and
support to fecth FEC stats from CGX as well PHY.
Configure fec mode
- ethtool --set-fec eth0 encoding rs/baser/off/auto
Query fec mode
- ethtool --show-fec eth0
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
.../ethernet/marvell/octeontx2/nic/otx2_common.c | 20 +++
.../ethernet/marvell/octeontx2/nic/otx2_common.h | 6 +
.../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 181 -
.../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 3 +
4 files changed, 208 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
index 5ddedc3..1e67072 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
@@ -60,6 +60,19 @@ void otx2_update_lmac_stats(struct otx2_nic *pfvf)
mutex_unlock(>mbox.lock);
}
+void otx2_update_lmac_fec_stats(struct otx2_nic *pfvf)
+{
+ struct msg_req *req;
+
+ if (!netif_running(pfvf->netdev))
+ return;
+ mutex_lock(>mbox.lock);
+ req = otx2_mbox_alloc_msg_cgx_fec_stats(>mbox);
+ if (req)
+ otx2_sync_mbox_msg(>mbox);
+ mutex_unlock(>mbox.lock);
+}
+
int otx2_update_rq_stats(struct otx2_nic *pfvf, int qidx)
{
struct otx2_rcv_queue *rq = >qset.rq[qidx];
@@ -1492,6 +1505,13 @@ void mbox_handler_cgx_stats(struct otx2_nic *pfvf,
pfvf->hw.cgx_tx_stats[id] = rsp->tx_stats[id];
}
+void mbox_handler_cgx_fec_stats(struct otx2_nic *pfvf,
+ struct cgx_fec_stats_rsp *rsp)
+{
+ pfvf->hw.cgx_fec_corr_blks += rsp->fec_corr_blks;
+ pfvf->hw.cgx_fec_uncorr_blks += rsp->fec_uncorr_blks;
+}
+
void mbox_handler_nix_txsch_alloc(struct otx2_nic *pf,
struct nix_txsch_alloc_rsp *rsp)
{
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
index 143ae04..b3f3de9 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
@@ -204,6 +204,8 @@ struct otx2_hw {
struct otx2_drv_stats drv_stats;
u64 cgx_rx_stats[CGX_RX_STATS_COUNT];
u64 cgx_tx_stats[CGX_TX_STATS_COUNT];
+ u64 cgx_fec_corr_blks;
+ u64 cgx_fec_uncorr_blks;
u8 cgx_links; /* No. of CGX links present in HW */
u8 lbk_links; /* No. of LBK links present in HW */
};
@@ -660,6 +662,9 @@ void mbox_handler_nix_txsch_alloc(struct otx2_nic *pf,
struct nix_txsch_alloc_rsp *rsp);
void mbox_handler_cgx_stats(struct otx2_nic *pfvf,
struct cgx_stats_rsp *rsp);
+void mbox_handler_cgx_fec_stats(struct otx2_nic *pfvf,
+ struct cgx_fec_stats_rsp *rsp);
+void otx2_set_fec_stats_count(struct otx2_nic *pfvf);
void mbox_handler_nix_bp_enable(struct otx2_nic *pfvf,
struct nix_bp_cfg_rsp *rsp);
@@ -668,6 +673,7 @@ void otx2_get_dev_stats(struct otx2_nic *pfvf);
void otx2_get_stats64(struct net_device *netdev,
struct rtnl_link_stats64 *stats);
void otx2_update_lmac_stats(struct otx2_nic *pfvf);
+void otx2_update_lmac_fec_stats(struct otx2_nic *pfvf);
int otx2_update_rq_stats(struct otx2_nic *pfvf, int qidx);
int otx2_update_sq_stats(struct otx2_nic *pfvf, int qidx);
void otx2_set_ethtool_ops(struct net_device *netdev);
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index e0199f0..e5b1a57 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -66,6 +66,8 @@ static const unsigned int otx2_n_dev_stats =
ARRAY_SIZE(otx2_dev_stats);
static const unsigned int otx2_n_drv_stats = ARRAY_SIZE(otx2_drv_stats);
static const unsigned int otx2_n_queue_stats = ARRAY_SIZE(otx2_queue_stats);
+static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf);
+
static void otx2_get_drvinfo(struct net_device *netdev,
struct ethtool_drvinfo *info)
{
@@ -128,6 +130,12 @@ static void otx2_get_strings(struct net_device *netdev,
u32 sset, u8 *data)
strcpy(data, "reset_count");
data += ETH_GSTRING_LEN;
+ if (pfvf->linfo.fec) {
+ sprintf(data, "Fec Corrected Errors: ");
+ data += ETH_GSTRING_LEN;
+ sprintf(data, "Fec Uncorrected Errors: ");
+ data +=
[Patch v3 net-next 6/7] octeontx2-pf: ethtool physical link status
From: Christina Jacob
Register get_link_ksettings callback to get link status information
from the driver. As virtual function (vf) shares same physical link
same API is used for both the drivers and for loop back drivers
simply returns the fixed values as its does not have physical link.
ethtool eth3
Settings for eth3:
Supported ports: [ ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Half 1000baseT/Full
1baseKR/Full
1000baseX/Full
Supports auto-negotiation: No
Supported FEC modes: BaseR RS
Advertised link modes: Not reported
Advertised pause frame use: No
Advertised auto-negotiation: No
Advertised FEC modes: None
ethtool lbk0
Settings for lbk0:
Speed: 10Mb/s
Duplex: Full
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
.../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 151 +
1 file changed, 151 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index e5b1a57..d637815 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include "otx2_common.h"
#include "otx2_ptp.h"
@@ -32,6 +33,24 @@ struct otx2_stat {
.index = offsetof(struct otx2_dev_stats, stat) / sizeof(u64), \
}
+/* Physical link config */
+#define OTX2_ETHTOOL_SUPPORTED_MODES 0x638CCBF //11000111000110011001011
+#define OTX2_RESERVED_ETHTOOL_LINK_MODE0
+
+static const int otx2_sgmii_features_array[6] = {
+ ETHTOOL_LINK_MODE_10baseT_Half_BIT,
+ ETHTOOL_LINK_MODE_10baseT_Full_BIT,
+ ETHTOOL_LINK_MODE_100baseT_Half_BIT,
+ ETHTOOL_LINK_MODE_100baseT_Full_BIT,
+ ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
+ ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
+};
+
+enum link_mode {
+ OTX2_MODE_SUPPORTED,
+ OTX2_MODE_ADVERTISED
+};
+
static const struct otx2_stat otx2_dev_stats[] = {
OTX2_DEV_STAT(rx_ucast_frames),
OTX2_DEV_STAT(rx_bcast_frames),
@@ -1034,6 +1053,123 @@ static int otx2_set_fecparam(struct net_device *netdev,
return err;
}
+static void otx2_get_fec_info(u64 index, int req_mode,
+ struct ethtool_link_ksettings *link_ksettings)
+{
+ __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_fec_modes) = { 0, };
+
+ switch (index) {
+ case OTX2_FEC_NONE:
+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
otx2_fec_modes);
+ break;
+ case OTX2_FEC_BASER:
+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
otx2_fec_modes);
+ break;
+ case OTX2_FEC_RS:
+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, otx2_fec_modes);
+ break;
+ case OTX2_FEC_BASER | OTX2_FEC_RS:
+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
otx2_fec_modes);
+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, otx2_fec_modes);
+ break;
+ }
+
+ /* Add fec modes to existing modes */
+ if (req_mode == OTX2_MODE_ADVERTISED)
+ linkmode_or(link_ksettings->link_modes.advertising,
+ link_ksettings->link_modes.advertising,
+ otx2_fec_modes);
+ else
+ linkmode_or(link_ksettings->link_modes.supported,
+ link_ksettings->link_modes.supported,
+ otx2_fec_modes);
+}
+
+static void otx2_get_link_mode_info(u64 link_mode_bmap,
+ bool req_mode,
+ struct ethtool_link_ksettings
+ *link_ksettings)
+{
+ __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_link_modes) = { 0, };
+ u8 bit;
+
+ /* CGX link modes to Ethtool link mode mapping */
+ const int cgx_link_mode[27] = {
+ 0, /* SGMII Mode */
+ ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
+ ETHTOOL_LINK_MODE_1baseT_Full_BIT,
+ ETHTOOL_LINK_MODE_1baseSR_Full_BIT,
+ ETHTOOL_LINK_MODE_1baseLR_Full_BIT,
+ ETHTOOL_LINK_MODE_1baseKR_Full_BIT,
+ OTX2_RESERVED_ETHTOOL_LINK_MODE,
+ ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
+ OTX2_RESERVED_ETHTOOL_LINK_MODE,
+ OTX2_RESERVED_ETHTOOL_LINK_MODE,
+ ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
+ ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
+ ETHTOOL_LINK_MODE_4baseSR4_Full_BIT,
+ ETHTOOL
[Patch v3 net-next 7/7] octeontx2-pf: ethtool physical link configuration
From: Christina Jacob
Register set_link_ksetting callback with driver such that
link configurations parameters like advertised mode,speed, duplex
and autoneg can be configured.
below command
ethtool -s eth0 advertise 0x1 speed 10 duplex full autoneg on
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
.../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 67 ++
1 file changed, 67 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index d637815..74a62de 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -1170,6 +1170,72 @@ static int otx2_get_link_ksettings(struct net_device
*netdev,
return 0;
}
+static void otx2_get_advertised_mode(const struct ethtool_link_ksettings *cmd,
+u64 *mode)
+{
+ u32 bit_pos;
+
+ /* Firmware does not support requesting multiple advertised modes
+* return first set bit
+*/
+ bit_pos = find_first_bit(cmd->link_modes.advertising,
+__ETHTOOL_LINK_MODE_MASK_NBITS);
+ if (bit_pos != __ETHTOOL_LINK_MODE_MASK_NBITS)
+ *mode = bit_pos;
+}
+
+static int otx2_set_link_ksettings(struct net_device *netdev,
+ const struct ethtool_link_ksettings *cmd)
+{
+ struct otx2_nic *pf = netdev_priv(netdev);
+ struct ethtool_link_ksettings req_ks;
+ struct ethtool_link_ksettings cur_ks;
+ struct cgx_set_link_mode_req *req;
+ struct mbox *mbox = >mbox;
+ int err = 0;
+
+ /* save requested link settings */
+ memcpy(_ks, cmd, sizeof(struct ethtool_link_ksettings));
+
+ memset(_ks, 0, sizeof(struct ethtool_link_ksettings));
+
+ if (!ethtool_validate_speed(cmd->base.speed) ||
+ !ethtool_validate_duplex(cmd->base.duplex))
+ return -EINVAL;
+
+ if (cmd->base.autoneg != AUTONEG_ENABLE &&
+ cmd->base.autoneg != AUTONEG_DISABLE)
+ return -EINVAL;
+
+ otx2_get_link_ksettings(netdev, _ks);
+
+ /* Check requested modes against supported modes by hardware */
+ if (!bitmap_subset(req_ks.link_modes.advertising,
+ cur_ks.link_modes.supported,
+ __ETHTOOL_LINK_MODE_MASK_NBITS))
+ return -EINVAL;
+
+ mutex_lock(>lock);
+ req = otx2_mbox_alloc_msg_cgx_set_link_mode(>mbox);
+ if (!req) {
+ err = -ENOMEM;
+ goto end;
+ }
+
+ req->args.speed = req_ks.base.speed;
+ /* firmware expects 1 for half duplex and 0 for full duplex
+* hence inverting
+*/
+ req->args.duplex = req_ks.base.duplex ^ 0x1;
+ req->args.an = req_ks.base.autoneg;
+ otx2_get_advertised_mode(_ks, >args.mode);
+
+ err = otx2_sync_mbox_msg(>mbox);
+end:
+ mutex_unlock(>lock);
+ return err;
+}
+
static const struct ethtool_ops otx2_ethtool_ops = {
.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
ETHTOOL_COALESCE_MAX_FRAMES,
@@ -1200,6 +1266,7 @@ static const struct ethtool_ops otx2_ethtool_ops = {
.get_fecparam = otx2_get_fecparam,
.set_fecparam = otx2_set_fecparam,
.get_link_ksettings = otx2_get_link_ksettings,
+ .set_link_ksettings = otx2_set_link_ksettings,
};
void otx2_set_ethtool_ops(struct net_device *netdev)
--
2.7.4
[Patch v3 net-next 5/7] octeontx2-af: advertised link modes support on cgx
From: Christina Jacob
CGX supports setting advertised link modes on physical link.
This patch adds support to derive cgx mode from ethtool
link mode and pass it to firmware to configure the same.
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 114 -
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 32 +-
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 3 +-
3 files changed, 146 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 5b7d858..9c62129 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -646,6 +647,7 @@ static inline void cgx_link_usertable_init(void)
cgx_speed_mbps[CGX_LINK_25G] = 25000;
cgx_speed_mbps[CGX_LINK_40G] = 4;
cgx_speed_mbps[CGX_LINK_50G] = 5;
+ cgx_speed_mbps[CGX_LINK_80G] = 8;
cgx_speed_mbps[CGX_LINK_100G] = 10;
cgx_lmactype_string[LMAC_MODE_SGMII] = "SGMII";
@@ -693,6 +695,110 @@ static int cgx_link_usertable_index_map(int speed)
return CGX_LINK_NONE;
}
+static void set_mod_args(struct cgx_set_link_mode_args *args,
+u32 speed, u8 duplex, u8 autoneg, u64 mode)
+{
+ /* Fill default values incase of user did not pass
+* valid parameters
+*/
+ if (args->duplex == DUPLEX_UNKNOWN)
+ args->duplex = duplex;
+ if (args->speed == SPEED_UNKNOWN)
+ args->speed = speed;
+ if (args->an == AUTONEG_UNKNOWN)
+ args->an = autoneg;
+ args->mode = mode;
+ args->ports = 0;
+}
+
+static void otx2_map_ethtool_link_modes(u64 bitmask,
+ struct cgx_set_link_mode_args *args)
+{
+ switch (bitmask) {
+ case ETHTOOL_LINK_MODE_10baseT_Half_BIT:
+ set_mod_args(args, 10, 1, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_10baseT_Full_BIT:
+ set_mod_args(args, 10, 0, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_100baseT_Half_BIT:
+ set_mod_args(args, 100, 1, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_100baseT_Full_BIT:
+ set_mod_args(args, 100, 0, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_1000baseT_Half_BIT:
+ set_mod_args(args, 1000, 1, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_1000baseT_Full_BIT:
+ set_mod_args(args, 1000, 0, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case ETHTOOL_LINK_MODE_1000baseX_Full_BIT:
+ set_mod_args(args, 1000, 0, 0, BIT_ULL(CGX_MODE_1000_BASEX));
+ break;
+ case ETHTOOL_LINK_MODE_1baseT_Full_BIT:
+ set_mod_args(args, 1000, 0, 1, BIT_ULL(CGX_MODE_QSGMII));
+ break;
+ case ETHTOOL_LINK_MODE_1baseSR_Full_BIT:
+ set_mod_args(args, 1, 0, 0, BIT_ULL(CGX_MODE_10G_C2C));
+ break;
+ case ETHTOOL_LINK_MODE_1baseLR_Full_BIT:
+ set_mod_args(args, 1, 0, 0, BIT_ULL(CGX_MODE_10G_C2M));
+ break;
+ case ETHTOOL_LINK_MODE_1baseKR_Full_BIT:
+ set_mod_args(args, 1, 0, 1, BIT_ULL(CGX_MODE_10G_KR));
+ break;
+ case ETHTOOL_LINK_MODE_25000baseSR_Full_BIT:
+ set_mod_args(args, 25000, 0, 0, BIT_ULL(CGX_MODE_25G_C2C));
+ break;
+ case ETHTOOL_LINK_MODE_25000baseCR_Full_BIT:
+ set_mod_args(args, 25000, 0, 1, BIT_ULL(CGX_MODE_25G_CR));
+ break;
+ case ETHTOOL_LINK_MODE_25000baseKR_Full_BIT:
+ set_mod_args(args, 25000, 0, 1, BIT_ULL(CGX_MODE_25G_KR));
+ break;
+ case ETHTOOL_LINK_MODE_4baseSR4_Full_BIT:
+ set_mod_args(args, 4, 0, 0, BIT_ULL(CGX_MODE_40G_C2C));
+ break;
+ case ETHTOOL_LINK_MODE_4baseLR4_Full_BIT:
+ set_mod_args(args, 4, 0, 0, BIT_ULL(CGX_MODE_40G_C2M));
+ break;
+ case ETHTOOL_LINK_MODE_4baseCR4_Full_BIT:
+ set_mod_args(args, 4, 0, 1, BIT_ULL(CGX_MODE_40G_CR4));
+ break;
+ case ETHTOOL_LINK_MODE_4baseKR4_Full_BIT:
+ set_mod_args(args, 4, 0, 1, BIT_ULL(CGX_MODE_40G_KR4));
+ break;
+ case ETHTOOL_LINK_MODE_5baseSR_Full_BIT:
+ set_mod_args(args, 5, 0, 0, BIT_ULL(CGX_MODE_50G_C2C));
+ break;
+ case ETHTOOL_LI
[Patch v3 net-next 4/7] octeontx2-af: Physical link configuration support
From: Christina Jacob
CGX LMAC, the physical interface support link configuration parameters
like speed, auto negotiation, duplex etc. Firmware saves these into
memory region shared between firmware and this driver.
This patch adds mailbox handler set_link_mode, fw_data_get to
configure and read these parameters.
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 58 +-
drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 2 +
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 18 ++-
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 21
.../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 17 +++
5 files changed, 113 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index b636341..5b7d858 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -660,6 +660,39 @@ static inline void cgx_link_usertable_init(void)
cgx_lmactype_string[LMAC_MODE_USXGMII] = "USXGMII";
}
+static int cgx_link_usertable_index_map(int speed)
+{
+ switch (speed) {
+ case SPEED_10:
+ return CGX_LINK_10M;
+ case SPEED_100:
+ return CGX_LINK_100M;
+ case SPEED_1000:
+ return CGX_LINK_1G;
+ case SPEED_2500:
+ return CGX_LINK_2HG;
+ case SPEED_5000:
+ return CGX_LINK_5G;
+ case SPEED_1:
+ return CGX_LINK_10G;
+ case SPEED_2:
+ return CGX_LINK_20G;
+ case SPEED_25000:
+ return CGX_LINK_25G;
+ case SPEED_4:
+ return CGX_LINK_40G;
+ case SPEED_5:
+ return CGX_LINK_50G;
+ case 8:
+ return CGX_LINK_80G;
+ case SPEED_10:
+ return CGX_LINK_100G;
+ case SPEED_UNKNOWN:
+ return CGX_LINK_NONE;
+ }
+ return CGX_LINK_NONE;
+}
+
static inline void link_status_user_format(u64 lstat,
struct cgx_link_user_info *linfo,
struct cgx *cgx, u8 lmac_id)
@@ -669,6 +702,7 @@ static inline void link_status_user_format(u64 lstat,
linfo->link_up = FIELD_GET(RESP_LINKSTAT_UP, lstat);
linfo->full_duplex = FIELD_GET(RESP_LINKSTAT_FDUPLEX, lstat);
linfo->speed = cgx_speed_mbps[FIELD_GET(RESP_LINKSTAT_SPEED, lstat)];
+ linfo->an = FIELD_GET(RESP_LINKSTAT_AN, lstat);
linfo->fec = FIELD_GET(RESP_LINKSTAT_FEC, lstat);
linfo->lmac_type_id = cgx_get_lmac_type(cgx, lmac_id);
lmac_string = cgx_lmactype_string[linfo->lmac_type_id];
@@ -697,6 +731,9 @@ static inline void cgx_link_change_handler(u64 lstat,
lmac->link_info = event.link_uinfo;
linfo = >link_info;
+ if (err_type == CGX_ERR_SPEED_CHANGE_INVALID)
+ return;
+
/* Ensure callback doesn't get unregistered until we finish it */
spin_lock(>event_cb_lock);
@@ -725,7 +762,8 @@ static inline bool cgx_cmdresp_is_linkevent(u64 event)
id = FIELD_GET(EVTREG_ID, event);
if (id == CGX_CMD_LINK_BRING_UP ||
- id == CGX_CMD_LINK_BRING_DOWN)
+ id == CGX_CMD_LINK_BRING_DOWN ||
+ id == CGX_CMD_MODE_CHANGE)
return true;
else
return false;
@@ -840,6 +878,24 @@ int cgx_get_fwdata_base(u64 *base)
return err;
}
+int cgx_set_link_mode(void *cgxd, struct cgx_set_link_mode_args args,
+ int cgx_id, int lmac_id)
+{
+ struct cgx *cgx = cgxd;
+ u64 req = 0, resp;
+
+ if (!cgx)
+ return -ENODEV;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_MODE_CHANGE, req);
+ req = FIELD_SET(CMDMODECHANGE_SPEED,
+ cgx_link_usertable_index_map(args.speed), req);
+ req = FIELD_SET(CMDMODECHANGE_DUPLEX, args.duplex, req);
+ req = FIELD_SET(CMDMODECHANGE_AN, args.an, req);
+ req = FIELD_SET(CMDMODECHANGE_PORT, args.ports, req);
+ req = FIELD_SET(CMDMODECHANGE_FLAGS, args.flags, req);
+ return cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+}
int cgx_set_fec(u64 fec, int cgx_id, int lmac_id)
{
u64 req = 0, resp;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index c5294b7..b458ad0 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -155,5 +155,7 @@ u8 cgx_lmac_get_p2x(int cgx_id, int lmac_id);
int cgx_set_fec(u64 fec, int cgx_id, int lmac_id);
int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp);
int cgx_get_phy_fec_stats(void *cgxd, int lmac_id);
+
[Patch v3 net-next 2/7] octeontx2-af: Add new CGX_CMD to get PHY FEC statistics
From: Felix Manlunas
This patch adds support to fetch fec stats from PHY. The stats are
put in the shared data struct fwdata. A PHY driver indicates
that it has FEC stats by setting the flag fwdata.phy.misc.has_fec_stats
Besides CGX_CMD_GET_PHY_FEC_STATS, also add CGX_CMD_PRBS and
CGX_CMD_DISPLAY_EYE to enum cgx_cmd_id so that Linux's enum list is in sync
with firmware's enum list.
Signed-off-by: Felix Manlunas
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Kovvuri Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 12 ++
drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 1 +
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 5 +++
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 43 ++
drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 4 ++
.../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 32
6 files changed, 97 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index fe5512d..b636341 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -861,6 +861,18 @@ int cgx_set_fec(u64 fec, int cgx_id, int lmac_id)
return cgx->lmac_idmap[lmac_id]->link_info.fec;
}
+int cgx_get_phy_fec_stats(void *cgxd, int lmac_id)
+{
+ struct cgx *cgx = cgxd;
+ u64 req = 0, resp;
+
+ if (!cgx)
+ return -ENODEV;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_GET_PHY_FEC_STATS, req);
+ return cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+}
+
static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool enable)
{
u64 req = 0;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index 1824e95..c5294b7 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -154,5 +154,6 @@ void cgx_lmac_ptp_config(void *cgxd, int lmac_id, bool
enable);
u8 cgx_lmac_get_p2x(int cgx_id, int lmac_id);
int cgx_set_fec(u64 fec, int cgx_id, int lmac_id);
int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp);
+int cgx_get_phy_fec_stats(void *cgxd, int lmac_id);
#endif /* CGX_H */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
index 3485596..65f832a 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
@@ -89,6 +89,11 @@ enum cgx_cmd_id {
CGX_CMD_SET_AN,
CGX_CMD_GET_ADV_LINK_MODES,
CGX_CMD_GET_ADV_FEC,
+ CGX_CMD_GET_PHY_MOD_TYPE, /* line-side modulation type: NRZ or PAM4 */
+ CGX_CMD_SET_PHY_MOD_TYPE,
+ CGX_CMD_PRBS,
+ CGX_CMD_DISPLAY_EYE,
+ CGX_CMD_GET_PHY_FEC_STATS,
};
/* async event ids */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index a59a355..204040e 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -151,6 +151,8 @@ M(CGX_CFG_PAUSE_FRM,0x20E, cgx_cfg_pause_frm,
cgx_pause_frm_cfg,\
cgx_pause_frm_cfg) \
M(CGX_FEC_SET, 0x210, cgx_set_fec_param, fec_mode, fec_mode) \
M(CGX_FEC_STATS, 0x211, cgx_fec_stats, msg_req, cgx_fec_stats_rsp) \
+M(CGX_GET_PHY_FEC_STATS, 0x212, cgx_get_phy_fec_stats, msg_req, msg_rsp) \
+M(CGX_FW_DATA_GET, 0x213, cgx_get_aux_link_info, msg_req, cgx_fw_data) \
/* NPA mbox IDs (range 0x400 - 0x5FF) */ \
/* NPA mbox IDs (range 0x400 - 0x5FF) */ \
M(NPA_LF_ALLOC,0x400, npa_lf_alloc,
\
@@ -411,6 +413,47 @@ struct fec_mode {
int fec;
};
+struct sfp_eeprom_s {
+#define SFP_EEPROM_SIZE 256
+ u16 sff_id;
+ u8 buf[SFP_EEPROM_SIZE];
+ u64 reserved;
+};
+
+struct phy_s {
+ struct {
+ u64 can_change_mod_type:1;
+ u64 mod_type:1;
+ u64 has_fec_stats:1;
+ } misc;
+ struct fec_stats_s {
+ u32 rsfec_corr_cws;
+ u32 rsfec_uncorr_cws;
+ u32 brfec_corr_blks;
+ u32 brfec_uncorr_blks;
+ } fec_stats;
+};
+
+struct cgx_lmac_fwdata_s {
+ u16 rw_valid;
+ u64 supported_fec;
+ u64 supported_an;
+ u64 supported_link_modes;
+ /* only applicable if AN is supported */
+ u64 advertised_fec;
+ u64 advertised_link_modes;
+ /* Only applicable if SFP/QSFP slot is present */
+ struct sfp_eeprom_s sfp_eeprom;
+ struct phy_s phy;
+#define LMAC_FWDATA_RESERVED_MEM 1021
+ u64 reserved[LMAC_FWDATA_RESERVED_MEM];
+};
+
+struct cgx_fw_data {
+ struct mbox_
[Patch v3 net-next 7/7] octeontx2-pf: ethtool physical link configuration
From: Christina Jacob
Register set_link_ksetting callback with driver such that
link configurations parameters like advertised mode,speed, duplex
and autoneg can be configured.
below command
ethtool -s eth0 advertise 0x1 speed 10 duplex full autoneg on
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
.../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 67 ++
1 file changed, 67 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index d637815..74a62de 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -1170,6 +1170,72 @@ static int otx2_get_link_ksettings(struct net_device
*netdev,
return 0;
}
+static void otx2_get_advertised_mode(const struct ethtool_link_ksettings *cmd,
+u64 *mode)
+{
+ u32 bit_pos;
+
+ /* Firmware does not support requesting multiple advertised modes
+* return first set bit
+*/
+ bit_pos = find_first_bit(cmd->link_modes.advertising,
+__ETHTOOL_LINK_MODE_MASK_NBITS);
+ if (bit_pos != __ETHTOOL_LINK_MODE_MASK_NBITS)
+ *mode = bit_pos;
+}
+
+static int otx2_set_link_ksettings(struct net_device *netdev,
+ const struct ethtool_link_ksettings *cmd)
+{
+ struct otx2_nic *pf = netdev_priv(netdev);
+ struct ethtool_link_ksettings req_ks;
+ struct ethtool_link_ksettings cur_ks;
+ struct cgx_set_link_mode_req *req;
+ struct mbox *mbox = >mbox;
+ int err = 0;
+
+ /* save requested link settings */
+ memcpy(_ks, cmd, sizeof(struct ethtool_link_ksettings));
+
+ memset(_ks, 0, sizeof(struct ethtool_link_ksettings));
+
+ if (!ethtool_validate_speed(cmd->base.speed) ||
+ !ethtool_validate_duplex(cmd->base.duplex))
+ return -EINVAL;
+
+ if (cmd->base.autoneg != AUTONEG_ENABLE &&
+ cmd->base.autoneg != AUTONEG_DISABLE)
+ return -EINVAL;
+
+ otx2_get_link_ksettings(netdev, _ks);
+
+ /* Check requested modes against supported modes by hardware */
+ if (!bitmap_subset(req_ks.link_modes.advertising,
+ cur_ks.link_modes.supported,
+ __ETHTOOL_LINK_MODE_MASK_NBITS))
+ return -EINVAL;
+
+ mutex_lock(>lock);
+ req = otx2_mbox_alloc_msg_cgx_set_link_mode(>mbox);
+ if (!req) {
+ err = -ENOMEM;
+ goto end;
+ }
+
+ req->args.speed = req_ks.base.speed;
+ /* firmware expects 1 for half duplex and 0 for full duplex
+* hence inverting
+*/
+ req->args.duplex = req_ks.base.duplex ^ 0x1;
+ req->args.an = req_ks.base.autoneg;
+ otx2_get_advertised_mode(_ks, >args.mode);
+
+ err = otx2_sync_mbox_msg(>mbox);
+end:
+ mutex_unlock(>lock);
+ return err;
+}
+
static const struct ethtool_ops otx2_ethtool_ops = {
.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
ETHTOOL_COALESCE_MAX_FRAMES,
@@ -1200,6 +1266,7 @@ static const struct ethtool_ops otx2_ethtool_ops = {
.get_fecparam = otx2_get_fecparam,
.set_fecparam = otx2_set_fecparam,
.get_link_ksettings = otx2_get_link_ksettings,
+ .set_link_ksettings = otx2_set_link_ksettings,
};
void otx2_set_ethtool_ops(struct net_device *netdev)
--
2.7.4
[Patch v3 net-next 6/7] octeontx2-pf: ethtool physical link status
From: Christina Jacob
Register get_link_ksettings callback to get link status information
from the driver. As virtual function (vf) shares same physical link
same API is used for both the drivers and for loop back drivers
simply returns the fixed values as its does not have physical link.
ethtool eth3
Settings for eth3:
Supported ports: [ ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Half 1000baseT/Full
1baseKR/Full
1000baseX/Full
Supports auto-negotiation: No
Supported FEC modes: BaseR RS
Advertised link modes: Not reported
Advertised pause frame use: No
Advertised auto-negotiation: No
Advertised FEC modes: None
ethtool lbk0
Settings for lbk0:
Speed: 10Mb/s
Duplex: Full
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
.../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 151 +
1 file changed, 151 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index e5b1a57..d637815 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include "otx2_common.h"
#include "otx2_ptp.h"
@@ -32,6 +33,24 @@ struct otx2_stat {
.index = offsetof(struct otx2_dev_stats, stat) / sizeof(u64), \
}
+/* Physical link config */
+#define OTX2_ETHTOOL_SUPPORTED_MODES 0x638CCBF //11000111000110011001011
+#define OTX2_RESERVED_ETHTOOL_LINK_MODE0
+
+static const int otx2_sgmii_features_array[6] = {
+ ETHTOOL_LINK_MODE_10baseT_Half_BIT,
+ ETHTOOL_LINK_MODE_10baseT_Full_BIT,
+ ETHTOOL_LINK_MODE_100baseT_Half_BIT,
+ ETHTOOL_LINK_MODE_100baseT_Full_BIT,
+ ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
+ ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
+};
+
+enum link_mode {
+ OTX2_MODE_SUPPORTED,
+ OTX2_MODE_ADVERTISED
+};
+
static const struct otx2_stat otx2_dev_stats[] = {
OTX2_DEV_STAT(rx_ucast_frames),
OTX2_DEV_STAT(rx_bcast_frames),
@@ -1034,6 +1053,123 @@ static int otx2_set_fecparam(struct net_device *netdev,
return err;
}
+static void otx2_get_fec_info(u64 index, int req_mode,
+ struct ethtool_link_ksettings *link_ksettings)
+{
+ __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_fec_modes) = { 0, };
+
+ switch (index) {
+ case OTX2_FEC_NONE:
+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
otx2_fec_modes);
+ break;
+ case OTX2_FEC_BASER:
+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
otx2_fec_modes);
+ break;
+ case OTX2_FEC_RS:
+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, otx2_fec_modes);
+ break;
+ case OTX2_FEC_BASER | OTX2_FEC_RS:
+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
otx2_fec_modes);
+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, otx2_fec_modes);
+ break;
+ }
+
+ /* Add fec modes to existing modes */
+ if (req_mode == OTX2_MODE_ADVERTISED)
+ linkmode_or(link_ksettings->link_modes.advertising,
+ link_ksettings->link_modes.advertising,
+ otx2_fec_modes);
+ else
+ linkmode_or(link_ksettings->link_modes.supported,
+ link_ksettings->link_modes.supported,
+ otx2_fec_modes);
+}
+
+static void otx2_get_link_mode_info(u64 link_mode_bmap,
+ bool req_mode,
+ struct ethtool_link_ksettings
+ *link_ksettings)
+{
+ __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_link_modes) = { 0, };
+ u8 bit;
+
+ /* CGX link modes to Ethtool link mode mapping */
+ const int cgx_link_mode[27] = {
+ 0, /* SGMII Mode */
+ ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
+ ETHTOOL_LINK_MODE_1baseT_Full_BIT,
+ ETHTOOL_LINK_MODE_1baseSR_Full_BIT,
+ ETHTOOL_LINK_MODE_1baseLR_Full_BIT,
+ ETHTOOL_LINK_MODE_1baseKR_Full_BIT,
+ OTX2_RESERVED_ETHTOOL_LINK_MODE,
+ ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
+ OTX2_RESERVED_ETHTOOL_LINK_MODE,
+ OTX2_RESERVED_ETHTOOL_LINK_MODE,
+ ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
+ ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
+ ETHTOOL_LINK_MODE_4baseSR4_Full_BIT,
+ ETHTOOL
[Patch v3 net-next 1/7] octeontx2-af: forward error correction configuration
From: Christina Jacob
CGX block supports forward error correction modes baseR
and RS. This patch adds support to set encoding mode
and to read corrected/uncorrected block counters
Adds new mailbox handlers set_fec to configure encoding modes
and fec_stats to read counters and also increase mbox timeout
to accomdate firmware command response timeout.
Along with new CGX_CMD_SET_FEC command add other commands to
sync with kernel enum list with firmware.
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 76 ++
drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 7 ++
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 17 -
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 22 ++-
.../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 31 +
5 files changed, 151 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 84a9123..fe5512d 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -340,6 +340,60 @@ int cgx_get_tx_stats(void *cgxd, int lmac_id, int idx, u64
*tx_stat)
return 0;
}
+static int cgx_set_fec_stats_count(struct cgx_link_user_info *linfo)
+{
+ if (!linfo->fec)
+ return 0;
+
+ switch (linfo->lmac_type_id) {
+ case LMAC_MODE_SGMII:
+ case LMAC_MODE_XAUI:
+ case LMAC_MODE_RXAUI:
+ case LMAC_MODE_QSGMII:
+ return 0;
+ case LMAC_MODE_10G_R:
+ case LMAC_MODE_25G_R:
+ case LMAC_MODE_100G_R:
+ case LMAC_MODE_USXGMII:
+ return 1;
+ case LMAC_MODE_40G_R:
+ return 4;
+ case LMAC_MODE_50G_R:
+ if (linfo->fec == OTX2_FEC_BASER)
+ return 2;
+ else
+ return 1;
+ default:
+ return 0;
+ }
+}
+
+int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp)
+{
+ int stats, fec_stats_count = 0;
+ int corr_reg, uncorr_reg;
+ struct cgx *cgx = cgxd;
+
+ if (!cgx || lmac_id >= cgx->lmac_count)
+ return -ENODEV;
+ fec_stats_count =
+ cgx_set_fec_stats_count(>lmac_idmap[lmac_id]->link_info);
+ if (cgx->lmac_idmap[lmac_id]->link_info.fec == OTX2_FEC_BASER) {
+ corr_reg = CGXX_SPUX_LNX_FEC_CORR_BLOCKS;
+ uncorr_reg = CGXX_SPUX_LNX_FEC_UNCORR_BLOCKS;
+ } else {
+ corr_reg = CGXX_SPUX_RSFEC_CORR;
+ uncorr_reg = CGXX_SPUX_RSFEC_UNCORR;
+ }
+ for (stats = 0; stats < fec_stats_count; stats++) {
+ rsp->fec_corr_blks +=
+ cgx_read(cgx, lmac_id, corr_reg + (stats * 8));
+ rsp->fec_uncorr_blks +=
+ cgx_read(cgx, lmac_id, uncorr_reg + (stats * 8));
+ }
+ return 0;
+}
+
int cgx_lmac_rx_tx_enable(void *cgxd, int lmac_id, bool enable)
{
struct cgx *cgx = cgxd;
@@ -615,6 +669,7 @@ static inline void link_status_user_format(u64 lstat,
linfo->link_up = FIELD_GET(RESP_LINKSTAT_UP, lstat);
linfo->full_duplex = FIELD_GET(RESP_LINKSTAT_FDUPLEX, lstat);
linfo->speed = cgx_speed_mbps[FIELD_GET(RESP_LINKSTAT_SPEED, lstat)];
+ linfo->fec = FIELD_GET(RESP_LINKSTAT_FEC, lstat);
linfo->lmac_type_id = cgx_get_lmac_type(cgx, lmac_id);
lmac_string = cgx_lmactype_string[linfo->lmac_type_id];
strncpy(linfo->lmac_type, lmac_string, LMACTYPE_STR_LEN - 1);
@@ -785,6 +840,27 @@ int cgx_get_fwdata_base(u64 *base)
return err;
}
+int cgx_set_fec(u64 fec, int cgx_id, int lmac_id)
+{
+ u64 req = 0, resp;
+ struct cgx *cgx;
+ int err = 0;
+
+ cgx = cgx_get_pdata(cgx_id);
+ if (!cgx)
+ return -ENXIO;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_SET_FEC, req);
+ req = FIELD_SET(CMDSETFEC, fec, req);
+ err = cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+ if (err)
+ return err;
+
+ cgx->lmac_idmap[lmac_id]->link_info.fec =
+ FIELD_GET(RESP_LINKSTAT_FEC, resp);
+ return cgx->lmac_idmap[lmac_id]->link_info.fec;
+}
+
static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool enable)
{
u64 req = 0;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index bcfc3e5..1824e95 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -56,6 +56,11 @@
#define CGXX_SCRATCH1_REG 0x1058
#define CGX_CONST 0x2000
#define CGXX_SPUX_CONTROL1 0x1
+#define CGXX_SPUX_LNX_FEC_CORR_BL
[Patch v3 net-next 3/7] octeontx2-pf: ethtool fec mode support
From: Christina Jacob
Add ethtool support to configure fec modes baser/rs and
support to fecth FEC stats from CGX as well PHY.
Configure fec mode
- ethtool --set-fec eth0 encoding rs/baser/off/auto
Query fec mode
- ethtool --show-fec eth0
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
.../ethernet/marvell/octeontx2/nic/otx2_common.c | 20 +++
.../ethernet/marvell/octeontx2/nic/otx2_common.h | 6 +
.../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 181 -
.../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 3 +
4 files changed, 208 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
index 5ddedc3..1e67072 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
@@ -60,6 +60,19 @@ void otx2_update_lmac_stats(struct otx2_nic *pfvf)
mutex_unlock(>mbox.lock);
}
+void otx2_update_lmac_fec_stats(struct otx2_nic *pfvf)
+{
+ struct msg_req *req;
+
+ if (!netif_running(pfvf->netdev))
+ return;
+ mutex_lock(>mbox.lock);
+ req = otx2_mbox_alloc_msg_cgx_fec_stats(>mbox);
+ if (req)
+ otx2_sync_mbox_msg(>mbox);
+ mutex_unlock(>mbox.lock);
+}
+
int otx2_update_rq_stats(struct otx2_nic *pfvf, int qidx)
{
struct otx2_rcv_queue *rq = >qset.rq[qidx];
@@ -1492,6 +1505,13 @@ void mbox_handler_cgx_stats(struct otx2_nic *pfvf,
pfvf->hw.cgx_tx_stats[id] = rsp->tx_stats[id];
}
+void mbox_handler_cgx_fec_stats(struct otx2_nic *pfvf,
+ struct cgx_fec_stats_rsp *rsp)
+{
+ pfvf->hw.cgx_fec_corr_blks += rsp->fec_corr_blks;
+ pfvf->hw.cgx_fec_uncorr_blks += rsp->fec_uncorr_blks;
+}
+
void mbox_handler_nix_txsch_alloc(struct otx2_nic *pf,
struct nix_txsch_alloc_rsp *rsp)
{
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
index 143ae04..b3f3de9 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
@@ -204,6 +204,8 @@ struct otx2_hw {
struct otx2_drv_stats drv_stats;
u64 cgx_rx_stats[CGX_RX_STATS_COUNT];
u64 cgx_tx_stats[CGX_TX_STATS_COUNT];
+ u64 cgx_fec_corr_blks;
+ u64 cgx_fec_uncorr_blks;
u8 cgx_links; /* No. of CGX links present in HW */
u8 lbk_links; /* No. of LBK links present in HW */
};
@@ -660,6 +662,9 @@ void mbox_handler_nix_txsch_alloc(struct otx2_nic *pf,
struct nix_txsch_alloc_rsp *rsp);
void mbox_handler_cgx_stats(struct otx2_nic *pfvf,
struct cgx_stats_rsp *rsp);
+void mbox_handler_cgx_fec_stats(struct otx2_nic *pfvf,
+ struct cgx_fec_stats_rsp *rsp);
+void otx2_set_fec_stats_count(struct otx2_nic *pfvf);
void mbox_handler_nix_bp_enable(struct otx2_nic *pfvf,
struct nix_bp_cfg_rsp *rsp);
@@ -668,6 +673,7 @@ void otx2_get_dev_stats(struct otx2_nic *pfvf);
void otx2_get_stats64(struct net_device *netdev,
struct rtnl_link_stats64 *stats);
void otx2_update_lmac_stats(struct otx2_nic *pfvf);
+void otx2_update_lmac_fec_stats(struct otx2_nic *pfvf);
int otx2_update_rq_stats(struct otx2_nic *pfvf, int qidx);
int otx2_update_sq_stats(struct otx2_nic *pfvf, int qidx);
void otx2_set_ethtool_ops(struct net_device *netdev);
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index e0199f0..e5b1a57 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -66,6 +66,8 @@ static const unsigned int otx2_n_dev_stats =
ARRAY_SIZE(otx2_dev_stats);
static const unsigned int otx2_n_drv_stats = ARRAY_SIZE(otx2_drv_stats);
static const unsigned int otx2_n_queue_stats = ARRAY_SIZE(otx2_queue_stats);
+static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf);
+
static void otx2_get_drvinfo(struct net_device *netdev,
struct ethtool_drvinfo *info)
{
@@ -128,6 +130,12 @@ static void otx2_get_strings(struct net_device *netdev,
u32 sset, u8 *data)
strcpy(data, "reset_count");
data += ETH_GSTRING_LEN;
+ if (pfvf->linfo.fec) {
+ sprintf(data, "Fec Corrected Errors: ");
+ data += ETH_GSTRING_LEN;
+ sprintf(data, "Fec Uncorrected Errors: ");
+ data +=
[Patch v3 net-next 0/7] ethtool support for fec and link configuration
This series of patches add support for forward error correction(fec) and physical link configuration. Patches 1&2 adds necessary mbox handlers for fec mode configuration request and to fetch stats. Patch 3 registers driver callbacks for fec mode configuration and display. Patch 4&5 adds support of mbox handlers for configuring link parameters like speed/duplex and autoneg etc. Patche 6&7 registers driver callbacks for physical link configuration. Change-log: v2: - Fixed review comments - Corrected indentation issues - Return -ENOMEM incase of mbox allocation failure - added validation for input fecparams bitmask values - added more comments V3: - Removed inline functions - Make use of ethtool helpers APIs to display supported advertised modes - corrected indentation issues - code changes such that return early in case of failure to aid branch prediction Christina Jacob (6): octeontx2-af: forward error correction configuration octeontx2-pf: ethtool fec mode support octeontx2-af: Physical link configuration support octeontx2-af: advertised link modes support on cgx octeontx2-pf: ethtool physical link status octeontx2-pf: ethtool physical link configuration Felix Manlunas (1): octeontx2-af: Add new CGX_CMD to get PHY FEC statistics drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 258 - drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 10 + .../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 70 +++- drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 87 - drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 4 + .../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 80 + .../ethernet/marvell/octeontx2/nic/otx2_common.c | 20 ++ .../ethernet/marvell/octeontx2/nic/otx2_common.h | 6 + .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 399 - .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 3 + 10 files changed, 930 insertions(+), 7 deletions(-) -- 2.7.4
Re: [Patch v2 net-next 2/7] octeontx2-af: Add new CGX_CMD to get PHY FEC statistics
Hi Willem,
> -Original Message-
> From: Willem de Bruijn
> Sent: Saturday, January 30, 2021 7:57 PM
> To: Hariprasad Kelam
> Cc: Network Development ; LKML ker...@vger.kernel.org>; David Miller ; Jakub
> Kicinski ; Sunil Kovvuri Goutham
> ; Linu Cherian ;
> Geethasowjanya Akula ; Jerin Jacob Kollanukkaran
> ; Subbaraya Sundeep Bhatta ;
> Felix Manlunas ; Christina Jacob
> ; Sunil Kovvuri Goutham
>
> Subject: [EXT] Re: [Patch v2 net-next 2/7] octeontx2-af: Add new CGX_CMD
> to get PHY FEC statistics
> On Sat, Jan 30, 2021 at 4:53 AM Hariprasad Kelam
> wrote:
> >
> > Hi Willem,
> >
> > > -Original Message-
> > > From: Willem de Bruijn
> > > Sent: Thursday, January 28, 2021 1:50 AM
> > > To: Hariprasad Kelam
> > > Cc: Network Development ; LKML > > ker...@vger.kernel.org>; David Miller ; Jakub
> > > Kicinski ; Sunil Kovvuri Goutham
> > > ; Linu Cherian ;
> > > Geethasowjanya Akula ; Jerin Jacob Kollanukkaran
> > > ; Subbaraya Sundeep Bhatta
> > > ; Felix Manlunas ;
> > > Christina Jacob ; Sunil Kovvuri Goutham
> > >
> > > Subject: [EXT] Re: [Patch v2 net-next 2/7] octeontx2-af: Add new
> > > CGX_CMD to get PHY FEC statistics
> > >
> > > On Wed, Jan 27, 2021 at 4:04 AM Hariprasad Kelam
> > >
> > > wrote:
> > > >
> > > > From: Felix Manlunas
> > > >
> > > > This patch adds support to fetch fec stats from PHY. The stats are
> > > > put in the shared data struct fwdata. A PHY driver indicates that
> > > > it has FEC stats by setting the flag fwdata.phy.misc.has_fec_stats
> > > >
> > > > Besides CGX_CMD_GET_PHY_FEC_STATS, also add CGX_CMD_PRBS and
> > > > CGX_CMD_DISPLAY_EYE to enum cgx_cmd_id so that Linux's enum list
> > > > is in sync with firmware's enum list.
> > > >
> > > > Signed-off-by: Felix Manlunas
> > > > Signed-off-by: Christina Jacob
> > > > Signed-off-by: Sunil Kovvuri Goutham
> > > > Signed-off-by: Hariprasad Kelam
> > >
> > >
> > > > +struct phy_s {
> > > > + struct {
> > > > + u64 can_change_mod_type : 1;
> > > > + u64 mod_type: 1;
> > > > + u64 has_fec_stats : 1;
> > >
> > > this style is not customary
> >
> > These structures are shared with firmware and stored in a shared memory.
> Any change in size of structures will break compatibility. To avoid frequent
> compatible issues with new vs old firmware we have put spaces where ever
> we see that there could be more fields added in future.
> > So changing this to u8 can have an impact in future.
>
> My comment was intended much simpler: don't add whitespace between the
> bit-field variable name and its size expression.
>
> u64 mod_type:1;
>
> not
>
> u64 mod_type : 1;
>
> At least, I have not seen that style anywhere else in the kernel.
Got it . Will fix this in next version.
Thanks,
Hariprasad k
Re: [Patch v2 net-next 3/7] octeontx2-pf: ethtool fec mode support
Hi Willem,
> -Original Message-
> From: Willem de Bruijn
> Sent: Thursday, January 28, 2021 2:01 AM
> To: Hariprasad Kelam
> Cc: Network Development ; LKML ker...@vger.kernel.org>; David Miller ; Jakub
> Kicinski ; Sunil Kovvuri Goutham
> ; Linu Cherian ;
> Geethasowjanya Akula ; Jerin Jacob Kollanukkaran
> ; Subbaraya Sundeep Bhatta ;
> Christina Jacob
> Subject: [EXT] Re: [Patch v2 net-next 3/7] octeontx2-pf: ethtool fec mode
> support
>
> External Email
>
> ------
> On Wed, Jan 27, 2021 at 4:03 AM Hariprasad Kelam
> wrote:
> >
> > From: Christina Jacob
> >
> > Add ethtool support to configure fec modes baser/rs and support to
> > fecth FEC stats from CGX as well PHY.
> >
> > Configure fec mode
> > - ethtool --set-fec eth0 encoding rs/baser/off/auto Query fec
> > mode
> > - ethtool --show-fec eth0
> >
> > Signed-off-by: Christina Jacob
> > Signed-off-by: Sunil Goutham
> > Signed-off-by: Hariprasad Kelam
> > ---
> > .../ethernet/marvell/octeontx2/nic/otx2_common.c | 23 +++
> > .../ethernet/marvell/octeontx2/nic/otx2_common.h | 6 +
> > .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 181
> -
> > .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 3 +
> > 4 files changed, 211 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
> > b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
> > index bdfa2e2..f7e5450 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
> > +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
> > @@ -60,6 +60,22 @@ void otx2_update_lmac_stats(struct otx2_nic *pfvf)
> > mutex_unlock(>mbox.lock); }
> >
> > +void otx2_update_lmac_fec_stats(struct otx2_nic *pfvf) {
> > + struct msg_req *req;
> > +
> > + if (!netif_running(pfvf->netdev))
> > + return;
> > + mutex_lock(>mbox.lock);
> > + req = otx2_mbox_alloc_msg_cgx_fec_stats(>mbox);
> > + if (!req) {
> > + mutex_unlock(>mbox.lock);
> > + return;
> > + }
> > + otx2_sync_mbox_msg(>mbox);
>
> Perhaps simpler to have a single exit from the critical section:
>
Agreed will fix this in next version.
> if (req)
> otx2_update_lmac_fec_stats
>
> > + mutex_unlock(>mbox.lock); }
>
> Also, should this function return an error on failure? The caller returns
> errors
> in other cases.
Caller of this function otx2_get_sset_count . Where driver suppose to return
number of stats.
This function is just to update local netdev counters fec_corr_blks/
fec_uncorr_blks. So failure
Of this function should not effect.
Thanks,
Hariprasad k
Re: [Patch v2 net-next 4/7] octeontx2-af: Physical link configuration support
Hi Willem,
> -Original Message-
> From: Willem de Bruijn
> Sent: Thursday, January 28, 2021 2:04 AM
> To: Hariprasad Kelam
> Cc: Network Development ; LKML ker...@vger.kernel.org>; David Miller ; Jakub
> Kicinski ; Sunil Kovvuri Goutham
> ; Linu Cherian ;
> Geethasowjanya Akula ; Jerin Jacob Kollanukkaran
> ; Subbaraya Sundeep Bhatta ;
> Christina Jacob
> Subject: [EXT] Re: [Patch v2 net-next 4/7] octeontx2-af: Physical link
> configuration support
>
> On Wed, Jan 27, 2021 at 4:02 AM Hariprasad Kelam
> wrote:
> >
> > From: Christina Jacob
> >
> > CGX LMAC, the physical interface support link configuration parameters
> > like speed, auto negotiation, duplex etc. Firmware saves these into
> > memory region shared between firmware and this driver.
> >
> > This patch adds mailbox handler set_link_mode, fw_data_get to
> > configure and read these parameters.
> >
> > Signed-off-by: Christina Jacob
> > Signed-off-by: Sunil Goutham
> > Signed-off-by: Hariprasad Kelam
>
> > +int rvu_mbox_handler_cgx_set_link_mode(struct rvu *rvu,
> > + struct cgx_set_link_mode_req *req,
> > + struct cgx_set_link_mode_rsp
> > +*rsp) {
> > + int pf = rvu_get_pf(req->hdr.pcifunc);
> > + u8 cgx_idx, lmac;
> > + void *cgxd;
> > +
> > + if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
> > + return -EPERM;
> > +
> > + rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], _idx, );
> > + cgxd = rvu_cgx_pdata(cgx_idx, rvu);
> > + rsp->status = cgx_set_link_mode(cgxd, req->args, cgx_idx,
> > + lmac);
>
> nit: two spaces after assignment operator.
>
> on the point of no new inline: do also check the status in patchwork.
> that also flags such issues.
Thanks for the review. Will fix in next version.
Thanks,
Hariprasad k
Re: [Patch v2 net-next 2/7] octeontx2-af: Add new CGX_CMD to get PHY FEC statistics
Hi Willem,
> -Original Message-
> From: Willem de Bruijn
> Sent: Thursday, January 28, 2021 1:50 AM
> To: Hariprasad Kelam
> Cc: Network Development ; LKML ker...@vger.kernel.org>; David Miller ; Jakub
> Kicinski ; Sunil Kovvuri Goutham
> ; Linu Cherian ;
> Geethasowjanya Akula ; Jerin Jacob Kollanukkaran
> ; Subbaraya Sundeep Bhatta ;
> Felix Manlunas ; Christina Jacob
> ; Sunil Kovvuri Goutham
>
> Subject: [EXT] Re: [Patch v2 net-next 2/7] octeontx2-af: Add new CGX_CMD
> to get PHY FEC statistics
>
> On Wed, Jan 27, 2021 at 4:04 AM Hariprasad Kelam
> wrote:
> >
> > From: Felix Manlunas
> >
> > This patch adds support to fetch fec stats from PHY. The stats are put
> > in the shared data struct fwdata. A PHY driver indicates that it has
> > FEC stats by setting the flag fwdata.phy.misc.has_fec_stats
> >
> > Besides CGX_CMD_GET_PHY_FEC_STATS, also add CGX_CMD_PRBS and
> > CGX_CMD_DISPLAY_EYE to enum cgx_cmd_id so that Linux's enum list is in
> > sync with firmware's enum list.
> >
> > Signed-off-by: Felix Manlunas
> > Signed-off-by: Christina Jacob
> > Signed-off-by: Sunil Kovvuri Goutham
> > Signed-off-by: Hariprasad Kelam
>
>
> > +struct phy_s {
> > + struct {
> > + u64 can_change_mod_type : 1;
> > + u64 mod_type: 1;
> > + u64 has_fec_stats : 1;
>
> this style is not customary
These structures are shared with firmware and stored in a shared memory. Any
change in size of structures will break compatibility. To avoid frequent
compatible issues with new vs old firmware we have put spaces where ever we see
that there could be more fields added in future.
So changing this to u8 can have an impact in future.
>
> > + } misc;
> > + struct fec_stats_s {
> > + u32 rsfec_corr_cws;
> > + u32 rsfec_uncorr_cws;
> > + u32 brfec_corr_blks;
> > + u32 brfec_uncorr_blks;
> > + } fec_stats;
> > +};
> > +
> > +struct cgx_lmac_fwdata_s {
> > + u16 rw_valid;
> > + u64 supported_fec;
> > + u64 supported_an;
>
> are these intended to be individual u64's?
>
The above fields are used as bitmaps to store fec BASER/RS etc.
As stated above to avoid frequent compatible issues between old & new firmware
. we are creating spaces.
> > + u64 supported_link_modes;
> > + /* only applicable if AN is supported */
> > + u64 advertised_fec;
> > + u64 advertised_link_modes;
> > + /* Only applicable if SFP/QSFP slot is present */
> > + struct sfp_eeprom_s sfp_eeprom;
> > + struct phy_s phy;
> > +#define LMAC_FWDATA_RESERVED_MEM 1021
> > + u64 reserved[LMAC_FWDATA_RESERVED_MEM];
> > +};
> > +
> > +struct cgx_fw_data {
> > + struct mbox_msghdr hdr;
> > + struct cgx_lmac_fwdata_s fwdata; };
> > +
> > /* NPA mbox message formats */
> >
> > /* NPA mailbox error codes
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
> > b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
> > index b1a6ecf..c824f1e 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
> > +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
> > @@ -350,6 +350,10 @@ struct rvu_fwdata {
> > u64 msixtr_base;
> > #define FWDATA_RESERVED_MEM 1023
> > u64 reserved[FWDATA_RESERVED_MEM];
> > + /* Do not add new fields below this line */
> > +#define CGX_MAX 5
> > +#define CGX_LMACS_MAX 4
> > + struct cgx_lmac_fwdata_s
> cgx_fw_data[CGX_MAX][CGX_LMACS_MAX];
>
> Probably want to move the comment below the field.
Agreed will fix this in next version.
Thanks,
Hariprasad k
> > };
> >
> > struct ptp;
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
> > b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
> > index 74f494b..7fac9ab 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
> > +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
> > @@ -694,6 +694,19 @@ int rvu_mbox_handler_cgx_cfg_pause_frm(struct
> rvu *rvu,
> > return 0;
> > }
> >
> > +int rvu_mbox_handler_cgx_get_phy_fec_stats(struct rvu *rvu, struct
> msg_req *req,
> > + struct msg_rsp *rsp) {
> > + int pf = rvu_get_pf(req->hdr.pcifunc);
> > + u8 cgx_id, lmac_id;
> > +
> > + if (!is_pf_cgxmapped(rvu, pf))
> > +
Re: [Patch v2 net-next 1/7] octeontx2-af: forward error correction configuration
Hi Willem,
> -Original Message-
> From: Willem de Bruijn
> Sent: Thursday, January 28, 2021 1:45 AM
> To: Hariprasad Kelam
> Cc: Network Development ; LKML ker...@vger.kernel.org>; David Miller ; Jakub
> Kicinski ; Sunil Kovvuri Goutham
> ; Linu Cherian ;
> Geethasowjanya Akula ; Jerin Jacob Kollanukkaran
> ; Subbaraya Sundeep Bhatta ;
> Christina Jacob
> Subject: [EXT] Re: [Patch v2 net-next 1/7] octeontx2-af: forward error
> correction configuration
>
> External Email
>
> ------
> On Wed, Jan 27, 2021 at 4:05 AM Hariprasad Kelam
> wrote:
> >
> > From: Christina Jacob
> >
> > CGX block supports forward error correction modes baseR and RS. This
> > patch adds support to set encoding mode and to read
> > corrected/uncorrected block counters
> >
> > Adds new mailbox handlers set_fec to configure encoding modes and
> > fec_stats to read counters and also increase mbox timeout to accomdate
> > firmware command response timeout.
> >
> > Along with new CGX_CMD_SET_FEC command add other commands to
> sync with
> > kernel enum list with firmware.
> >
> > Signed-off-by: Christina Jacob
> > Signed-off-by: Sunil Goutham
> > Signed-off-by: Hariprasad Kelam
> > ---
> > drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 74
> ++
> > drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 7 ++
> > .../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 17 -
> > drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 22 ++-
> > .../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 33 ++
> > 5 files changed, 151 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
> > b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
> > index 84a9123..5489dab 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
> > +++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
> > @@ -340,6 +340,58 @@ int cgx_get_tx_stats(void *cgxd, int lmac_id, int
> idx, u64 *tx_stat)
> > return 0;
> > }
> >
> > +static int cgx_set_fec_stats_count(struct cgx_link_user_info *linfo)
> > +{
> > + if (linfo->fec) {
> > + switch (linfo->lmac_type_id) {
> > + case LMAC_MODE_SGMII:
> > + case LMAC_MODE_XAUI:
> > + case LMAC_MODE_RXAUI:
> > + case LMAC_MODE_QSGMII:
> > + return 0;
> > + case LMAC_MODE_10G_R:
> > + case LMAC_MODE_25G_R:
> > + case LMAC_MODE_100G_R:
> > + case LMAC_MODE_USXGMII:
> > + return 1;
> > + case LMAC_MODE_40G_R:
> > + return 4;
> > + case LMAC_MODE_50G_R:
> > + if (linfo->fec == OTX2_FEC_BASER)
> > + return 2;
> > + else
> > + return 1;
> > + }
> > + }
> > + return 0;
>
> may consider inverting the condition, to remove one level of indentation.
>
Agreed. Will fix in next version.
> > +int cgx_set_fec(u64 fec, int cgx_id, int lmac_id) {
> > + u64 req = 0, resp;
> > + struct cgx *cgx;
> > + int err = 0;
> > +
> > + cgx = cgx_get_pdata(cgx_id);
> > + if (!cgx)
> > + return -ENXIO;
> > +
> > + req = FIELD_SET(CMDREG_ID, CGX_CMD_SET_FEC, req);
> > + req = FIELD_SET(CMDSETFEC, fec, req);
> > + err = cgx_fwi_cmd_generic(req, , cgx, lmac_id);
> > + if (!err) {
> > + cgx->lmac_idmap[lmac_id]->link_info.fec =
> > + FIELD_GET(RESP_LINKSTAT_FEC, resp);
> > + return cgx->lmac_idmap[lmac_id]->link_info.fec;
> > + }
> > + return err;
>
> Prefer keeping the success path linear and return early if (err) in explicit
> branch. This also aids branch prediction.
>
Agreed. Will fix this in next version.
> > +int rvu_mbox_handler_cgx_fec_stats(struct rvu *rvu,
> > + struct msg_req *req,
> > + struct cgx_fec_stats_rsp *rsp) {
> > + int pf = rvu_get_pf(req->hdr.pcifunc);
> > + u8 cgx_idx, lmac;
> > + int err = 0;
> > + void *cgxd;
> > +
> > + if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
> > + return -EPERM;
> > + rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], _idx, );
> > +
> > + cgxd = rvu_cgx_pdata(cgx_idx, rvu);
> > + err = cgx_get_fec_stats(cgxd, lmac, rsp);
> > + return err;
>
> no need for variable err
Agreed will fix this in next version.
Thanks,
Hariprasad k
Re: [Patch v2 net-next 6/7] octeontx2-pf: ethtool physical link status
Hi Andrew Lunn,
> -Original Message-
> From: Andrew Lunn
> Sent: Wednesday, January 27, 2021 7:22 PM
> To: Hariprasad Kelam
> Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org;
> da...@davemloft.net; k...@kernel.org; Sunil Kovvuri Goutham
> ; Linu Cherian ;
> Geethasowjanya Akula ; Jerin Jacob Kollanukkaran
> ; Subbaraya Sundeep Bhatta ;
> Christina Jacob
> Subject: [EXT] Re: [Patch v2 net-next 6/7] octeontx2-pf: ethtool physical link
> status
>
> > +static void otx2_get_link_mode_info(u64 index, int mode,
> > + struct ethtool_link_ksettings
> > + *link_ksettings)
> > +{
> > + u64 ethtool_link_mode = 0;
> > + int bit_position = 0;
> > + u64 link_modes = 0;
> > +
> > + /* CGX link modes to Ethtool link mode mapping */
> > + const int cgx_link_mode[29] = {0, /* SGMII Mode */
> > + ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
> > + ETHTOOL_LINK_MODE_1baseT_Full_BIT,
> > + ETHTOOL_LINK_MODE_1baseSR_Full_BIT,
> > + ETHTOOL_LINK_MODE_1baseLR_Full_BIT,
> > + ETHTOOL_LINK_MODE_1baseKR_Full_BIT,
> > + OTX2_RESERVED_ETHTOOL_LINK_MODE,
> > + ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
> > + OTX2_RESERVED_ETHTOOL_LINK_MODE,
> > + OTX2_RESERVED_ETHTOOL_LINK_MODE,
> > + ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
> > + ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
> > + ETHTOOL_LINK_MODE_4baseSR4_Full_BIT,
> > + ETHTOOL_LINK_MODE_4baseLR4_Full_BIT,
> > + ETHTOOL_LINK_MODE_4baseCR4_Full_BIT,
> > + ETHTOOL_LINK_MODE_4baseKR4_Full_BIT,
> > + OTX2_RESERVED_ETHTOOL_LINK_MODE,
> > + ETHTOOL_LINK_MODE_5baseSR_Full_BIT,
> > + OTX2_RESERVED_ETHTOOL_LINK_MODE,
> > + ETHTOOL_LINK_MODE_5baseLR_ER_FR_Full_BIT,
> > + ETHTOOL_LINK_MODE_5baseCR_Full_BIT,
> > + ETHTOOL_LINK_MODE_5baseKR_Full_BIT,
> > + OTX2_RESERVED_ETHTOOL_LINK_MODE,
> > + ETHTOOL_LINK_MODE_10baseSR4_Full_BIT,
> > + ETHTOOL_LINK_MODE_10baseLR4_ER4_Full_BIT,
> > + ETHTOOL_LINK_MODE_10baseCR4_Full_BIT,
> > + ETHTOOL_LINK_MODE_10baseKR4_Full_BIT
> > + };
> > +
> > + link_modes = index & OTX2_ETHTOOL_SUPPORTED_MODES;
> > +
> > + for (bit_position = 0; link_modes; bit_position++, link_modes >>= 1) {
> > + if (!(link_modes & 1))
> > + continue;
> > +
> > + if (bit_position == 0)
> > + ethtool_link_mode = 0x3F;
> > +
> > + if (cgx_link_mode[bit_position])
> > + ethtool_link_mode |= 1ULL <<
> cgx_link_mode[bit_position];
> > +
> > + if (mode)
> > + *link_ksettings->link_modes.advertising |=
> > + ethtool_link_mode;
> > + else
> > + *link_ksettings->link_modes.supported |=
> > + ethtool_link_mode;
>
> You should not be derefererncing these bitmask like this. Use the helpers,
> ethtool_link_ksettings_add_link_mode(). You cannot assume these a ULL,
> they are not.
>
> Please review all the patches. There are too many levels of obfustication for
> me to easily follow the code, bit it looks like you have other bitwise
> operations which might be operating on kernel bitmaps, and you are not
> using the helpers.
>
I will fix this in next version.
>
> > + }
> > +}
> > +
> > +static int otx2_get_link_ksettings(struct net_device *netdev,
> > + struct ethtool_link_ksettings *cmd) {
> > + struct otx2_nic *pfvf = netdev_priv(netdev);
> > + struct cgx_fw_data *rsp = NULL;
> > + u32 supported = 0;
> > +
> > + cmd->base.duplex = pfvf->linfo.full_duplex;
> > + cmd->base.speed = pfvf->linfo.speed;
> > + cmd->base.autoneg = pfvf->linfo.an;
> > +
> > + rsp = otx2_get_fwdata(pfvf);
> > + if (IS_ERR(rsp))
> > + return PTR_ERR(rsp);
> > +
> > + if (rsp->fwdata.supported_an)
> > + supported |= SUPPORTED_Autoneg;
> > + ethtool_convert_legacy_u32_to_link_mode(cmd-
> >link_modes.supported,
> > + supported);
>
> Why use the legacy stuff when you can directly set the bit using the helpers.
> Don't the word legacy actually suggest you should not be using it in new
> code?
>
> Andrew
Agreed. Will fix this in next version.
Thanks,
Hariprasad k
Re: [Patch v2 net-next 4/7] octeontx2-af: Physical link configuration support
Hi Andrew Lunn,
> -Original Message-
> From: Andrew Lunn
> Sent: Wednesday, January 27, 2021 6:56 PM
> To: Hariprasad Kelam
> Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org;
> da...@davemloft.net; k...@kernel.org; Sunil Kovvuri Goutham
> ; Linu Cherian ;
> Geethasowjanya Akula ; Jerin Jacob Kollanukkaran
> ; Subbaraya Sundeep Bhatta ;
> Christina Jacob
> Subject: [EXT] Re: [Patch v2 net-next 4/7] octeontx2-af: Physical link
> configuration support
>
> On Wed, Jan 27, 2021 at 01:15:49PM +0530, Hariprasad Kelam wrote:
> > From: Christina Jacob
> >
> > CGX LMAC, the physical interface support link configuration parameters
> > like speed, auto negotiation, duplex etc. Firmware saves these into
> > memory region shared between firmware and this driver.
> >
> > This patch adds mailbox handler set_link_mode, fw_data_get to
> > configure and read these parameters.
> >
> > Signed-off-by: Christina Jacob
> > Signed-off-by: Sunil Goutham
> > Signed-off-by: Hariprasad Kelam
> > ---
> > drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 60
> +-
> > drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 2 +
> > .../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 18 ++-
> > drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 21
> > .../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 17 ++
> > 5 files changed, 115 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
> > b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
> > index b3ae84c..42ee67e 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
> > +++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
> > @@ -658,6 +658,39 @@ static inline void cgx_link_usertable_init(void)
> > cgx_lmactype_string[LMAC_MODE_USXGMII] = "USXGMII"; }
> >
> > +static inline int cgx_link_usertable_index_map(int speed) {
>
> Hi Christina, Hariprasad
>
> No inline functions in .c files please. Let the compiler decide.
>
will fix this in next version
>
> > + switch (speed) {
> > + case SPEED_10:
> > + return CGX_LINK_10M;
> > + case SPEED_100:
> > + return CGX_LINK_100M;
> > + case SPEED_1000:
> > + return CGX_LINK_1G;
> > + case SPEED_2500:
> > + return CGX_LINK_2HG;
> > + case SPEED_5000:
> > + return CGX_LINK_5G;
> > + case SPEED_1:
> > + return CGX_LINK_10G;
> > + case SPEED_2:
> > + return CGX_LINK_20G;
> > + case SPEED_25000:
> > + return CGX_LINK_25G;
> > + case SPEED_4:
> > + return CGX_LINK_40G;
> > + case SPEED_5:
> > + return CGX_LINK_50G;
> > + case 8:
> > + return CGX_LINK_80G;
> > + case SPEED_10:
> > + return CGX_LINK_100G;
> > + case SPEED_UNKNOWN:
> > + return CGX_LINK_NONE;
> > + }
> > + return CGX_LINK_NONE;
> > +}
> > +
> > static inline void link_status_user_format(u64 lstat,
> >struct cgx_link_user_info *linfo,
> >struct cgx *cgx, u8 lmac_id)
>
> So it looks like previous reviews did not catch inline functions. So lets
> say, no
> new inline functions.
>
> Andrew
Thanks for the review. I will fix this in next version.
Thanks,
Hariprasad k
[Patch v2 net-next 1/7] octeontx2-af: forward error correction configuration
From: Christina Jacob
CGX block supports forward error correction modes baseR
and RS. This patch adds support to set encoding mode
and to read corrected/uncorrected block counters
Adds new mailbox handlers set_fec to configure encoding modes
and fec_stats to read counters and also increase mbox timeout
to accomdate firmware command response timeout.
Along with new CGX_CMD_SET_FEC command add other commands to
sync with kernel enum list with firmware.
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 74 ++
drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 7 ++
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 17 -
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 22 ++-
.../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 33 ++
5 files changed, 151 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 84a9123..5489dab 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -340,6 +340,58 @@ int cgx_get_tx_stats(void *cgxd, int lmac_id, int idx, u64
*tx_stat)
return 0;
}
+static int cgx_set_fec_stats_count(struct cgx_link_user_info *linfo)
+{
+ if (linfo->fec) {
+ switch (linfo->lmac_type_id) {
+ case LMAC_MODE_SGMII:
+ case LMAC_MODE_XAUI:
+ case LMAC_MODE_RXAUI:
+ case LMAC_MODE_QSGMII:
+ return 0;
+ case LMAC_MODE_10G_R:
+ case LMAC_MODE_25G_R:
+ case LMAC_MODE_100G_R:
+ case LMAC_MODE_USXGMII:
+ return 1;
+ case LMAC_MODE_40G_R:
+ return 4;
+ case LMAC_MODE_50G_R:
+ if (linfo->fec == OTX2_FEC_BASER)
+ return 2;
+ else
+ return 1;
+ }
+ }
+ return 0;
+}
+
+int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp)
+{
+ int stats, fec_stats_count = 0;
+ int corr_reg, uncorr_reg;
+ struct cgx *cgx = cgxd;
+
+ if (!cgx || lmac_id >= cgx->lmac_count)
+ return -ENODEV;
+ fec_stats_count =
+ cgx_set_fec_stats_count(>lmac_idmap[lmac_id]->link_info);
+ if (cgx->lmac_idmap[lmac_id]->link_info.fec == OTX2_FEC_BASER) {
+ corr_reg = CGXX_SPUX_LNX_FEC_CORR_BLOCKS;
+ uncorr_reg = CGXX_SPUX_LNX_FEC_UNCORR_BLOCKS;
+ } else {
+ corr_reg = CGXX_SPUX_RSFEC_CORR;
+ uncorr_reg = CGXX_SPUX_RSFEC_UNCORR;
+ }
+ for (stats = 0; stats < fec_stats_count; stats++) {
+ rsp->fec_corr_blks +=
+ cgx_read(cgx, lmac_id, corr_reg + (stats * 8));
+ rsp->fec_uncorr_blks +=
+ cgx_read(cgx, lmac_id, uncorr_reg + (stats * 8));
+ }
+ return 0;
+}
+
int cgx_lmac_rx_tx_enable(void *cgxd, int lmac_id, bool enable)
{
struct cgx *cgx = cgxd;
@@ -615,6 +667,7 @@ static inline void link_status_user_format(u64 lstat,
linfo->link_up = FIELD_GET(RESP_LINKSTAT_UP, lstat);
linfo->full_duplex = FIELD_GET(RESP_LINKSTAT_FDUPLEX, lstat);
linfo->speed = cgx_speed_mbps[FIELD_GET(RESP_LINKSTAT_SPEED, lstat)];
+ linfo->fec = FIELD_GET(RESP_LINKSTAT_FEC, lstat);
linfo->lmac_type_id = cgx_get_lmac_type(cgx, lmac_id);
lmac_string = cgx_lmactype_string[linfo->lmac_type_id];
strncpy(linfo->lmac_type, lmac_string, LMACTYPE_STR_LEN - 1);
@@ -785,6 +838,27 @@ int cgx_get_fwdata_base(u64 *base)
return err;
}
+int cgx_set_fec(u64 fec, int cgx_id, int lmac_id)
+{
+ u64 req = 0, resp;
+ struct cgx *cgx;
+ int err = 0;
+
+ cgx = cgx_get_pdata(cgx_id);
+ if (!cgx)
+ return -ENXIO;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_SET_FEC, req);
+ req = FIELD_SET(CMDSETFEC, fec, req);
+ err = cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+ if (!err) {
+ cgx->lmac_idmap[lmac_id]->link_info.fec =
+ FIELD_GET(RESP_LINKSTAT_FEC, resp);
+ return cgx->lmac_idmap[lmac_id]->link_info.fec;
+ }
+ return err;
+}
+
static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool enable)
{
u64 req = 0;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index bcfc3e5..1824e95 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -56,6 +56,11 @@
#define CGXX_SCRATCH1_REG 0x1058
#def
[Patch v2 net-next 3/7] octeontx2-pf: ethtool fec mode support
From: Christina Jacob
Add ethtool support to configure fec modes baser/rs and
support to fecth FEC stats from CGX as well PHY.
Configure fec mode
- ethtool --set-fec eth0 encoding rs/baser/off/auto
Query fec mode
- ethtool --show-fec eth0
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
.../ethernet/marvell/octeontx2/nic/otx2_common.c | 23 +++
.../ethernet/marvell/octeontx2/nic/otx2_common.h | 6 +
.../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 181 -
.../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 3 +
4 files changed, 211 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
index bdfa2e2..f7e5450 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
@@ -60,6 +60,22 @@ void otx2_update_lmac_stats(struct otx2_nic *pfvf)
mutex_unlock(>mbox.lock);
}
+void otx2_update_lmac_fec_stats(struct otx2_nic *pfvf)
+{
+ struct msg_req *req;
+
+ if (!netif_running(pfvf->netdev))
+ return;
+ mutex_lock(>mbox.lock);
+ req = otx2_mbox_alloc_msg_cgx_fec_stats(>mbox);
+ if (!req) {
+ mutex_unlock(>mbox.lock);
+ return;
+ }
+ otx2_sync_mbox_msg(>mbox);
+ mutex_unlock(>mbox.lock);
+}
+
int otx2_update_rq_stats(struct otx2_nic *pfvf, int qidx)
{
struct otx2_rcv_queue *rq = >qset.rq[qidx];
@@ -1491,6 +1507,13 @@ void mbox_handler_cgx_stats(struct otx2_nic *pfvf,
pfvf->hw.cgx_tx_stats[id] = rsp->tx_stats[id];
}
+void mbox_handler_cgx_fec_stats(struct otx2_nic *pfvf,
+ struct cgx_fec_stats_rsp *rsp)
+{
+ pfvf->hw.cgx_fec_corr_blks += rsp->fec_corr_blks;
+ pfvf->hw.cgx_fec_uncorr_blks += rsp->fec_uncorr_blks;
+}
+
void mbox_handler_nix_txsch_alloc(struct otx2_nic *pf,
struct nix_txsch_alloc_rsp *rsp)
{
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
index 143ae04..b3f3de9 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
@@ -204,6 +204,8 @@ struct otx2_hw {
struct otx2_drv_stats drv_stats;
u64 cgx_rx_stats[CGX_RX_STATS_COUNT];
u64 cgx_tx_stats[CGX_TX_STATS_COUNT];
+ u64 cgx_fec_corr_blks;
+ u64 cgx_fec_uncorr_blks;
u8 cgx_links; /* No. of CGX links present in HW */
u8 lbk_links; /* No. of LBK links present in HW */
};
@@ -660,6 +662,9 @@ void mbox_handler_nix_txsch_alloc(struct otx2_nic *pf,
struct nix_txsch_alloc_rsp *rsp);
void mbox_handler_cgx_stats(struct otx2_nic *pfvf,
struct cgx_stats_rsp *rsp);
+void mbox_handler_cgx_fec_stats(struct otx2_nic *pfvf,
+ struct cgx_fec_stats_rsp *rsp);
+void otx2_set_fec_stats_count(struct otx2_nic *pfvf);
void mbox_handler_nix_bp_enable(struct otx2_nic *pfvf,
struct nix_bp_cfg_rsp *rsp);
@@ -668,6 +673,7 @@ void otx2_get_dev_stats(struct otx2_nic *pfvf);
void otx2_get_stats64(struct net_device *netdev,
struct rtnl_link_stats64 *stats);
void otx2_update_lmac_stats(struct otx2_nic *pfvf);
+void otx2_update_lmac_fec_stats(struct otx2_nic *pfvf);
int otx2_update_rq_stats(struct otx2_nic *pfvf, int qidx);
int otx2_update_sq_stats(struct otx2_nic *pfvf, int qidx);
void otx2_set_ethtool_ops(struct net_device *netdev);
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index e0199f0..e5b1a57 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -66,6 +66,8 @@ static const unsigned int otx2_n_dev_stats =
ARRAY_SIZE(otx2_dev_stats);
static const unsigned int otx2_n_drv_stats = ARRAY_SIZE(otx2_drv_stats);
static const unsigned int otx2_n_queue_stats = ARRAY_SIZE(otx2_queue_stats);
+static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf);
+
static void otx2_get_drvinfo(struct net_device *netdev,
struct ethtool_drvinfo *info)
{
@@ -128,6 +130,12 @@ static void otx2_get_strings(struct net_device *netdev,
u32 sset, u8 *data)
strcpy(data, "reset_count");
data += ETH_GSTRING_LEN;
+ if (pfvf->linfo.fec) {
+ sprintf(data, "Fec Corrected Errors: ");
+ data += ETH_GSTRING_LEN;
+
[Patch v2 net-next 2/7] octeontx2-af: Add new CGX_CMD to get PHY FEC statistics
From: Felix Manlunas
This patch adds support to fetch fec stats from PHY. The stats are
put in the shared data struct fwdata. A PHY driver indicates
that it has FEC stats by setting the flag fwdata.phy.misc.has_fec_stats
Besides CGX_CMD_GET_PHY_FEC_STATS, also add CGX_CMD_PRBS and
CGX_CMD_DISPLAY_EYE to enum cgx_cmd_id so that Linux's enum list is in sync
with firmware's enum list.
Signed-off-by: Felix Manlunas
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Kovvuri Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 12 ++
drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 1 +
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 5 +++
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 43 ++
drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 4 ++
.../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 32
6 files changed, 97 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 5489dab..b3ae84c 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -859,6 +859,18 @@ int cgx_set_fec(u64 fec, int cgx_id, int lmac_id)
return err;
}
+int cgx_get_phy_fec_stats(void *cgxd, int lmac_id)
+{
+ struct cgx *cgx = cgxd;
+ u64 req = 0, resp;
+
+ if (!cgx)
+ return -ENODEV;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_GET_PHY_FEC_STATS, req);
+ return cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+}
+
static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool enable)
{
u64 req = 0;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index 1824e95..c5294b7 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -154,5 +154,6 @@ void cgx_lmac_ptp_config(void *cgxd, int lmac_id, bool
enable);
u8 cgx_lmac_get_p2x(int cgx_id, int lmac_id);
int cgx_set_fec(u64 fec, int cgx_id, int lmac_id);
int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp);
+int cgx_get_phy_fec_stats(void *cgxd, int lmac_id);
#endif /* CGX_H */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
index 3485596..65f832a 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
@@ -89,6 +89,11 @@ enum cgx_cmd_id {
CGX_CMD_SET_AN,
CGX_CMD_GET_ADV_LINK_MODES,
CGX_CMD_GET_ADV_FEC,
+ CGX_CMD_GET_PHY_MOD_TYPE, /* line-side modulation type: NRZ or PAM4 */
+ CGX_CMD_SET_PHY_MOD_TYPE,
+ CGX_CMD_PRBS,
+ CGX_CMD_DISPLAY_EYE,
+ CGX_CMD_GET_PHY_FEC_STATS,
};
/* async event ids */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index a59a355..34e61a6 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -151,6 +151,8 @@ M(CGX_CFG_PAUSE_FRM,0x20E, cgx_cfg_pause_frm,
cgx_pause_frm_cfg,\
cgx_pause_frm_cfg) \
M(CGX_FEC_SET, 0x210, cgx_set_fec_param, fec_mode, fec_mode) \
M(CGX_FEC_STATS, 0x211, cgx_fec_stats, msg_req, cgx_fec_stats_rsp) \
+M(CGX_GET_PHY_FEC_STATS, 0x212, cgx_get_phy_fec_stats, msg_req, msg_rsp) \
+M(CGX_FW_DATA_GET, 0x213, cgx_get_aux_link_info, msg_req, cgx_fw_data) \
/* NPA mbox IDs (range 0x400 - 0x5FF) */ \
/* NPA mbox IDs (range 0x400 - 0x5FF) */ \
M(NPA_LF_ALLOC,0x400, npa_lf_alloc,
\
@@ -411,6 +413,47 @@ struct fec_mode {
int fec;
};
+struct sfp_eeprom_s {
+#define SFP_EEPROM_SIZE 256
+ u16 sff_id;
+ u8 buf[SFP_EEPROM_SIZE];
+ u64 reserved;
+};
+
+struct phy_s {
+ struct {
+ u64 can_change_mod_type : 1;
+ u64 mod_type: 1;
+ u64 has_fec_stats : 1;
+ } misc;
+ struct fec_stats_s {
+ u32 rsfec_corr_cws;
+ u32 rsfec_uncorr_cws;
+ u32 brfec_corr_blks;
+ u32 brfec_uncorr_blks;
+ } fec_stats;
+};
+
+struct cgx_lmac_fwdata_s {
+ u16 rw_valid;
+ u64 supported_fec;
+ u64 supported_an;
+ u64 supported_link_modes;
+ /* only applicable if AN is supported */
+ u64 advertised_fec;
+ u64 advertised_link_modes;
+ /* Only applicable if SFP/QSFP slot is present */
+ struct sfp_eeprom_s sfp_eeprom;
+ struct phy_s phy;
+#define LMAC_FWDATA_RESERVED_MEM 1021
+ u64 reserved[LMAC_FWDATA_RESERVED_MEM];
+};
+
+struct cgx_fw_data {
+ struct mbox_msghdr hdr
[Patch v2 net-next 7/7] octeontx2-pf: ethtool physical link configuration
From: Christina Jacob
Register set_link_ksetting callback with driver such that
link configurations parameters like advertised mode,speed, duplex
and autoneg can be configured.
below command
ethtool -s eth0 advertise 0x1 speed 10 duplex full autoneg on
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
.../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 53 ++
1 file changed, 53 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index b99f4bb..395a00d 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -1178,6 +1178,58 @@ static int otx2_get_link_ksettings(struct net_device
*netdev,
return 0;
}
+static int otx2_set_link_ksettings(struct net_device *netdev,
+ const struct ethtool_link_ksettings *cmd)
+{
+ struct otx2_nic *pf = netdev_priv(netdev);
+ struct ethtool_link_ksettings req_ks;
+ struct ethtool_link_ksettings cur_ks;
+ struct cgx_set_link_mode_req *req;
+ struct mbox *mbox = >mbox;
+ int err = 0;
+
+ /* save requested link settings */
+ memcpy(_ks, cmd, sizeof(struct ethtool_link_ksettings));
+
+ memset(_ks, 0, sizeof(struct ethtool_link_ksettings));
+
+ if (!ethtool_validate_speed(cmd->base.speed) ||
+ !ethtool_validate_duplex(cmd->base.duplex))
+ return -EINVAL;
+
+ if (cmd->base.autoneg != AUTONEG_ENABLE &&
+ cmd->base.autoneg != AUTONEG_DISABLE)
+ return -EINVAL;
+
+ otx2_get_link_ksettings(netdev, _ks);
+
+ /* Check requested modes against supported modes by hardware */
+ if (!bitmap_subset(req_ks.link_modes.advertising,
+ cur_ks.link_modes.supported,
+ __ETHTOOL_LINK_MODE_MASK_NBITS))
+ return -EINVAL;
+
+ mutex_lock(>lock);
+ req = otx2_mbox_alloc_msg_cgx_set_link_mode(>mbox);
+ if (!req) {
+ err = -ENOMEM;
+ goto end;
+ }
+
+ req->args.speed = req_ks.base.speed;
+ /* firmware expects 1 for half duplex and 0 for full duplex
+* hence inverting
+*/
+ req->args.duplex = req_ks.base.duplex ^ 0x1;
+ req->args.an = req_ks.base.autoneg;
+ req->args.mode = *req_ks.link_modes.advertising;
+
+ err = otx2_sync_mbox_msg(>mbox);
+end:
+ mutex_unlock(>lock);
+ return err;
+}
+
static const struct ethtool_ops otx2_ethtool_ops = {
.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
ETHTOOL_COALESCE_MAX_FRAMES,
@@ -1208,6 +1260,7 @@ static const struct ethtool_ops otx2_ethtool_ops = {
.get_fecparam = otx2_get_fecparam,
.set_fecparam = otx2_set_fecparam,
.get_link_ksettings = otx2_get_link_ksettings,
+ .set_link_ksettings = otx2_set_link_ksettings,
};
void otx2_set_ethtool_ops(struct net_device *netdev)
--
2.7.4
[Patch v2 net-next 5/7] octeontx2-af: advertised link modes support on cgx
From: Christina Jacob
CGX supports setting advertised link modes on physical link.
This patch adds support to derive cgx mode from ethtool
link mode and pass it to firmware to configure the same.
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 113 -
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 32 +-
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 3 +-
3 files changed, 145 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 42ee67e..ff0e1db 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -644,6 +645,7 @@ static inline void cgx_link_usertable_init(void)
cgx_speed_mbps[CGX_LINK_25G] = 25000;
cgx_speed_mbps[CGX_LINK_40G] = 4;
cgx_speed_mbps[CGX_LINK_50G] = 5;
+ cgx_speed_mbps[CGX_LINK_80G] = 8;
cgx_speed_mbps[CGX_LINK_100G] = 10;
cgx_lmactype_string[LMAC_MODE_SGMII] = "SGMII";
@@ -691,6 +693,110 @@ static inline int cgx_link_usertable_index_map(int speed)
return CGX_LINK_NONE;
}
+static void set_mod_args(struct cgx_set_link_mode_args *args,
+u32 speed, u8 duplex, u8 autoneg, u64 mode)
+{
+ /* Fill default values incase of user did not pass
+* valid parameters
+*/
+ if (args->duplex == DUPLEX_UNKNOWN)
+ args->duplex = duplex;
+ if (args->speed == SPEED_UNKNOWN)
+ args->speed = speed;
+ if (args->an == AUTONEG_UNKNOWN)
+ args->an = autoneg;
+ args->mode = mode;
+ args->ports = 0;
+}
+
+static void otx2_map_ethtool_link_modes(u64 bitmask,
+ struct cgx_set_link_mode_args *args)
+{
+ switch (bitmask) {
+ case BIT_ULL(ETHTOOL_LINK_MODE_10baseT_Half_BIT):
+ set_mod_args(args, 10, 1, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_10baseT_Full_BIT):
+ set_mod_args(args, 10, 0, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_100baseT_Half_BIT):
+ set_mod_args(args, 100, 1, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_100baseT_Full_BIT):
+ set_mod_args(args, 100, 0, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_1000baseT_Half_BIT):
+ set_mod_args(args, 1000, 1, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_1000baseT_Full_BIT):
+ set_mod_args(args, 1000, 0, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_1000baseX_Full_BIT):
+ set_mod_args(args, 1000, 0, 0, BIT_ULL(CGX_MODE_1000_BASEX));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_1baseT_Full_BIT):
+ set_mod_args(args, 1000, 0, 1, BIT_ULL(CGX_MODE_QSGMII));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_1baseSR_Full_BIT):
+ set_mod_args(args, 1, 0, 0, BIT_ULL(CGX_MODE_10G_C2C));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_1baseLR_Full_BIT):
+ set_mod_args(args, 1, 0, 0, BIT_ULL(CGX_MODE_10G_C2M));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_1baseKR_Full_BIT):
+ set_mod_args(args, 1, 0, 1, BIT_ULL(CGX_MODE_10G_KR));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT):
+ set_mod_args(args, 25000, 0, 0, BIT_ULL(CGX_MODE_25G_C2C));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT):
+ set_mod_args(args, 25000, 0, 1, BIT_ULL(CGX_MODE_25G_CR));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT):
+ set_mod_args(args, 25000, 0, 1, BIT_ULL(CGX_MODE_25G_KR));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_4baseSR4_Full_BIT):
+ set_mod_args(args, 4, 0, 0, BIT_ULL(CGX_MODE_40G_C2C));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_4baseLR4_Full_BIT):
+ set_mod_args(args, 4, 0, 0, BIT_ULL(CGX_MODE_40G_C2M));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_4baseCR4_Full_BIT):
+ set_mod_args(args, 4, 0, 1, BIT_ULL(CGX_MODE_40G_CR4));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_4baseKR4_Full_BIT):
+ set_mod_args(args, 4, 0, 1, BIT_ULL(CGX_MODE_40G_KR4));
+ break;
+ case BIT_ULL(ETHT
[Patch v2 net-next 6/7] octeontx2-pf: ethtool physical link status
From: Christina Jacob
Register get_link_ksettings callback to get link status information
from the driver. As virtual function (vf) shares same physical link
same API is used for both the drivers and for loop back drivers
simply returns the fixed values as its does not have physical link.
ethtool eth3
Settings for eth3:
Supported ports: [ ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Half 1000baseT/Full
1baseKR/Full
1000baseX/Full
Supports auto-negotiation: No
Supported FEC modes: BaseR RS
Advertised link modes: Not reported
Advertised pause frame use: No
Advertised auto-negotiation: No
Advertised FEC modes: None
ethtool lbk0
Settings for lbk0:
Speed: 10Mb/s
Duplex: Full
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
.../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 159 +
1 file changed, 159 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index e5b1a57..b99f4bb 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -32,6 +32,8 @@ struct otx2_stat {
.index = offsetof(struct otx2_dev_stats, stat) / sizeof(u64), \
}
+#define OTX2_ETHTOOL_SUPPORTED_MODES 0x638CCBF //11000111000110011001011
+#define OTX2_RESERVED_ETHTOOL_LINK_MODE0
static const struct otx2_stat otx2_dev_stats[] = {
OTX2_DEV_STAT(rx_ucast_frames),
OTX2_DEV_STAT(rx_bcast_frames),
@@ -1034,6 +1036,148 @@ static int otx2_set_fecparam(struct net_device *netdev,
return err;
}
+static void otx2_get_fec_info(u64 index, int mode, struct
ethtool_link_ksettings
+ *link_ksettings)
+{
+ switch (index) {
+ case OTX2_FEC_NONE:
+ if (mode)
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+advertising,
+FEC_NONE);
+ else
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+supported,
+FEC_NONE);
+ break;
+ case OTX2_FEC_BASER:
+ if (mode)
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+advertising,
+FEC_BASER);
+ else
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+supported,
+FEC_BASER);
+ break;
+ case OTX2_FEC_RS:
+ if (mode)
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+advertising,
+FEC_RS);
+ else
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+supported,
+FEC_RS);
+ break;
+ case OTX2_FEC_BASER | OTX2_FEC_RS:
+ if (mode) {
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+advertising,
+FEC_BASER);
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+advertising,
+FEC_RS);
+ } else {
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+supported,
+FEC_BASER);
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+supported,
+FEC_RS);
+ }
+
+ break;
+ }
+}
+
+static void otx2_get_link_mode_info(u64 index, int mode,
+ struct ethtool_link_ksettings
+ *link_ksettings)
+{
+ u64 ethtool_link_mode = 0;
+ int bit_position = 0
[Patch v2 net-next 4/7] octeontx2-af: Physical link configuration support
From: Christina Jacob
CGX LMAC, the physical interface support link configuration parameters
like speed, auto negotiation, duplex etc. Firmware saves these into
memory region shared between firmware and this driver.
This patch adds mailbox handler set_link_mode, fw_data_get to
configure and read these parameters.
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 60 +-
drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 2 +
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 18 ++-
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 21
.../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 17 ++
5 files changed, 115 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index b3ae84c..42ee67e 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -658,6 +658,39 @@ static inline void cgx_link_usertable_init(void)
cgx_lmactype_string[LMAC_MODE_USXGMII] = "USXGMII";
}
+static inline int cgx_link_usertable_index_map(int speed)
+{
+ switch (speed) {
+ case SPEED_10:
+ return CGX_LINK_10M;
+ case SPEED_100:
+ return CGX_LINK_100M;
+ case SPEED_1000:
+ return CGX_LINK_1G;
+ case SPEED_2500:
+ return CGX_LINK_2HG;
+ case SPEED_5000:
+ return CGX_LINK_5G;
+ case SPEED_1:
+ return CGX_LINK_10G;
+ case SPEED_2:
+ return CGX_LINK_20G;
+ case SPEED_25000:
+ return CGX_LINK_25G;
+ case SPEED_4:
+ return CGX_LINK_40G;
+ case SPEED_5:
+ return CGX_LINK_50G;
+ case 8:
+ return CGX_LINK_80G;
+ case SPEED_10:
+ return CGX_LINK_100G;
+ case SPEED_UNKNOWN:
+ return CGX_LINK_NONE;
+ }
+ return CGX_LINK_NONE;
+}
+
static inline void link_status_user_format(u64 lstat,
struct cgx_link_user_info *linfo,
struct cgx *cgx, u8 lmac_id)
@@ -667,6 +700,7 @@ static inline void link_status_user_format(u64 lstat,
linfo->link_up = FIELD_GET(RESP_LINKSTAT_UP, lstat);
linfo->full_duplex = FIELD_GET(RESP_LINKSTAT_FDUPLEX, lstat);
linfo->speed = cgx_speed_mbps[FIELD_GET(RESP_LINKSTAT_SPEED, lstat)];
+ linfo->an = FIELD_GET(RESP_LINKSTAT_AN, lstat);
linfo->fec = FIELD_GET(RESP_LINKSTAT_FEC, lstat);
linfo->lmac_type_id = cgx_get_lmac_type(cgx, lmac_id);
lmac_string = cgx_lmactype_string[linfo->lmac_type_id];
@@ -695,6 +729,9 @@ static inline void cgx_link_change_handler(u64 lstat,
lmac->link_info = event.link_uinfo;
linfo = >link_info;
+ if (err_type == CGX_ERR_SPEED_CHANGE_INVALID)
+ return;
+
/* Ensure callback doesn't get unregistered until we finish it */
spin_lock(>event_cb_lock);
@@ -723,7 +760,8 @@ static inline bool cgx_cmdresp_is_linkevent(u64 event)
id = FIELD_GET(EVTREG_ID, event);
if (id == CGX_CMD_LINK_BRING_UP ||
- id == CGX_CMD_LINK_BRING_DOWN)
+ id == CGX_CMD_LINK_BRING_DOWN ||
+ id == CGX_CMD_MODE_CHANGE)
return true;
else
return false;
@@ -838,6 +876,26 @@ int cgx_get_fwdata_base(u64 *base)
return err;
}
+int cgx_set_link_mode(void *cgxd, struct cgx_set_link_mode_args args,
+ int cgx_id, int lmac_id)
+{
+ struct cgx *cgx = cgxd;
+ u64 req = 0, resp;
+ int err = 0;
+
+ if (!cgx)
+ return -ENODEV;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_MODE_CHANGE, req);
+ req = FIELD_SET(CMDMODECHANGE_SPEED,
+ cgx_link_usertable_index_map(args.speed), req);
+ req = FIELD_SET(CMDMODECHANGE_DUPLEX, args.duplex, req);
+ req = FIELD_SET(CMDMODECHANGE_AN, args.an, req);
+ req = FIELD_SET(CMDMODECHANGE_PORT, args.ports, req);
+ req = FIELD_SET(CMDMODECHANGE_FLAGS, args.flags, req);
+ err = cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+ return err;
+}
int cgx_set_fec(u64 fec, int cgx_id, int lmac_id)
{
u64 req = 0, resp;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index c5294b7..b458ad0 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -155,5 +155,7 @@ u8 cgx_lmac_get_p2x(int cgx_id, int lmac_id);
int cgx_set_fec(u64 fec, int cgx_id, int lmac_id);
int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp);
int cgx_get_phy_
[Patch v2 net-next 0/7] ethtool support for fec and link configuration
This series of patches add support for forward error correction(fec) and physical link configuration. Patches 1&2 adds necessary mbox handlers for fec mode configuration request and to fetch stats. Patch 3 registers driver callbacks for fec mode configuration and display. Patch 4&5 adds support of mbox handlers for configuring link parameters like speed/duplex and autoneg etc. Patche 6&7 registers driver callbacks for physical link configuration. Change-log: v2: -Fixed review comments - Corrected indentation issues - Return -ENOMEM incase of mbox allocation failure - added validation for input fecparams bitmask values - added more comments Christina Jacob (6): octeontx2-af: forward error correction configuration octeontx2-pf: ethtool fec mode support octeontx2-af: Physical link configuration support octeontx2-af: advertised link modes support on cgx octeontx2-pf: ethtool physical link status octeontx2-pf: ethtool physical link configuration Felix Manlunas (1): octeontx2-af: Add new CGX_CMD to get PHY FEC statistics drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 257 +- drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 10 + .../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 70 +++- drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 87 - drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 4 + .../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 82 + .../ethernet/marvell/octeontx2/nic/otx2_common.c | 23 ++ .../ethernet/marvell/octeontx2/nic/otx2_common.h | 6 + .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 393 - .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 3 + 10 files changed, 928 insertions(+), 7 deletions(-) -- 2.7.4
RE: [EXT] Re: [net-next PATCH 3/7] octeontx2-pf: ethtool fec mode support
Hi Jakub,
> -Original Message-
> From: Jakub Kicinski
> Sent: Saturday, January 23, 2021 10:00 AM
> To: Hariprasad Kelam
> Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org;
> da...@davemloft.net; Sunil Kovvuri Goutham ;
> Linu Cherian ; Geethasowjanya Akula
> ; Jerin Jacob Kollanukkaran ;
> Subbaraya Sundeep Bhatta ; Christina Jacob
>
> Subject: [EXT] Re: [net-next PATCH 3/7] octeontx2-pf: ethtool fec mode
> support
>
> External Email
>
> --
> On Thu, 21 Jan 2021 13:23:25 +0530 Hariprasad Kelam wrote:
> > From: Christina Jacob
> >
> > Add ethtool support to configure fec modes baser/rs and support to
> > fecth FEC stats from CGX as well PHY.
> >
> > Configure fec mode
> > - ethtool --set-fec eth0 encoding rs/baser/off/auto Query fec mode
> > - ethtool --show-fec eth0
> >
> > Signed-off-by: Christina Jacob
> > Signed-off-by: Sunil Goutham
> > Signed-off-by: Hariprasad Kelam
> > ---
> > .../ethernet/marvell/octeontx2/nic/otx2_common.c | 23 +++
> > .../ethernet/marvell/octeontx2/nic/otx2_common.h | 6 +
> > .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 174
> -
> > .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 3 +
> > 4 files changed, 204 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
> > b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
> > index bdfa2e2..d09119b 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
> > +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
> > @@ -60,6 +60,22 @@ void otx2_update_lmac_stats(struct otx2_nic *pfvf)
> > mutex_unlock(>mbox.lock);
> > }
> >
> > +void otx2_update_lmac_fec_stats(struct otx2_nic *pfvf) {
> > + struct msg_req *req;
> > +
> > + if (!netif_running(pfvf->netdev))
> > + return;
> > + mutex_lock(>mbox.lock);
> > + req = otx2_mbox_alloc_msg_cgx_fec_stats(>mbox);
> > + if (!req) {
> > + mutex_unlock(>mbox.lock);
> > + return;
> > + }
> > + otx2_sync_mbox_msg(>mbox);
> > + mutex_unlock(>mbox.lock);
> > +}
> > +
> > int otx2_update_rq_stats(struct otx2_nic *pfvf, int qidx) {
> > struct otx2_rcv_queue *rq = >qset.rq[qidx]; @@ -1491,6
> > +1507,13 @@ void mbox_handler_cgx_stats(struct otx2_nic *pfvf,
> > pfvf->hw.cgx_tx_stats[id] = rsp->tx_stats[id]; }
> >
> > +void mbox_handler_cgx_fec_stats(struct otx2_nic *pfvf,
> > + struct cgx_fec_stats_rsp *rsp)
> > +{
> > + pfvf->hw.cgx_fec_corr_blks += rsp->fec_corr_blks;
> > + pfvf->hw.cgx_fec_uncorr_blks += rsp->fec_uncorr_blks;
>
> double indented
>
I will fix this in V2.
> > +}
> > +
> > void mbox_handler_nix_txsch_alloc(struct otx2_nic *pf,
> > struct nix_txsch_alloc_rsp *rsp) {
>
> > @@ -183,12 +210,42 @@ static void otx2_get_ethtool_stats(struct
> net_device *netdev,
> > for (stat = 0; stat < CGX_TX_STATS_COUNT; stat++)
> > *(data++) = pfvf->hw.cgx_tx_stats[stat];
> > *(data++) = pfvf->reset_count;
> > +
> > + if (pfvf->linfo.fec == OTX2_FEC_NONE)
> > + return;
>
> Don't hide the stats based on configuration.
> Getting number of stats and requesting them are two different syscalls.
>
Agreed . While getting number of stats also , check is there to ensure
interface
Has valid fec mode.
if (pfvf->linfo.fec) {
sprintf(data, "Fec Corrected Errors: ");
These checks ensures number of stats and request them are in sync.
> > + fec_corr_blks = pfvf->hw.cgx_fec_corr_blks;
> > + fec_uncorr_blks = pfvf->hw.cgx_fec_uncorr_blks;
> > +
> > + rsp = otx2_get_fwdata(pfvf);
> > + if (!IS_ERR(rsp) && rsp->fwdata.phy.misc.has_fec_stats &&
> > + !otx2_get_phy_fec_stats(pfvf)) {
> > + /* Fetch fwdata again because it's been recently populated
> with
> > +* latest PHY FEC stats.
> > +*/
> > + rsp = otx2_get_fwdata(pfvf);
> > + if (!IS_ERR(rsp)) {
> > + struct fec_stats_s *p = >fwdata.phy.fec_stats;
> > +
> > + if (pfvf->linfo.fec == OTX2_FEC_BASER) {
> > + fec_corr_blks = p->brfec_c
[net-next PATCH 1/7] octeontx2-af: forward error correction configuration
From: Christina Jacob
CGX block supports forward error correction modes baseR
and RS. This patch adds support to set encoding mode
and to read corrected/uncorrected block counters
Adds new mailbox handlers set_fec to configure encoding modes
and fec_stats to read counters and also increase mbox timeout
to accomdate firmware command response timeout.
Along with new CGX_CMD_SET_FEC command add other commands to
sync with kernel enum list with firmware.
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 74 ++
drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 7 ++
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 17 -
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 22 ++-
.../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 33 ++
5 files changed, 151 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 84a9123..5489dab 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -340,6 +340,58 @@ int cgx_get_tx_stats(void *cgxd, int lmac_id, int idx, u64
*tx_stat)
return 0;
}
+static int cgx_set_fec_stats_count(struct cgx_link_user_info *linfo)
+{
+ if (linfo->fec) {
+ switch (linfo->lmac_type_id) {
+ case LMAC_MODE_SGMII:
+ case LMAC_MODE_XAUI:
+ case LMAC_MODE_RXAUI:
+ case LMAC_MODE_QSGMII:
+ return 0;
+ case LMAC_MODE_10G_R:
+ case LMAC_MODE_25G_R:
+ case LMAC_MODE_100G_R:
+ case LMAC_MODE_USXGMII:
+ return 1;
+ case LMAC_MODE_40G_R:
+ return 4;
+ case LMAC_MODE_50G_R:
+ if (linfo->fec == OTX2_FEC_BASER)
+ return 2;
+ else
+ return 1;
+ }
+ }
+ return 0;
+}
+
+int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp)
+{
+ int stats, fec_stats_count = 0;
+ int corr_reg, uncorr_reg;
+ struct cgx *cgx = cgxd;
+
+ if (!cgx || lmac_id >= cgx->lmac_count)
+ return -ENODEV;
+ fec_stats_count =
+ cgx_set_fec_stats_count(>lmac_idmap[lmac_id]->link_info);
+ if (cgx->lmac_idmap[lmac_id]->link_info.fec == OTX2_FEC_BASER) {
+ corr_reg = CGXX_SPUX_LNX_FEC_CORR_BLOCKS;
+ uncorr_reg = CGXX_SPUX_LNX_FEC_UNCORR_BLOCKS;
+ } else {
+ corr_reg = CGXX_SPUX_RSFEC_CORR;
+ uncorr_reg = CGXX_SPUX_RSFEC_UNCORR;
+ }
+ for (stats = 0; stats < fec_stats_count; stats++) {
+ rsp->fec_corr_blks +=
+ cgx_read(cgx, lmac_id, corr_reg + (stats * 8));
+ rsp->fec_uncorr_blks +=
+ cgx_read(cgx, lmac_id, uncorr_reg + (stats * 8));
+ }
+ return 0;
+}
+
int cgx_lmac_rx_tx_enable(void *cgxd, int lmac_id, bool enable)
{
struct cgx *cgx = cgxd;
@@ -615,6 +667,7 @@ static inline void link_status_user_format(u64 lstat,
linfo->link_up = FIELD_GET(RESP_LINKSTAT_UP, lstat);
linfo->full_duplex = FIELD_GET(RESP_LINKSTAT_FDUPLEX, lstat);
linfo->speed = cgx_speed_mbps[FIELD_GET(RESP_LINKSTAT_SPEED, lstat)];
+ linfo->fec = FIELD_GET(RESP_LINKSTAT_FEC, lstat);
linfo->lmac_type_id = cgx_get_lmac_type(cgx, lmac_id);
lmac_string = cgx_lmactype_string[linfo->lmac_type_id];
strncpy(linfo->lmac_type, lmac_string, LMACTYPE_STR_LEN - 1);
@@ -785,6 +838,27 @@ int cgx_get_fwdata_base(u64 *base)
return err;
}
+int cgx_set_fec(u64 fec, int cgx_id, int lmac_id)
+{
+ u64 req = 0, resp;
+ struct cgx *cgx;
+ int err = 0;
+
+ cgx = cgx_get_pdata(cgx_id);
+ if (!cgx)
+ return -ENXIO;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_SET_FEC, req);
+ req = FIELD_SET(CMDSETFEC, fec, req);
+ err = cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+ if (!err) {
+ cgx->lmac_idmap[lmac_id]->link_info.fec =
+ FIELD_GET(RESP_LINKSTAT_FEC, resp);
+ return cgx->lmac_idmap[lmac_id]->link_info.fec;
+ }
+ return err;
+}
+
static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool enable)
{
u64 req = 0;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index bcfc3e5..1824e95 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -56,6 +56,11 @@
#define CGXX_SCRATCH1_REG 0x1058
#def
[net-next PATCH 4/7] octeontx2-af: Physical link configuration support
From: Christina Jacob
CGX LMAC, the physical interface support link configuration parameters
like speed, auto negotiation, duplex etc. Firmware saves these into
memory region shared between firmware and this driver.
This patch adds mailbox handler set_link_mode, fw_data_get to
configure and read these parameters.
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 60 +-
drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 2 +
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 18 ++-
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 21
.../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 19 +++
5 files changed, 117 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index b3ae84c..42ee67e 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -658,6 +658,39 @@ static inline void cgx_link_usertable_init(void)
cgx_lmactype_string[LMAC_MODE_USXGMII] = "USXGMII";
}
+static inline int cgx_link_usertable_index_map(int speed)
+{
+ switch (speed) {
+ case SPEED_10:
+ return CGX_LINK_10M;
+ case SPEED_100:
+ return CGX_LINK_100M;
+ case SPEED_1000:
+ return CGX_LINK_1G;
+ case SPEED_2500:
+ return CGX_LINK_2HG;
+ case SPEED_5000:
+ return CGX_LINK_5G;
+ case SPEED_1:
+ return CGX_LINK_10G;
+ case SPEED_2:
+ return CGX_LINK_20G;
+ case SPEED_25000:
+ return CGX_LINK_25G;
+ case SPEED_4:
+ return CGX_LINK_40G;
+ case SPEED_5:
+ return CGX_LINK_50G;
+ case 8:
+ return CGX_LINK_80G;
+ case SPEED_10:
+ return CGX_LINK_100G;
+ case SPEED_UNKNOWN:
+ return CGX_LINK_NONE;
+ }
+ return CGX_LINK_NONE;
+}
+
static inline void link_status_user_format(u64 lstat,
struct cgx_link_user_info *linfo,
struct cgx *cgx, u8 lmac_id)
@@ -667,6 +700,7 @@ static inline void link_status_user_format(u64 lstat,
linfo->link_up = FIELD_GET(RESP_LINKSTAT_UP, lstat);
linfo->full_duplex = FIELD_GET(RESP_LINKSTAT_FDUPLEX, lstat);
linfo->speed = cgx_speed_mbps[FIELD_GET(RESP_LINKSTAT_SPEED, lstat)];
+ linfo->an = FIELD_GET(RESP_LINKSTAT_AN, lstat);
linfo->fec = FIELD_GET(RESP_LINKSTAT_FEC, lstat);
linfo->lmac_type_id = cgx_get_lmac_type(cgx, lmac_id);
lmac_string = cgx_lmactype_string[linfo->lmac_type_id];
@@ -695,6 +729,9 @@ static inline void cgx_link_change_handler(u64 lstat,
lmac->link_info = event.link_uinfo;
linfo = >link_info;
+ if (err_type == CGX_ERR_SPEED_CHANGE_INVALID)
+ return;
+
/* Ensure callback doesn't get unregistered until we finish it */
spin_lock(>event_cb_lock);
@@ -723,7 +760,8 @@ static inline bool cgx_cmdresp_is_linkevent(u64 event)
id = FIELD_GET(EVTREG_ID, event);
if (id == CGX_CMD_LINK_BRING_UP ||
- id == CGX_CMD_LINK_BRING_DOWN)
+ id == CGX_CMD_LINK_BRING_DOWN ||
+ id == CGX_CMD_MODE_CHANGE)
return true;
else
return false;
@@ -838,6 +876,26 @@ int cgx_get_fwdata_base(u64 *base)
return err;
}
+int cgx_set_link_mode(void *cgxd, struct cgx_set_link_mode_args args,
+ int cgx_id, int lmac_id)
+{
+ struct cgx *cgx = cgxd;
+ u64 req = 0, resp;
+ int err = 0;
+
+ if (!cgx)
+ return -ENODEV;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_MODE_CHANGE, req);
+ req = FIELD_SET(CMDMODECHANGE_SPEED,
+ cgx_link_usertable_index_map(args.speed), req);
+ req = FIELD_SET(CMDMODECHANGE_DUPLEX, args.duplex, req);
+ req = FIELD_SET(CMDMODECHANGE_AN, args.an, req);
+ req = FIELD_SET(CMDMODECHANGE_PORT, args.ports, req);
+ req = FIELD_SET(CMDMODECHANGE_FLAGS, args.flags, req);
+ err = cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+ return err;
+}
int cgx_set_fec(u64 fec, int cgx_id, int lmac_id)
{
u64 req = 0, resp;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index c5294b7..b458ad0 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -155,5 +155,7 @@ u8 cgx_lmac_get_p2x(int cgx_id, int lmac_id);
int cgx_set_fec(u64 fec, int cgx_id, int lmac_id);
int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp);
int cgx_get_phy_
[net-next PATCH 6/7] octeontx2-pf: ethtool physical link status
From: Christina Jacob
Register get_link_ksettings callback to get link status information
from the driver. As virtual function (vf) shares same physical link
same API is used for both the drivers and for loop back drivers
simply returns the fixed values as its does not have physical link.
ethtool eth3
Settings for eth3:
Supported ports: [ ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Half 1000baseT/Full
1baseKR/Full
1000baseX/Full
Supports auto-negotiation: No
Supported FEC modes: BaseR RS
Advertised link modes: Not reported
Advertised pause frame use: No
Advertised auto-negotiation: No
Advertised FEC modes: None
ethtool lbk0
Settings for lbk0:
Speed: 10Mb/s
Duplex: Full
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
.../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 157 +
1 file changed, 157 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index 9cec341..ef79ecf 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -32,6 +32,7 @@ struct otx2_stat {
.index = offsetof(struct otx2_dev_stats, stat) / sizeof(u64), \
}
+#define OTX2_ETHTOOL_SUPPORTED_MODES 0x638CCBF //11000111000110011001011
static const struct otx2_stat otx2_dev_stats[] = {
OTX2_DEV_STAT(rx_ucast_frames),
OTX2_DEV_STAT(rx_bcast_frames),
@@ -992,6 +993,147 @@ end: mutex_unlock(>lock);
return err;
}
+static void otx2_get_fec_info(u64 index, int mode, struct
ethtool_link_ksettings
+ *link_ksettings)
+{
+ switch (index) {
+ case OTX2_FEC_NONE:
+ if (mode)
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+advertising,
+FEC_NONE);
+ else
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+supported,
+FEC_NONE);
+ break;
+ case OTX2_FEC_BASER:
+ if (mode)
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+advertising,
+FEC_BASER);
+ else
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+supported,
+FEC_BASER);
+ break;
+ case OTX2_FEC_RS:
+ if (mode)
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+advertising,
+FEC_RS);
+ else
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+supported,
+FEC_RS);
+ break;
+ case OTX2_FEC_BASER | OTX2_FEC_RS:
+ if (mode) {
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+advertising,
+FEC_BASER);
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+advertising,
+FEC_RS);
+ } else {
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+supported,
+FEC_BASER);
+ ethtool_link_ksettings_add_link_mode(link_ksettings,
+supported,
+FEC_RS);
+ }
+
+ break;
+ }
+}
+
+static void otx2_get_link_mode_info(u64 index, int mode,
+ struct ethtool_link_ksettings
+ *link_ksettings)
+{
+ u64 ethtool_link_mode = 0;
+ int bit_position = 0;
+ u64 link_modes = 0;
+
+ int cgx_link_mode[29] =
[net-next PATCH 3/7] octeontx2-pf: ethtool fec mode support
From: Christina Jacob
Add ethtool support to configure fec modes baser/rs and
support to fecth FEC stats from CGX as well PHY.
Configure fec mode
- ethtool --set-fec eth0 encoding rs/baser/off/auto
Query fec mode
- ethtool --show-fec eth0
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
.../ethernet/marvell/octeontx2/nic/otx2_common.c | 23 +++
.../ethernet/marvell/octeontx2/nic/otx2_common.h | 6 +
.../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 174 -
.../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 3 +
4 files changed, 204 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
index bdfa2e2..d09119b 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
@@ -60,6 +60,22 @@ void otx2_update_lmac_stats(struct otx2_nic *pfvf)
mutex_unlock(>mbox.lock);
}
+void otx2_update_lmac_fec_stats(struct otx2_nic *pfvf)
+{
+ struct msg_req *req;
+
+ if (!netif_running(pfvf->netdev))
+ return;
+ mutex_lock(>mbox.lock);
+ req = otx2_mbox_alloc_msg_cgx_fec_stats(>mbox);
+ if (!req) {
+ mutex_unlock(>mbox.lock);
+ return;
+ }
+ otx2_sync_mbox_msg(>mbox);
+ mutex_unlock(>mbox.lock);
+}
+
int otx2_update_rq_stats(struct otx2_nic *pfvf, int qidx)
{
struct otx2_rcv_queue *rq = >qset.rq[qidx];
@@ -1491,6 +1507,13 @@ void mbox_handler_cgx_stats(struct otx2_nic *pfvf,
pfvf->hw.cgx_tx_stats[id] = rsp->tx_stats[id];
}
+void mbox_handler_cgx_fec_stats(struct otx2_nic *pfvf,
+ struct cgx_fec_stats_rsp *rsp)
+{
+ pfvf->hw.cgx_fec_corr_blks += rsp->fec_corr_blks;
+ pfvf->hw.cgx_fec_uncorr_blks += rsp->fec_uncorr_blks;
+}
+
void mbox_handler_nix_txsch_alloc(struct otx2_nic *pf,
struct nix_txsch_alloc_rsp *rsp)
{
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
index 143ae04..b3f3de9 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
@@ -204,6 +204,8 @@ struct otx2_hw {
struct otx2_drv_stats drv_stats;
u64 cgx_rx_stats[CGX_RX_STATS_COUNT];
u64 cgx_tx_stats[CGX_TX_STATS_COUNT];
+ u64 cgx_fec_corr_blks;
+ u64 cgx_fec_uncorr_blks;
u8 cgx_links; /* No. of CGX links present in HW */
u8 lbk_links; /* No. of LBK links present in HW */
};
@@ -660,6 +662,9 @@ void mbox_handler_nix_txsch_alloc(struct otx2_nic *pf,
struct nix_txsch_alloc_rsp *rsp);
void mbox_handler_cgx_stats(struct otx2_nic *pfvf,
struct cgx_stats_rsp *rsp);
+void mbox_handler_cgx_fec_stats(struct otx2_nic *pfvf,
+ struct cgx_fec_stats_rsp *rsp);
+void otx2_set_fec_stats_count(struct otx2_nic *pfvf);
void mbox_handler_nix_bp_enable(struct otx2_nic *pfvf,
struct nix_bp_cfg_rsp *rsp);
@@ -668,6 +673,7 @@ void otx2_get_dev_stats(struct otx2_nic *pfvf);
void otx2_get_stats64(struct net_device *netdev,
struct rtnl_link_stats64 *stats);
void otx2_update_lmac_stats(struct otx2_nic *pfvf);
+void otx2_update_lmac_fec_stats(struct otx2_nic *pfvf);
int otx2_update_rq_stats(struct otx2_nic *pfvf, int qidx);
int otx2_update_sq_stats(struct otx2_nic *pfvf, int qidx);
void otx2_set_ethtool_ops(struct net_device *netdev);
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index aaba045..9cec341 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -66,6 +66,8 @@ static const unsigned int otx2_n_dev_stats =
ARRAY_SIZE(otx2_dev_stats);
static const unsigned int otx2_n_drv_stats = ARRAY_SIZE(otx2_drv_stats);
static const unsigned int otx2_n_queue_stats = ARRAY_SIZE(otx2_queue_stats);
+static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf);
+
static void otx2_get_drvinfo(struct net_device *netdev,
struct ethtool_drvinfo *info)
{
@@ -128,6 +130,12 @@ static void otx2_get_strings(struct net_device *netdev,
u32 sset, u8 *data)
strcpy(data, "reset_count");
data += ETH_GSTRING_LEN;
+ if (pfvf->linfo.fec) {
+ sprintf(data, "Fec Corrected Errors: ");
+ data += ETH_G
[net-next PATCH 7/7] octeontx2-pf: ethtool physical link configuration
From: Christina Jacob
Register set_link_ksetting callback with driver such that
link configurations parameters like advertised mode,speed, duplex
and autoneg can be configured.
below command
ethtool -s eth0 advertise 0x1 speed 10 duplex full autoneg on
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
.../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 59 ++
1 file changed, 59 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
index ef79ecf..b928745 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
@@ -1134,6 +1134,64 @@ static int otx2_get_link_ksettings(struct net_device
*netdev,
return 0;
}
+static int otx2_set_link_ksettings(struct net_device *netdev,
+ const struct ethtool_link_ksettings *cmd)
+{
+ struct otx2_nic *pf = netdev_priv(netdev);
+ struct ethtool_link_ksettings req_ks;
+ struct ethtool_link_ksettings cur_ks;
+ struct cgx_set_link_mode_req *req;
+ struct cgx_set_link_mode_rsp *rsp;
+ struct mbox *mbox = >mbox;
+ int err = 0;
+
+ /* save requested link settings */
+ memcpy(_ks, cmd, sizeof(struct ethtool_link_ksettings));
+
+ memset(_ks, 0, sizeof(struct ethtool_link_ksettings));
+
+ if (!ethtool_validate_speed(cmd->base.speed) ||
+ !ethtool_validate_duplex(cmd->base.duplex))
+ return -EINVAL;
+
+ if (cmd->base.autoneg != AUTONEG_ENABLE &&
+ cmd->base.autoneg != AUTONEG_DISABLE)
+ return -EINVAL;
+
+ otx2_get_link_ksettings(netdev, _ks);
+
+ /* Check requested modes against supported modes by hardware */
+ if (!bitmap_subset(req_ks.link_modes.advertising,
+ cur_ks.link_modes.supported,
+ __ETHTOOL_LINK_MODE_MASK_NBITS))
+ return -EINVAL;
+
+ mutex_lock(>lock);
+ req = otx2_mbox_alloc_msg_cgx_set_link_mode(>mbox);
+ if (!req) {
+ mutex_unlock(>lock);
+ return -EAGAIN;
+ }
+
+ req->args.speed = req_ks.base.speed;
+ /* firmware expects 1 for half duplex and 0 for full duplex
+* hence inverting
+*/
+ req->args.duplex = req_ks.base.duplex ^ 0x1;
+ req->args.an = req_ks.base.autoneg;
+ req->args.mode = *req_ks.link_modes.advertising;
+
+ err = otx2_sync_mbox_msg(>mbox);
+ if (!err) {
+ rsp = (struct cgx_set_link_mode_rsp *)
+ otx2_mbox_get_rsp(>mbox.mbox, 0, >hdr);
+ if (rsp->status)
+ err = rsp->status;
+ }
+ mutex_unlock(>lock);
+ return err;
+}
+
static const struct ethtool_ops otx2_ethtool_ops = {
.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
ETHTOOL_COALESCE_MAX_FRAMES,
@@ -1164,6 +1222,7 @@ static const struct ethtool_ops otx2_ethtool_ops = {
.get_fecparam = otx2_get_fecparam,
.set_fecparam = otx2_set_fecparam,
.get_link_ksettings = otx2_get_link_ksettings,
+ .set_link_ksettings = otx2_set_link_ksettings,
};
void otx2_set_ethtool_ops(struct net_device *netdev)
--
2.7.4
[net-next PATCH 5/7] octeontx2-af: advertised link modes support on cgx
From: Christina Jacob
CGX supports setting advertised link modes on physical link.
This patch adds support to derive cgx mode from ethtool
link mode and pass it to firmware to configure the same.
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 110 -
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 32 +-
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 3 +-
3 files changed, 142 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 42ee67e..cc90a0b 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -644,6 +645,7 @@ static inline void cgx_link_usertable_init(void)
cgx_speed_mbps[CGX_LINK_25G] = 25000;
cgx_speed_mbps[CGX_LINK_40G] = 4;
cgx_speed_mbps[CGX_LINK_50G] = 5;
+ cgx_speed_mbps[CGX_LINK_80G] = 8;
cgx_speed_mbps[CGX_LINK_100G] = 10;
cgx_lmactype_string[LMAC_MODE_SGMII] = "SGMII";
@@ -691,6 +693,107 @@ static inline int cgx_link_usertable_index_map(int speed)
return CGX_LINK_NONE;
}
+static void set_mod_args(struct cgx_set_link_mode_args *args,
+u32 speed, u8 duplex, u8 autoneg, u64 mode)
+{
+ if (args->duplex == DUPLEX_UNKNOWN)
+ args->duplex = duplex;
+ if (args->speed == SPEED_UNKNOWN)
+ args->speed = speed;
+ if (args->an == AUTONEG_UNKNOWN)
+ args->an = autoneg;
+ args->mode = mode;
+ args->ports = 0;
+}
+
+static void otx2_map_ethtool_link_modes(u64 bitmask,
+ struct cgx_set_link_mode_args *args)
+{
+ switch (bitmask) {
+ case BIT_ULL(ETHTOOL_LINK_MODE_10baseT_Half_BIT):
+ set_mod_args(args, 10, 1, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_10baseT_Full_BIT):
+ set_mod_args(args, 10, 0, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_100baseT_Half_BIT):
+ set_mod_args(args, 100, 1, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_100baseT_Full_BIT):
+ set_mod_args(args, 100, 0, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_1000baseT_Half_BIT):
+ set_mod_args(args, 1000, 1, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_1000baseT_Full_BIT):
+ set_mod_args(args, 1000, 0, 1, BIT_ULL(CGX_MODE_SGMII));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_1000baseX_Full_BIT):
+ set_mod_args(args, 1000, 0, 0, BIT_ULL(CGX_MODE_1000_BASEX));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_1baseT_Full_BIT):
+ set_mod_args(args, 1000, 0, 1, BIT_ULL(CGX_MODE_QSGMII));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_1baseSR_Full_BIT):
+ set_mod_args(args, 1, 0, 0, BIT_ULL(CGX_MODE_10G_C2C));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_1baseLR_Full_BIT):
+ set_mod_args(args, 1, 0, 0, BIT_ULL(CGX_MODE_10G_C2M));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_1baseKR_Full_BIT):
+ set_mod_args(args, 1, 0, 1, BIT_ULL(CGX_MODE_10G_KR));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT):
+ set_mod_args(args, 25000, 0, 0, BIT_ULL(CGX_MODE_25G_C2C));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT):
+ set_mod_args(args, 25000, 0, 1, BIT_ULL(CGX_MODE_25G_CR));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT):
+ set_mod_args(args, 25000, 0, 1, BIT_ULL(CGX_MODE_25G_KR));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_4baseSR4_Full_BIT):
+ set_mod_args(args, 4, 0, 0, BIT_ULL(CGX_MODE_40G_C2C));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_4baseLR4_Full_BIT):
+ set_mod_args(args, 4, 0, 0, BIT_ULL(CGX_MODE_40G_C2M));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_4baseCR4_Full_BIT):
+ set_mod_args(args, 4, 0, 1, BIT_ULL(CGX_MODE_40G_CR4));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_4baseKR4_Full_BIT):
+ set_mod_args(args, 4, 0, 1, BIT_ULL(CGX_MODE_40G_KR4));
+ break;
+ case BIT_ULL(ETHTOOL_LINK_MODE_5baseSR_Full_BIT):
+ set_mod_args(args, 500
[net-next PATCH 2/7] octeontx2-af: Add new CGX_CMD to get PHY FEC statistics
From: Felix Manlunas
This patch adds support to fetch fec stats from PHY. The stats are
put in the shared data struct fwdata. A PHY driver indicates
that it has FEC stats by setting the flag fwdata.phy.misc.has_fec_stats
Besides CGX_CMD_GET_PHY_FEC_STATS, also add CGX_CMD_PRBS and
CGX_CMD_DISPLAY_EYE to enum cgx_cmd_id so that Linux's enum list is in sync
with firmware's enum list.
Signed-off-by: Felix Manlunas
Signed-off-by: Christina Jacob
Signed-off-by: Sunil Kovvuri Goutham
Signed-off-by: Hariprasad Kelam
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 12 ++
drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 1 +
.../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 5 +++
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 43 ++
drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 4 ++
.../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 32
6 files changed, 97 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 5489dab..b3ae84c 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -859,6 +859,18 @@ int cgx_set_fec(u64 fec, int cgx_id, int lmac_id)
return err;
}
+int cgx_get_phy_fec_stats(void *cgxd, int lmac_id)
+{
+ struct cgx *cgx = cgxd;
+ u64 req = 0, resp;
+
+ if (!cgx)
+ return -ENODEV;
+
+ req = FIELD_SET(CMDREG_ID, CGX_CMD_GET_PHY_FEC_STATS, req);
+ return cgx_fwi_cmd_generic(req, , cgx, lmac_id);
+}
+
static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool enable)
{
u64 req = 0;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index 1824e95..c5294b7 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -154,5 +154,6 @@ void cgx_lmac_ptp_config(void *cgxd, int lmac_id, bool
enable);
u8 cgx_lmac_get_p2x(int cgx_id, int lmac_id);
int cgx_set_fec(u64 fec, int cgx_id, int lmac_id);
int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp);
+int cgx_get_phy_fec_stats(void *cgxd, int lmac_id);
#endif /* CGX_H */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
b/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
index 3485596..65f832a 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
@@ -89,6 +89,11 @@ enum cgx_cmd_id {
CGX_CMD_SET_AN,
CGX_CMD_GET_ADV_LINK_MODES,
CGX_CMD_GET_ADV_FEC,
+ CGX_CMD_GET_PHY_MOD_TYPE, /* line-side modulation type: NRZ or PAM4 */
+ CGX_CMD_SET_PHY_MOD_TYPE,
+ CGX_CMD_PRBS,
+ CGX_CMD_DISPLAY_EYE,
+ CGX_CMD_GET_PHY_FEC_STATS,
};
/* async event ids */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index 088ccd1..c17e374 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -151,6 +151,8 @@ M(CGX_CFG_PAUSE_FRM,0x20E, cgx_cfg_pause_frm,
cgx_pause_frm_cfg,\
cgx_pause_frm_cfg) \
M(CGX_FEC_SET, 0x210, cgx_set_fec_param, fec_mode, fec_mode) \
M(CGX_FEC_STATS, 0x211, cgx_fec_stats, msg_req, cgx_fec_stats_rsp) \
+M(CGX_GET_PHY_FEC_STATS, 0x212, cgx_get_phy_fec_stats, msg_req, msg_rsp) \
+M(CGX_FW_DATA_GET, 0x213, cgx_get_aux_link_info, msg_req, cgx_fw_data) \
/* NPA mbox IDs (range 0x400 - 0x5FF) */ \
/* NPA mbox IDs (range 0x400 - 0x5FF) */ \
M(NPA_LF_ALLOC,0x400, npa_lf_alloc,
\
@@ -411,6 +413,47 @@ struct fec_mode {
int fec;
};
+struct sfp_eeprom_s {
+#define SFP_EEPROM_SIZE 256
+ u16 sff_id;
+ u8 buf[SFP_EEPROM_SIZE];
+ u64 reserved;
+};
+
+struct phy_s {
+ struct {
+ u64 can_change_mod_type : 1;
+ u64 mod_type: 1;
+ u64 has_fec_stats : 1;
+ } misc;
+ struct fec_stats_s {
+ u32 rsfec_corr_cws;
+ u32 rsfec_uncorr_cws;
+ u32 brfec_corr_blks;
+ u32 brfec_uncorr_blks;
+ } fec_stats;
+};
+
+struct cgx_lmac_fwdata_s {
+ u16 rw_valid;
+ u64 supported_fec;
+ u64 supported_an;
+ u64 supported_link_modes;
+ /* only applicable if AN is supported */
+ u64 advertised_fec;
+ u64 advertised_link_modes;
+ /* Only applicable if SFP/QSFP slot is present */
+ struct sfp_eeprom_s sfp_eeprom;
+ struct phy_s phy;
+#define LMAC_FWDATA_RESERVED_MEM 1021
+ u64 reserved[LMAC_FWDATA_RESERVED_MEM];
+};
+
+struct cgx_fw_data {
+ struct mbox_msghdr hdr
[net-next PATCH 0/7] ethtool support for fec and link configuration
This series of patches add support for forward error correction(fec) and physical link configuration. Patches 1&2 adds necessary mbox handlers for fec mode configuration request and to fetch stats. Patch 3 registers driver callbacks for fec mode configuration and display. Patch 4&5 adds support of mbox handlers for configuring link parameters like speed/duplex and autoneg etc. Patche 6&7 registers driver callbacks for physical link configuration. Christina Jacob (6): octeontx2-af: forward error correction configuration octeontx2-pf: ethtool fec mode support octeontx2-af: Physical link configuration support octeontx2-af: advertised link modes support on cgx octeontx2-pf: ethtool physical link status octeontx2-pf: ethtool physical link configuration Felix Manlunas (1): octeontx2-af: Add new CGX_CMD to get PHY FEC statistics drivers/net/ethernet/marvell/octeontx2/af/cgx.c| 254 +- drivers/net/ethernet/marvell/octeontx2/af/cgx.h| 10 + .../net/ethernet/marvell/octeontx2/af/cgx_fw_if.h | 70 +++- drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 87 - drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 4 + .../net/ethernet/marvell/octeontx2/af/rvu_cgx.c| 84 + .../ethernet/marvell/octeontx2/nic/otx2_common.c | 23 ++ .../ethernet/marvell/octeontx2/nic/otx2_common.h | 6 + .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 390 - .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 3 + 10 files changed, 924 insertions(+), 7 deletions(-) -- 2.7.4
[PATCH] staging: rtl8723bs: core: Remove unneeded declaration WFD_OUI
Remove unneeded declaration "extern unsigned char WFD_OUI"
Signed-off-by: Hariprasad Kelam
---
drivers/staging/rtl8723bs/core/rtw_ap.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/staging/rtl8723bs/core/rtw_ap.c
b/drivers/staging/rtl8723bs/core/rtw_ap.c
index 02f5478..6d18d23 100644
--- a/drivers/staging/rtl8723bs/core/rtw_ap.c
+++ b/drivers/staging/rtl8723bs/core/rtw_ap.c
@@ -13,7 +13,6 @@ extern unsigned char RTW_WPA_OUI[];
extern unsigned char WMM_OUI[];
extern unsigned char WPS_OUI[];
extern unsigned char P2P_OUI[];
-extern unsigned char WFD_OUI[];
void init_mlme_ap_info(struct adapter *padapter)
{
--
2.7.4
[PATCH] staging: rtl8192u: Add NULL check post kzalloc
Collect returns status of kzalloc.
Signed-off-by: Hariprasad Kelam
---
drivers/staging/rtl8192u/r8192U_core.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/rtl8192u/r8192U_core.c
b/drivers/staging/rtl8192u/r8192U_core.c
index fe1f279..3240442 100644
--- a/drivers/staging/rtl8192u/r8192U_core.c
+++ b/drivers/staging/rtl8192u/r8192U_core.c
@@ -2096,7 +2096,7 @@ static void rtl8192_SetWirelessMode(struct net_device
*dev, u8 wireless_mode)
}
/* init priv variables here. only non_zero value should be initialized here. */
-static void rtl8192_init_priv_variable(struct net_device *dev)
+static int rtl8192_init_priv_variable(struct net_device *dev)
{
struct r8192_priv *priv = ieee80211_priv(dev);
u8 i;
@@ -2223,6 +2223,8 @@ static void rtl8192_init_priv_variable(struct net_device
*dev)
priv->AcmControl = 0;
priv->pFirmware = kzalloc(sizeof(rt_firmware), GFP_KERNEL);
+ if (!priv->pFirmware)
+ return -ENOMEM;
/* rx related queue */
skb_queue_head_init(>rx_queue);
@@ -2236,6 +2238,8 @@ static void rtl8192_init_priv_variable(struct net_device
*dev)
for (i = 0; i < MAX_QUEUE_SIZE; i++)
skb_queue_head_init(>ieee80211->skb_drv_aggQ[i]);
priv->rf_set_chan = rtl8192_phy_SwChnl;
+
+ return 0;
}
/* init lock here */
@@ -2605,7 +2609,11 @@ static short rtl8192_init(struct net_device *dev)
memcpy(priv->txqueue_to_outpipemap, queuetopipe, 9);
}
#endif
- rtl8192_init_priv_variable(dev);
+ err = rtl8192_init_priv_variable(dev);
+ if (err) {
+ DMESG("init private variables failed");
+ return err;
+ }
rtl8192_init_priv_lock(priv);
rtl8192_init_priv_task(dev);
rtl8192_get_eeprom_size(dev);
--
2.7.4
[Patch v2] staging: rtl8192e: Make use kmemdup
As kmemdup API does kmalloc + memcpy . We can make use of it instead of
calling kmalloc and memcpy independetly.
Signed-off-by: Hariprasad Kelam
---
v2 - remove the netdev_info() uses for allocation failures
drivers/staging/rtl8192e/rtllib_softmac.c | 24 +++-
1 file changed, 7 insertions(+), 17 deletions(-)
diff --git a/drivers/staging/rtl8192e/rtllib_softmac.c
b/drivers/staging/rtl8192e/rtllib_softmac.c
index e29e8d6..f2f7529 100644
--- a/drivers/staging/rtl8192e/rtllib_softmac.c
+++ b/drivers/staging/rtl8192e/rtllib_softmac.c
@@ -1382,15 +1382,10 @@ rtllib_association_req(struct rtllib_network *beacon,
ieee->assocreq_ies = NULL;
ies = &(hdr->info_element[0].id);
ieee->assocreq_ies_len = (skb->data + skb->len) - ies;
- ieee->assocreq_ies = kmalloc(ieee->assocreq_ies_len, GFP_ATOMIC);
- if (ieee->assocreq_ies)
- memcpy(ieee->assocreq_ies, ies, ieee->assocreq_ies_len);
- else {
- netdev_info(ieee->dev,
- "%s()Warning: can't alloc memory for
assocreq_ies\n",
- __func__);
+ ieee->assocreq_ies = kmemdup(ies, ieee->assocreq_ies_len, GFP_ATOMIC);
+ if (!ieee->assocreq_ies)
ieee->assocreq_ies_len = 0;
- }
+
return skb;
}
@@ -2259,17 +2254,12 @@ rtllib_rx_assoc_resp(struct rtllib_device *ieee, struct
sk_buff *skb,
ieee->assocresp_ies = NULL;
ies = &(assoc_resp->info_element[0].id);
ieee->assocresp_ies_len = (skb->data + skb->len) - ies;
- ieee->assocresp_ies = kmalloc(ieee->assocresp_ies_len,
+ ieee->assocresp_ies = kmemdup(ies,
+ ieee->assocresp_ies_len,
GFP_ATOMIC);
- if (ieee->assocresp_ies)
- memcpy(ieee->assocresp_ies, ies,
- ieee->assocresp_ies_len);
- else {
- netdev_info(ieee->dev,
- "%s()Warning: can't alloc memory
for assocresp_ies\n",
- __func__);
+ if (!ieee->assocresp_ies)
ieee->assocresp_ies_len = 0;
- }
+
rtllib_associate_complete(ieee);
} else {
/* aid could not been allocated */
--
2.7.4
Re: [PATCH] staging: rtl8192e: Make use kmemdup
On Sat, Aug 03, 2019 at 10:52:04AM -0700, Joe Perches wrote:
> On Sat, 2019-08-03 at 23:10 +0530, Hariprasad Kelam wrote:
> > As kmemdup API does kmalloc + memcpy . We can make use of it instead of
> > calling kmalloc and memcpy independetly.
> []
> > diff --git a/drivers/staging/rtl8192e/rtllib_softmac.c
> > b/drivers/staging/rtl8192e/rtllib_softmac.c
> []
> > @@ -1382,10 +1382,8 @@ rtllib_association_req(struct rtllib_network *beacon,
> > ieee->assocreq_ies = NULL;
> > ies = &(hdr->info_element[0].id);
> > ieee->assocreq_ies_len = (skb->data + skb->len) - ies;
> > - ieee->assocreq_ies = kmalloc(ieee->assocreq_ies_len, GFP_ATOMIC);
> > - if (ieee->assocreq_ies)
> > - memcpy(ieee->assocreq_ies, ies, ieee->assocreq_ies_len);
> > - else {
> > + ieee->assocreq_ies = kmemdup(ies, ieee->assocreq_ies_len, GFP_ATOMIC);
> > + if (!ieee->assocreq_ies) {
> > netdev_info(ieee->dev,
> > "%s()Warning: can't alloc memory for
> > assocreq_ies\n",
> > __func__);
> > @@ -2259,12 +2257,10 @@ rtllib_rx_assoc_resp(struct rtllib_device *ieee,
> > struct sk_buff *skb,
> > ieee->assocresp_ies = NULL;
> > ies = &(assoc_resp->info_element[0].id);
> > ieee->assocresp_ies_len = (skb->data + skb->len) - ies;
> > - ieee->assocresp_ies = kmalloc(ieee->assocresp_ies_len,
> > + ieee->assocresp_ies = kmemdup(ies,
> > + ieee->assocresp_ies_len,
> > GFP_ATOMIC);
> > - if (ieee->assocresp_ies)
> > - memcpy(ieee->assocresp_ies, ies,
> > - ieee->assocresp_ies_len);
> > - else {
> > + if (!ieee->assocresp_ies) {
> > netdev_info(ieee->dev,
> > "%s()Warning: can't alloc memory
> > for assocresp_ies\n",
> > __func__);
>
> Could also remove the netdev_info() uses for allocation failures.
> These are redundant as a dump_stack() is already done when OOM.
>
Sure will do.
Thanks,
Hariprasad k
[PATCH] staging: rtl8192e: Make use kmemdup
As kmemdup API does kmalloc + memcpy . We can make use of it instead of
calling kmalloc and memcpy independetly.
Signed-off-by: Hariprasad Kelam
---
drivers/staging/rtl8192e/rtllib_softmac.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/drivers/staging/rtl8192e/rtllib_softmac.c
b/drivers/staging/rtl8192e/rtllib_softmac.c
index e29e8d6..9b8b301 100644
--- a/drivers/staging/rtl8192e/rtllib_softmac.c
+++ b/drivers/staging/rtl8192e/rtllib_softmac.c
@@ -1382,10 +1382,8 @@ rtllib_association_req(struct rtllib_network *beacon,
ieee->assocreq_ies = NULL;
ies = &(hdr->info_element[0].id);
ieee->assocreq_ies_len = (skb->data + skb->len) - ies;
- ieee->assocreq_ies = kmalloc(ieee->assocreq_ies_len, GFP_ATOMIC);
- if (ieee->assocreq_ies)
- memcpy(ieee->assocreq_ies, ies, ieee->assocreq_ies_len);
- else {
+ ieee->assocreq_ies = kmemdup(ies, ieee->assocreq_ies_len, GFP_ATOMIC);
+ if (!ieee->assocreq_ies) {
netdev_info(ieee->dev,
"%s()Warning: can't alloc memory for
assocreq_ies\n",
__func__);
@@ -2259,12 +2257,10 @@ rtllib_rx_assoc_resp(struct rtllib_device *ieee, struct
sk_buff *skb,
ieee->assocresp_ies = NULL;
ies = &(assoc_resp->info_element[0].id);
ieee->assocresp_ies_len = (skb->data + skb->len) - ies;
- ieee->assocresp_ies = kmalloc(ieee->assocresp_ies_len,
+ ieee->assocresp_ies = kmemdup(ies,
+ ieee->assocresp_ies_len,
GFP_ATOMIC);
- if (ieee->assocresp_ies)
- memcpy(ieee->assocresp_ies, ies,
- ieee->assocresp_ies_len);
- else {
+ if (!ieee->assocresp_ies) {
netdev_info(ieee->dev,
"%s()Warning: can't alloc memory
for assocresp_ies\n",
__func__);
--
2.7.4
[Patch v2 10/10] staging: rtl8723bs: core: Remove Macro "IS_MAC_ADDRESS_BROADCAST"
Remove unused macro IS_MAC_ADDRESS_BROADCAST. In future if one wants use
it ,use generic API "is_broadcast_ether_addr"
Signed-off-by: Hariprasad Kelam
---
v2 - Add patch number
drivers/staging/rtl8723bs/core/rtw_ioctl_set.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/staging/rtl8723bs/core/rtw_ioctl_set.c
b/drivers/staging/rtl8723bs/core/rtw_ioctl_set.c
index 8eb0ff5..eb08569 100644
--- a/drivers/staging/rtl8723bs/core/rtw_ioctl_set.c
+++ b/drivers/staging/rtl8723bs/core/rtw_ioctl_set.c
@@ -9,13 +9,6 @@
#include
#include
-#define IS_MAC_ADDRESS_BROADCAST(addr) \
-(\
- ((addr[0] == 0xff) && (addr[1] == 0xff) && \
- (addr[2] == 0xff) && (addr[3] == 0xff) && \
- (addr[4] == 0xff) && (addr[5] == 0xff)) ? true : false \
-)
-
u8 rtw_validate_bssid(u8 *bssid)
{
u8 ret = true;
--
2.7.4
[Patch v2 09/10] staging: rtl8723bs: core: Remove unneeded variables sgi_20m,sgi_40m and sgi_80m
htpriv.sgi_* variables are of type u8 ,instead of storing them in local
variables ,its better to read value directly from structure.
Signed-off-by: Hariprasad Kelam
---
v2 - Add patch number
drivers/staging/rtl8723bs/core/rtw_xmit.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/staging/rtl8723bs/core/rtw_xmit.c
b/drivers/staging/rtl8723bs/core/rtw_xmit.c
index b5dcb78..0690d5e 100644
--- a/drivers/staging/rtl8723bs/core/rtw_xmit.c
+++ b/drivers/staging/rtl8723bs/core/rtw_xmit.c
@@ -346,21 +346,18 @@ void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv)
u8 query_ra_short_GI(struct sta_info *psta)
{
- u8 sgi = false, sgi_20m = false, sgi_40m = false, sgi_80m = false;
-
- sgi_20m = psta->htpriv.sgi_20m;
- sgi_40m = psta->htpriv.sgi_40m;
+ u8 sgi = false;
switch (psta->bw_mode) {
case CHANNEL_WIDTH_80:
- sgi = sgi_80m;
+ sgi = false;
break;
case CHANNEL_WIDTH_40:
- sgi = sgi_40m;
+ sgi = psta->htpriv.sgi_40m;
break;
case CHANNEL_WIDTH_20:
default:
- sgi = sgi_20m;
+ sgi = psta->htpriv.sgi_20m;
break;
}
--
2.7.4
[Patch v2 08/10] staging: rtl8723bs: core: Remove unneeded extern WFD_OUI
Remove unneeded extern variable "extern unsigned char WFD_OUI"
Signed-off-by: Hariprasad Kelam
---
v2 - Add patch number
drivers/staging/rtl8723bs/core/rtw_ap.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/staging/rtl8723bs/core/rtw_ap.c
b/drivers/staging/rtl8723bs/core/rtw_ap.c
index 7bd5c61..2bb20762 100644
--- a/drivers/staging/rtl8723bs/core/rtw_ap.c
+++ b/drivers/staging/rtl8723bs/core/rtw_ap.c
@@ -13,7 +13,6 @@ extern unsigned char RTW_WPA_OUI[];
extern unsigned char WMM_OUI[];
extern unsigned char WPS_OUI[];
extern unsigned char P2P_OUI[];
-extern unsigned char WFD_OUI[];
void init_mlme_ap_info(struct adapter *padapter)
{
--
2.7.4
[Patch v2 07/10] staging: rtl8723bs: Remove unneeded function argument for init_addba_retry_timer
init_addba_retry_timer does not use padapter, so only keep psta
Signed-off-by: Hariprasad Kelam
---
v2 - Add patch number
drivers/staging/rtl8723bs/core/rtw_sta_mgt.c | 2 +-
drivers/staging/rtl8723bs/include/rtw_mlme_ext.h | 2 +-
drivers/staging/rtl8723bs/os_dep/mlme_linux.c| 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/rtl8723bs/core/rtw_sta_mgt.c
b/drivers/staging/rtl8723bs/core/rtw_sta_mgt.c
index bdc52d8..39c3482 100644
--- a/drivers/staging/rtl8723bs/core/rtw_sta_mgt.c
+++ b/drivers/staging/rtl8723bs/core/rtw_sta_mgt.c
@@ -262,7 +262,7 @@ struct sta_info *rtw_alloc_stainfo(struct
sta_priv *pstapriv, u8 *hwaddr)
)
);
- init_addba_retry_timer(pstapriv->padapter, psta);
+ init_addba_retry_timer(psta);
/* for A-MPDU Rx reordering buffer control */
for (i = 0; i < 16 ; i++) {
diff --git a/drivers/staging/rtl8723bs/include/rtw_mlme_ext.h
b/drivers/staging/rtl8723bs/include/rtw_mlme_ext.h
index fd3cf95..bdbf15f 100644
--- a/drivers/staging/rtl8723bs/include/rtw_mlme_ext.h
+++ b/drivers/staging/rtl8723bs/include/rtw_mlme_ext.h
@@ -539,7 +539,7 @@ void init_mlme_ext_priv(struct adapter *padapter);
int init_hw_mlme_ext(struct adapter *padapter);
void free_mlme_ext_priv (struct mlme_ext_priv *pmlmeext);
extern void init_mlme_ext_timer(struct adapter *padapter);
-extern void init_addba_retry_timer(struct adapter *padapter, struct sta_info
*psta);
+extern void init_addba_retry_timer(struct sta_info *psta);
extern struct xmit_frame *alloc_mgtxmitframe(struct xmit_priv *pxmitpriv);
/* void fill_fwpriv(struct adapter *padapter, struct fw_priv *pfwpriv); */
diff --git a/drivers/staging/rtl8723bs/os_dep/mlme_linux.c
b/drivers/staging/rtl8723bs/os_dep/mlme_linux.c
index 52a5b31..038036d 100644
--- a/drivers/staging/rtl8723bs/os_dep/mlme_linux.c
+++ b/drivers/staging/rtl8723bs/os_dep/mlme_linux.c
@@ -179,7 +179,7 @@ void rtw_report_sec_ie(struct adapter *adapter, u8
authmode, u8 *sec_ie)
}
}
-void init_addba_retry_timer(struct adapter *padapter, struct sta_info *psta)
+void init_addba_retry_timer(struct sta_info *psta)
{
timer_setup(>addba_retry_timer, addba_timer_hdl, 0);
}
--
2.7.4
[Patch v2 06/10] staging: rtl8723bs: os_dep: Remove unused defines related to combo scan
Remove below defines WEXT_CSCAN_AMOUNT WEXT_CSCAN_BUF_LEN WEXT_CSCAN_NPROBE_SECTION Signed-off-by: Hariprasad Kelam --- v2 - Add patch number drivers/staging/rtl8723bs/os_dep/ioctl_linux.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c b/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c index 99e6b10..73b412e 100644 --- a/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c +++ b/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c @@ -21,13 +21,10 @@ #define RATE_COUNT 4 /* combo scan */ -#define WEXT_CSCAN_AMOUNT 9 -#define WEXT_CSCAN_BUF_LEN 360 #define WEXT_CSCAN_HEADER "CSCAN S\x01\x00\x00S\x00" #define WEXT_CSCAN_HEADER_SIZE 12 #define WEXT_CSCAN_SSID_SECTION'S' #define WEXT_CSCAN_CHANNEL_SECTION 'C' -#define WEXT_CSCAN_NPROBE_SECTION 'N' #define WEXT_CSCAN_ACTV_DWELL_SECTION 'A' #define WEXT_CSCAN_PASV_DWELL_SECTION 'P' #define WEXT_CSCAN_HOME_DWELL_SECTION 'H' -- 2.7.4
[Patch v2 05/10] staging: rtl8723bs: os_dep: Remove unused defines
Remove below unused defines RTW_CH_MAX_2G_CHANNEL rtw_a_rates
RTW_A_RATES_NUM RTW_5G_CHANNELS_NUM
Signed-off-by: Hariprasad Kelam
---
v2 - Add patch number
drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c
b/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c
index 9bc6856..30165ca 100644
--- a/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c
+++ b/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c
@@ -19,8 +19,6 @@
#define RTW_MAX_REMAIN_ON_CHANNEL_DURATION 5000 /* ms */
#define RTW_MAX_NUM_PMKIDS 4
-#define RTW_CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band
*/
-
static const u32 rtw_cipher_suites[] = {
WLAN_CIPHER_SUITE_WEP40,
WLAN_CIPHER_SUITE_WEP104,
@@ -73,13 +71,10 @@ static struct ieee80211_rate rtw_rates[] = {
RATETAB_ENT(540, 0x800, 0),
};
-#define rtw_a_rates(rtw_rates + 4)
-#define RTW_A_RATES_NUM8
#define rtw_g_rates(rtw_rates + 0)
#define RTW_G_RATES_NUM12
#define RTW_2G_CHANNELS_NUM 14
-#define RTW_5G_CHANNELS_NUM 37
static struct ieee80211_channel rtw_2ghz_channels[] = {
CHAN2G(1, 2412, 0),
--
2.7.4
[Patch v2 04/10] staging: rtl8723bs: hal: Remove function argument padapter
Remove function argument "padapter" in rtl8723bs_init_recv_priv function
as its not being used
Signed-off-by: Hariprasad Kelam
---
v4 - Add patch number
drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c | 4 ++--
drivers/staging/rtl8723bs/include/recv_osdep.h | 2 +-
drivers/staging/rtl8723bs/os_dep/recv_linux.c | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c
b/drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c
index 032d018..7fbe6c6 100644
--- a/drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c
+++ b/drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c
@@ -479,7 +479,7 @@ s32 rtl8723bs_init_recv_priv(struct adapter *padapter)
precvpriv->free_recv_buf_queue_cnt = 0;
for (i = 0; i < n ; i++) {
list_del_init(>list);
- rtw_os_recvbuf_resource_free(padapter, precvbuf);
+ rtw_os_recvbuf_resource_free(precvbuf);
precvbuf++;
}
precvpriv->precv_buf = NULL;
@@ -518,7 +518,7 @@ void rtl8723bs_free_recv_priv(struct adapter *padapter)
precvpriv->free_recv_buf_queue_cnt = 0;
for (i = 0; i < n ; i++) {
list_del_init(>list);
- rtw_os_recvbuf_resource_free(padapter, precvbuf);
+ rtw_os_recvbuf_resource_free(precvbuf);
precvbuf++;
}
precvpriv->precv_buf = NULL;
diff --git a/drivers/staging/rtl8723bs/include/recv_osdep.h
b/drivers/staging/rtl8723bs/include/recv_osdep.h
index 1056f61..47689f6 100644
--- a/drivers/staging/rtl8723bs/include/recv_osdep.h
+++ b/drivers/staging/rtl8723bs/include/recv_osdep.h
@@ -29,7 +29,7 @@ void rtw_os_recv_resource_free(struct recv_priv *precvpriv);
void rtw_os_free_recvframe(union recv_frame *precvframe);
-void rtw_os_recvbuf_resource_free(struct adapter *padapter, struct recv_buf
*precvbuf);
+void rtw_os_recvbuf_resource_free(struct recv_buf *precvbuf);
_pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, u16 nSubframe_Length,
u8 *pdata);
void rtw_os_recv_indicate_pkt(struct adapter *padapter, _pkt *pkt, struct
rx_pkt_attrib *pattrib);
diff --git a/drivers/staging/rtl8723bs/os_dep/recv_linux.c
b/drivers/staging/rtl8723bs/os_dep/recv_linux.c
index 643cacc..a5070fb 100644
--- a/drivers/staging/rtl8723bs/os_dep/recv_linux.c
+++ b/drivers/staging/rtl8723bs/os_dep/recv_linux.c
@@ -43,7 +43,7 @@ void rtw_os_recv_resource_free(struct recv_priv *precvpriv)
}
/* free os related resource in struct recv_buf */
-void rtw_os_recvbuf_resource_free(struct adapter *padapter, struct recv_buf
*precvbuf)
+void rtw_os_recvbuf_resource_free(struct recv_buf *precvbuf)
{
if (precvbuf->pskb) {
dev_kfree_skb_any(precvbuf->pskb);
--
2.7.4
[Patch v2 03/10] staging: rtl8723bs: os_dep: Remove unused function argument sdio_device_id
Remove passing pdid as function argument to rtw_sdio_if1_init as it is
not being used
Signed-off-by: Hariprasad Kelam
---
v3 - Add patch number
drivers/staging/rtl8723bs/os_dep/sdio_intf.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/rtl8723bs/os_dep/sdio_intf.c
b/drivers/staging/rtl8723bs/os_dep/sdio_intf.c
index 540a7ee..cefff1e 100644
--- a/drivers/staging/rtl8723bs/os_dep/sdio_intf.c
+++ b/drivers/staging/rtl8723bs/os_dep/sdio_intf.c
@@ -315,7 +315,7 @@ static void sd_intf_stop(struct adapter *padapter)
}
-static struct adapter *rtw_sdio_if1_init(struct dvobj_priv *dvobj, const
struct sdio_device_id *pdid)
+static struct adapter *rtw_sdio_if1_init(struct dvobj_priv *dvobj)
{
int status = _FAIL;
struct net_device *pnetdev;
@@ -473,7 +473,7 @@ static int rtw_drv_init(
goto exit;
}
- if1 = rtw_sdio_if1_init(dvobj, id);
+ if1 = rtw_sdio_if1_init(dvobj);
if (if1 == NULL) {
DBG_871X("rtw_init_primarystruct adapter Failed!\n");
goto free_dvobj;
--
2.7.4
