897f739d7b ("of/address: Add infrastructure to declare MMIO as non-posted")
(and maybe some others)
I have reverted 86332e9e3477..7d2d16ccf15d for today.
This is fixed in ea9629283839 in the soc tree, which went in a few hours
ago. Sorry for the noise.
--
Hector Martin (mar...@marcan.st)
Public
information on the project:
https://asahilinux.org/
Signed-off-by: Hector Martin
Arnd Bergmann (1):
docs: driver-api: device-io: Document I/O access functions
Hector Martin (17):
dt-bindings: vendor-prefixes: Add apple prefix
On 08/04/2021 06.09, Will Deacon wrote:
Couple of stale comment nits:
[...]
But with that:
Acked-by: Will Deacon
Fixed those for the PR, thanks!
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
:
return ioremap_np(offset, size) ?: ioremap(offset, size);
Today I learned that this one is kosher in kernel code. Handy! Let's go
with that.
Acked-by: Will Deacon
Thanks!
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On 07/04/2021 03.16, Marc Zyngier wrote:
Hi Hector,
On Fri, 02 Apr 2021 10:05:39 +0100,
Hector Martin wrote:
+ /*
+* In EL1 the non-redirected registers are the guest's,
+* not EL2's, so remap the hwirqs to match
for pointing it out.
With that,
Reviewed-by: Rob Herring
Thanks!
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
This currently supports:
* SMP (via spin-tables)
* AIC IRQs
* Serial (with earlycon)
* Framebuffer
A number of properties are dynamic, and based on system firmware
decisions that vary from version to version. These are expected
to be filled in by the loader.
Signed-off-by: Hector Martin
Apple SoCs run firmware that sets up a simplefb-compatible framebuffer
for us. Add a compatible for it, and two missing supported formats.
Reviewed-by: Rob Herring
Reviewed-by: Linus Walleij
Signed-off-by: Hector Martin
---
.../devicetree/bindings/display/simple-framebuffer.yaml | 5
This adds a Kconfig option to toggle support for Apple ARM SoCs.
At this time this targets the M1 and later "Apple Silicon" Mac SoCs.
Signed-off-by: Hector Martin
---
arch/arm64/Kconfig.platforms | 7 +++
arch/arm64/configs/defconfig | 1 +
2 files changed, 8 insertions(+)
).
* Implements a virtual IPI multiplexer to funnel multiple Linux IPIs
into a single hardware IPI
Signed-off-by: Hector Martin
---
MAINTAINERS | 2 +
drivers/irqchip/Kconfig | 8 +
drivers/irqchip/Makefile| 1 +
drivers/irqchip/irq-apple-aic.c | 837
AIC is the Apple Interrupt Controller found on Apple ARM SoCs, such as
the M1.
Reviewed-by: Linus Walleij
Reviewed-by: Rob Herring
Signed-off-by: Hector Martin
---
.../interrupt-controller/apple,aic.yaml | 88 +++
MAINTAINERS | 1
These definitions are in arm-gic-v3.h for historical reasons which no
longer apply. Move them to sysreg.h so the AIC driver can use them, as
it needs to peek into vGIC registers to deal with the GIC maintentance
interrupt.
Acked-by: Marc Zyngier
Acked-by: Will Deacon
Signed-off-by: Hector
that support Apple ARM
platforms, as an optimization.
Reviewed-by: Linus Walleij
Signed-off-by: Hector Martin
---
drivers/of/address.c | 43 --
include/linux/of_address.h | 1 +
2 files changed, 42 insertions(+), 2 deletions(-)
diff --git a/drivers/of/address.c
the generic pci_remap_cfgspace() unconditional.
Signed-off-by: Hector Martin
---
arch/arm64/include/asm/io.h | 10 --
include/linux/io.h | 21 +
2 files changed, 13 insertions(+), 18 deletions(-)
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm
This is used on Apple ARM platforms, which require most MMIO
(except PCI devices) to be mapped as nGnRnE.
Acked-by: Marc Zyngier
Acked-by: Will Deacon
Signed-off-by: Hector Martin
---
arch/arm64/include/asm/io.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/include/asm/io.h b
This documents the newly introduced ioremap_np() along with all the
other common ioremap() variants, and some higher-level abstractions
available.
Reviewed-by: Linus Walleij
Signed-off-by: Hector Martin
---
Documentation/driver-api/device-io.rst | 218 +
1 file changed
From: Arnd Bergmann
This adds more detailed descriptions of the various read/write
primitives available for use with I/O memory/ports.
Reviewed-by: Linus Walleij
Signed-off-by: Arnd Bergmann
Signed-off-by: Hector Martin
---
Documentation/driver-api/device-io.rst | 138
Signed-off-by: Hector Martin
---
.../driver-api/driver-model/devres.rst| 1 +
arch/sparc/include/asm/io_64.h| 4
include/asm-generic/io.h | 22 ++-
include/asm-generic/iomap.h | 9
include/linux/io.h
Reviewed-by: Linus Walleij
Reviewed-by: Marc Zyngier
Signed-off-by: Hector Martin
---
drivers/clocksource/arm_arch_timer.c | 24 +---
include/clocksource/arm_arch_timer.h | 1 +
2 files changed, 22 insertions(+), 3 deletions(-)
diff --git a/drivers/clocksource
code can pick the right one.
This also adds the hyp-virt timer/interrupt, which was previously not
expressed in the fixed 4-interrupt form.
Reviewed-by: Linus Walleij
Acked-by: Marc Zyngier
Reviewed-by: Tony Lindgren
Signed-off-by: Hector Martin
---
.../bindings/timer/arm,arch_timer.yaml
The implementor will be used to condition the FIQ support quirk.
The specific CPU types are not used at the moment, but let's add them
for documentation purposes.
Acked-by: Will Deacon
Signed-off-by: Hector Martin
---
arch/arm64/include/asm/cputype.h | 6 ++
1 file changed, 6 insertions
These are the CPU cores in the "Apple Silicon" M1 SoC.
Reviewed-by: Rob Herring
Signed-off-by: Hector Martin
---
Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml
b/Documentation/
This introduces bindings for all three 2020 Apple M1 devices:
* apple,j274 - Mac mini (M1, 2020)
* apple,j293 - MacBook Pro (13-inch, M1, 2020)
* apple,j313 - MacBook Air (M1, 2020)
Reviewed-by: Linus Walleij
Reviewed-by: Rob Herring
Signed-off-by: Hector Martin
---
.../devicetree/bindings
This is different from the legacy AAPL prefix used on PPC, but
consensus is that we prefer `apple` for these new platforms.
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: Linus Walleij
Reviewed-by: Rob Herring
Signed-off-by: Hector Martin
---
Documentation/devicetree/bindings/vendor
of ioremap_np()
and removed arch-specific pci_remap_cfgspace override for arm64
(arm32 can come later)
* Replaced license in AIC bindings header with GPL-2.0+ OR MIT
* Other minor typo/style fixes
Arnd Bergmann (1):
docs: driver-api: device-io: Document I/O access functions
Hector Martin (17):
e hardware, and hope for the best :-)
Thanks,
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
int cpu;
+
+ if (hwirq > ic->nr_hw)
>= ?
Good catch, but this is actually obsolete. Higher IRQs go into the FIQ
irqchip, so this should never happen (it's a leftover from when they
were a single one). I'll remove it.
Ack on the other comments, thanks!
--
Hector Martin (mar..
the writel_relaxed() on
AIC_IPI_FLAG. On ARM it turns out it's not quite fully ordered, but the
acquire semantics of the read half are sufficient for this case, as they
guarantee the flags are always read after the FIQ has been ACKed.
Cheeers,
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
o do its own masking
behind the scenes anyway
Since you're using the masking in KVM after all, I'm tracking the mask
state in a percpu variable now. Also folded in your two minor bugfixes
from the KVM series. Cheers!
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
WARN.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
it
shouldn't be a big deal to refactor it all into one file again.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
() on 32-bit as well, and I would keep
that separate from this series.
Sounds good; I'm adding a patch to adjust the generic implementation and
remove the arm64 one in v4, and we can then complete the cleanup for
other arches later.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st
own secure system with
anti-rollback for retry counters, you should be heading in that directly
anyway.
And now Linux's RPMB code is useless because you're running the stack in
the secure monitor instead :-)
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
ell, just do something else with RPMB because
it's better than nothing"; just doing "something" doesn't make systems
more secure. There needs to be a specific, practical use case that we'd
be trying to solve with RPMB here.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On 11/03/2021 18.12, Arnd Bergmann wrote:
On Wed, Mar 10, 2021 at 6:01 PM Rob Herring wrote:
On Wed, Mar 10, 2021 at 1:27 AM Hector Martin wrote:
On 10/03/2021 07.06, Rob Herring wrote:
My main concern here is that this creates an inconsistency in the device
tree representation that only
provisioning model assumes a
typical OEM device production pipeline and integration with CPU fusing;
it isn't friendly to Linux hackers messing around with securing LUKS
unlock attempt counters.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
r way past screen
locks and passwords. Such devices exist, sadly.
If you're trying to protect against a "dumb" attack with a keyboard
emulator that doesn't consider access to physical storage, then you
don't need RPMB either; you can just put the PIN unlock counter in a
random file.
-
and available to any attacker.
So unless the kernel grows a subsystem/feature to enforce complex key
policies (with things like use counts, retry times, etc), I don't think
there's a place to integrate RPMB kernel-side. You still need a trusted
userspace tool to glue it all together.
--
Hector
On 10/03/2021 14.14, Sumit Garg wrote:
On Wed, 10 Mar 2021 at 02:47, Hector Martin wrote:
On 09/03/2021 01.20, Linus Walleij wrote:
I suppose it would be a bit brutal if the kernel would just go in and
appropriate any empty RPMB it finds, but I suspect it is the right way
to make use
ve.
Do you think we can get rid of the Apple-only optimization if we do
this? It would mean only looking at the parent during address
resolution, not recursing all the way to the top, so presumably the
performance impact would be quite minimal.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
or such, but rather
a way to prevent these attacks.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On 10/03/2021 01.37, Linus Walleij wrote:
On Thu, Mar 4, 2021 at 10:42 PM Hector Martin wrote:
Apple SoCs run firmware that sets up a simplefb-compatible framebuffer
for us. Add a compatible for it, and two missing supported formats.
Signed-off-by: Hector Martin
Reviewed-by: Linus Walleij
On 09/03/2021 00.35, Marc Zyngier wrote:
On Thu, 04 Mar 2021 21:38:52 +,
Hector Martin wrote:
This adds a Kconfig option to toggle support for Apple ARM SoCs.
At this time this targets the M1 and later "Apple Silicon" Mac SoCs.
Signed-off-by: Hector Martin
---
On 06/03/2021 00.51, Arnd Bergmann wrote:
On Fri, Mar 5, 2021 at 4:09 PM Andy Shevchenko
wrote:
On Fri, Mar 5, 2021 at 12:25 PM Linus Walleij wrote:
On Thu, Mar 4, 2021 at 10:40 PM Hector Martin wrote:
This documents the newly introduced ioremap_np() along with all the
other common
On 10/03/2021 01.11, Rob Herring wrote:
On Mon, Mar 8, 2021 at 3:42 PM Marc Zyngier wrote:
On Mon, 08 Mar 2021 20:38:41 +,
Rob Herring wrote:
On Fri, Mar 05, 2021 at 06:38:41AM +0900, Hector Martin wrote:
Not all platforms provide the same set of timers/interrupts, and Linux
only
the actual PCIe ops will
end up posted at the bus anyway)... how do we represent that? Declare
that another "nonposted-mmio" on the PCIe bus means "no, really, use
nonposted mmio for this"?
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
can do it like this. I
think we should still have the DT bindings and properties though (even
if not used), as they do describe the hardware properly, and in the
future we might want to use them instead of having a quirk.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
in the kernel use
plain ioremap variants that don't have any flags to look at.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
e to my eyes.
+#define APPLE_S5L_UTRSTAT_RXTHRESH (1<<4)
+#define APPLE_S5L_UTRSTAT_TXTHRESH (1<<5)
+#define APPLE_S5L_UTRSTAT_RXTO (1<<9)
+#define APPLE_S5L_UTRSTAT_ALL_FLAGS(0x3f0)
BIT() ?
See above.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
can't be allowed to touch, e.g. the SEP carveout). It
also breaks simplefb mapping the framebuffer. I thought of the
reserved-memory approach, but then figured it wouldn't buy us anything
for this reason.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
-> spin_lock().
Krzysztof, is this something you want in this series? I was trying to
avoid logic changes to the non-Apple paths.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
using a different locking function? I'm not
entirely sure what you're suggesting.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
erty, and does not traverse non-translatable boundaries. Are
there helpers that can implement this kind of complex logic? It's not a
simple recursive property lookup.
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On 05/03/2021 23.45, Andy Shevchenko wrote:
On Thu, Mar 4, 2021 at 11:40 PM Hector Martin wrote:
ARM64 currently defaults to posted MMIO (nGnRnE), but some devices
require the use of non-posted MMIO (nGnRE). Introduce a new ioremap()
variant to handle this case. ioremap_np() is aliased
ake sense to use a more
specific example for the dts.
E.g. on my system, with my current firmware version, this ends up
getting patched to:
reg = <0x8 0x0134c000 0x1 0xda294000>
Thanks,
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On 05/03/2021 06.38, Hector Martin wrote:
== Merge notes ==
This patchset depends on both the nVHE changes that are already in
5.12-rc1, as well as the FIQ support work currently being reviewed
at [1]. A tree containing this patchset on top of the required
dependencies is available at [2][3
Martin
[1]
https://lore.kernel.org/lkml/CAHk-=wjnzdlsp3odxhf9emtyo7gf-qjanlbuh1zk3c4a7x7...@mail.gmail.com/
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
, it makes more
sense to do it here in the UART driver instead of introducing a
whole fdt nonposted-mmio resolver just for earlycon/fixmap.
Suggested-by: Arnd Bergmann
Signed-off-by: Hector Martin
---
drivers/tty/serial/samsung_tty.c | 17 +
1 file changed, 17 insertions(+)
diff
This currently supports:
* SMP (via spin-tables)
* AIC IRQs
* Serial (with earlycon)
* Framebuffer
A number of properties are dynamic, and based on system firmware
decisions that vary from version to version. These are expected
to be filled in by the loader.
Signed-off-by: Hector Martin
the
FIFO with data directly.
Signed-off-by: Hector Martin
---
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/samsung_tty.c | 238 +--
include/linux/serial_s3c.h | 16 +++
3 files changed, 247 insertions(+), 9 deletions(-)
diff --git a/drivers
Apple SoCs run firmware that sets up a simplefb-compatible framebuffer
for us. Add a compatible for it, and two missing supported formats.
Signed-off-by: Hector Martin
---
.../devicetree/bindings/display/simple-framebuffer.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git
This picks up the non-posted I/O mode needed for Apple platforms to
work properly.
This removes the request/release functions, which are no longer
necessary, since devm_ioremap_resource takes care of that already. Most
other drivers already do it this way, anyway.
Signed-off-by: Hector Martin
This decouples the TTY layer PORT_ types, which are exposed to
userspace, from the driver-internal flag of what kind of port this is.
This removes s3c24xx_serial_has_interrupt_mask, which was just checking
for a specific type anyway.
Signed-off-by: Hector Martin
---
drivers/tty/serial
held.
* Rename s3c24xx_serial_rx_chars to s3c24xx_serial_rx_irq for
consistency with the above. All it does now is call two other
functions anyway.
Signed-off-by: Hector Martin
---
drivers/tty/serial/samsung_tty.c | 34 +++-
1 file changed, 20 insertions(+), 14
; this avoids excessive branching
control flow and mirrors s3c64xx_serial_startup. tx_claimed and
rx_claimed are only used in the S3C24XX functions.
Signed-off-by: Hector Martin
---
drivers/tty/serial/samsung_tty.c | 71
1 file changed, 54 insertions(+), 17 deletions
This simplifies the code by removing the only distinction between the
S3C2410 and S3C2440 codepaths.
Signed-off-by: Hector Martin
---
drivers/tty/serial/samsung_tty.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty
This adds a Kconfig option to toggle support for Apple ARM SoCs.
At this time this targets the M1 and later "Apple Silicon" Mac SoCs.
Signed-off-by: Hector Martin
---
arch/arm64/Kconfig.platforms | 8
arch/arm64/configs/defconfig | 1 +
2 files changed, 9 insertions(+)
Apple mobile devices originally used Samsung SoCs (starting with the
S5L8900), and their current in-house SoCs continue to use compatible
UART peripherals. We'll call this UART variant apple,s5l-uart.
Signed-off-by: Hector Martin
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: Linus Walleij
AIC is the Apple Interrupt Controller found on Apple ARM SoCs, such as
the M1.
Signed-off-by: Hector Martin
Reviewed-by: Linus Walleij
---
.../interrupt-controller/apple,aic.yaml | 88 +++
MAINTAINERS | 1 +
.../interrupt-controller
This is used on Apple ARM platforms, which require most MMIO
(except PCI devices) to be mapped as nGnRnE.
Signed-off-by: Hector Martin
---
arch/arm64/include/asm/io.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 5ea8656a2030
Apple ARM64 SoCs have a ton of vendor-specific registers we're going to
have to deal with, and those don't really belong in sysreg.h with all
the architectural registers. Make a new home for them, and add some
registers which are useful for early bring-up.
Signed-off-by: Hector Martin
These definitions are in arm-gic-v3.h for historical reasons which no
longer apply. Move them to sysreg.h so the AIC driver can use them, as
it needs to peek into vGIC registers to deal with the GIC maintentance
interrupt.
Signed-off-by: Hector Martin
---
arch/arm64/include/asm/sysreg.h| 60
).
* Implements a virtual IPI multiplexer to funnel multiple Linux IPIs
into a single hardware IPI
Signed-off-by: Hector Martin
---
MAINTAINERS | 2 +
drivers/irqchip/Kconfig | 8 +
drivers/irqchip/Makefile| 1 +
drivers/irqchip/irq-apple-aic.c | 710
.
Signed-off-by: Hector Martin
---
.../driver-api/driver-model/devres.rst| 1 +
arch/sparc/include/asm/io_64.h| 4
include/asm-generic/io.h | 22 ++-
include/asm-generic/iomap.h | 9
include/linux/io.h
is currently restricted to Apple ARM platforms, as an
optimization.
Signed-off-by: Hector Martin
---
drivers/of/address.c | 72 --
include/linux/of_address.h | 1 +
2 files changed, 71 insertions(+), 2 deletions(-)
diff --git a/drivers/of/address.c b/drivers
This documents the newly introduced ioremap_np() along with all the
other common ioremap() variants, and some higher-level abstractions
available.
Signed-off-by: Hector Martin
---
Documentation/driver-api/device-io.rst | 218 +
1 file changed, 218 insertions(+)
diff
This is different from the legacy AAPL prefix used on PPC, but
consensus is that we prefer `apple` for these new platforms.
Signed-off-by: Hector Martin
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: Linus Walleij
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file
whether there are many more such nuggets to be found...
Reported-by: Hector Martin
Signed-off-by: Marc Zyngier
---
arch/arm64/kernel/head.S | 33 ++---
arch/arm64/kernel/hyp-stub.S | 28
2 files changed, 54 insertions(+), 7 deletions
The implementor will be used to condition the FIQ support quirk.
The specific CPU types are not used at the moment, but let's add them
for documentation purposes.
Signed-off-by: Hector Martin
---
arch/arm64/include/asm/cputype.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch
ters to sysregs.h instead of including that in the AIC
driver.
* Added _EL1 suffixes to Apple sysregs.
* Addressed further review comments and feedback.
Arnd Bergmann (1):
docs: driver-api: device-io: Document I/O access functions
Hector Martin (25):
dt-bindings: vendor-prefixes: Add apple prefix
From: Arnd Bergmann
This adds more detailed descriptions of the various read/write
primitives available for use with I/O memory/ports.
Signed-off-by: Arnd Bergmann
Signed-off-by: Hector Martin
---
Documentation/driver-api/device-io.rst | 138 +
1 file changed, 138
This allows the devicetree to correctly represent the available set of
timers, which varies from device to device, without the need for fake
dummy interrupts for unavailable slots.
Also add the hyp-virt timer/PPI, which is not currently used, but worth
representing.
Signed-off-by: Hector Martin
code can pick the right one.
This also adds the hyp-virt timer/interrupt, which was previously not
expressed in the fixed 4-interrupt form.
Signed-off-by: Hector Martin
---
.../devicetree/bindings/timer/arm,arch_timer.yaml | 14 ++
1 file changed, 14 insertions(+)
diff --git
These are the CPU cores in the "Apple Silicon" M1 SoC.
Signed-off-by: Hector Martin
---
Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml
b/Documentation/devicetree/bindings/arm/cpus.
This introduces bindings for all three 2020 Apple M1 devices:
* apple,j274 - Mac mini (M1, 2020)
* apple,j293 - MacBook Pro (13-inch, M1, 2020)
* apple,j313 - MacBook Air (M1, 2020)
Signed-off-by: Hector Martin
---
.../devicetree/bindings/arm/apple.yaml| 64
On 22/02/2021 00.20, Hector Martin wrote:
I haven't tested things at EL0 yet, but it looks like the stateful
instructions known to be usable in EL0 (AMX) already default to trap on
this platform, so we should be safe there. Everything else looks like it
probably either shouldn't work in EL0 (I
On 22/02/2021 05.41, Andy Shevchenko wrote:
Hector, I would like to be cc’ed in the next version
Noted, thanks!
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On 16/02/2021 03.09, Marc Zyngier wrote:
On Mon, 15 Feb 2021 12:17:03 +,
Hector Martin wrote:
This patch introduces basic UP irqchip support, without SMP/IPI support.
This last comment seems outdated now.
Heh, I forgot to reword this one. Thanks :)
+config APPLE_AIC
+ bool
On 20/02/2021 03.26, Mark Rutland wrote:
On Sat, Feb 20, 2021 at 02:25:30AM +0900, Hector Martin wrote:
Apple SoCs (A11 and newer) have some interrupt sources hardwired to the
FIQ line. We implement support for this by simply treating IRQs and FIQs
the same way in the interrupt vectors
separately.
Hah, exynos4210-smdkv310.dtb is what did it. And here I was thinking
something with "c210" in the name would be more likely to work with qemu
machine "smdkc210"... :-)
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
lues of OK :) ).
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On 16/02/2021 04.29, Krzysztof Kozlowski wrote:
On Mon, Feb 15, 2021 at 09:17:13PM +0900, Hector Martin wrote:
+ memory@8 {
+ device_type = "memory";
+ reg = <0 0 0 0>; /* To be filled by loader */
dtc and dtschema might complain,
On 21/02/2021 04.17, Marc Zyngier wrote:
On 2021-02-20 19:13, Krzysztof Kozlowski wrote:
On Thu, Feb 18, 2021 at 11:01:21PM +0900, Hector Martin wrote:
On 16/02/2021 03.51, Krzysztof Kozlowski wrote:
Also fix a bug checking the return value, which should use IS_ERR().
No, no, no. We never
On 21/02/2021 04.11, Krzysztof Kozlowski wrote:
On Thu, Feb 18, 2021 at 10:53:10PM +0900, Hector Martin wrote:
This should've gone in the next patch. A previous reviewer told me to put
declarations at the top of the file, so I put it there and moved this one
along with it, but I'll keep
of exceptions are masked together. No
other platforms should be delivering FIQ exceptions right now, and we
already unmask FIQ in normal process context, so this should not have an
effect on other systems - if spurious FIQs were arriving, they would
already panic the kernel.
Signed-off-by: Hector Martin
On 20/02/2021 02.21, Hector Martin wrote:
Apple SoCs (A11 and newer) have some interrupt sources hardwired to the
FIQ line. We implement support for this by simply treating IRQs and FIQs
the same way in the interrupt vectors.
To support these systems, the FIQ mask bit needs to be kept in sync
of exceptions are masked together. No
other platforms should be delivering FIQ exceptions right now, and we
already unmask FIQ in normal process context, so this should not have an
effect on other systems - if spurious FIQs were arriving, they would
already panic the kernel.
Signed-off-by: Hector Martin
-bringup-v3
[3] https://github.com/AsahiLinux/linux/tree/upstream-bringup-v2.5
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
inor related one: should init_gic_priority_masking() WARN if FIQ is
masked too? This probably goes with the above.
I think it should, yes.
Done for v3 then. Thanks!
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On 16/02/2021 04.13, Krzysztof Kozlowski wrote:
On Mon, Feb 15, 2021 at 09:17:10PM +0900, Hector Martin wrote:
@@ -389,10 +396,12 @@ static void enable_tx_pio(struct s3c24xx_uart_port
*ourport)
ucon = rd_regl(port, S3C2410_UCON);
ucon &= ~(S3C64XX_UCON_TXMODE_
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