[PATCH 1/3] drm: mxsfb: add i.MX6UL/i.MX6ULL to the list of supported SoCs in Kconfig
The eLCDIF controller is also present on i.MX6UL/i.MX6ULL SoCs so add them in the Kconfig option description. Signed-off-by: Sébastien Szymanski --- drivers/gpu/drm/mxsfb/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mxsfb/Kconfig b/drivers/gpu/drm/mxsfb/Kconfig index 0143d539f8f8..a3730f52e6fa 100644 --- a/drivers/gpu/drm/mxsfb/Kconfig +++ b/drivers/gpu/drm/mxsfb/Kconfig @@ -17,6 +17,6 @@ config DRM_MXSFB help Choose this option if you have an LCDIF or eLCDIF LCD controller. Those devices are found in various i.MX SoC (including i.MX23, - i.MX28, i.MX6SX, i.MX7 and i.MX8M). + i.MX28, i.MX6UL/i.MX6ULL, i.MX6SX, i.MX7 and i.MX8M). If M is selected the module will be called mxsfb. -- 2.26.2
[PATCH 2/3] drm: mxsfb: add alpha plane support on i.MX6UL/i.MX6ULL
The eLCDIF controller on i.MX6UL/i.MX6ULL supports the alpha plane too.
Enable it on these SoCs.
Signed-off-by: Sébastien Szymanski
---
While testing, I have noticed that the alpha plane works but
sometimes the framebuffer is shiftted to the right.
I tested with the following modetest command:
modetest -M mxsfb-drm -s 37@35:800x480 -P 33@35:800x480@AR24 -F smpte,plain
drivers/gpu/drm/mxsfb/mxsfb_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.c
b/drivers/gpu/drm/mxsfb/mxsfb_drv.c
index 6faf17b6408d..95c35333c2d1 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_drv.c
+++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.c
@@ -306,6 +306,7 @@ static const struct drm_driver mxsfb_driver = {
static const struct of_device_id mxsfb_dt_ids[] = {
{ .compatible = "fsl,imx23-lcdif", .data = _devdata[MXSFB_V3], },
{ .compatible = "fsl,imx28-lcdif", .data = _devdata[MXSFB_V4], },
+ { .compatible = "fsl,imx6ul-lcdif", .data = _devdata[MXSFB_V6], },
{ .compatible = "fsl,imx6sx-lcdif", .data = _devdata[MXSFB_V6], },
{ /* sentinel */ }
};
--
2.26.2
[PATCH 3/3] dt-bindings: mxsfb: add compatible for i.MX6UL/i.MX6ULL
i.MX6UL/i.MX6ULL have eLCDIF controller, too. Signed-off-by: Sébastien Szymanski --- Documentation/devicetree/bindings/display/mxsfb.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/mxsfb.txt b/Documentation/devicetree/bindings/display/mxsfb.txt index c985871c46b3..6c1c4ad04b89 100644 --- a/Documentation/devicetree/bindings/display/mxsfb.txt +++ b/Documentation/devicetree/bindings/display/mxsfb.txt @@ -5,6 +5,7 @@ New bindings: Required properties: - compatible: Should be "fsl,imx23-lcdif" for i.MX23. Should be "fsl,imx28-lcdif" for i.MX28. + Should be "fsl,imx6ul-lcdif" for i.MX6UL/i.MX6ULL. Should be "fsl,imx6sx-lcdif" for i.MX6SX. Should be "fsl,imx8mq-lcdif" for i.MX8MQ. - reg: Address and length of the register set for LCDIF -- 2.26.2
[PATCH 1/1] ARM: dts: opos6ul: add ksz8081 phy properties
Set clock mode and the LED mode in the device tree instead of relying on
the fixup in mach-imx6ul.
Signed-off-by: Sébastien Szymanski
---
arch/arm/boot/dts/imx6ul-imx6ull-opos6ul.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul-imx6ull-opos6ul.dtsi
b/arch/arm/boot/dts/imx6ul-imx6ull-opos6ul.dtsi
index f2386dcb9ff2..dda4fa91b2f2 100644
--- a/arch/arm/boot/dts/imx6ul-imx6ull-opos6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul-imx6ull-opos6ul.dtsi
@@ -40,6 +40,9 @@ ethphy1: ethernet-phy@1 {
reg = <1>;
interrupt-parent = <>;
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
+ micrel,led-mode = <1>;
+ clocks = < IMX6UL_CLK_ENET_REF>;
+ clock-names = "rmii-ref";
status = "okay";
};
};
--
2.26.2
Re: [PATCH v1] ARM: imx: mach-imx6ul: remove 14x14 EVK specific PHY fixup
Hi,
On 12/9/20 1:20 PM, Oleksij Rempel wrote:
> Remove board specific PHY fixup introduced by commit:
>
> | 709bc0657fe6f9f5 ("ARM: imx6ul: add fec MAC refrence clock and phy fixup
> init")
>
> This fixup addresses boards with a specific configuration: a KSZ8081RNA
> PHY with attached clock source to XI (Pin 8) of the PHY equal to 50MHz.
>
> For the KSZ8081RND PHY, the meaning of the reg 0x1F bit 7 is different
> (compared to the KSZ8081RNA). A set bit means:
>
> - KSZ8081RNA: clock input to XI (Pin 8) is 50MHz for RMII
> - KSZ8081RND: clock input to XI (Pin 8) is 25MHz for RMII
OPOS6UL has a KSZ80801RNB. On this PHY variant, bit 7 of reg 0x1F means:
1: RMII 50MHz clock mode; clock input to XI (Pin 9) is 50MHz
0: RMII 25MHz clock mode; clock input to XI (Pin 9) is 25MHz
>
> In other configurations, for example a KSZ8081RND PHY or a KSZ8081RNA
> with 25Mhz clock source, the PHY will glitch and stay in not recoverable
> state.
>
> It is not possible to detect the clock source frequency of the PHY. And
> it is not possible to automatically detect KSZ8081 PHY variant - both
> have same PHY ID. It is not possible to overwrite the fixup
> configuration by providing proper device tree description. The only way
> is to remove this fixup.
>
> If this patch breaks network functionality on your board, fix it by
> adding PHY node with following properties:
>
> ethernet-phy@x {
> ...
> micrel,led-mode = <1>;
> clocks = < IMX6UL_CLK_ENET_REF>;
> clock-names = "rmii-ref";
> ...
> };
On OPOS6UL, this fix do fixes network breakage introduced by this patch.
So, for OPOS6UL,
Tested-by: Sébastien Szymanski
>
> The board which was referred in the initial patch is already fixed.
> See: arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
>
> Signed-off-by: Oleksij Rempel
> ---
> arch/arm/mach-imx/mach-imx6ul.c | 21 -
> 1 file changed, 21 deletions(-)
>
> diff --git a/arch/arm/mach-imx/mach-imx6ul.c b/arch/arm/mach-imx/mach-imx6ul.c
> index e018e716735f..eabcd35c01a5 100644
> --- a/arch/arm/mach-imx/mach-imx6ul.c
> +++ b/arch/arm/mach-imx/mach-imx6ul.c
> @@ -27,30 +27,9 @@ static void __init imx6ul_enet_clk_init(void)
> pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n");
> }
>
> -static int ksz8081_phy_fixup(struct phy_device *dev)
> -{
> - if (dev && dev->interface == PHY_INTERFACE_MODE_MII) {
> - phy_write(dev, 0x1f, 0x8110);
> - phy_write(dev, 0x16, 0x201);
> - } else if (dev && dev->interface == PHY_INTERFACE_MODE_RMII) {
> - phy_write(dev, 0x1f, 0x8190);
> - phy_write(dev, 0x16, 0x202);
> - }
> -
> - return 0;
> -}
> -
> -static void __init imx6ul_enet_phy_init(void)
> -{
> - if (IS_BUILTIN(CONFIG_PHYLIB))
> - phy_register_fixup_for_uid(PHY_ID_KSZ8081, MICREL_PHY_ID_MASK,
> -ksz8081_phy_fixup);
> -}
> -
> static inline void imx6ul_enet_init(void)
> {
> imx6ul_enet_clk_init();
> - imx6ul_enet_phy_init();
> }
>
> static void __init imx6ul_init_machine(void)
>
--
Sébastien Szymanski, Armadeus Systems
Software engineer
Re: [PATCH 1/1] ARM: dts: imx6ul: Add PXP node
Hi Marco,
On 6/12/19 7:21 PM, Marco Felsch wrote:
> Hi Sébastien,
>
> On 19-06-06 18:46, Sébastien Szymanski wrote:
>> Add PXP node for i.MX6UL/L SoC.
>>
>> Signed-off-by: Sébastien Szymanski
>> ---
>> arch/arm/boot/dts/imx6ul.dtsi | 9 +
>> arch/arm/boot/dts/imx6ull.dtsi | 6 ++
>> 2 files changed, 15 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
>> index f10012de5eb6..a3c005373ae1 100644
>> --- a/arch/arm/boot/dts/imx6ul.dtsi
>> +++ b/arch/arm/boot/dts/imx6ul.dtsi
>> @@ -971,6 +971,15 @@
>> status = "disabled";
>> };
>>
>> +pxp: pxp@21cc000 {
>> +compatible = "fsl,imx6ul-pxp";
>> +reg = <0x021cc000 0x4000>;
>> +interrupts = ;
>> +clocks = < IMX6UL_CLK_PXP>;
>> +clock-names = "axi";
>> +status = "disabled";
>
> Can you drop the status line because its a platform device and isn't
> removeable.
Ok, done. thanks!
Regards,
>
>> +};
>> +
>> qspi: spi@21e {
>> #address-cells = <1>;
>> #size-cells = <0>;
>> diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
>> index 22e4a307fa59..b017e925bd87 100644
>> --- a/arch/arm/boot/dts/imx6ull.dtsi
>> +++ b/arch/arm/boot/dts/imx6ull.dtsi
>> @@ -34,6 +34,12 @@
>> compatible = "fsl,imx6ull-ocotp", "syscon";
>> };
>>
>> + {
>> +compatible = "fsl,imx6ull-pxp";
>> + interrupts = ,
>> + ;
>> +};
>> +
>> {
>> compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
>> };
>> --
>> 2.19.2
>>
>>
>> ___
>> linux-arm-kernel mailing list
>> linux-arm-ker...@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
--
Sébastien Szymanski
Software engineer, Armadeus Systems
Tel: +33 (0)9 72 29 41 44
Fax: +33 (0)9 72 28 79 26
Re: [PATCH v2 2/3] media: imx7-media-csi: add i.MX6UL support
On 6/11/19 11:40 AM, Rui Miguel Silva wrote:
> Hi Sebastien,
> On Tue 11 Jun 2019 at 09:16, Sébastien Szymanski wrote:
>> Hi Rui,
>>
>> thanks for the review!
>>
>> On 6/10/19 12:28 PM, Rui Miguel Silva wrote:
>>> Hi Sebastien,
>>> Thanks for the patch.
>>>
>>> On Thu 06 Jun 2019 at 16:38, Sébastien Szymanski wrote:
>>>> i.MX7 and i.MX6UL/L have the same CSI controller. So add i.MX6UL/L support
>>>> to imx7-media-csi driver.
>>>>
>>>> Signed-off-by: Sébastien Szymanski
>>>> ---
>>>>
>>>> Changes for v2:
>>>> - rebase on top of linuxtv/master
>>>> - mention i.MX6UL/L in header and Kconfig help text
>>>> - rename csi_type to csi_soc_id
>>>>
>>>> drivers/staging/media/imx/Kconfig | 4 +-
>>>> drivers/staging/media/imx/imx7-media-csi.c | 62 --
>>>> 2 files changed, 49 insertions(+), 17 deletions(-)
>>>>
>>>> diff --git a/drivers/staging/media/imx/Kconfig
>>>> b/drivers/staging/media/imx/Kconfig
>>>> index ad3d7df6bb3c..8b6dc42c39e0 100644
>>>> --- a/drivers/staging/media/imx/Kconfig
>>>> +++ b/drivers/staging/media/imx/Kconfig
>>>> @@ -22,11 +22,11 @@ config VIDEO_IMX_CSI
>>>> A video4linux camera sensor interface driver for i.MX5/6.
>>>>
>>>> config VIDEO_IMX7_CSI
>>>> - tristate "i.MX7 Camera Sensor Interface driver"
>>>> + tristate "i.MX6UL/L / i.MX7 Camera Sensor Interface driver"
>>>>depends on VIDEO_IMX_MEDIA && VIDEO_DEV && I2C
>>>>default y
>>>>help
>>>> Enable support for video4linux camera sensor interface driver for
>>>> -i.MX7.
>>>> +i.MX6UL/L or i.MX7.
>>>> endmenu
>>>> endif
>>>> diff --git a/drivers/staging/media/imx/imx7-media-csi.c
>>>> b/drivers/staging/media/imx/imx7-media-csi.c
>>>> index 9101566f3f67..902bdce594cf 100644
>>>> --- a/drivers/staging/media/imx/imx7-media-csi.c
>>>> +++ b/drivers/staging/media/imx/imx7-media-csi.c
>>>> @@ -1,6 +1,6 @@
>>>> // SPDX-License-Identifier: GPL-2.0
>>>> /*
>>>> - * V4L2 Capture CSI Subdev for Freescale i.MX7 SOC
>>>> + * V4L2 Capture CSI Subdev for Freescale i.MX6UL/L / i.MX7 SOC
>>>> *
>>>> * Copyright (c) 2019 Linaro Ltd
>>>> *
>>>> @@ -152,6 +152,11 @@
>>>> #define CSI_CSICR18 0x48
>>>> #define CSI_CSICR19 0x4c
>>>>
>>>> +enum csi_soc_id {
>>>> + IMX7,
>>>> + IMX6UL
>>>> +};
>>>> +
>>>> struct imx7_csi {
>>>>struct device *dev;
>>>>struct v4l2_subdev sd;
>>>> @@ -191,6 +196,7 @@ struct imx7_csi {
>>>>bool is_init;
>>>>bool is_streaming;
>>>>bool is_csi2;
>>>> + enum csi_soc_id soc_id;
>>>>
>>>>struct completion last_eof_completion;
>>>> };
>>>> @@ -548,6 +554,14 @@ static int imx7_csi_pad_link_validate(struct
>>>> v4l2_subdev *sd,
>>>>if (ret)
>>>>return ret;
>>>>
>>>> + if (csi->soc_id == IMX6UL) {
>>>> + mutex_lock(>lock);
>>>> + csi->is_csi2 = false;
>>>> + mutex_unlock(>lock);
>>>> +
>>>> + return 0;
>>>> + }
>>>> +
>>>>ret = imx7_csi_get_upstream_endpoint(csi, _ep, true);
>>>>if (ret) {
>>>>v4l2_err(>sd, "failed to find upstream endpoint\n");
>>>> @@ -757,6 +771,7 @@ static int imx7_csi_configure(struct imx7_csi *csi)
>>>>struct v4l2_pix_format *out_pix = >fmt.fmt.pix;
>>>>__u32 in_code = csi->format_mbus[IMX7_CSI_PAD_SINK].code;
>>>>u32 cr1, cr18;
>>>> + int width = out_pix->width;
>>>>
>>>>if (out_pix->field == V4L2_FIELD_INTERLACED) {
>>>>imx7_csi_deinterlace_enable(csi, true);
>>>> @@ -766,15 +781,27 @@ static int imx7_csi_configure(struct imx7_csi *csi)
>>>>imx7_csi_buf_stride_set(csi, 0);
>>>>}
>>>>
>>>> - imx7_csi_set_imagpara(csi, out_pix->width, out_pix->height);
>>>> + cr18 = imx7
Re: [PATCH v2 2/3] media: imx7-media-csi: add i.MX6UL support
Hi Rui,
thanks for the review!
On 6/10/19 12:28 PM, Rui Miguel Silva wrote:
> Hi Sebastien,
> Thanks for the patch.
>
> On Thu 06 Jun 2019 at 16:38, Sébastien Szymanski wrote:
>> i.MX7 and i.MX6UL/L have the same CSI controller. So add i.MX6UL/L support
>> to imx7-media-csi driver.
>>
>> Signed-off-by: Sébastien Szymanski
>> ---
>>
>> Changes for v2:
>> - rebase on top of linuxtv/master
>> - mention i.MX6UL/L in header and Kconfig help text
>> - rename csi_type to csi_soc_id
>>
>> drivers/staging/media/imx/Kconfig | 4 +-
>> drivers/staging/media/imx/imx7-media-csi.c | 62 --
>> 2 files changed, 49 insertions(+), 17 deletions(-)
>>
>> diff --git a/drivers/staging/media/imx/Kconfig
>> b/drivers/staging/media/imx/Kconfig
>> index ad3d7df6bb3c..8b6dc42c39e0 100644
>> --- a/drivers/staging/media/imx/Kconfig
>> +++ b/drivers/staging/media/imx/Kconfig
>> @@ -22,11 +22,11 @@ config VIDEO_IMX_CSI
>>A video4linux camera sensor interface driver for i.MX5/6.
>>
>> config VIDEO_IMX7_CSI
>> -tristate "i.MX7 Camera Sensor Interface driver"
>> +tristate "i.MX6UL/L / i.MX7 Camera Sensor Interface driver"
>> depends on VIDEO_IMX_MEDIA && VIDEO_DEV && I2C
>> default y
>> help
>>Enable support for video4linux camera sensor interface driver for
>> - i.MX7.
>> + i.MX6UL/L or i.MX7.
>> endmenu
>> endif
>> diff --git a/drivers/staging/media/imx/imx7-media-csi.c
>> b/drivers/staging/media/imx/imx7-media-csi.c
>> index 9101566f3f67..902bdce594cf 100644
>> --- a/drivers/staging/media/imx/imx7-media-csi.c
>> +++ b/drivers/staging/media/imx/imx7-media-csi.c
>> @@ -1,6 +1,6 @@
>> // SPDX-License-Identifier: GPL-2.0
>> /*
>> - * V4L2 Capture CSI Subdev for Freescale i.MX7 SOC
>> + * V4L2 Capture CSI Subdev for Freescale i.MX6UL/L / i.MX7 SOC
>> *
>> * Copyright (c) 2019 Linaro Ltd
>> *
>> @@ -152,6 +152,11 @@
>> #define CSI_CSICR18 0x48
>> #define CSI_CSICR19 0x4c
>>
>> +enum csi_soc_id {
>> +IMX7,
>> +IMX6UL
>> +};
>> +
>> struct imx7_csi {
>> struct device *dev;
>> struct v4l2_subdev sd;
>> @@ -191,6 +196,7 @@ struct imx7_csi {
>> bool is_init;
>> bool is_streaming;
>> bool is_csi2;
>> +enum csi_soc_id soc_id;
>>
>> struct completion last_eof_completion;
>> };
>> @@ -548,6 +554,14 @@ static int imx7_csi_pad_link_validate(struct
>> v4l2_subdev *sd,
>> if (ret)
>> return ret;
>>
>> +if (csi->soc_id == IMX6UL) {
>> +mutex_lock(>lock);
>> +csi->is_csi2 = false;
>> +mutex_unlock(>lock);
>> +
>> +return 0;
>> +}
>> +
>> ret = imx7_csi_get_upstream_endpoint(csi, _ep, true);
>> if (ret) {
>> v4l2_err(>sd, "failed to find upstream endpoint\n");
>> @@ -757,6 +771,7 @@ static int imx7_csi_configure(struct imx7_csi *csi)
>> struct v4l2_pix_format *out_pix = >fmt.fmt.pix;
>> __u32 in_code = csi->format_mbus[IMX7_CSI_PAD_SINK].code;
>> u32 cr1, cr18;
>> +int width = out_pix->width;
>>
>> if (out_pix->field == V4L2_FIELD_INTERLACED) {
>> imx7_csi_deinterlace_enable(csi, true);
>> @@ -766,15 +781,27 @@ static int imx7_csi_configure(struct imx7_csi *csi)
>> imx7_csi_buf_stride_set(csi, 0);
>> }
>>
>> -imx7_csi_set_imagpara(csi, out_pix->width, out_pix->height);
>> +cr18 = imx7_csi_reg_read(csi, CSI_CSICR18);
>> +
>> +if (!csi->is_csi2) {
>> +if (out_pix->pixelformat == V4L2_PIX_FMT_UYVY ||
>> +out_pix->pixelformat == V4L2_PIX_FMT_YUYV)
>> +width *= 2;
>> +
>> +imx7_csi_set_imagpara(csi, width, out_pix->height);
>> +
>> +cr18 |= (BIT_BASEADDR_SWITCH_EN | BIT_BASEADDR_SWITCH_SEL |
>> +BIT_BASEADDR_CHG_ERR_EN);
>> +imx7_csi_reg_write(csi, cr18, CSI_CSICR18);
>>
>> -if (!csi->is_csi2)
>> return 0;
>> +}
>> +
>> +imx7_csi_set_imagpara(csi, width, out_pix->height);
>>
>> cr1 = imx7_csi_reg_read(csi, CSI_CSICR1);
>> cr1 &= ~BIT_GCLK_MODE;
>>
>> -cr18 = imx7_csi_reg_read(csi, CSI_CSICR
[PATCH v2 2/3] media: imx7-media-csi: add i.MX6UL support
i.MX7 and i.MX6UL/L have the same CSI controller. So add i.MX6UL/L support
to imx7-media-csi driver.
Signed-off-by: Sébastien Szymanski
---
Changes for v2:
- rebase on top of linuxtv/master
- mention i.MX6UL/L in header and Kconfig help text
- rename csi_type to csi_soc_id
drivers/staging/media/imx/Kconfig | 4 +-
drivers/staging/media/imx/imx7-media-csi.c | 62 --
2 files changed, 49 insertions(+), 17 deletions(-)
diff --git a/drivers/staging/media/imx/Kconfig
b/drivers/staging/media/imx/Kconfig
index ad3d7df6bb3c..8b6dc42c39e0 100644
--- a/drivers/staging/media/imx/Kconfig
+++ b/drivers/staging/media/imx/Kconfig
@@ -22,11 +22,11 @@ config VIDEO_IMX_CSI
A video4linux camera sensor interface driver for i.MX5/6.
config VIDEO_IMX7_CSI
- tristate "i.MX7 Camera Sensor Interface driver"
+ tristate "i.MX6UL/L / i.MX7 Camera Sensor Interface driver"
depends on VIDEO_IMX_MEDIA && VIDEO_DEV && I2C
default y
help
Enable support for video4linux camera sensor interface driver for
- i.MX7.
+ i.MX6UL/L or i.MX7.
endmenu
endif
diff --git a/drivers/staging/media/imx/imx7-media-csi.c
b/drivers/staging/media/imx/imx7-media-csi.c
index 9101566f3f67..902bdce594cf 100644
--- a/drivers/staging/media/imx/imx7-media-csi.c
+++ b/drivers/staging/media/imx/imx7-media-csi.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * V4L2 Capture CSI Subdev for Freescale i.MX7 SOC
+ * V4L2 Capture CSI Subdev for Freescale i.MX6UL/L / i.MX7 SOC
*
* Copyright (c) 2019 Linaro Ltd
*
@@ -152,6 +152,11 @@
#define CSI_CSICR180x48
#define CSI_CSICR190x4c
+enum csi_soc_id {
+ IMX7,
+ IMX6UL
+};
+
struct imx7_csi {
struct device *dev;
struct v4l2_subdev sd;
@@ -191,6 +196,7 @@ struct imx7_csi {
bool is_init;
bool is_streaming;
bool is_csi2;
+ enum csi_soc_id soc_id;
struct completion last_eof_completion;
};
@@ -548,6 +554,14 @@ static int imx7_csi_pad_link_validate(struct v4l2_subdev
*sd,
if (ret)
return ret;
+ if (csi->soc_id == IMX6UL) {
+ mutex_lock(>lock);
+ csi->is_csi2 = false;
+ mutex_unlock(>lock);
+
+ return 0;
+ }
+
ret = imx7_csi_get_upstream_endpoint(csi, _ep, true);
if (ret) {
v4l2_err(>sd, "failed to find upstream endpoint\n");
@@ -757,6 +771,7 @@ static int imx7_csi_configure(struct imx7_csi *csi)
struct v4l2_pix_format *out_pix = >fmt.fmt.pix;
__u32 in_code = csi->format_mbus[IMX7_CSI_PAD_SINK].code;
u32 cr1, cr18;
+ int width = out_pix->width;
if (out_pix->field == V4L2_FIELD_INTERLACED) {
imx7_csi_deinterlace_enable(csi, true);
@@ -766,15 +781,27 @@ static int imx7_csi_configure(struct imx7_csi *csi)
imx7_csi_buf_stride_set(csi, 0);
}
- imx7_csi_set_imagpara(csi, out_pix->width, out_pix->height);
+ cr18 = imx7_csi_reg_read(csi, CSI_CSICR18);
+
+ if (!csi->is_csi2) {
+ if (out_pix->pixelformat == V4L2_PIX_FMT_UYVY ||
+ out_pix->pixelformat == V4L2_PIX_FMT_YUYV)
+ width *= 2;
+
+ imx7_csi_set_imagpara(csi, width, out_pix->height);
+
+ cr18 |= (BIT_BASEADDR_SWITCH_EN | BIT_BASEADDR_SWITCH_SEL |
+ BIT_BASEADDR_CHG_ERR_EN);
+ imx7_csi_reg_write(csi, cr18, CSI_CSICR18);
- if (!csi->is_csi2)
return 0;
+ }
+
+ imx7_csi_set_imagpara(csi, width, out_pix->height);
cr1 = imx7_csi_reg_read(csi, CSI_CSICR1);
cr1 &= ~BIT_GCLK_MODE;
- cr18 = imx7_csi_reg_read(csi, CSI_CSICR18);
cr18 &= BIT_MIPI_DATA_FORMAT_MASK;
cr18 |= BIT_DATA_FROM_MIPI;
@@ -809,11 +836,9 @@ static void imx7_csi_enable(struct imx7_csi *csi)
{
imx7_csi_sw_reset(csi);
- if (csi->is_csi2) {
- imx7_csi_dmareq_rff_enable(csi);
- imx7_csi_hw_enable_irq(csi);
- imx7_csi_hw_enable(csi);
- }
+ imx7_csi_dmareq_rff_enable(csi);
+ imx7_csi_hw_enable_irq(csi);
+ imx7_csi_hw_enable(csi);
}
static void imx7_csi_disable(struct imx7_csi *csi)
@@ -1166,19 +1191,32 @@ static int imx7_csi_parse_endpoint(struct device *dev,
return fwnode_device_is_available(asd->match.fwnode) ? 0 : -EINVAL;
}
+static const struct of_device_id imx7_csi_of_match[] = {
+ { .compatible = "fsl,imx7-csi", .data = (void *)IMX7 },
+ { .compatible = "fsl,imx6ul-csi", .data = (void *)IMX6UL },
+ { },
+};
+MODULE_DEVICE_TABLE(of, imx7_csi_of_match);
+
static int imx7_csi_probe(struct platform_device *pdev)
{
struct device *dev = >
[PATCH 1/1] ARM: dts: imx6ul: Add PXP node
Add PXP node for i.MX6UL/L SoC.
Signed-off-by: Sébastien Szymanski
---
arch/arm/boot/dts/imx6ul.dtsi | 9 +
arch/arm/boot/dts/imx6ull.dtsi | 6 ++
2 files changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index f10012de5eb6..a3c005373ae1 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -971,6 +971,15 @@
status = "disabled";
};
+ pxp: pxp@21cc000 {
+ compatible = "fsl,imx6ul-pxp";
+ reg = <0x021cc000 0x4000>;
+ interrupts = ;
+ clocks = < IMX6UL_CLK_PXP>;
+ clock-names = "axi";
+ status = "disabled";
+ };
+
qspi: spi@21e {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index 22e4a307fa59..b017e925bd87 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -34,6 +34,12 @@
compatible = "fsl,imx6ull-ocotp", "syscon";
};
+ {
+ compatible = "fsl,imx6ull-pxp";
+ interrupts = ,
+;
+};
+
{
compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
};
--
2.19.2
[PATCH v2 3/3] media: dt-bindings: imx7-csi: add i.MX6UL/L support
Document "fsl,imx6ul-csi" entry. Signed-off-by: Sébastien Szymanski --- Changes for v2: - New patch to document new "fsl,imx6ul-csi" entry. Documentation/devicetree/bindings/media/imx7-csi.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/imx7-csi.txt b/Documentation/devicetree/bindings/media/imx7-csi.txt index 3c07bc676bc3..49e9af19b3ea 100644 --- a/Documentation/devicetree/bindings/media/imx7-csi.txt +++ b/Documentation/devicetree/bindings/media/imx7-csi.txt @@ -9,7 +9,7 @@ to connect directly to external CMOS image sensors. Required properties: -- compatible: "fsl,imx7-csi"; +- compatible: "fsl,imx7-csi" or "fsl,imx6ul-csi"; - reg : base address and length of the register set for the device; - interrupts: should contain CSI interrupt; - clocks: list of clock specifiers, see -- 2.19.2
[PATCH v2 1/3] ARM: dts: imx6ul: Add csi node
Add csi node for i.MX6UL SoC.
Reviewed-by: Fabio Estevam
Signed-off-by: Sébastien Szymanski
---
Changes for v2:
- only "mclk" clock is required now.
arch/arm/boot/dts/imx6ul.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index bbf010c73336..f10012de5eb6 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -951,6 +951,15 @@
};
};
+ csi: csi@21c4000 {
+ compatible = "fsl,imx6ul-csi", "fsl,imx7-csi";
+ reg = <0x021c4000 0x4000>;
+ interrupts = ;
+ clocks = < IMX6UL_CLK_CSI>;
+ clock-names = "mclk";
+ status = "disabled";
+ };
+
lcdif: lcdif@21c8000 {
compatible = "fsl,imx6ul-lcdif",
"fsl,imx28-lcdif";
reg = <0x021c8000 0x4000>;
--
2.19.2
Re: [PATCH RE-RESEND 1/2] drm/panel: Add support for Armadeus ST0700 Adapt
Hello Sam, On 5/8/19 11:06 AM, Daniel Vetter wrote: > On Wed, May 08, 2019 at 10:33:03AM +0200, Daniel Vetter wrote: >> On Tue, May 07, 2019 at 06:19:50PM +0200, Sam Ravnborg wrote: >>> Hi Fabio >>> >>> On Tue, May 07, 2019 at 12:33:39PM -0300, Fabio Estevam wrote: >>>> [Adding Sam, who is helping to review/collect panel-simple patches] >>>> >>>> On Tue, May 7, 2019 at 12:27 PM Sébastien Szymanski >>>> wrote: >>>>> >>>>> This patch adds support for the Armadeus ST0700 Adapt. It comes with a >>>>> Santek ST0700I5Y-RBSLW 7.0" WVGA (800x480) TFT and an adapter board so >>>>> that it can be connected on the TFT header of Armadeus Dev boards. >>>>> >>>>> Cc: sta...@vger.kernel.org # v4.19 >>>>> Reviewed-by: Rob Herring >>>>> Signed-off-by: Sébastien Szymanski >>> Reviewed-by: Sam Ravnborg >>> >>> If you wil lresend the patch I can apply it. >>> I have lost the original mail. >> >> Usually patchwork should have it already (and you can pipe the raw >> patchwork mbox into dim apply), but somehow it's not there either. >> Not sure why, sometimes this is because mails are stuck in moderation, >> sometimes because people do interesting things with their mails (e.g. smtp >> servers mangling formatting). > > patchwork was just a bit slow, it's there now: > > https://patchwork.freedesktop.org/series/60408/ > Will you take the patch from patchwork or should I resent it ? Regards, > Cheers, Daniel > -- Sébastien Szymanski Software engineer, Armadeus Systems Tel: +33 (0)9 72 29 41 44 Fax: +33 (0)9 72 28 79 26
[PATCH RE-RESEND 2/2] ARM: dts: opos6uldev: use OF graph to describe the display
To make use of the new eLCDIF DRM driver OF graph description is
required. Describe the display using OF graph nodes.
Cc: sta...@vger.kernel.org # v4.19
Signed-off-by: Sébastien Szymanski
---
arch/arm/boot/dts/imx6ul-opos6uldev.dts | 37 +++--
1 file changed, 16 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boot/dts/imx6ul-opos6uldev.dts
b/arch/arm/boot/dts/imx6ul-opos6uldev.dts
index 0e59ee57fd55..8ecdb9ad2b2e 100644
--- a/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+++ b/arch/arm/boot/dts/imx6ul-opos6uldev.dts
@@ -56,7 +56,7 @@
stdout-path =
};
- backlight {
+ backlight: backlight {
compatible = "pwm-backlight";
pwms = < 0 191000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
@@ -97,6 +97,18 @@
gpios = < 1 GPIO_ACTIVE_HIGH>;
};
+ panel: panel {
+ compatible = "armadeus,st0700-adapt";
+ power-supply = <_3v3>;
+ backlight = <>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <_out>;
+ };
+ };
+ };
+
reg_5v: regulator-5v {
compatible = "regulator-fixed";
regulator-name = "5V";
@@ -182,28 +194,11 @@
{
pinctrl-names = "default";
pinctrl-0 = <_lcdif>;
- display = <>;
- lcd-supply = <_3v3>;
status = "okay";
- display0: display0 {
- bits-per-pixel = <32>;
- bus-width = <18>;
-
- display-timings {
- timing0: timing0 {
- clock-frequency = <3333>;
- hactive = <800>;
- vactive = <480>;
- hback-porch = <96>;
- hfront-porch = <96>;
- vback-porch = <20>;
- vfront-porch = <21>;
- hsync-len = <64>;
- vsync-len = <4>;
- de-active = <1>;
- pixelclk-active = <0>;
- };
+ port {
+ lcdif_out: endpoint {
+ remote-endpoint = <_in>;
};
};
};
--
2.19.2
[PATCH 1/2] ARM: dts: imx6ul: Add csi node
Add csi node for i.MX6UL SoC.
Signed-off-by: Sébastien Szymanski
---
arch/arm/boot/dts/imx6ul.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 62ed30c781ed..af322bc58333 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -951,6 +951,17 @@
};
};
+ csi: csi@21c4000 {
+ compatible = "fsl,imx6ul-csi", "fsl,imx7-csi";
+ reg = <0x021c4000 0x4000>;
+ interrupts = ;
+ clocks = < IMX6UL_CLK_DUMMY>,
+< IMX6UL_CLK_CSI>,
+< IMX6UL_CLK_DUMMY>;
+ clock-names = "axi", "mclk", "dcic";
+ status = "disabled";
+ };
+
lcdif: lcdif@21c8000 {
compatible = "fsl,imx6ul-lcdif",
"fsl,imx28-lcdif";
reg = <0x021c8000 0x4000>;
--
2.19.2
Re: [PATCH] ARM: dts: imx6ull: update vdd_soc voltage for 900MHz operating point
On 09/12/2018 10:13 AM, Anson Huang wrote: > Update VDD_SOC voltage to 1.25V for 900MHz operating point > according to datasheet Rev. 1.3, 08/2018, 25mV is added to > the minimum allowed values to cover power supply ripple. > > Signed-off-by: Anson Huang > --- > arch/arm/boot/dts/imx6ull.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi > index cd1776a..796ed35 100644 > --- a/arch/arm/boot/dts/imx6ull.dtsi > +++ b/arch/arm/boot/dts/imx6ull.dtsi > @@ -22,7 +22,7 @@ > >; > fsl,soc-operating-points = < > /* KHz uV */ > - 90 1175000 > + 90 125 > 792000 1175000 > 528000 1175000 > 396000 1175000 > Reviewed-by: Sébastien Szymanski -- Sébastien Szymanski Software engineer, Armadeus Systems Tel: +33 (0)9 72 29 41 44 Fax: +33 (0)9 72 28 79 26
Re: [PATCH] ARM: dts: imx6ull: update vdd_soc voltage for 900MHz operating point
On 09/12/2018 10:13 AM, Anson Huang wrote: > Update VDD_SOC voltage to 1.25V for 900MHz operating point > according to datasheet Rev. 1.3, 08/2018, 25mV is added to > the minimum allowed values to cover power supply ripple. > > Signed-off-by: Anson Huang > --- > arch/arm/boot/dts/imx6ull.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi > index cd1776a..796ed35 100644 > --- a/arch/arm/boot/dts/imx6ull.dtsi > +++ b/arch/arm/boot/dts/imx6ull.dtsi > @@ -22,7 +22,7 @@ > >; > fsl,soc-operating-points = < > /* KHz uV */ > - 90 1175000 > + 90 125 > 792000 1175000 > 528000 1175000 > 396000 1175000 > Reviewed-by: Sébastien Szymanski -- Sébastien Szymanski Software engineer, Armadeus Systems Tel: +33 (0)9 72 29 41 44 Fax: +33 (0)9 72 28 79 26
Re: [PATCH] ARM: dts: imx6ull: update iomux header
On 09/03/2018 04:26 AM, Shawn Guo wrote: > Add Sébastien for a cross check. > > Shawn > > On Thu, Aug 30, 2018 at 01:20:05PM +0800, Anson Huang wrote: >> Update i.MX6ULL iomux header according to latest reference >> manual Rev.1, 11/2017. >> >> Signed-off-by: Anson Huang Reviewed-by: Sébastien Szymanski -- Sébastien Szymanski Software engineer, Armadeus Systems Tel: +33 (0)9 72 29 41 44 Fax: +33 (0)9 72 28 79 26
Re: [PATCH] ARM: dts: imx6ull: update iomux header
On 09/03/2018 04:26 AM, Shawn Guo wrote: > Add Sébastien for a cross check. > > Shawn > > On Thu, Aug 30, 2018 at 01:20:05PM +0800, Anson Huang wrote: >> Update i.MX6ULL iomux header according to latest reference >> manual Rev.1, 11/2017. >> >> Signed-off-by: Anson Huang Reviewed-by: Sébastien Szymanski -- Sébastien Szymanski Software engineer, Armadeus Systems Tel: +33 (0)9 72 29 41 44 Fax: +33 (0)9 72 28 79 26
Re: [PATCH] ARM: dts: imx6ull: fix pinmux input_val for uart5 rx pin
Hi, On 08/30/2018 02:47 PM, Heiko Schocher wrote: > on the imx6ull the input_val for uart5 rx function > of pin MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX > is 7 and not 5 as on the imx6ul. With this > patch, console on an imx6ull based board works > with uart5. > > Signed-off-by: Heiko Schocher This is already fixed on v4.19-rc1 and also on a few others PADs that have similar issue. Moreover signals common for both i.MX6UL and i.MX6ULL should have IMX6UL_ as prefix: https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git/commit/?h=for-next=387301d5b88e2fe91de9baf4ca25f771cc633f70 Regards, > > --- > > arch/arm/boot/dts/imx6ull-pinfunc.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/boot/dts/imx6ull-pinfunc.h > b/arch/arm/boot/dts/imx6ull-pinfunc.h > index fdc46bb09cc1a..d835aeae5485b 100644 > --- a/arch/arm/boot/dts/imx6ull-pinfunc.h > +++ b/arch/arm/boot/dts/imx6ull-pinfunc.h > @@ -61,5 +61,6 @@ > #define MX6ULL_PAD_CSI_DATA05__ESAI_TX_CLK0x01F8 > 0x0484 0x 0x9 0x0 > #define MX6ULL_PAD_CSI_DATA06__ESAI_TX5_RX0 0x01FC > 0x0488 0x 0x9 0x0 > #define MX6ULL_PAD_CSI_DATA07__ESAI_T00x0200 > 0x048C 0x 0x9 0x0 > +#define MX6ULL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x00C0 0x034C > 0x0644 0 7 > > #endif /* __DTS_IMX6ULL_PINFUNC_H */ > -- Sébastien Szymanski Software engineer, Armadeus Systems Tel: +33 (0)9 72 29 41 44 Fax: +33 (0)9 72 28 79 26
Re: [PATCH] ARM: dts: imx6ull: fix pinmux input_val for uart5 rx pin
Hi, On 08/30/2018 02:47 PM, Heiko Schocher wrote: > on the imx6ull the input_val for uart5 rx function > of pin MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX > is 7 and not 5 as on the imx6ul. With this > patch, console on an imx6ull based board works > with uart5. > > Signed-off-by: Heiko Schocher This is already fixed on v4.19-rc1 and also on a few others PADs that have similar issue. Moreover signals common for both i.MX6UL and i.MX6ULL should have IMX6UL_ as prefix: https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git/commit/?h=for-next=387301d5b88e2fe91de9baf4ca25f771cc633f70 Regards, > > --- > > arch/arm/boot/dts/imx6ull-pinfunc.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/boot/dts/imx6ull-pinfunc.h > b/arch/arm/boot/dts/imx6ull-pinfunc.h > index fdc46bb09cc1a..d835aeae5485b 100644 > --- a/arch/arm/boot/dts/imx6ull-pinfunc.h > +++ b/arch/arm/boot/dts/imx6ull-pinfunc.h > @@ -61,5 +61,6 @@ > #define MX6ULL_PAD_CSI_DATA05__ESAI_TX_CLK0x01F8 > 0x0484 0x 0x9 0x0 > #define MX6ULL_PAD_CSI_DATA06__ESAI_TX5_RX0 0x01FC > 0x0488 0x 0x9 0x0 > #define MX6ULL_PAD_CSI_DATA07__ESAI_T00x0200 > 0x048C 0x 0x9 0x0 > +#define MX6ULL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x00C0 0x034C > 0x0644 0 7 > > #endif /* __DTS_IMX6ULL_PINFUNC_H */ > -- Sébastien Szymanski Software engineer, Armadeus Systems Tel: +33 (0)9 72 29 41 44 Fax: +33 (0)9 72 28 79 26
[PATCH 1/1] ARM: dts: imx6ull: add operating points
i.MX6ULL has different operating ranges than i.MX6UL so add the
operating points for the i.MX6ULL and removed them form board device
trees. A 25mV offset is added to the minimum allowed values like for the
i.MX6UL.
The valid frequencies are now selected by the cpufreq driver according
to ratings stored in fuses since commit 0aa9abd4c212 ("cpufreq: imx6q:
check speed grades for i.MX6ULL")
Signed-off-by: Sébastien Szymanski
---
arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi | 14 --
arch/arm/boot/dts/imx6ull.dtsi | 19 +++
2 files changed, 19 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
index 3dffbcd50bf6..183193e8580d 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
@@ -20,20 +20,6 @@
{
clock-frequency = <79200>;
- operating-points = <
- /* kHz uV */
- 792000 1225000
- 528000 1175000
- 396000 1025000
- 198000 95
- >;
- fsl,soc-operating-points = <
- /* KHz uV */
- 792000 1175000
- 528000 1175000
- 396000 1175000
- 198000 1175000
- >;
};
{
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index ebc25c98e5e1..ade64bd46fab 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -48,6 +48,25 @@
/* Delete CAAM node in AIPS-2 (i.MX6UL specific) */
/delete-node/
+ {
+ operating-points = <
+ /* kHz uV */
+ 90 1275000
+ 792000 1225000
+ 528000 1175000
+ 396000 1025000
+ 198000 95
+ >;
+ fsl,soc-operating-points = <
+ /* KHz uV */
+ 90 1175000
+ 792000 1175000
+ 528000 1175000
+ 396000 1175000
+ 198000 1175000
+ >;
+};
+
/ {
soc {
aips3: aips-bus@220 {
--
2.16.4
[PATCH 1/1] ARM: dts: imx6ull: add operating points
i.MX6ULL has different operating ranges than i.MX6UL so add the
operating points for the i.MX6ULL and removed them form board device
trees. A 25mV offset is added to the minimum allowed values like for the
i.MX6UL.
The valid frequencies are now selected by the cpufreq driver according
to ratings stored in fuses since commit 0aa9abd4c212 ("cpufreq: imx6q:
check speed grades for i.MX6ULL")
Signed-off-by: Sébastien Szymanski
---
arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi | 14 --
arch/arm/boot/dts/imx6ull.dtsi | 19 +++
2 files changed, 19 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
index 3dffbcd50bf6..183193e8580d 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
@@ -20,20 +20,6 @@
{
clock-frequency = <79200>;
- operating-points = <
- /* kHz uV */
- 792000 1225000
- 528000 1175000
- 396000 1025000
- 198000 95
- >;
- fsl,soc-operating-points = <
- /* KHz uV */
- 792000 1175000
- 528000 1175000
- 396000 1175000
- 198000 1175000
- >;
};
{
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index ebc25c98e5e1..ade64bd46fab 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -48,6 +48,25 @@
/* Delete CAAM node in AIPS-2 (i.MX6UL specific) */
/delete-node/
+ {
+ operating-points = <
+ /* kHz uV */
+ 90 1275000
+ 792000 1225000
+ 528000 1175000
+ 396000 1025000
+ 198000 95
+ >;
+ fsl,soc-operating-points = <
+ /* KHz uV */
+ 90 1175000
+ 792000 1175000
+ 528000 1175000
+ 396000 1175000
+ 198000 1175000
+ >;
+};
+
/ {
soc {
aips3: aips-bus@220 {
--
2.16.4
Re: [PATCH v3 1/3] cpufreq: imx6q: check speed grades for i.MX6ULL
Hi, On 06/11/2018 07:38 AM, Shawn Guo wrote: > On Tue, May 22, 2018 at 08:28:51AM +0200, Sébastien Szymanski wrote: >> Check the max speed supported from the fuses for i.MX6ULL and update the >> operating points table accordingly. >> >> Signed-off-by: Sébastien Szymanski > > Acked-by: Shawn Guo > Thanks, but what about the two others patches ? Now that patch 1 is in 4.18-rc1, should I resend the two others patches ? Should I merge them together ? -- Sébastien Szymanski
Re: [PATCH v3 1/3] cpufreq: imx6q: check speed grades for i.MX6ULL
Hi, On 06/11/2018 07:38 AM, Shawn Guo wrote: > On Tue, May 22, 2018 at 08:28:51AM +0200, Sébastien Szymanski wrote: >> Check the max speed supported from the fuses for i.MX6ULL and update the >> operating points table accordingly. >> >> Signed-off-by: Sébastien Szymanski > > Acked-by: Shawn Guo > Thanks, but what about the two others patches ? Now that patch 1 is in 4.18-rc1, should I resend the two others patches ? Should I merge them together ? -- Sébastien Szymanski
Re: [PATCH v3 1/3] cpufreq: imx6q: check speed grades for i.MX6ULL
On 05/23/2018 06:29 AM, Viresh Kumar wrote: > On 22-05-18, 08:28, Sébastien Szymanski wrote: >> Check the max speed supported from the fuses for i.MX6ULL and update the >> operating points table accordingly. >> >> Signed-off-by: Sébastien Szymanski >> --- >> >> Changes for v3: >> - none > > @Sascha and Shawn: Can you guys please Ack this series if there is > nothing wrong with it ? > ping... -- Sébastien Szymanski Software engineer, Armadeus Systems Tel: +33 (0)9 72 29 41 44 Fax: +33 (0)9 72 28 79 26
Re: [PATCH v3 1/3] cpufreq: imx6q: check speed grades for i.MX6ULL
On 05/23/2018 06:29 AM, Viresh Kumar wrote: > On 22-05-18, 08:28, Sébastien Szymanski wrote: >> Check the max speed supported from the fuses for i.MX6ULL and update the >> operating points table accordingly. >> >> Signed-off-by: Sébastien Szymanski >> --- >> >> Changes for v3: >> - none > > @Sascha and Shawn: Can you guys please Ack this series if there is > nothing wrong with it ? > ping... -- Sébastien Szymanski Software engineer, Armadeus Systems Tel: +33 (0)9 72 29 41 44 Fax: +33 (0)9 72 28 79 26
[PATCH v3 3/3] ARM: dts: imx6ull-colibri-wifi: remove operating points
Operating points are now defined in the imx6ull.dtsi file so remove
them from board device trees.
Signed-off-by: Sébastien Szymanski <sebastien.szyman...@armadeus.com>
---
arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi | 14 --
1 file changed, 14 deletions(-)
diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
index 3dffbcd50bf6..183193e8580d 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
@@ -20,20 +20,6 @@
{
clock-frequency = <79200>;
- operating-points = <
- /* kHz uV */
- 792000 1225000
- 528000 1175000
- 396000 1025000
- 198000 95
- >;
- fsl,soc-operating-points = <
- /* KHz uV */
- 792000 1175000
- 528000 1175000
- 396000 1175000
- 198000 1175000
- >;
};
{
--
2.16.1
[PATCH v3 3/3] ARM: dts: imx6ull-colibri-wifi: remove operating points
Operating points are now defined in the imx6ull.dtsi file so remove
them from board device trees.
Signed-off-by: Sébastien Szymanski
---
arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi | 14 --
1 file changed, 14 deletions(-)
diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
index 3dffbcd50bf6..183193e8580d 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
@@ -20,20 +20,6 @@
{
clock-frequency = <79200>;
- operating-points = <
- /* kHz uV */
- 792000 1225000
- 528000 1175000
- 396000 1025000
- 198000 95
- >;
- fsl,soc-operating-points = <
- /* KHz uV */
- 792000 1175000
- 528000 1175000
- 396000 1175000
- 198000 1175000
- >;
};
{
--
2.16.1
[PATCH v3 2/3] ARM: dts: imx6ull: add operating points
i.MX6ULL has different operating ranges than i.MX6UL so add the
operating points for the i.MX6ULL. A 25mV offset is added to the minimum
allowed values like for the i.MX6UL.
Signed-off-by: Sébastien Szymanski <sebastien.szyman...@armadeus.com>
---
Changes for v3:
- none
Changes for v2:
- Fix soc-operating-points voltage for 792MHz and 900MHz
arch/arm/boot/dts/imx6ull.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index 571ddd71cdba..530d5526b890 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -46,6 +46,25 @@
/* Delete UART8 in AIPS-1 (i.MX6UL specific) */
/delete-node/
+ {
+ operating-points = <
+ /* kHz uV */
+ 90 1275000
+ 792000 1225000
+ 528000 1175000
+ 396000 1025000
+ 198000 95
+ >;
+ fsl,soc-operating-points = <
+ /* KHz uV */
+ 90 1175000
+ 792000 1175000
+ 528000 1175000
+ 396000 1175000
+ 198000 1175000
+ >;
+};
+
/ {
soc {
aips3: aips-bus@220 {
--
2.16.1
[PATCH v3 2/3] ARM: dts: imx6ull: add operating points
i.MX6ULL has different operating ranges than i.MX6UL so add the
operating points for the i.MX6ULL. A 25mV offset is added to the minimum
allowed values like for the i.MX6UL.
Signed-off-by: Sébastien Szymanski
---
Changes for v3:
- none
Changes for v2:
- Fix soc-operating-points voltage for 792MHz and 900MHz
arch/arm/boot/dts/imx6ull.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index 571ddd71cdba..530d5526b890 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -46,6 +46,25 @@
/* Delete UART8 in AIPS-1 (i.MX6UL specific) */
/delete-node/
+ {
+ operating-points = <
+ /* kHz uV */
+ 90 1275000
+ 792000 1225000
+ 528000 1175000
+ 396000 1025000
+ 198000 95
+ >;
+ fsl,soc-operating-points = <
+ /* KHz uV */
+ 90 1175000
+ 792000 1175000
+ 528000 1175000
+ 396000 1175000
+ 198000 1175000
+ >;
+};
+
/ {
soc {
aips3: aips-bus@220 {
--
2.16.1
[PATCH v3 1/3] cpufreq: imx6q: check speed grades for i.MX6ULL
Check the max speed supported from the fuses for i.MX6ULL and update the
operating points table accordingly.
Signed-off-by: Sébastien Szymanski <sebastien.szyman...@armadeus.com>
---
Changes for v3:
- none
Changes for v2:
- none
drivers/cpufreq/imx6q-cpufreq.c | 29 +++--
1 file changed, 23 insertions(+), 6 deletions(-)
diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
index 83cf631fc9bc..f094687cae52 100644
--- a/drivers/cpufreq/imx6q-cpufreq.c
+++ b/drivers/cpufreq/imx6q-cpufreq.c
@@ -266,6 +266,8 @@ static void imx6q_opp_check_speed_grading(struct device
*dev)
}
#define OCOTP_CFG3_6UL_SPEED_696MHZ0x2
+#define OCOTP_CFG3_6ULL_SPEED_792MHZ 0x2
+#define OCOTP_CFG3_6ULL_SPEED_900MHZ 0x3
static void imx6ul_opp_check_speed_grading(struct device *dev)
{
@@ -287,16 +289,30 @@ static void imx6ul_opp_check_speed_grading(struct device
*dev)
* Speed GRADING[1:0] defines the max speed of ARM:
* 2b'00: Reserved;
* 2b'01: 52800Hz;
-* 2b'10: 69600Hz;
-* 2b'11: Reserved;
+* 2b'10: 69600Hz on i.MX6UL, 79200Hz on i.MX6ULL;
+* 2b'11: 9Hz on i.MX6ULL only;
* We need to set the max speed of ARM according to fuse map.
*/
val = readl_relaxed(base + OCOTP_CFG3);
val >>= OCOTP_CFG3_SPEED_SHIFT;
val &= 0x3;
- if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)
- if (dev_pm_opp_disable(dev, 69600))
- dev_warn(dev, "failed to disable 696MHz OPP\n");
+
+ if (of_machine_is_compatible("fsl,imx6ul")) {
+ if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)
+ if (dev_pm_opp_disable(dev, 69600))
+ dev_warn(dev, "failed to disable 696MHz OPP\n");
+ }
+
+ if (of_machine_is_compatible("fsl,imx6ull")) {
+ if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ)
+ if (dev_pm_opp_disable(dev, 79200))
+ dev_warn(dev, "failed to disable 792MHz OPP\n");
+
+ if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ)
+ if (dev_pm_opp_disable(dev, 9))
+ dev_warn(dev, "failed to disable 900MHz OPP\n");
+ }
+
iounmap(base);
put_node:
of_node_put(np);
@@ -356,7 +372,8 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
goto put_reg;
}
- if (of_machine_is_compatible("fsl,imx6ul"))
+ if (of_machine_is_compatible("fsl,imx6ul") ||
+ of_machine_is_compatible("fsl,imx6ull"))
imx6ul_opp_check_speed_grading(cpu_dev);
else
imx6q_opp_check_speed_grading(cpu_dev);
--
2.16.1
[PATCH v3 1/3] cpufreq: imx6q: check speed grades for i.MX6ULL
Check the max speed supported from the fuses for i.MX6ULL and update the
operating points table accordingly.
Signed-off-by: Sébastien Szymanski
---
Changes for v3:
- none
Changes for v2:
- none
drivers/cpufreq/imx6q-cpufreq.c | 29 +++--
1 file changed, 23 insertions(+), 6 deletions(-)
diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
index 83cf631fc9bc..f094687cae52 100644
--- a/drivers/cpufreq/imx6q-cpufreq.c
+++ b/drivers/cpufreq/imx6q-cpufreq.c
@@ -266,6 +266,8 @@ static void imx6q_opp_check_speed_grading(struct device
*dev)
}
#define OCOTP_CFG3_6UL_SPEED_696MHZ0x2
+#define OCOTP_CFG3_6ULL_SPEED_792MHZ 0x2
+#define OCOTP_CFG3_6ULL_SPEED_900MHZ 0x3
static void imx6ul_opp_check_speed_grading(struct device *dev)
{
@@ -287,16 +289,30 @@ static void imx6ul_opp_check_speed_grading(struct device
*dev)
* Speed GRADING[1:0] defines the max speed of ARM:
* 2b'00: Reserved;
* 2b'01: 52800Hz;
-* 2b'10: 69600Hz;
-* 2b'11: Reserved;
+* 2b'10: 69600Hz on i.MX6UL, 79200Hz on i.MX6ULL;
+* 2b'11: 9Hz on i.MX6ULL only;
* We need to set the max speed of ARM according to fuse map.
*/
val = readl_relaxed(base + OCOTP_CFG3);
val >>= OCOTP_CFG3_SPEED_SHIFT;
val &= 0x3;
- if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)
- if (dev_pm_opp_disable(dev, 69600))
- dev_warn(dev, "failed to disable 696MHz OPP\n");
+
+ if (of_machine_is_compatible("fsl,imx6ul")) {
+ if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)
+ if (dev_pm_opp_disable(dev, 69600))
+ dev_warn(dev, "failed to disable 696MHz OPP\n");
+ }
+
+ if (of_machine_is_compatible("fsl,imx6ull")) {
+ if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ)
+ if (dev_pm_opp_disable(dev, 79200))
+ dev_warn(dev, "failed to disable 792MHz OPP\n");
+
+ if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ)
+ if (dev_pm_opp_disable(dev, 9))
+ dev_warn(dev, "failed to disable 900MHz OPP\n");
+ }
+
iounmap(base);
put_node:
of_node_put(np);
@@ -356,7 +372,8 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
goto put_reg;
}
- if (of_machine_is_compatible("fsl,imx6ul"))
+ if (of_machine_is_compatible("fsl,imx6ul") ||
+ of_machine_is_compatible("fsl,imx6ull"))
imx6ul_opp_check_speed_grading(cpu_dev);
else
imx6q_opp_check_speed_grading(cpu_dev);
--
2.16.1
[PATCH v2 3/3] HID: cp2112: fix broken gpio_direction_input callback
When everything goes smoothly, ret is set to 0 which makes the function
to return EIO error.
Fixes: 8e9faa15469e ("HID: cp2112: fix gpio-callback error handling")
Signed-off-by: Sébastien Szymanski <sebastien.szyman...@armadeus.com>
---
Changes in v2:
- rework error handling to have only one exit path as suggested by
Benjamin Tissoires <benjamin.tissoi...@redhat.com>
drivers/hid/hid-cp2112.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c
index 28e3c18..68cdc96 100644
--- a/drivers/hid/hid-cp2112.c
+++ b/drivers/hid/hid-cp2112.c
@@ -196,6 +196,8 @@ static int cp2112_gpio_direction_input(struct gpio_chip
*chip, unsigned offset)
HID_REQ_GET_REPORT);
if (ret != CP2112_GPIO_CONFIG_LENGTH) {
hid_err(hdev, "error requesting GPIO config: %d\n", ret);
+ if (ret >= 0)
+ ret = -EIO;
goto exit;
}
@@ -205,8 +207,10 @@ static int cp2112_gpio_direction_input(struct gpio_chip
*chip, unsigned offset)
ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
HID_REQ_SET_REPORT);
- if (ret < 0) {
+ if (ret != CP2112_GPIO_CONFIG_LENGTH) {
hid_err(hdev, "error setting GPIO config: %d\n", ret);
+ if (ret >= 0)
+ ret = -EIO;
goto exit;
}
@@ -214,7 +218,7 @@ static int cp2112_gpio_direction_input(struct gpio_chip
*chip, unsigned offset)
exit:
mutex_unlock(>lock);
- return ret < 0 ? ret : -EIO;
+ return ret;
}
static void cp2112_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
--
2.7.3
[PATCH v2 3/3] HID: cp2112: fix broken gpio_direction_input callback
When everything goes smoothly, ret is set to 0 which makes the function
to return EIO error.
Fixes: 8e9faa15469e ("HID: cp2112: fix gpio-callback error handling")
Signed-off-by: Sébastien Szymanski
---
Changes in v2:
- rework error handling to have only one exit path as suggested by
Benjamin Tissoires
drivers/hid/hid-cp2112.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c
index 28e3c18..68cdc96 100644
--- a/drivers/hid/hid-cp2112.c
+++ b/drivers/hid/hid-cp2112.c
@@ -196,6 +196,8 @@ static int cp2112_gpio_direction_input(struct gpio_chip
*chip, unsigned offset)
HID_REQ_GET_REPORT);
if (ret != CP2112_GPIO_CONFIG_LENGTH) {
hid_err(hdev, "error requesting GPIO config: %d\n", ret);
+ if (ret >= 0)
+ ret = -EIO;
goto exit;
}
@@ -205,8 +207,10 @@ static int cp2112_gpio_direction_input(struct gpio_chip
*chip, unsigned offset)
ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
HID_REQ_SET_REPORT);
- if (ret < 0) {
+ if (ret != CP2112_GPIO_CONFIG_LENGTH) {
hid_err(hdev, "error setting GPIO config: %d\n", ret);
+ if (ret >= 0)
+ ret = -EIO;
goto exit;
}
@@ -214,7 +218,7 @@ static int cp2112_gpio_direction_input(struct gpio_chip
*chip, unsigned offset)
exit:
mutex_unlock(>lock);
- return ret < 0 ? ret : -EIO;
+ return ret;
}
static void cp2112_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
--
2.7.3
Re: [PATCH 1/3] HID: cp2112: fix interface specification URL
On 11/09/2017 12:45 PM, Jiri Kosina wrote: > On Thu, 2 Nov 2017, Sébastien Szymanski wrote: > >> Signed-off-by: Sébastien Szymanski <sebastien.szyman...@armadeus.com> >> --- >> drivers/hid/hid-cp2112.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c >> index 078026f..28e3c18 100644 >> --- a/drivers/hid/hid-cp2112.c >> +++ b/drivers/hid/hid-cp2112.c >> @@ -21,7 +21,7 @@ >> * Data Sheet: >> * http://www.silabs.com/Support%20Documents/TechnicalDocs/CP2112.pdf >> * Programming Interface Specification: >> - * http://www.silabs.com/Support%20Documents/TechnicalDocs/AN495.pdf >> + * >> https://www.silabs.com/documents/public/application-notes/an495-cp2112-interface-specification.pdf >> */ > > I've applied patches 1 and 2 (with stable anotation) for now. Thanks, > Thanks, I've send a v2 of patch 3. Regards, P.S: I don't see patch 1 on your cgit, is it normal? -- Sébastien Szymanski Software engineer, Armadeus Systems Tel: +33 (0)9 72 29 41 44 Fax: +33 (0)9 72 28 79 26
Re: [PATCH 1/3] HID: cp2112: fix interface specification URL
On 11/09/2017 12:45 PM, Jiri Kosina wrote: > On Thu, 2 Nov 2017, Sébastien Szymanski wrote: > >> Signed-off-by: Sébastien Szymanski >> --- >> drivers/hid/hid-cp2112.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c >> index 078026f..28e3c18 100644 >> --- a/drivers/hid/hid-cp2112.c >> +++ b/drivers/hid/hid-cp2112.c >> @@ -21,7 +21,7 @@ >> * Data Sheet: >> * http://www.silabs.com/Support%20Documents/TechnicalDocs/CP2112.pdf >> * Programming Interface Specification: >> - * http://www.silabs.com/Support%20Documents/TechnicalDocs/AN495.pdf >> + * >> https://www.silabs.com/documents/public/application-notes/an495-cp2112-interface-specification.pdf >> */ > > I've applied patches 1 and 2 (with stable anotation) for now. Thanks, > Thanks, I've send a v2 of patch 3. Regards, P.S: I don't see patch 1 on your cgit, is it normal? -- Sébastien Szymanski Software engineer, Armadeus Systems Tel: +33 (0)9 72 29 41 44 Fax: +33 (0)9 72 28 79 26
Re: [PATCH 3/3] HID: cp2112: fix broken gpio_direction_input callback
On 11/06/2017 09:11 AM, Benjamin Tissoires wrote:
> On Nov 02 2017 or thereabouts, Sébastien Szymanski wrote:
>> When everything goes smoothly, ret is set to 0 which makes the function
>> to return EIO error.
>>
>> Fixes: 8e9faa15469e ("HID: cp2112: fix gpio-callback error handling")
>> Signed-off-by: Sébastien Szymanski <sebastien.szyman...@armadeus.com>
>> ---
>> drivers/hid/hid-cp2112.c | 5 +++--
>> 1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c
>> index 28e3c18..f7754a6 100644
>> --- a/drivers/hid/hid-cp2112.c
>> +++ b/drivers/hid/hid-cp2112.c
>> @@ -205,12 +205,13 @@ static int cp2112_gpio_direction_input(struct
>> gpio_chip *chip, unsigned offset)
>> ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
>> CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
>> HID_REQ_SET_REPORT);
>> -if (ret < 0) {
>> +if (ret != CP2112_GPIO_CONFIG_LENGTH) {
>
> Ack for this.
As explained in the interface specification, the device doesn't answer
to set reports, so the transfer should be CP2112_GPIO_CONFIG_LENGTH (5)
bytes.
>
>> hid_err(hdev, "error setting GPIO config: %d\n", ret);
>> goto exit;
>> }
>>
>> -ret = 0;
>> +mutex_unlock(>lock);
>> +return 0;
>
> Wouldn't it be better to just turn
> - return ret < 0 ? ret : -EIO;
> into
> + return ret <= 0 ? ret : -EIO;
> at the end of the function?
Well, the commit I mentioned in the Fixes tag, changes from
- return ret <= 0 ? ret : -EIO;
to
+ return ret < 0 ? ret : -EIO;
because ret being 0 could mean that one of the hid_hw_raw_request
returned 0.
Regards,
>
> I'd rather keep the same exit path in both cases, error or success.
>
> Cheers,
> Benjamin
>
>
>>
>> exit:
>> mutex_unlock(>lock);
>> --
>> 2.7.3
>>
--
Sébastien Szymanski
Software engineer, Armadeus Systems
Tel: +33 (0)9 72 29 41 44
Fax: +33 (0)9 72 28 79 26
Re: [PATCH 3/3] HID: cp2112: fix broken gpio_direction_input callback
On 11/06/2017 09:11 AM, Benjamin Tissoires wrote:
> On Nov 02 2017 or thereabouts, Sébastien Szymanski wrote:
>> When everything goes smoothly, ret is set to 0 which makes the function
>> to return EIO error.
>>
>> Fixes: 8e9faa15469e ("HID: cp2112: fix gpio-callback error handling")
>> Signed-off-by: Sébastien Szymanski
>> ---
>> drivers/hid/hid-cp2112.c | 5 +++--
>> 1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c
>> index 28e3c18..f7754a6 100644
>> --- a/drivers/hid/hid-cp2112.c
>> +++ b/drivers/hid/hid-cp2112.c
>> @@ -205,12 +205,13 @@ static int cp2112_gpio_direction_input(struct
>> gpio_chip *chip, unsigned offset)
>> ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
>> CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
>> HID_REQ_SET_REPORT);
>> -if (ret < 0) {
>> +if (ret != CP2112_GPIO_CONFIG_LENGTH) {
>
> Ack for this.
As explained in the interface specification, the device doesn't answer
to set reports, so the transfer should be CP2112_GPIO_CONFIG_LENGTH (5)
bytes.
>
>> hid_err(hdev, "error setting GPIO config: %d\n", ret);
>> goto exit;
>> }
>>
>> -ret = 0;
>> +mutex_unlock(>lock);
>> +return 0;
>
> Wouldn't it be better to just turn
> - return ret < 0 ? ret : -EIO;
> into
> + return ret <= 0 ? ret : -EIO;
> at the end of the function?
Well, the commit I mentioned in the Fixes tag, changes from
- return ret <= 0 ? ret : -EIO;
to
+ return ret < 0 ? ret : -EIO;
because ret being 0 could mean that one of the hid_hw_raw_request
returned 0.
Regards,
>
> I'd rather keep the same exit path in both cases, error or success.
>
> Cheers,
> Benjamin
>
>
>>
>> exit:
>> mutex_unlock(>lock);
>> --
>> 2.7.3
>>
--
Sébastien Szymanski
Software engineer, Armadeus Systems
Tel: +33 (0)9 72 29 41 44
Fax: +33 (0)9 72 28 79 26
[PATCH 1/3] HID: cp2112: fix interface specification URL
Signed-off-by: Sébastien Szymanski <sebastien.szyman...@armadeus.com> --- drivers/hid/hid-cp2112.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c index 078026f..28e3c18 100644 --- a/drivers/hid/hid-cp2112.c +++ b/drivers/hid/hid-cp2112.c @@ -21,7 +21,7 @@ * Data Sheet: * http://www.silabs.com/Support%20Documents/TechnicalDocs/CP2112.pdf * Programming Interface Specification: - * http://www.silabs.com/Support%20Documents/TechnicalDocs/AN495.pdf + * https://www.silabs.com/documents/public/application-notes/an495-cp2112-interface-specification.pdf */ #include -- 2.7.3
[PATCH 1/3] HID: cp2112: fix interface specification URL
Signed-off-by: Sébastien Szymanski --- drivers/hid/hid-cp2112.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c index 078026f..28e3c18 100644 --- a/drivers/hid/hid-cp2112.c +++ b/drivers/hid/hid-cp2112.c @@ -21,7 +21,7 @@ * Data Sheet: * http://www.silabs.com/Support%20Documents/TechnicalDocs/CP2112.pdf * Programming Interface Specification: - * http://www.silabs.com/Support%20Documents/TechnicalDocs/AN495.pdf + * https://www.silabs.com/documents/public/application-notes/an495-cp2112-interface-specification.pdf */ #include -- 2.7.3
[PATCH 3/3] HID: cp2112: fix broken gpio_direction_input callback
When everything goes smoothly, ret is set to 0 which makes the function
to return EIO error.
Fixes: 8e9faa15469e ("HID: cp2112: fix gpio-callback error handling")
Signed-off-by: Sébastien Szymanski <sebastien.szyman...@armadeus.com>
---
drivers/hid/hid-cp2112.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c
index 28e3c18..f7754a6 100644
--- a/drivers/hid/hid-cp2112.c
+++ b/drivers/hid/hid-cp2112.c
@@ -205,12 +205,13 @@ static int cp2112_gpio_direction_input(struct gpio_chip
*chip, unsigned offset)
ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
HID_REQ_SET_REPORT);
- if (ret < 0) {
+ if (ret != CP2112_GPIO_CONFIG_LENGTH) {
hid_err(hdev, "error setting GPIO config: %d\n", ret);
goto exit;
}
- ret = 0;
+ mutex_unlock(>lock);
+ return 0;
exit:
mutex_unlock(>lock);
--
2.7.3
[PATCH 3/3] HID: cp2112: fix broken gpio_direction_input callback
When everything goes smoothly, ret is set to 0 which makes the function
to return EIO error.
Fixes: 8e9faa15469e ("HID: cp2112: fix gpio-callback error handling")
Signed-off-by: Sébastien Szymanski
---
drivers/hid/hid-cp2112.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c
index 28e3c18..f7754a6 100644
--- a/drivers/hid/hid-cp2112.c
+++ b/drivers/hid/hid-cp2112.c
@@ -205,12 +205,13 @@ static int cp2112_gpio_direction_input(struct gpio_chip
*chip, unsigned offset)
ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
HID_REQ_SET_REPORT);
- if (ret < 0) {
+ if (ret != CP2112_GPIO_CONFIG_LENGTH) {
hid_err(hdev, "error setting GPIO config: %d\n", ret);
goto exit;
}
- ret = 0;
+ mutex_unlock(>lock);
+ return 0;
exit:
mutex_unlock(>lock);
--
2.7.3
[PATCH 2/3] HID: cp2112: add HIDRAW dependency
Otherwise, with HIDRAW=n, the probe function crashes because of null
dereference of hdev->hidraw.
Fixes: 42cb6b35b9e6 ("HID: cp2112: use proper hidraw name with minor number")
Signed-off-by: Sébastien Szymanski <sebastien.szyman...@armadeus.com>
---
drivers/hid/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig
index 374301f..8c7a0ce 100644
--- a/drivers/hid/Kconfig
+++ b/drivers/hid/Kconfig
@@ -230,7 +230,7 @@ config HID_CMEDIA
config HID_CP2112
tristate "Silicon Labs CP2112 HID USB-to-SMBus Bridge support"
- depends on USB_HID && I2C && GPIOLIB
+ depends on USB_HID && HIDRAW && I2C && GPIOLIB
select GPIOLIB_IRQCHIP
---help---
Support for Silicon Labs CP2112 HID USB to SMBus Master Bridge.
--
2.7.3
[PATCH 2/3] HID: cp2112: add HIDRAW dependency
Otherwise, with HIDRAW=n, the probe function crashes because of null
dereference of hdev->hidraw.
Fixes: 42cb6b35b9e6 ("HID: cp2112: use proper hidraw name with minor number")
Signed-off-by: Sébastien Szymanski
---
drivers/hid/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig
index 374301f..8c7a0ce 100644
--- a/drivers/hid/Kconfig
+++ b/drivers/hid/Kconfig
@@ -230,7 +230,7 @@ config HID_CMEDIA
config HID_CP2112
tristate "Silicon Labs CP2112 HID USB-to-SMBus Bridge support"
- depends on USB_HID && I2C && GPIOLIB
+ depends on USB_HID && HIDRAW && I2C && GPIOLIB
select GPIOLIB_IRQCHIP
---help---
Support for Silicon Labs CP2112 HID USB to SMBus Master Bridge.
--
2.7.3
Re: [PATCH 1/1] cpufreq: imx6q: imx6ull: use PLL1 for frequency higher than 528MHz
Hello,
On 08/03/2017 04:03 AM, Shawn Guo wrote:
> On Fri, Jul 28, 2017 at 10:36:33AM +0200, Sébastien Szymanski wrote:
>> Setting the frequency higher than 528Mhz actually sets the ARM
>> clock to 528MHz. That's because PLL2 is used as the root clock when the
>> frequency is higher than 396MHz.
>>
>> cpupower frequency-set -f 792000
>>
>> arm_clk_root on the CCM_CLKO2 signal is 528MHz instead of 792MHz.
>>
>> [ 61.606383] cpu cpu0: 396 MHz, 1025 mV --> 792 MHz, 1225 mV
>>
>> pll2 1 1 52800 0 0
>>pll2_bypass 1 1 52800 0 0
>> pll2_bus 3 3 52800 0 0
>> ca7_secondary_sel 1 1 52800 0 0
>> step 1 1 52800 0 0
>> pll1_sw 1 1 52800 0 0
>>arm1 1 52800 0 0
>>
>> Fixes this by using the PLL1 as the root clock when the frequency is
>> higher than 528MHz.
>>
>> cpupower frequency-set -f 792000
>>
>> arm_clk_root on the CCM_CLKO2 signal is now 792MHz as expected.
>>
>> [ 69.717987] cpu cpu0: 198 MHz, 950 mV --> 792 MHz, 1225 mV
>>
>> pll1 1 1 79200 0 0
>>pll1_bypass 1 1 79200 0 0
>> pll1_sys 1 1 79200 0 0
>> pll1_sw 1 1 79200 0 0
>> arm1 1 79200 0 0
>>
>> Signed-off-by: Sébastien Szymanski <sebastien.szyman...@armadeus.com>
>
> Can you please specify on which SoCs you are seeing this problem? And I
> would like invite Anson and Leonard to review it.
My SoC is MCIMX6Y2CVM08AA which is a 792MHz i.MX6ULL. I forgot to
mention that I added the following operating points in my device tree:
operating-points: 792000 1225000
fsl,soc-operating-points: 792000 1175000
Best regards,
>
> Shawn
>
>> ---
>> drivers/cpufreq/imx6q-cpufreq.c | 11 +--
>> 1 file changed, 9 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/cpufreq/imx6q-cpufreq.c
>> b/drivers/cpufreq/imx6q-cpufreq.c
>> index b6edd3c..e5fba50 100644
>> --- a/drivers/cpufreq/imx6q-cpufreq.c
>> +++ b/drivers/cpufreq/imx6q-cpufreq.c
>> @@ -18,6 +18,7 @@
>>
>> #define PU_SOC_VOLTAGE_NORMAL 125
>> #define PU_SOC_VOLTAGE_HIGH 1275000
>> +#define FREQ_528_MHZ52800
>> #define FREQ_1P2_GHZ12
>>
>> static struct regulator *arm_reg;
>> @@ -110,14 +111,20 @@ static int imx6q_set_target(struct cpufreq_policy
>> *policy, unsigned int index)
>> * voltage of 528MHz, so lower the CPU frequency to one
>> * half before changing CPU frequency.
>> */
>> -clk_set_rate(arm_clk, (old_freq >> 1) * 1000);
>> -clk_set_parent(pll1_sw_clk, pll1_sys_clk);
>> +if ((old_freq * 1000) <= FREQ_528_MHZ) {
>> +clk_set_rate(arm_clk, (old_freq >> 1) * 1000);
>> +clk_set_parent(pll1_sw_clk, pll1_sys_clk);
>> +}
>> if (freq_hz > clk_get_rate(pll2_pfd2_396m_clk))
>> clk_set_parent(secondary_sel_clk, pll2_bus_clk);
>> else
>> clk_set_parent(secondary_sel_clk, pll2_pfd2_396m_clk);
>> clk_set_parent(step_clk, secondary_sel_clk);
>> clk_set_parent(pll1_sw_clk, step_clk);
>> +if (freq_hz > FREQ_528_MHZ) {
>> + clk_set_rate(pll1_sys_clk, freq_hz);
>> +clk_set_parent(pll1_sw_clk, pll1_sys_clk);
>> +}
>> } else {
>> clk_set_parent(step_clk, pll2_pfd2_396m_clk);
>> clk_set_parent(pll1_sw_clk, step_clk);
>> --
>> 2.7.3
>>
>>
>> ___
>> linux-arm-kernel mailing list
>> linux-arm-ker...@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Sébastien Szymanski
Software engineer, Armadeus Systems
Tel: +33 (0)9 72 29 41 44
Fax: +33 (0)9 72 28 79 26
Re: [PATCH 1/1] cpufreq: imx6q: imx6ull: use PLL1 for frequency higher than 528MHz
Hello,
On 08/03/2017 04:03 AM, Shawn Guo wrote:
> On Fri, Jul 28, 2017 at 10:36:33AM +0200, Sébastien Szymanski wrote:
>> Setting the frequency higher than 528Mhz actually sets the ARM
>> clock to 528MHz. That's because PLL2 is used as the root clock when the
>> frequency is higher than 396MHz.
>>
>> cpupower frequency-set -f 792000
>>
>> arm_clk_root on the CCM_CLKO2 signal is 528MHz instead of 792MHz.
>>
>> [ 61.606383] cpu cpu0: 396 MHz, 1025 mV --> 792 MHz, 1225 mV
>>
>> pll2 1 1 52800 0 0
>>pll2_bypass 1 1 52800 0 0
>> pll2_bus 3 3 52800 0 0
>> ca7_secondary_sel 1 1 52800 0 0
>> step 1 1 52800 0 0
>> pll1_sw 1 1 52800 0 0
>>arm1 1 52800 0 0
>>
>> Fixes this by using the PLL1 as the root clock when the frequency is
>> higher than 528MHz.
>>
>> cpupower frequency-set -f 792000
>>
>> arm_clk_root on the CCM_CLKO2 signal is now 792MHz as expected.
>>
>> [ 69.717987] cpu cpu0: 198 MHz, 950 mV --> 792 MHz, 1225 mV
>>
>> pll1 1 1 79200 0 0
>>pll1_bypass 1 1 79200 0 0
>> pll1_sys 1 1 79200 0 0
>> pll1_sw 1 1 79200 0 0
>> arm1 1 79200 0 0
>>
>> Signed-off-by: Sébastien Szymanski
>
> Can you please specify on which SoCs you are seeing this problem? And I
> would like invite Anson and Leonard to review it.
My SoC is MCIMX6Y2CVM08AA which is a 792MHz i.MX6ULL. I forgot to
mention that I added the following operating points in my device tree:
operating-points: 792000 1225000
fsl,soc-operating-points: 792000 1175000
Best regards,
>
> Shawn
>
>> ---
>> drivers/cpufreq/imx6q-cpufreq.c | 11 +--
>> 1 file changed, 9 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/cpufreq/imx6q-cpufreq.c
>> b/drivers/cpufreq/imx6q-cpufreq.c
>> index b6edd3c..e5fba50 100644
>> --- a/drivers/cpufreq/imx6q-cpufreq.c
>> +++ b/drivers/cpufreq/imx6q-cpufreq.c
>> @@ -18,6 +18,7 @@
>>
>> #define PU_SOC_VOLTAGE_NORMAL 125
>> #define PU_SOC_VOLTAGE_HIGH 1275000
>> +#define FREQ_528_MHZ52800
>> #define FREQ_1P2_GHZ12
>>
>> static struct regulator *arm_reg;
>> @@ -110,14 +111,20 @@ static int imx6q_set_target(struct cpufreq_policy
>> *policy, unsigned int index)
>> * voltage of 528MHz, so lower the CPU frequency to one
>> * half before changing CPU frequency.
>> */
>> -clk_set_rate(arm_clk, (old_freq >> 1) * 1000);
>> -clk_set_parent(pll1_sw_clk, pll1_sys_clk);
>> +if ((old_freq * 1000) <= FREQ_528_MHZ) {
>> +clk_set_rate(arm_clk, (old_freq >> 1) * 1000);
>> +clk_set_parent(pll1_sw_clk, pll1_sys_clk);
>> +}
>> if (freq_hz > clk_get_rate(pll2_pfd2_396m_clk))
>> clk_set_parent(secondary_sel_clk, pll2_bus_clk);
>> else
>> clk_set_parent(secondary_sel_clk, pll2_pfd2_396m_clk);
>> clk_set_parent(step_clk, secondary_sel_clk);
>> clk_set_parent(pll1_sw_clk, step_clk);
>> +if (freq_hz > FREQ_528_MHZ) {
>> +clk_set_rate(pll1_sys_clk, freq_hz);
>> +clk_set_parent(pll1_sw_clk, pll1_sys_clk);
>> +}
>> } else {
>> clk_set_parent(step_clk, pll2_pfd2_396m_clk);
>> clk_set_parent(pll1_sw_clk, step_clk);
>> --
>> 2.7.3
>>
>>
>> ___
>> linux-arm-kernel mailing list
>> linux-arm-ker...@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Sébastien Szymanski
Software engineer, Armadeus Systems
Tel: +33 (0)9 72 29 41 44
Fax: +33 (0)9 72 28 79 26
[PATCH 1/1] clk: imx6: refine hdmi_isfr's parent to make HDMI work on i.MX6 SoCs w/o VPU
On i.MX6 SoCs without VPU (in my case MCIMX6D4AVT10AC), the hdmi driver
fails to probe:
[2.540030] dwhdmi-imx 12.hdmi: Unsupported HDMI controller
(:00:00)
[2.548199] imx-drm display-subsystem: failed to bind 12.hdmi
(ops dw_hdmi_imx_ops): -19
[2.557403] imx-drm display-subsystem: master bind failed: -19
That's because hdmi_isfr's parent, video_27m, is not correctly ungated.
As explained in commit 5ccc248cc537 ("ARM: imx6q: clk: Add support for
mipi_core_cfg clock as a shared clock gate"), video_27m is gated by
CCM_CCGR3[CG8].
On i.MX6 SoCs with VPU, the hdmi is working thanks to the
CCM_CMEOR[mod_en_ov_vpu] bit which makes the video_27m ungated whatever
is in CCM_CCGR3[CG8]. The issue can be reproduced by setting
CCMEOR[mod_en_ov_vpu] to 0.
Make the HDMI work in every case by setting hdmi_isfr's parent to
mipi_core_cfg.
Signed-off-by: Sébastien Szymanski <sebastien.szyman...@armadeus.com>
---
drivers/clk/imx/clk-imx6q.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index c07df719..8d518ad 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -761,7 +761,7 @@ static void __init imx6q_clocks_init(struct device_node
*ccm_node)
clk[IMX6QDL_CLK_GPU2D_CORE] = imx_clk_gate2("gpu2d_core",
"gpu2d_core_podf", base + 0x6c, 24);
clk[IMX6QDL_CLK_GPU3D_CORE] = imx_clk_gate2("gpu3d_core",
"gpu3d_core_podf", base + 0x6c, 26);
clk[IMX6QDL_CLK_HDMI_IAHB]= imx_clk_gate2("hdmi_iahb", "ahb",
base + 0x70, 0);
- clk[IMX6QDL_CLK_HDMI_ISFR]= imx_clk_gate2("hdmi_isfr",
"video_27m", base + 0x70, 4);
+ clk[IMX6QDL_CLK_HDMI_ISFR]= imx_clk_gate2("hdmi_isfr",
"mipi_core_cfg", base + 0x70, 4);
clk[IMX6QDL_CLK_I2C1] = imx_clk_gate2("i2c1",
"ipg_per", base + 0x70, 6);
clk[IMX6QDL_CLK_I2C2] = imx_clk_gate2("i2c2",
"ipg_per", base + 0x70, 8);
clk[IMX6QDL_CLK_I2C3] = imx_clk_gate2("i2c3",
"ipg_per", base + 0x70, 10);
--
2.7.3
[PATCH 1/1] clk: imx6: refine hdmi_isfr's parent to make HDMI work on i.MX6 SoCs w/o VPU
On i.MX6 SoCs without VPU (in my case MCIMX6D4AVT10AC), the hdmi driver
fails to probe:
[2.540030] dwhdmi-imx 12.hdmi: Unsupported HDMI controller
(:00:00)
[2.548199] imx-drm display-subsystem: failed to bind 12.hdmi
(ops dw_hdmi_imx_ops): -19
[2.557403] imx-drm display-subsystem: master bind failed: -19
That's because hdmi_isfr's parent, video_27m, is not correctly ungated.
As explained in commit 5ccc248cc537 ("ARM: imx6q: clk: Add support for
mipi_core_cfg clock as a shared clock gate"), video_27m is gated by
CCM_CCGR3[CG8].
On i.MX6 SoCs with VPU, the hdmi is working thanks to the
CCM_CMEOR[mod_en_ov_vpu] bit which makes the video_27m ungated whatever
is in CCM_CCGR3[CG8]. The issue can be reproduced by setting
CCMEOR[mod_en_ov_vpu] to 0.
Make the HDMI work in every case by setting hdmi_isfr's parent to
mipi_core_cfg.
Signed-off-by: Sébastien Szymanski
---
drivers/clk/imx/clk-imx6q.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index c07df719..8d518ad 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -761,7 +761,7 @@ static void __init imx6q_clocks_init(struct device_node
*ccm_node)
clk[IMX6QDL_CLK_GPU2D_CORE] = imx_clk_gate2("gpu2d_core",
"gpu2d_core_podf", base + 0x6c, 24);
clk[IMX6QDL_CLK_GPU3D_CORE] = imx_clk_gate2("gpu3d_core",
"gpu3d_core_podf", base + 0x6c, 26);
clk[IMX6QDL_CLK_HDMI_IAHB]= imx_clk_gate2("hdmi_iahb", "ahb",
base + 0x70, 0);
- clk[IMX6QDL_CLK_HDMI_ISFR]= imx_clk_gate2("hdmi_isfr",
"video_27m", base + 0x70, 4);
+ clk[IMX6QDL_CLK_HDMI_ISFR]= imx_clk_gate2("hdmi_isfr",
"mipi_core_cfg", base + 0x70, 4);
clk[IMX6QDL_CLK_I2C1] = imx_clk_gate2("i2c1",
"ipg_per", base + 0x70, 6);
clk[IMX6QDL_CLK_I2C2] = imx_clk_gate2("i2c2",
"ipg_per", base + 0x70, 8);
clk[IMX6QDL_CLK_I2C3] = imx_clk_gate2("i2c3",
"ipg_per", base + 0x70, 10);
--
2.7.3
[PATCH 1/1] cpufreq: imx6q: imx6ull: use PLL1 for frequency higher than 528MHz
Setting the frequency higher than 528Mhz actually sets the ARM
clock to 528MHz. That's because PLL2 is used as the root clock when the
frequency is higher than 396MHz.
cpupower frequency-set -f 792000
arm_clk_root on the CCM_CLKO2 signal is 528MHz instead of 792MHz.
[ 61.606383] cpu cpu0: 396 MHz, 1025 mV --> 792 MHz, 1225 mV
pll2 1 1 52800 0 0
pll2_bypass 1 1 52800 0 0
pll2_bus 3 3 52800 0 0
ca7_secondary_sel 1 1 52800 0 0
step 1 1 52800 0 0
pll1_sw 1 1 52800 0 0
arm1 1 52800 0 0
Fixes this by using the PLL1 as the root clock when the frequency is
higher than 528MHz.
cpupower frequency-set -f 792000
arm_clk_root on the CCM_CLKO2 signal is now 792MHz as expected.
[ 69.717987] cpu cpu0: 198 MHz, 950 mV --> 792 MHz, 1225 mV
pll1 1 1 79200 0 0
pll1_bypass 1 1 79200 0 0
pll1_sys 1 1 79200 0 0
pll1_sw 1 1 79200 0 0
arm1 1 79200 0 0
Signed-off-by: Sébastien Szymanski <sebastien.szyman...@armadeus.com>
---
drivers/cpufreq/imx6q-cpufreq.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
index b6edd3c..e5fba50 100644
--- a/drivers/cpufreq/imx6q-cpufreq.c
+++ b/drivers/cpufreq/imx6q-cpufreq.c
@@ -18,6 +18,7 @@
#define PU_SOC_VOLTAGE_NORMAL 125
#define PU_SOC_VOLTAGE_HIGH1275000
+#define FREQ_528_MHZ 52800
#define FREQ_1P2_GHZ 12
static struct regulator *arm_reg;
@@ -110,14 +111,20 @@ static int imx6q_set_target(struct cpufreq_policy
*policy, unsigned int index)
* voltage of 528MHz, so lower the CPU frequency to one
* half before changing CPU frequency.
*/
- clk_set_rate(arm_clk, (old_freq >> 1) * 1000);
- clk_set_parent(pll1_sw_clk, pll1_sys_clk);
+ if ((old_freq * 1000) <= FREQ_528_MHZ) {
+ clk_set_rate(arm_clk, (old_freq >> 1) * 1000);
+ clk_set_parent(pll1_sw_clk, pll1_sys_clk);
+ }
if (freq_hz > clk_get_rate(pll2_pfd2_396m_clk))
clk_set_parent(secondary_sel_clk, pll2_bus_clk);
else
clk_set_parent(secondary_sel_clk, pll2_pfd2_396m_clk);
clk_set_parent(step_clk, secondary_sel_clk);
clk_set_parent(pll1_sw_clk, step_clk);
+ if (freq_hz > FREQ_528_MHZ) {
+ clk_set_rate(pll1_sys_clk, freq_hz);
+ clk_set_parent(pll1_sw_clk, pll1_sys_clk);
+ }
} else {
clk_set_parent(step_clk, pll2_pfd2_396m_clk);
clk_set_parent(pll1_sw_clk, step_clk);
--
2.7.3
[PATCH 1/1] cpufreq: imx6q: imx6ull: use PLL1 for frequency higher than 528MHz
Setting the frequency higher than 528Mhz actually sets the ARM
clock to 528MHz. That's because PLL2 is used as the root clock when the
frequency is higher than 396MHz.
cpupower frequency-set -f 792000
arm_clk_root on the CCM_CLKO2 signal is 528MHz instead of 792MHz.
[ 61.606383] cpu cpu0: 396 MHz, 1025 mV --> 792 MHz, 1225 mV
pll2 1 1 52800 0 0
pll2_bypass 1 1 52800 0 0
pll2_bus 3 3 52800 0 0
ca7_secondary_sel 1 1 52800 0 0
step 1 1 52800 0 0
pll1_sw 1 1 52800 0 0
arm1 1 52800 0 0
Fixes this by using the PLL1 as the root clock when the frequency is
higher than 528MHz.
cpupower frequency-set -f 792000
arm_clk_root on the CCM_CLKO2 signal is now 792MHz as expected.
[ 69.717987] cpu cpu0: 198 MHz, 950 mV --> 792 MHz, 1225 mV
pll1 1 1 79200 0 0
pll1_bypass 1 1 79200 0 0
pll1_sys 1 1 79200 0 0
pll1_sw 1 1 79200 0 0
arm1 1 79200 0 0
Signed-off-by: Sébastien Szymanski
---
drivers/cpufreq/imx6q-cpufreq.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
index b6edd3c..e5fba50 100644
--- a/drivers/cpufreq/imx6q-cpufreq.c
+++ b/drivers/cpufreq/imx6q-cpufreq.c
@@ -18,6 +18,7 @@
#define PU_SOC_VOLTAGE_NORMAL 125
#define PU_SOC_VOLTAGE_HIGH1275000
+#define FREQ_528_MHZ 52800
#define FREQ_1P2_GHZ 12
static struct regulator *arm_reg;
@@ -110,14 +111,20 @@ static int imx6q_set_target(struct cpufreq_policy
*policy, unsigned int index)
* voltage of 528MHz, so lower the CPU frequency to one
* half before changing CPU frequency.
*/
- clk_set_rate(arm_clk, (old_freq >> 1) * 1000);
- clk_set_parent(pll1_sw_clk, pll1_sys_clk);
+ if ((old_freq * 1000) <= FREQ_528_MHZ) {
+ clk_set_rate(arm_clk, (old_freq >> 1) * 1000);
+ clk_set_parent(pll1_sw_clk, pll1_sys_clk);
+ }
if (freq_hz > clk_get_rate(pll2_pfd2_396m_clk))
clk_set_parent(secondary_sel_clk, pll2_bus_clk);
else
clk_set_parent(secondary_sel_clk, pll2_pfd2_396m_clk);
clk_set_parent(step_clk, secondary_sel_clk);
clk_set_parent(pll1_sw_clk, step_clk);
+ if (freq_hz > FREQ_528_MHZ) {
+ clk_set_rate(pll1_sys_clk, freq_hz);
+ clk_set_parent(pll1_sw_clk, pll1_sys_clk);
+ }
} else {
clk_set_parent(step_clk, pll2_pfd2_396m_clk);
clk_set_parent(pll1_sw_clk, step_clk);
--
2.7.3
[PATCH 1/1] ARM: dts: imx6dl: fix GPIO4 range
GPIO4_11 is on pin 152(MX6DL_PAD_KEY_ROW2) and not on pin
151(MX6DL_PAD_KEY_ROW1).
I found the error while booting a mainline kernel on APF6S SoM and
noticed the following message:
[2.609337] imx6dl-pinctrl 20e.iomuxc: pin MX6DL_PAD_KEY_ROW1
already requested by 20a8000.gpio:105; cannot claim for 20a8000.gpio:107
[2.621884] imx6dl-pinctrl 20e.iomuxc: pin-151 (20a8000.gpio:107)
status -22
[2.629303] spi_imx 2008000.ecspi: Can't get CS GPIO 107
With this patch, the message is gone and spi_imx driver probes correctly.
Fixes: bb728d662bed ("ARM: dts: add gpio-ranges property to iMX GPIO
controllers")
Signed-off-by: Sébastien Szymanski <sebastien.szyman...@armadeus.com>
---
arch/arm/boot/dts/imx6dl.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 1ade195..7aa120f 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -137,7 +137,7 @@
{
gpio-ranges = < 5 136 1>, < 6 145 1>, < 7 150
1>,
< 8 146 1>, < 9 151 1>, < 10 147
1>,
- < 11 151 1>, < 12 148 1>, < 13 153
1>,
+ < 11 152 1>, < 12 148 1>, < 13 153
1>,
< 14 149 1>, < 15 154 1>, < 16 39
7>,
< 23 56 1>, < 24 61 7>, < 31 46
1>;
};
--
2.7.3
[PATCH 1/1] ARM: dts: imx6dl: fix GPIO4 range
GPIO4_11 is on pin 152(MX6DL_PAD_KEY_ROW2) and not on pin
151(MX6DL_PAD_KEY_ROW1).
I found the error while booting a mainline kernel on APF6S SoM and
noticed the following message:
[2.609337] imx6dl-pinctrl 20e.iomuxc: pin MX6DL_PAD_KEY_ROW1
already requested by 20a8000.gpio:105; cannot claim for 20a8000.gpio:107
[2.621884] imx6dl-pinctrl 20e.iomuxc: pin-151 (20a8000.gpio:107)
status -22
[2.629303] spi_imx 2008000.ecspi: Can't get CS GPIO 107
With this patch, the message is gone and spi_imx driver probes correctly.
Fixes: bb728d662bed ("ARM: dts: add gpio-ranges property to iMX GPIO
controllers")
Signed-off-by: Sébastien Szymanski
---
arch/arm/boot/dts/imx6dl.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 1ade195..7aa120f 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -137,7 +137,7 @@
{
gpio-ranges = < 5 136 1>, < 6 145 1>, < 7 150
1>,
< 8 146 1>, < 9 151 1>, < 10 147
1>,
- < 11 151 1>, < 12 148 1>, < 13 153
1>,
+ < 11 152 1>, < 12 148 1>, < 13 153
1>,
< 14 149 1>, < 15 154 1>, < 16 39
7>,
< 23 56 1>, < 24 61 7>, < 31 46
1>;
};
--
2.7.3
[PATCH v2 1/1] ARM: dts: add Armadeus Systems OPOS6UL and OPOS6ULDEV support
OPOS6UL is an i.MX6UL based SoM.
OPOS6ULDev is a carrier board for the OPOS6UL SoM.
For more details see:
http://www.opossom.com/english/products-processor_boards-opos6ul.html
http://www.opossom.com/english/products-development_boards-opos6ul_dev.html
Signed-off-by: Sébastien Szymanski <sebastien.szyman...@armadeus.com>
---
Changes since v1:
- use "and" instead of "AND" in the subject patch.
- use "uart-has-rtscts" instead of "fsl,uart-has-rtscts".
- use "backlight" instead of "lcd_backlight".
- use hyphen for node names.
- sort correctly pwm3 node and pwm3grp node.
- drop "fsl,spi-num-chipselects" property.
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6ul-opos6ul.dtsi | 192 +++
arch/arm/boot/dts/imx6ul-opos6uldev.dts | 412
3 files changed, 605 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6ul-opos6ul.dtsi
create mode 100644 arch/arm/boot/dts/imx6ul-opos6uldev.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7327250..f839c75 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -435,6 +435,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ul-14x14-evk.dtb \
imx6ul-geam-kit.dtb \
imx6ul-liteboard.dtb \
+ imx6ul-opos6uldev.dtb \
imx6ul-pico-hobbit.dtb \
imx6ul-tx6ul-0010.dtb \
imx6ul-tx6ul-0011.dtb \
diff --git a/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
b/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
new file mode 100644
index 000..51095df
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
@@ -0,0 +1,192 @@
+/*
+ * Copyright 2017 Armadeus Systems <supp...@armadeus.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this file; if not, write to the Free
+ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "imx6ul.dtsi"
+
+/ {
+ memory {
+ reg = <0x8000 0>; /* will be filled by U-Boot */
+ };
+
+ reg_3v3: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+
+ usdhc3_pwrseq: usdhc3-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = < 9 GPIO_ACTIVE_LOW>;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_enet1>;
+ phy-mode = "rmii";
+ phy-reset-duration = <1>;
+ phy-reset-gpios = < 2 GPIO_ACTIVE_LOW>;
+ phy-handle = <>;
+ phy-supply = <_3v3>;
+ status = "okay";
+
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells =
[PATCH v2 1/1] ARM: dts: add Armadeus Systems OPOS6UL and OPOS6ULDEV support
OPOS6UL is an i.MX6UL based SoM.
OPOS6ULDev is a carrier board for the OPOS6UL SoM.
For more details see:
http://www.opossom.com/english/products-processor_boards-opos6ul.html
http://www.opossom.com/english/products-development_boards-opos6ul_dev.html
Signed-off-by: Sébastien Szymanski
---
Changes since v1:
- use "and" instead of "AND" in the subject patch.
- use "uart-has-rtscts" instead of "fsl,uart-has-rtscts".
- use "backlight" instead of "lcd_backlight".
- use hyphen for node names.
- sort correctly pwm3 node and pwm3grp node.
- drop "fsl,spi-num-chipselects" property.
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6ul-opos6ul.dtsi | 192 +++
arch/arm/boot/dts/imx6ul-opos6uldev.dts | 412
3 files changed, 605 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6ul-opos6ul.dtsi
create mode 100644 arch/arm/boot/dts/imx6ul-opos6uldev.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7327250..f839c75 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -435,6 +435,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ul-14x14-evk.dtb \
imx6ul-geam-kit.dtb \
imx6ul-liteboard.dtb \
+ imx6ul-opos6uldev.dtb \
imx6ul-pico-hobbit.dtb \
imx6ul-tx6ul-0010.dtb \
imx6ul-tx6ul-0011.dtb \
diff --git a/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
b/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
new file mode 100644
index 000..51095df
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
@@ -0,0 +1,192 @@
+/*
+ * Copyright 2017 Armadeus Systems
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this file; if not, write to the Free
+ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "imx6ul.dtsi"
+
+/ {
+ memory {
+ reg = <0x8000 0>; /* will be filled by U-Boot */
+ };
+
+ reg_3v3: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+
+ usdhc3_pwrseq: usdhc3-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = < 9 GPIO_ACTIVE_LOW>;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_enet1>;
+ phy-mode = "rmii";
+ phy-reset-duration = <1>;
+ phy-reset-gpios = < 2 GPIO_ACTIVE_LOW>;
+ phy-handle = <>;
+ phy-supply = <_3v3>;
+ status = "okay";
+
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy1:
[PATCH 1/1] ARM: dts: add Armadeus Systems OPOS6UL AND OPOS6ULDEV support
OPOS6UL is an i.MX6UL based SoM.
OPOS6ULDev is a carrier board for the OPOS6UL SoM.
For more details see:
http://www.opossom.com/english/products-processor_boards-opos6ul.html
http://www.opossom.com/english/products-development_boards-opos6ul_dev.html
Signed-off-by: Sébastien Szymanski <sebastien.szyman...@armadeus.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6ul-opos6ul.dtsi | 192 +++
arch/arm/boot/dts/imx6ul-opos6uldev.dts | 414
3 files changed, 607 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6ul-opos6ul.dtsi
create mode 100644 arch/arm/boot/dts/imx6ul-opos6uldev.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7327250..f839c75 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -435,6 +435,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ul-14x14-evk.dtb \
imx6ul-geam-kit.dtb \
imx6ul-liteboard.dtb \
+ imx6ul-opos6uldev.dtb \
imx6ul-pico-hobbit.dtb \
imx6ul-tx6ul-0010.dtb \
imx6ul-tx6ul-0011.dtb \
diff --git a/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
b/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
new file mode 100644
index 000..4673dde
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
@@ -0,0 +1,192 @@
+/*
+ * Copyright 2016 Armadeus Systems <supp...@armadeus.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this file; if not, write to the Free
+ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "imx6ul.dtsi"
+
+/ {
+ memory {
+ reg = <0x8000 0>; /* will be filled by U-Boot */
+ };
+
+ reg_3v3: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+
+ usdhc3_pwrseq: usdhc3_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = < 9 GPIO_ACTIVE_LOW>;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_enet1>;
+ phy-mode = "rmii";
+ phy-reset-duration = <1>;
+ phy-reset-gpios = < 2 GPIO_ACTIVE_LOW>;
+ phy-handle = <>;
+ phy-supply = <_3v3>;
+ status = "okay";
+
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ interrupt-parent = <>;
+ interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
+ status = "okay";
+
[PATCH 1/1] ARM: dts: add Armadeus Systems OPOS6UL AND OPOS6ULDEV support
OPOS6UL is an i.MX6UL based SoM.
OPOS6ULDev is a carrier board for the OPOS6UL SoM.
For more details see:
http://www.opossom.com/english/products-processor_boards-opos6ul.html
http://www.opossom.com/english/products-development_boards-opos6ul_dev.html
Signed-off-by: Sébastien Szymanski
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6ul-opos6ul.dtsi | 192 +++
arch/arm/boot/dts/imx6ul-opos6uldev.dts | 414
3 files changed, 607 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6ul-opos6ul.dtsi
create mode 100644 arch/arm/boot/dts/imx6ul-opos6uldev.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7327250..f839c75 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -435,6 +435,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ul-14x14-evk.dtb \
imx6ul-geam-kit.dtb \
imx6ul-liteboard.dtb \
+ imx6ul-opos6uldev.dtb \
imx6ul-pico-hobbit.dtb \
imx6ul-tx6ul-0010.dtb \
imx6ul-tx6ul-0011.dtb \
diff --git a/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
b/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
new file mode 100644
index 000..4673dde
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
@@ -0,0 +1,192 @@
+/*
+ * Copyright 2016 Armadeus Systems
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this file; if not, write to the Free
+ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "imx6ul.dtsi"
+
+/ {
+ memory {
+ reg = <0x8000 0>; /* will be filled by U-Boot */
+ };
+
+ reg_3v3: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+
+ usdhc3_pwrseq: usdhc3_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = < 9 GPIO_ACTIVE_LOW>;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_enet1>;
+ phy-mode = "rmii";
+ phy-reset-duration = <1>;
+ phy-reset-gpios = < 2 GPIO_ACTIVE_LOW>;
+ phy-handle = <>;
+ phy-supply = <_3v3>;
+ status = "okay";
+
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ interrupt-parent = <>;
+ interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
+ status = "okay";
+ };
+ };
+};
+
+/* Bluetooth */
+ {
+ pinctrl-names = "
[PATCH 1/1] ARM: clk-imx6q: refine sata's parent
According to IMX6D/Q RM, table 18-3, sata clock's parent is ahb, not ipg.
This patch is based on branch:
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git imx/soc
Signed-off-by: Sébastien Szymanski
---
drivers/clk/imx/clk-imx6q.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index 128f887..d046f8e 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -450,7 +450,7 @@ static void __init imx6q_clocks_init(struct device_node
*ccm_node)
clk[IMX6QDL_CLK_GPMI_IO] = imx_clk_gate2("gpmi_io", "enfc",
base + 0x78, 28);
clk[IMX6QDL_CLK_GPMI_APB] = imx_clk_gate2("gpmi_apb",
"usdhc3",base + 0x78, 30);
clk[IMX6QDL_CLK_ROM] = imx_clk_gate2("rom", "ahb",
base + 0x7c, 0);
- clk[IMX6QDL_CLK_SATA] = imx_clk_gate2("sata", "ipg",
base + 0x7c, 4);
+ clk[IMX6QDL_CLK_SATA] = imx_clk_gate2("sata", "ahb",
base + 0x7c, 4);
clk[IMX6QDL_CLK_SDMA] = imx_clk_gate2("sdma", "ahb",
base + 0x7c, 6);
clk[IMX6QDL_CLK_SPBA] = imx_clk_gate2("spba", "ipg",
base + 0x7c, 12);
clk[IMX6QDL_CLK_SPDIF]= imx_clk_gate2("spdif",
"spdif_podf",base + 0x7c, 14);
--
2.0.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/1] ARM: clk-imx6q: refine sata's parent
According to IMX6D/Q RM, table 18-3, sata clock's parent is ahb, not ipg. This patch is based on branch: git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git imx/soc Signed-off-by: Sébastien Szymanski sebastien.szyman...@armadeus.com --- drivers/clk/imx/clk-imx6q.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c index 128f887..d046f8e 100644 --- a/drivers/clk/imx/clk-imx6q.c +++ b/drivers/clk/imx/clk-imx6q.c @@ -450,7 +450,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk[IMX6QDL_CLK_GPMI_IO] = imx_clk_gate2(gpmi_io, enfc, base + 0x78, 28); clk[IMX6QDL_CLK_GPMI_APB] = imx_clk_gate2(gpmi_apb, usdhc3,base + 0x78, 30); clk[IMX6QDL_CLK_ROM] = imx_clk_gate2(rom, ahb, base + 0x7c, 0); - clk[IMX6QDL_CLK_SATA] = imx_clk_gate2(sata, ipg, base + 0x7c, 4); + clk[IMX6QDL_CLK_SATA] = imx_clk_gate2(sata, ahb, base + 0x7c, 4); clk[IMX6QDL_CLK_SDMA] = imx_clk_gate2(sdma, ahb, base + 0x7c, 6); clk[IMX6QDL_CLK_SPBA] = imx_clk_gate2(spba, ipg, base + 0x7c, 12); clk[IMX6QDL_CLK_SPDIF]= imx_clk_gate2(spdif, spdif_podf,base + 0x7c, 14); -- 2.0.5 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/2] ARM: imx_v6_v7_defconfig: updates for Armadeus Systems APF6 boards
APF6 Dual and Quad SoM have an wl1271 wifi/bt chip. This chip needs CONFIG_BT_HCIUART_LL. APF6Dev carrier board has a SX8654 I2C touchscreen controller. Signed-off-by: Sébastien Szymanski --- arch/arm/configs/imx_v6_v7_defconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig index fdeb1c8..3ad53ce 100644 --- a/arch/arm/configs/imx_v6_v7_defconfig +++ b/arch/arm/configs/imx_v6_v7_defconfig @@ -73,6 +73,7 @@ CONFIG_CAN=y CONFIG_CAN_FLEXCAN=y CONFIG_BT=y CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_LL=y CONFIG_BT_HCIUART_3WIRE=y CONFIG_CFG80211=y CONFIG_MAC80211=y @@ -139,6 +140,10 @@ CONFIG_USB_RTL8152=m CONFIG_USB_USBNET=m CONFIG_USB_NET_CDC_EEM=m CONFIG_BRCMFMAC=m +CONFIG_WL_TI=y +CONFIG_WL12XX=m +CONFIG_WLCORE_SDIO=m +# CONFIG_WILINK_PLATFORM_DATA is not set # CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_EVDEV=y CONFIG_INPUT_EVBUG=m @@ -151,6 +156,7 @@ CONFIG_TOUCHSCREEN_EGALAX=y CONFIG_TOUCHSCREEN_MC13783=y CONFIG_TOUCHSCREEN_TSC2007=y CONFIG_TOUCHSCREEN_STMPE=y +CONFIG_TOUCHSCREEN_SX8654=y CONFIG_INPUT_MISC=y CONFIG_INPUT_MMA8450=y CONFIG_SERIO_SERPORT=m -- 2.0.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/2] ARM: dts: Armadeus Systems APF6 family support (i.MX6)
Add support to the Armadeus Systems APF6 Solo / Dual / Quad SoM and
the Armadeus Systems APF6Dev carrier board.
For more details see:
http://www.armadeus.com/english/products-processor_boards-apf6.html
http://www.armadeus.com/english/products-development_boards-apf6_dev.html
Signed-off-by: Sébastien Szymanski
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/imx6dl-apf6dev.dts | 60 +
arch/arm/boot/dts/imx6q-apf6dev.dts| 64 +
arch/arm/boot/dts/imx6qdl-apf6.dtsi| 158 +++
arch/arm/boot/dts/imx6qdl-apf6dev.dtsi | 479 +
5 files changed, 763 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6dl-apf6dev.dts
create mode 100644 arch/arm/boot/dts/imx6q-apf6dev.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-apf6.dtsi
create mode 100644 arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 86217db..d88d8da 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -254,6 +254,7 @@ dtb-$(CONFIG_SOC_IMX53) += \
imx53-tx53-x13x.dtb \
imx53-voipac-bsb.dtb
dtb-$(CONFIG_SOC_IMX6Q) += \
+ imx6dl-apf6dev.dtb \
imx6dl-aristainetos_4.dtb \
imx6dl-aristainetos_7.dtb \
imx6dl-cubox-i.dtb \
@@ -277,6 +278,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-udoo.dtb \
imx6dl-wandboard.dtb \
imx6dl-wandboard-revb1.dtb \
+ imx6q-apf6dev.dtb \
imx6q-arm2.dtb \
imx6q-cm-fx6.dtb \
imx6q-cubox-i.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-apf6dev.dts
b/arch/arm/boot/dts/imx6dl-apf6dev.dts
new file mode 100644
index 000..df26e54
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-apf6dev.dts
@@ -0,0 +1,60 @@
+/*
+ * Copyright 2015 Armadeus Systems
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this file; if not, write to the Free
+ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "imx6dl.dtsi"
+#include "imx6qdl-apf6.dtsi"
+#include "imx6qdl-apf6dev.dtsi"
+
+/ {
+ model = "Armadeus APF6 Solo Module on APF6Dev Board";
+ compatible = "armadeus,imx6dl-apf6dev", "armadeus,imx6dl-apf6",
"fsl,imx6dl";
+
+ memory {
+ reg = <0x1000 0x2000>;
+ };
+};
diff --git a/arch/arm/boot/dts/imx6q-apf6dev.dts
b/arch/arm/boot/dts/imx6q-apf6dev.dts
new file mode 100644
index 000..4e4de82
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-apf6dev.dts
@@ -0,0 +1,64 @@
+/*
+ * Copyright 2015 Armadeus Systems
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modif
[PATCH 1/2] ARM: dts: Armadeus Systems APF6 family support (i.MX6)
Add support to the Armadeus Systems APF6 Solo / Dual / Quad SoM and
the Armadeus Systems APF6Dev carrier board.
For more details see:
http://www.armadeus.com/english/products-processor_boards-apf6.html
http://www.armadeus.com/english/products-development_boards-apf6_dev.html
Signed-off-by: Sébastien Szymanski sebastien.szyman...@armadeus.com
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/imx6dl-apf6dev.dts | 60 +
arch/arm/boot/dts/imx6q-apf6dev.dts| 64 +
arch/arm/boot/dts/imx6qdl-apf6.dtsi| 158 +++
arch/arm/boot/dts/imx6qdl-apf6dev.dtsi | 479 +
5 files changed, 763 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6dl-apf6dev.dts
create mode 100644 arch/arm/boot/dts/imx6q-apf6dev.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-apf6.dtsi
create mode 100644 arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 86217db..d88d8da 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -254,6 +254,7 @@ dtb-$(CONFIG_SOC_IMX53) += \
imx53-tx53-x13x.dtb \
imx53-voipac-bsb.dtb
dtb-$(CONFIG_SOC_IMX6Q) += \
+ imx6dl-apf6dev.dtb \
imx6dl-aristainetos_4.dtb \
imx6dl-aristainetos_7.dtb \
imx6dl-cubox-i.dtb \
@@ -277,6 +278,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-udoo.dtb \
imx6dl-wandboard.dtb \
imx6dl-wandboard-revb1.dtb \
+ imx6q-apf6dev.dtb \
imx6q-arm2.dtb \
imx6q-cm-fx6.dtb \
imx6q-cubox-i.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-apf6dev.dts
b/arch/arm/boot/dts/imx6dl-apf6dev.dts
new file mode 100644
index 000..df26e54
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-apf6dev.dts
@@ -0,0 +1,60 @@
+/*
+ * Copyright 2015 Armadeus Systems
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this file; if not, write to the Free
+ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the Software), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include imx6dl.dtsi
+#include imx6qdl-apf6.dtsi
+#include imx6qdl-apf6dev.dtsi
+
+/ {
+ model = Armadeus APF6 Solo Module on APF6Dev Board;
+ compatible = armadeus,imx6dl-apf6dev, armadeus,imx6dl-apf6,
fsl,imx6dl;
+
+ memory {
+ reg = 0x1000 0x2000;
+ };
+};
diff --git a/arch/arm/boot/dts/imx6q-apf6dev.dts
b/arch/arm/boot/dts/imx6q-apf6dev.dts
new file mode 100644
index 000..4e4de82
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-apf6dev.dts
@@ -0,0 +1,64 @@
+/*
+ * Copyright 2015 Armadeus Systems
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free
[PATCH 2/2] ARM: imx_v6_v7_defconfig: updates for Armadeus Systems APF6 boards
APF6 Dual and Quad SoM have an wl1271 wifi/bt chip. This chip needs CONFIG_BT_HCIUART_LL. APF6Dev carrier board has a SX8654 I2C touchscreen controller. Signed-off-by: Sébastien Szymanski sebastien.szyman...@armadeus.com --- arch/arm/configs/imx_v6_v7_defconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig index fdeb1c8..3ad53ce 100644 --- a/arch/arm/configs/imx_v6_v7_defconfig +++ b/arch/arm/configs/imx_v6_v7_defconfig @@ -73,6 +73,7 @@ CONFIG_CAN=y CONFIG_CAN_FLEXCAN=y CONFIG_BT=y CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_LL=y CONFIG_BT_HCIUART_3WIRE=y CONFIG_CFG80211=y CONFIG_MAC80211=y @@ -139,6 +140,10 @@ CONFIG_USB_RTL8152=m CONFIG_USB_USBNET=m CONFIG_USB_NET_CDC_EEM=m CONFIG_BRCMFMAC=m +CONFIG_WL_TI=y +CONFIG_WL12XX=m +CONFIG_WLCORE_SDIO=m +# CONFIG_WILINK_PLATFORM_DATA is not set # CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_EVDEV=y CONFIG_INPUT_EVBUG=m @@ -151,6 +156,7 @@ CONFIG_TOUCHSCREEN_EGALAX=y CONFIG_TOUCHSCREEN_MC13783=y CONFIG_TOUCHSCREEN_TSC2007=y CONFIG_TOUCHSCREEN_STMPE=y +CONFIG_TOUCHSCREEN_SX8654=y CONFIG_INPUT_MISC=y CONFIG_INPUT_MMA8450=y CONFIG_SERIO_SERPORT=m -- 2.0.5 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] Input: sx8654 - fix memory allocation check
Hello, Acked-by: Sébastien Szymanski On 05/09/2015 01:50 AM, Dmitry Torokhov wrote: > We have been testing wrong variable when trying to make sure that input > allocation succeeded. > > Reported by Coverity (CID 1295918). > > Signed-off-by: Dmitry Torokhov > --- > drivers/input/touchscreen/sx8654.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/input/touchscreen/sx8654.c > b/drivers/input/touchscreen/sx8654.c > index aecb9ad..642f4a5 100644 > --- a/drivers/input/touchscreen/sx8654.c > +++ b/drivers/input/touchscreen/sx8654.c > @@ -187,7 +187,7 @@ static int sx8654_probe(struct i2c_client *client, > return -ENOMEM; > > input = devm_input_allocate_device(>dev); > - if (!sx8654) > + if (!input) > return -ENOMEM; > > input->name = "SX8654 I2C Touchscreen"; > -- Sébastien Szymanski Software Engineer Armadeus Systems - A new vision of the embedded world sebastien.szyman...@armadeus.com Tel: +33 (0)9 72 29 41 44 Fax: +33 (0)9 72 28 79 26 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] Input: sx8654 - fix memory allocation check
Hello, Acked-by: Sébastien Szymanski sebastien.szyman...@armadeus.com On 05/09/2015 01:50 AM, Dmitry Torokhov wrote: We have been testing wrong variable when trying to make sure that input allocation succeeded. Reported by Coverity (CID 1295918). Signed-off-by: Dmitry Torokhov dmitry.torok...@gmail.com --- drivers/input/touchscreen/sx8654.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/input/touchscreen/sx8654.c b/drivers/input/touchscreen/sx8654.c index aecb9ad..642f4a5 100644 --- a/drivers/input/touchscreen/sx8654.c +++ b/drivers/input/touchscreen/sx8654.c @@ -187,7 +187,7 @@ static int sx8654_probe(struct i2c_client *client, return -ENOMEM; input = devm_input_allocate_device(client-dev); - if (!sx8654) + if (!input) return -ENOMEM; input-name = SX8654 I2C Touchscreen; -- Sébastien Szymanski Software Engineer Armadeus Systems - A new vision of the embedded world sebastien.szyman...@armadeus.com Tel: +33 (0)9 72 29 41 44 Fax: +33 (0)9 72 28 79 26 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/2] drm_modes: videomode: add pos/neg pixel clock polarity flag
From: Steve Longerbeam [Sébastien - rebase, update drm_display_mode_to_videomode function] Signed-off-by: Steve Longerbeam Signed-off-by: Sébastien Szymanski --- drivers/gpu/drm/drm_modes.c | 8 include/uapi/drm/drm_mode.h | 4 2 files changed, 12 insertions(+) diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c index 487d0e3..464828f 100644 --- a/drivers/gpu/drm/drm_modes.c +++ b/drivers/gpu/drm/drm_modes.c @@ -611,6 +611,10 @@ void drm_display_mode_from_videomode(const struct videomode *vm, dmode->flags |= DRM_MODE_FLAG_DBLSCAN; if (vm->flags & DISPLAY_FLAGS_DOUBLECLK) dmode->flags |= DRM_MODE_FLAG_DBLCLK; + if (vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE) + dmode->flags |= DRM_MODE_FLAG_PCLK; + else if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE) + dmode->flags |= DRM_MODE_FLAG_NCLK; drm_mode_set_name(dmode); } EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode); @@ -652,6 +656,10 @@ void drm_display_mode_to_videomode(const struct drm_display_mode *dmode, vm->flags |= DISPLAY_FLAGS_DOUBLESCAN; if (dmode->flags & DRM_MODE_FLAG_DBLCLK) vm->flags |= DISPLAY_FLAGS_DOUBLECLK; + if (dmode->flags & DRM_MODE_FLAG_PCLK) + vm->flags |= DISPLAY_FLAGS_PIXDATA_POSEDGE; + else if (dmode->flags & DRM_MODE_FLAG_NCLK) + vm->flags |= DISPLAY_FLAGS_PIXDATA_NEGEDGE; } EXPORT_SYMBOL_GPL(drm_display_mode_to_videomode); diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index ca788e0..1abb2fc 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -72,6 +72,10 @@ #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH(6<<14) #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14) #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF(8<<14) +/* drive data on rising pixclk edge */ +#define DRM_MODE_FLAG_PCLK (1<<19) +/* drive data on falling pixclk edge */ +#define DRM_MODE_FLAG_NCLK (1<<20) /* DPMS flags */ -- 2.0.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/2] imx-drm: ipuv3-crtc: Use DRM mode flags to configure pixel clock polarity
From: Steve Longerbeam Previously, pixel clock polarity was hardcoded and wasn't configurable. This patch adds support to configure the pixel clock polarity from the DRM mode flags. [Sébastien - rebase] Signed-off-by: Mohsin Kazmi Signed-off-by: Steve Longerbeam Signed-off-by: Sébastien Szymanski --- drivers/gpu/drm/imx/ipuv3-crtc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c b/drivers/gpu/drm/imx/ipuv3-crtc.c index 98551e3..71f888b 100644 --- a/drivers/gpu/drm/imx/ipuv3-crtc.c +++ b/drivers/gpu/drm/imx/ipuv3-crtc.c @@ -171,10 +171,12 @@ static int ipu_crtc_mode_set(struct drm_crtc *crtc, else sig_cfg.clkflags = 0; + if (mode->flags & DRM_MODE_FLAG_PCLK) + sig_cfg.clk_pol = 1; + out_pixel_fmt = ipu_crtc->interface_pix_fmt; sig_cfg.enable_pol = 1; - sig_cfg.clk_pol = 0; sig_cfg.pixel_fmt = out_pixel_fmt; sig_cfg.v_to_h_sync = 0; sig_cfg.hsync_pin = ipu_crtc->di_hsync_pin; -- 2.0.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/2] imx-drm: ipuv3-crtc: Use DRM mode flags to configure pixel clock polarity
From: Steve Longerbeam steve_longerb...@mentor.com Previously, pixel clock polarity was hardcoded and wasn't configurable. This patch adds support to configure the pixel clock polarity from the DRM mode flags. [Sébastien - rebase] Signed-off-by: Mohsin Kazmi mohsin_ka...@mentor.com Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com Signed-off-by: Sébastien Szymanski sebastien.szyman...@armadeus.com --- drivers/gpu/drm/imx/ipuv3-crtc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c b/drivers/gpu/drm/imx/ipuv3-crtc.c index 98551e3..71f888b 100644 --- a/drivers/gpu/drm/imx/ipuv3-crtc.c +++ b/drivers/gpu/drm/imx/ipuv3-crtc.c @@ -171,10 +171,12 @@ static int ipu_crtc_mode_set(struct drm_crtc *crtc, else sig_cfg.clkflags = 0; + if (mode-flags DRM_MODE_FLAG_PCLK) + sig_cfg.clk_pol = 1; + out_pixel_fmt = ipu_crtc-interface_pix_fmt; sig_cfg.enable_pol = 1; - sig_cfg.clk_pol = 0; sig_cfg.pixel_fmt = out_pixel_fmt; sig_cfg.v_to_h_sync = 0; sig_cfg.hsync_pin = ipu_crtc-di_hsync_pin; -- 2.0.5 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/2] drm_modes: videomode: add pos/neg pixel clock polarity flag
From: Steve Longerbeam steve_longerb...@mentor.com [Sébastien - rebase, update drm_display_mode_to_videomode function] Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com Signed-off-by: Sébastien Szymanski sebastien.szyman...@armadeus.com --- drivers/gpu/drm/drm_modes.c | 8 include/uapi/drm/drm_mode.h | 4 2 files changed, 12 insertions(+) diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c index 487d0e3..464828f 100644 --- a/drivers/gpu/drm/drm_modes.c +++ b/drivers/gpu/drm/drm_modes.c @@ -611,6 +611,10 @@ void drm_display_mode_from_videomode(const struct videomode *vm, dmode-flags |= DRM_MODE_FLAG_DBLSCAN; if (vm-flags DISPLAY_FLAGS_DOUBLECLK) dmode-flags |= DRM_MODE_FLAG_DBLCLK; + if (vm-flags DISPLAY_FLAGS_PIXDATA_POSEDGE) + dmode-flags |= DRM_MODE_FLAG_PCLK; + else if (vm-flags DISPLAY_FLAGS_PIXDATA_NEGEDGE) + dmode-flags |= DRM_MODE_FLAG_NCLK; drm_mode_set_name(dmode); } EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode); @@ -652,6 +656,10 @@ void drm_display_mode_to_videomode(const struct drm_display_mode *dmode, vm-flags |= DISPLAY_FLAGS_DOUBLESCAN; if (dmode-flags DRM_MODE_FLAG_DBLCLK) vm-flags |= DISPLAY_FLAGS_DOUBLECLK; + if (dmode-flags DRM_MODE_FLAG_PCLK) + vm-flags |= DISPLAY_FLAGS_PIXDATA_POSEDGE; + else if (dmode-flags DRM_MODE_FLAG_NCLK) + vm-flags |= DISPLAY_FLAGS_PIXDATA_NEGEDGE; } EXPORT_SYMBOL_GPL(drm_display_mode_to_videomode); diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index ca788e0..1abb2fc 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -72,6 +72,10 @@ #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH(614) #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (714) #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF(814) +/* drive data on rising pixclk edge */ +#define DRM_MODE_FLAG_PCLK (119) +/* drive data on falling pixclk edge */ +#define DRM_MODE_FLAG_NCLK (120) /* DPMS flags */ -- 2.0.5 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/2] Input: sx8654 - add device tree bindings
Signed-off-by: Sébastien Szymanski
---
.../devicetree/bindings/input/touchscreen/sx8654.txt | 16
1 file changed, 16 insertions(+)
create mode 100644
Documentation/devicetree/bindings/input/touchscreen/sx8654.txt
diff --git a/Documentation/devicetree/bindings/input/touchscreen/sx8654.txt
b/Documentation/devicetree/bindings/input/touchscreen/sx8654.txt
new file mode 100644
index 000..5aaa6b3
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/touchscreen/sx8654.txt
@@ -0,0 +1,16 @@
+* Semtech SX8654 I2C Touchscreen Controller
+
+Required properties:
+- compatible: must be "semtech,sx8654"
+- reg: i2c slave address
+- interrupt-parent: the phandle for the interrupt controller
+- interrupts: touch controller interrupt
+
+Example:
+
+ sx8654@48 {
+ compatible = "semtech,sx8654";
+ reg = <0x48>;
+ interrupt-parent = <>;
+ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+ };
--
2.0.5
--
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[PATCH 1/2] Input: add support for Semtech SX8654 I2C touchscreen controller
Signed-off-by: Sébastien Szymanski
---
drivers/input/touchscreen/Kconfig | 11 ++
drivers/input/touchscreen/Makefile | 1 +
drivers/input/touchscreen/sx8654.c | 285 +
3 files changed, 297 insertions(+)
create mode 100644 drivers/input/touchscreen/sx8654.c
diff --git a/drivers/input/touchscreen/Kconfig
b/drivers/input/touchscreen/Kconfig
index 5891752..6f713fd0 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -961,6 +961,17 @@ config TOUCHSCREEN_SUR40
To compile this driver as a module, choose M here: the
module will be called sur40.
+config TOUCHSCREEN_SX8654
+ tristate "Semtech SX8654 touchscreen"
+ depends on I2C && OF
+ help
+ Say Y here if you have a Semtech SX8654 touchscreen controller.
+
+ If unsure, say N
+
+ To compile this driver as a module, choose M here: the
+ module will be called sx8654.
+
config TOUCHSCREEN_TPS6507X
tristate "TPS6507x based touchscreens"
depends on I2C
diff --git a/drivers/input/touchscreen/Makefile
b/drivers/input/touchscreen/Makefile
index 0242fea..a06a752 100644
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -79,5 +79,6 @@ obj-$(CONFIG_TOUCHSCREEN_WM97XX_ATMEL)+=
atmel-wm97xx.o
obj-$(CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE) += mainstone-wm97xx.o
obj-$(CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE) += zylonite-wm97xx.o
obj-$(CONFIG_TOUCHSCREEN_W90X900) += w90p910_ts.o
+obj-$(CONFIG_TOUCHSCREEN_SX8654) += sx8654.o
obj-$(CONFIG_TOUCHSCREEN_TPS6507X) += tps6507x-ts.o
obj-$(CONFIG_TOUCHSCREEN_ZFORCE) += zforce_ts.o
diff --git a/drivers/input/touchscreen/sx8654.c
b/drivers/input/touchscreen/sx8654.c
new file mode 100644
index 000..58cc478
--- /dev/null
+++ b/drivers/input/touchscreen/sx8654.c
@@ -0,0 +1,285 @@
+/*
+ * drivers/input/touchscreen/sx8654.c
+ *
+ * Copyright (c) 2015 Armadeus Systems
+ * Sébastien Szymanski
+ *
+ * Using code from:
+ * - sx865x.c
+ * Copyright (c) 2013 U-MoBo Srl
+ * Pierluigi Passaro
+ * - sx8650.c
+ * Copyright (c) 2009 Wayne Roberts
+ * - tsc2007.c
+ * Copyright (c) 2008 Kwangwoo Lee
+ * - ads7846.c
+ * Copyright (c) 2005 David Brownell
+ * Copyright (c) 2006 Nokia Corporation
+ * - corgi_ts.c
+ * Copyright (C) 2004-2005 Richard Purdie
+ * - omap_ts.[hc], ads7846.h, ts_osk.c
+ * Copyright (C) 2002 MontaVista Software
+ * Copyright (C) 2004 Texas Instruments
+ * Copyright (C) 2005 Dirk Behme
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* register addresses */
+#define I2C_REG_TOUCH0 0x00
+#define I2C_REG_TOUCH1 0x01
+#define I2C_REG_CHANMASK 0x04
+#define I2C_REG_IRQMASK0x22
+#define I2C_REG_IRQSRC 0x23
+#define I2C_REG_SOFTRESET 0x3f
+
+/* commands */
+#define CMD_READ_REGISTER 0x40
+#define CMD_MANUAL 0xc0
+#define CMD_PENTRG 0xe0
+
+/* value for I2C_REG_SOFTRESET */
+#define SOFTRESET_VALUE0xde
+
+/* bits for I2C_REG_IRQSRC */
+#define IRQ_PENTOUCH_TOUCHCONVDONE 0x08
+#define IRQ_PENRELEASE 0x04
+
+/* bits for RegTouch1 */
+#define CONDIRQ0x20
+#define FILT_7SA 0x03
+
+/* bits for I2C_REG_CHANMASK */
+#define CONV_X 0x80
+#define CONV_Y 0x40
+
+/* coordinates rate: higher nibble of CTRL0 register */
+#define RATE_MANUAL0x00
+#define RATE_5000CPS 0xf0
+
+/* power delay: lower nibble of CTRL0 register */
+#define POWDLY_1_1MS 0x0b
+
+#define MAX_12BIT ((1 << 12) - 1)
+
+struct sx8654 {
+ struct input_dev *input;
+ struct i2c_client *client;
+};
+
+static irqreturn_t sx8654_irq(int irq, void *handle)
+{
+ struct sx8654 *sx8654 = handle;
+ u8 irqsrc;
+ u8 data[4];
+ unsigned int x, y;
+ int retval;
+
+ irqsrc = i2c_smbus_read_byte_data(sx8654->client,
+ (CMD_READ_REGISTER | I2C_REG_IRQSRC));
+ dev_dbg(>client->dev, "irqsrc = 0x%x", irqsrc);
+
+ if (irqsrc < 0)
+ goto out;
+
+ if (irqsrc & IRQ_PENRELEASE) {
+ dev_dbg(>client->dev, "pen release interrupt");
+
+ input_report_key(sx8654->input, BTN_TOUCH, 0);
+ input_sync(sx8654->input);
+ }
+
+ if (irqsrc & IRQ_PENTOUCH_TOUCHCONVDONE) {
[PATCH 1/2] Input: add support for Semtech SX8654 I2C touchscreen controller
Signed-off-by: Sébastien Szymanski sebastien.szyman...@armadeus.com
---
drivers/input/touchscreen/Kconfig | 11 ++
drivers/input/touchscreen/Makefile | 1 +
drivers/input/touchscreen/sx8654.c | 285 +
3 files changed, 297 insertions(+)
create mode 100644 drivers/input/touchscreen/sx8654.c
diff --git a/drivers/input/touchscreen/Kconfig
b/drivers/input/touchscreen/Kconfig
index 5891752..6f713fd0 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -961,6 +961,17 @@ config TOUCHSCREEN_SUR40
To compile this driver as a module, choose M here: the
module will be called sur40.
+config TOUCHSCREEN_SX8654
+ tristate Semtech SX8654 touchscreen
+ depends on I2C OF
+ help
+ Say Y here if you have a Semtech SX8654 touchscreen controller.
+
+ If unsure, say N
+
+ To compile this driver as a module, choose M here: the
+ module will be called sx8654.
+
config TOUCHSCREEN_TPS6507X
tristate TPS6507x based touchscreens
depends on I2C
diff --git a/drivers/input/touchscreen/Makefile
b/drivers/input/touchscreen/Makefile
index 0242fea..a06a752 100644
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -79,5 +79,6 @@ obj-$(CONFIG_TOUCHSCREEN_WM97XX_ATMEL)+=
atmel-wm97xx.o
obj-$(CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE) += mainstone-wm97xx.o
obj-$(CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE) += zylonite-wm97xx.o
obj-$(CONFIG_TOUCHSCREEN_W90X900) += w90p910_ts.o
+obj-$(CONFIG_TOUCHSCREEN_SX8654) += sx8654.o
obj-$(CONFIG_TOUCHSCREEN_TPS6507X) += tps6507x-ts.o
obj-$(CONFIG_TOUCHSCREEN_ZFORCE) += zforce_ts.o
diff --git a/drivers/input/touchscreen/sx8654.c
b/drivers/input/touchscreen/sx8654.c
new file mode 100644
index 000..58cc478
--- /dev/null
+++ b/drivers/input/touchscreen/sx8654.c
@@ -0,0 +1,285 @@
+/*
+ * drivers/input/touchscreen/sx8654.c
+ *
+ * Copyright (c) 2015 Armadeus Systems
+ * Sébastien Szymanski sebastien.szyman...@armadeus.com
+ *
+ * Using code from:
+ * - sx865x.c
+ * Copyright (c) 2013 U-MoBo Srl
+ * Pierluigi Passaro p.pass...@u-mobo.com
+ * - sx8650.c
+ * Copyright (c) 2009 Wayne Roberts
+ * - tsc2007.c
+ * Copyright (c) 2008 Kwangwoo Lee
+ * - ads7846.c
+ * Copyright (c) 2005 David Brownell
+ * Copyright (c) 2006 Nokia Corporation
+ * - corgi_ts.c
+ * Copyright (C) 2004-2005 Richard Purdie
+ * - omap_ts.[hc], ads7846.h, ts_osk.c
+ * Copyright (C) 2002 MontaVista Software
+ * Copyright (C) 2004 Texas Instruments
+ * Copyright (C) 2005 Dirk Behme
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/input.h
+#include linux/module.h
+#include linux/of.h
+#include linux/i2c.h
+#include linux/interrupt.h
+#include linux/irq.h
+
+/* register addresses */
+#define I2C_REG_TOUCH0 0x00
+#define I2C_REG_TOUCH1 0x01
+#define I2C_REG_CHANMASK 0x04
+#define I2C_REG_IRQMASK0x22
+#define I2C_REG_IRQSRC 0x23
+#define I2C_REG_SOFTRESET 0x3f
+
+/* commands */
+#define CMD_READ_REGISTER 0x40
+#define CMD_MANUAL 0xc0
+#define CMD_PENTRG 0xe0
+
+/* value for I2C_REG_SOFTRESET */
+#define SOFTRESET_VALUE0xde
+
+/* bits for I2C_REG_IRQSRC */
+#define IRQ_PENTOUCH_TOUCHCONVDONE 0x08
+#define IRQ_PENRELEASE 0x04
+
+/* bits for RegTouch1 */
+#define CONDIRQ0x20
+#define FILT_7SA 0x03
+
+/* bits for I2C_REG_CHANMASK */
+#define CONV_X 0x80
+#define CONV_Y 0x40
+
+/* coordinates rate: higher nibble of CTRL0 register */
+#define RATE_MANUAL0x00
+#define RATE_5000CPS 0xf0
+
+/* power delay: lower nibble of CTRL0 register */
+#define POWDLY_1_1MS 0x0b
+
+#define MAX_12BIT ((1 12) - 1)
+
+struct sx8654 {
+ struct input_dev *input;
+ struct i2c_client *client;
+};
+
+static irqreturn_t sx8654_irq(int irq, void *handle)
+{
+ struct sx8654 *sx8654 = handle;
+ u8 irqsrc;
+ u8 data[4];
+ unsigned int x, y;
+ int retval;
+
+ irqsrc = i2c_smbus_read_byte_data(sx8654-client,
+ (CMD_READ_REGISTER | I2C_REG_IRQSRC));
+ dev_dbg(sx8654-client-dev, irqsrc = 0x%x, irqsrc);
+
+ if (irqsrc 0)
+ goto out;
+
+ if (irqsrc IRQ_PENRELEASE) {
+ dev_dbg(sx8654-client-dev, pen release interrupt);
+
+ input_report_key(sx8654-input, BTN_TOUCH, 0);
+ input_sync(sx8654-input
[PATCH 2/2] Input: sx8654 - add device tree bindings
Signed-off-by: Sébastien Szymanski sebastien.szyman...@armadeus.com
---
.../devicetree/bindings/input/touchscreen/sx8654.txt | 16
1 file changed, 16 insertions(+)
create mode 100644
Documentation/devicetree/bindings/input/touchscreen/sx8654.txt
diff --git a/Documentation/devicetree/bindings/input/touchscreen/sx8654.txt
b/Documentation/devicetree/bindings/input/touchscreen/sx8654.txt
new file mode 100644
index 000..5aaa6b3
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/touchscreen/sx8654.txt
@@ -0,0 +1,16 @@
+* Semtech SX8654 I2C Touchscreen Controller
+
+Required properties:
+- compatible: must be semtech,sx8654
+- reg: i2c slave address
+- interrupt-parent: the phandle for the interrupt controller
+- interrupts: touch controller interrupt
+
+Example:
+
+ sx8654@48 {
+ compatible = semtech,sx8654;
+ reg = 0x48;
+ interrupt-parent = gpio6;
+ interrupts = 3 IRQ_TYPE_EDGE_FALLING;
+ };
--
2.0.5
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH] ARM: dts: imx28-apf28dev: add user button
Signed-off-by: Sébastien Szymanski
---
arch/arm/boot/dts/imx28-apf28dev.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/imx28-apf28dev.dts
b/arch/arm/boot/dts/imx28-apf28dev.dts
index 334dea5..221cac4 100644
--- a/arch/arm/boot/dts/imx28-apf28dev.dts
+++ b/arch/arm/boot/dts/imx28-apf28dev.dts
@@ -48,6 +48,7 @@
MX28_PAD_LCD_D20__GPIO_1_20
MX28_PAD_LCD_D21__GPIO_1_21
MX28_PAD_LCD_D22__GPIO_1_22
+ MX28_PAD_GPMI_CE1N__GPIO_0_17
>;
fsl,drive-strength = ;
fsl,voltage = ;
@@ -193,4 +194,14 @@
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
};
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ user-button {
+ label = "User button";
+ gpios = < 17 0>;
+ linux,code = <0x100>;
+ };
+ };
};
--
1.8.3.2
--
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[PATCH] ARM: dts: imx28-apf28dev: add user button
Signed-off-by: Sébastien Szymanski sebastien.szyman...@armadeus.com
---
arch/arm/boot/dts/imx28-apf28dev.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/imx28-apf28dev.dts
b/arch/arm/boot/dts/imx28-apf28dev.dts
index 334dea5..221cac4 100644
--- a/arch/arm/boot/dts/imx28-apf28dev.dts
+++ b/arch/arm/boot/dts/imx28-apf28dev.dts
@@ -48,6 +48,7 @@
MX28_PAD_LCD_D20__GPIO_1_20
MX28_PAD_LCD_D21__GPIO_1_21
MX28_PAD_LCD_D22__GPIO_1_22
+ MX28_PAD_GPMI_CE1N__GPIO_0_17
;
fsl,drive-strength = MXS_DRIVE_4mA;
fsl,voltage = MXS_VOLTAGE_HIGH;
@@ -193,4 +194,14 @@
brightness-levels = 0 4 8 16 32 64 128 255;
default-brightness-level = 6;
};
+
+ gpio-keys {
+ compatible = gpio-keys;
+
+ user-button {
+ label = User button;
+ gpios = gpio0 17 0;
+ linux,code = 0x100;
+ };
+ };
};
--
1.8.3.2
--
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