Re: Why MSI is limited to 32 interrupts maximum

On 2016-10-15 06:30, Bharat Kumar Gogada wrote: On Sat, 15 Oct 2016 12:37:55 + Bharat Kumar Gogada wrote: Hi Bharat, > Can anyone tell why MSI interrupts are limited to maximum 32 > interrupts, even though we have 16bit message data register ? That's the

Re: Why MSI is limited to 32 interrupts maximum

On 2016-10-15 06:30, Bharat Kumar Gogada wrote: On Sat, 15 Oct 2016 12:37:55 + Bharat Kumar Gogada wrote: Hi Bharat, > Can anyone tell why MSI interrupts are limited to maximum 32 > interrupts, even though we have 16bit message data register ? That's the very definition of the original

RE: Why MSI is limited to 32 interrupts maximum

> On Sat, 15 Oct 2016 12:37:55 + > Bharat Kumar Gogada wrote: > > Hi Bharat, > > > Can anyone tell why MSI interrupts are limited to maximum 32 > > interrupts, even though we have 16bit message data register ? > > That's the very definition of the original

RE: Why MSI is limited to 32 interrupts maximum

> On Sat, 15 Oct 2016 12:37:55 + > Bharat Kumar Gogada wrote: > > Hi Bharat, > > > Can anyone tell why MSI interrupts are limited to maximum 32 > > interrupts, even though we have 16bit message data register ? > > That's the very definition of the original PCI MSI: Up to 32 consecutive >

Re: Why MSI is limited to 32 interrupts maximum

On Sat, 15 Oct 2016 12:37:55 + Bharat Kumar Gogada wrote: Hi Bharat, > Can anyone tell why MSI interrupts are limited to maximum 32 > interrupts, even though we have 16bit message data register ? That's the very definition of the original PCI MSI: Up to 32

Re: Why MSI is limited to 32 interrupts maximum

On Sat, 15 Oct 2016 12:37:55 + Bharat Kumar Gogada wrote: Hi Bharat, > Can anyone tell why MSI interrupts are limited to maximum 32 > interrupts, even though we have 16bit message data register ? That's the very definition of the original PCI MSI: Up to 32 consecutive interrupts per