On Wed, Oct 03, 2018 at 05:41:32PM +0200, Peter Zijlstra wrote:
> On Wed, Oct 03, 2018 at 08:10:31AM +0200, Thomas Gleixner wrote:
> > On Tue, 2 Oct 2018, kan.li...@linux.intel.com wrote:
> >
> > There is another variant of model/stepping micro code verification code in
> >
On Wed, Oct 03, 2018 at 05:41:32PM +0200, Peter Zijlstra wrote:
> On Wed, Oct 03, 2018 at 08:10:31AM +0200, Thomas Gleixner wrote:
> > On Tue, 2 Oct 2018, kan.li...@linux.intel.com wrote:
> >
> > There is another variant of model/stepping micro code verification code in
> >
On Wed, Oct 03, 2018 at 08:10:31AM +0200, Thomas Gleixner wrote:
> On Tue, 2 Oct 2018, kan.li...@linux.intel.com wrote:
>
> There is another variant of model/stepping micro code verification code in
> intel_snb_pebs_broken(). Can we please make this table based and use a
> common function? That's
On Wed, Oct 03, 2018 at 08:10:31AM +0200, Thomas Gleixner wrote:
> On Tue, 2 Oct 2018, kan.li...@linux.intel.com wrote:
>
> There is another variant of model/stepping micro code verification code in
> intel_snb_pebs_broken(). Can we please make this table based and use a
> common function? That's
> There is another variant of model/stepping micro code verification code in
> intel_snb_pebs_broken(). Can we please make this table based and use a
> common function? That's certainly not the last quirk we're going to have.
I have a patch to add a table driven microcode matcher for another fix.
> There is another variant of model/stepping micro code verification code in
> intel_snb_pebs_broken(). Can we please make this table based and use a
> common function? That's certainly not the last quirk we're going to have.
I have a patch to add a table driven microcode matcher for another fix.
On Wed, Oct 03, 2018 at 10:25:03AM -0400, Liang, Kan wrote:
>
>
> On 10/3/2018 10:15 AM, linux-kernel-ow...@vger.kernel.org wrote:
> > To make it more generic, I think we also need to extend the struct
> > sku_microcode to check vendor and family.
> > The "model" in struct x86_cpu_id is u16. I
On Wed, Oct 03, 2018 at 10:25:03AM -0400, Liang, Kan wrote:
>
>
> On 10/3/2018 10:15 AM, linux-kernel-ow...@vger.kernel.org wrote:
> > To make it more generic, I think we also need to extend the struct
> > sku_microcode to check vendor and family.
> > The "model" in struct x86_cpu_id is u16. I
On 10/3/2018 10:15 AM, linux-kernel-ow...@vger.kernel.org wrote:
To make it more generic, I think we also need to extend the struct
sku_microcode to check vendor and family.
The "model" in struct x86_cpu_id is u16. I will also change "model" and
"stepping" to u16.
struct sku_microcode {
On 10/3/2018 10:15 AM, linux-kernel-ow...@vger.kernel.org wrote:
To make it more generic, I think we also need to extend the struct
sku_microcode to check vendor and family.
The "model" in struct x86_cpu_id is u16. I will also change "model" and
"stepping" to u16.
struct sku_microcode {
On Wed, 3 Oct 2018, Liang, Kan wrote:
> On 10/3/2018 9:55 AM, Thomas Gleixner wrote:
> > On Wed, 3 Oct 2018, Liang, Kan wrote:
> > > On 10/3/2018 2:10 AM, Thomas Gleixner wrote:
> > > > There is another variant of model/stepping micro code verification code
> > > > in
> > > >
On Wed, 3 Oct 2018, Liang, Kan wrote:
> On 10/3/2018 9:55 AM, Thomas Gleixner wrote:
> > On Wed, 3 Oct 2018, Liang, Kan wrote:
> > > On 10/3/2018 2:10 AM, Thomas Gleixner wrote:
> > > > There is another variant of model/stepping micro code verification code
> > > > in
> > > >
On 10/3/2018 9:55 AM, Thomas Gleixner wrote:
On Wed, 3 Oct 2018, Liang, Kan wrote:
On 10/3/2018 2:10 AM, Thomas Gleixner wrote:
There is another variant of model/stepping micro code verification code in
intel_snb_pebs_broken(). Can we please make this table based and use a
common function?
On 10/3/2018 9:55 AM, Thomas Gleixner wrote:
On Wed, 3 Oct 2018, Liang, Kan wrote:
On 10/3/2018 2:10 AM, Thomas Gleixner wrote:
There is another variant of model/stepping micro code verification code in
intel_snb_pebs_broken(). Can we please make this table based and use a
common function?
On Wed, 3 Oct 2018, Liang, Kan wrote:
> On 10/3/2018 2:10 AM, Thomas Gleixner wrote:
> > There is another variant of model/stepping micro code verification code in
> > intel_snb_pebs_broken(). Can we please make this table based and use a
> > common function? That's certainly not the last quirk
On Wed, 3 Oct 2018, Liang, Kan wrote:
> On 10/3/2018 2:10 AM, Thomas Gleixner wrote:
> > There is another variant of model/stepping micro code verification code in
> > intel_snb_pebs_broken(). Can we please make this table based and use a
> > common function? That's certainly not the last quirk
On 10/3/2018 2:10 AM, Thomas Gleixner wrote:
On Tue, 2 Oct 2018, kan.li...@linux.intel.com wrote:
+static bool intel_atom_v4_counter_freezing_broken(int cpu)
{
u32 rev = UINT_MAX; /* default to broken for unknown stepping */
- switch (cpu_data(cpu).x86_stepping) {
- case
On 10/3/2018 2:10 AM, Thomas Gleixner wrote:
On Tue, 2 Oct 2018, kan.li...@linux.intel.com wrote:
+static bool intel_atom_v4_counter_freezing_broken(int cpu)
{
u32 rev = UINT_MAX; /* default to broken for unknown stepping */
- switch (cpu_data(cpu).x86_stepping) {
- case
On Tue, 2 Oct 2018, kan.li...@linux.intel.com wrote:
> +static bool intel_atom_v4_counter_freezing_broken(int cpu)
> {
> u32 rev = UINT_MAX; /* default to broken for unknown stepping */
>
> - switch (cpu_data(cpu).x86_stepping) {
> - case 1:
> - rev = 0x28;
> +
On Tue, 2 Oct 2018, kan.li...@linux.intel.com wrote:
> +static bool intel_atom_v4_counter_freezing_broken(int cpu)
> {
> u32 rev = UINT_MAX; /* default to broken for unknown stepping */
>
> - switch (cpu_data(cpu).x86_stepping) {
> - case 1:
> - rev = 0x28;
> +
From: Kan Liang
A ucode patch is also needed for Goldmont while counter freezing feature
is enabled. Otherwise, there will be some issues, e.g. PMI lost.
Add a quirk to check microcode version. If the system starts with the
wrong ucode, leave the counter-freezing feature permanently disabled.
From: Kan Liang
A ucode patch is also needed for Goldmont while counter freezing feature
is enabled. Otherwise, there will be some issues, e.g. PMI lost.
Add a quirk to check microcode version. If the system starts with the
wrong ucode, leave the counter-freezing feature permanently disabled.
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