Re: [RESEND PATCH 1/2] arm64: dts: ti: k3-am64-main: Add OSPI node
On 17:31-20210315, Vignesh Raghavendra wrote: > AM64 SoC has a single Octal SPI (OSPI) instance under Flash SubSystem > (FSS). Add DT entry for the same. > > Signed-off-by: Vignesh Raghavendra > Reviewed-by: Pratyush Yadav > --- > Resend: > Rebase onto latest -next > > v1: lore.kernel.org/r/20210309130514.11740-1-vigne...@ti.com Thanks, but we will need to rebase -> so lets sequence this right offline. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D)/Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
[RESEND PATCH 1/2] arm64: dts: ti: k3-am64-main: Add OSPI node
AM64 SoC has a single Octal SPI (OSPI) instance under Flash SubSystem
(FSS). Add DT entry for the same.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Pratyush Yadav
---
Resend:
Rebase onto latest -next
v1: lore.kernel.org/r/20210309130514.11740-1-vigne...@ti.com
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 25
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 1f33b8d0080b..d914a58680aa 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -508,4 +508,29 @@ adc {
compatible = "ti,am654-adc", "ti,am3359-adc";
};
};
+
+ fss: bus@fc0 {
+ compatible = "simple-bus";
+ reg = <0x00 0x0fc0 0x00 0x7>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ospi0: spi@fc4 {
+ compatible = "ti,am654-ospi", "cdns,qspi-nor";
+ reg = <0x00 0x0fc4 0x00 0x100>,
+ <0x05 0x 0x01 0x>;
+ interrupts = ;
+ cdns,fifo-depth = <256>;
+ cdns,fifo-width = <4>;
+ cdns,trigger-address = <0x0>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ clocks = <_clks 75 6>;
+ assigned-clocks = <_clks 75 6>;
+ assigned-clock-parents = <_clks 75 7>;
+ assigned-clock-rates = <1>;
+ power-domains = <_pds 75 TI_SCI_PD_EXCLUSIVE>;
+ };
+ };
};
--
2.30.2
Re: [PATCH 1/2] arm64: dts: ti: k3-am64-main: Add OSPI node
Hi Nishanth
On 3/9/21 6:35 PM, Vignesh Raghavendra wrote:
> AM64 SoC has a single Octal SPI (OSPI) instance under Flash SubSystem
> (FSS). Add DT entry for the same.
>
> Signed-off-by: Vignesh Raghavendra
> ---
Please ignore the series. I see some instabilities in my testing... Will
repost once I have addressed them. Sorry for the noise.
Regards
Vignesh
> arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 25
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> index 5f85950daef7..bcec4fa444b5 100644
> --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> @@ -402,4 +402,29 @@ sdhci1: mmc@fa0 {
> ti,otap-del-sel-ddr50 = <0x9>;
> ti,clkbuf-sel = <0x7>;
> };
> +
> + fss: bus@fc0 {
> + compatible = "simple-bus";
> + reg = <0x00 0x0fc0 0x00 0x7>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + ospi0: spi@fc4 {
> + compatible = "ti,am654-ospi", "cdns,qspi-nor";
> + reg = <0x00 0x0fc4 0x00 0x100>,
> + <0x05 0x 0x01 0x>;
> + interrupts = ;
> + cdns,fifo-depth = <256>;
> + cdns,fifo-width = <4>;
> + cdns,trigger-address = <0x0>;
> + #address-cells = <0x1>;
> + #size-cells = <0x0>;
> + clocks = <_clks 75 6>;
> + assigned-clocks = <_clks 75 6>;
> + assigned-clock-parents = <_clks 75 7>;
> + assigned-clock-rates = <1>;
> + power-domains = <_pds 75 TI_SCI_PD_EXCLUSIVE>;
> + };
> + };
> };
>
Re: [PATCH 1/2] arm64: dts: ti: k3-am64-main: Add OSPI node
On 09/03/21 06:35PM, Vignesh Raghavendra wrote:
> AM64 SoC has a single Octal SPI (OSPI) instance under Flash SubSystem
> (FSS). Add DT entry for the same.
>
> Signed-off-by: Vignesh Raghavendra
Reviewed-by: Pratyush Yadav
> ---
> arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 25
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> index 5f85950daef7..bcec4fa444b5 100644
> --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> @@ -402,4 +402,29 @@ sdhci1: mmc@fa0 {
> ti,otap-del-sel-ddr50 = <0x9>;
> ti,clkbuf-sel = <0x7>;
> };
> +
> + fss: bus@fc0 {
> + compatible = "simple-bus";
> + reg = <0x00 0x0fc0 0x00 0x7>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + ospi0: spi@fc4 {
> + compatible = "ti,am654-ospi", "cdns,qspi-nor";
> + reg = <0x00 0x0fc4 0x00 0x100>,
> + <0x05 0x 0x01 0x>;
> + interrupts = ;
> + cdns,fifo-depth = <256>;
> + cdns,fifo-width = <4>;
> + cdns,trigger-address = <0x0>;
> + #address-cells = <0x1>;
> + #size-cells = <0x0>;
> + clocks = <_clks 75 6>;
> + assigned-clocks = <_clks 75 6>;
> + assigned-clock-parents = <_clks 75 7>;
> + assigned-clock-rates = <1>;
> + power-domains = <_pds 75 TI_SCI_PD_EXCLUSIVE>;
> + };
> + };
> };
> --
> 2.30.1
>
--
Regards,
Pratyush Yadav
Texas Instruments Inc.
[PATCH 1/2] arm64: dts: ti: k3-am64-main: Add OSPI node
AM64 SoC has a single Octal SPI (OSPI) instance under Flash SubSystem
(FSS). Add DT entry for the same.
Signed-off-by: Vignesh Raghavendra
---
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 25
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 5f85950daef7..bcec4fa444b5 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -402,4 +402,29 @@ sdhci1: mmc@fa0 {
ti,otap-del-sel-ddr50 = <0x9>;
ti,clkbuf-sel = <0x7>;
};
+
+ fss: bus@fc0 {
+ compatible = "simple-bus";
+ reg = <0x00 0x0fc0 0x00 0x7>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ospi0: spi@fc4 {
+ compatible = "ti,am654-ospi", "cdns,qspi-nor";
+ reg = <0x00 0x0fc4 0x00 0x100>,
+ <0x05 0x 0x01 0x>;
+ interrupts = ;
+ cdns,fifo-depth = <256>;
+ cdns,fifo-width = <4>;
+ cdns,trigger-address = <0x0>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ clocks = <_clks 75 6>;
+ assigned-clocks = <_clks 75 6>;
+ assigned-clock-parents = <_clks 75 7>;
+ assigned-clock-rates = <1>;
+ power-domains = <_pds 75 TI_SCI_PD_EXCLUSIVE>;
+ };
+ };
};
--
2.30.1
