Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
* Arnaldo Carvalho de Melowrote: > Em Tue, Mar 13, 2018 at 03:27:30PM -0300, Arnaldo Carvalho de Melo escreveu: > > Em Tue, Mar 13, 2018 at 03:26:18PM +0100, Ingo Molnar escreveu: > > > That's not a valid SOB chain, author != first-Signed-off-by. > > > I removed that cset for now, can you please check if the > > perf-core-for-mingo-4.17-20180313-2 tag is allright? > > So, since there is this problem with powerpc and jevents, Ingo, please > hold on a bit more... Hopefully tomorrow things will be in a better > shape. Sure, no problem! Thanks, Ingo
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
* Arnaldo Carvalho de Melo wrote: > Em Tue, Mar 13, 2018 at 03:27:30PM -0300, Arnaldo Carvalho de Melo escreveu: > > Em Tue, Mar 13, 2018 at 03:26:18PM +0100, Ingo Molnar escreveu: > > > That's not a valid SOB chain, author != first-Signed-off-by. > > > I removed that cset for now, can you please check if the > > perf-core-for-mingo-4.17-20180313-2 tag is allright? > > So, since there is this problem with powerpc and jevents, Ingo, please > hold on a bit more... Hopefully tomorrow things will be in a better > shape. Sure, no problem! Thanks, Ingo
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
Em Tue, Mar 13, 2018 at 03:27:30PM -0300, Arnaldo Carvalho de Melo escreveu: > Em Tue, Mar 13, 2018 at 03:26:18PM +0100, Ingo Molnar escreveu: > > That's not a valid SOB chain, author != first-Signed-off-by. > I removed that cset for now, can you please check if the > perf-core-for-mingo-4.17-20180313-2 tag is allright? So, since there is this problem with powerpc and jevents, Ingo, please hold on a bit more... Hopefully tomorrow things will be in a better shape. - Arnaldo
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
Em Tue, Mar 13, 2018 at 03:27:30PM -0300, Arnaldo Carvalho de Melo escreveu: > Em Tue, Mar 13, 2018 at 03:26:18PM +0100, Ingo Molnar escreveu: > > That's not a valid SOB chain, author != first-Signed-off-by. > I removed that cset for now, can you please check if the > perf-core-for-mingo-4.17-20180313-2 tag is allright? So, since there is this problem with powerpc and jevents, Ingo, please hold on a bit more... Hopefully tomorrow things will be in a better shape. - Arnaldo
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
Em Tue, Mar 13, 2018 at 03:26:18PM +0100, Ingo Molnar escreveu: > * Arnaldo Carvalho de Melowrote: > > From: John Garry > > Add JSON for ARMv8 IMPLEMENTATION DEFINED recommended events. > > The JSON is copied from ARMv8 architecture reference manual, available > > here: > > https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf > > Signed-off-by: Shaokun Zhang > > Cc: Alexander Shishkin > > Cc: Andi Kleen > > Cc: Ganapatrao Kulkarni > > Cc: Jiri Olsa > > Cc: Namhyung Kim > > Cc: Peter Zijlstra > > Cc: Shaokun Zhang > > Cc: Will Deacon > > Cc: William Cohen > > Cc: linux-arm-ker...@lists.infradead.org > > Cc: linux...@huawei.com > > Link: > > http://lkml.kernel.org/r/1520506716-197429-9-git-send-email-john.ga...@huawei.com > > Signed-off-by: John Garry > > Signed-off-by: Arnaldo Carvalho de Melo > That's not a valid SOB chain, author != first-Signed-off-by. I removed that cset for now, can you please check if the perf-core-for-mingo-4.17-20180313-2 tag is allright? - Arnaldo
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
Em Tue, Mar 13, 2018 at 03:26:18PM +0100, Ingo Molnar escreveu: > * Arnaldo Carvalho de Melo wrote: > > From: John Garry > > Add JSON for ARMv8 IMPLEMENTATION DEFINED recommended events. > > The JSON is copied from ARMv8 architecture reference manual, available > > here: > > https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf > > Signed-off-by: Shaokun Zhang > > Cc: Alexander Shishkin > > Cc: Andi Kleen > > Cc: Ganapatrao Kulkarni > > Cc: Jiri Olsa > > Cc: Namhyung Kim > > Cc: Peter Zijlstra > > Cc: Shaokun Zhang > > Cc: Will Deacon > > Cc: William Cohen > > Cc: linux-arm-ker...@lists.infradead.org > > Cc: linux...@huawei.com > > Link: > > http://lkml.kernel.org/r/1520506716-197429-9-git-send-email-john.ga...@huawei.com > > Signed-off-by: John Garry > > Signed-off-by: Arnaldo Carvalho de Melo > That's not a valid SOB chain, author != first-Signed-off-by. I removed that cset for now, can you please check if the perf-core-for-mingo-4.17-20180313-2 tag is allright? - Arnaldo
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
On 13/03/2018 15:08, Ingo Molnar wrote: * John Garrywrote: On 13/03/2018 14:26, Ingo Molnar wrote: * Arnaldo Carvalho de Melo wrote: From: John Garry Add JSON for ARMv8 IMPLEMENTATION DEFINED recommended events. The JSON is copied from ARMv8 architecture reference manual, available here: https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf Signed-off-by: Shaokun Zhang Originally-from: Shaokun Zhang Cc: Alexander Shishkin Cc: Andi Kleen Cc: Ganapatrao Kulkarni Cc: Jiri Olsa Cc: Namhyung Kim Cc: Peter Zijlstra Cc: Shaokun Zhang Cc: Will Deacon Cc: William Cohen Cc: linux-arm-ker...@lists.infradead.org Cc: linux...@huawei.com Link: http://lkml.kernel.org/r/1520506716-197429-9-git-send-email-john.ga...@huawei.com Signed-off-by: John Garry Signed-off-by: Arnaldo Carvalho de Melo That's not a valid SOB chain, author != first-Signed-off-by. Right, so my SOB can go first. Let me know how to help remedy. Well, it depends on what role Shaokun Zhang had in the creation of the patch: if he co-authored the patch and you finished it then you can add him as: Originally-from: Shaokun Zhang or if he tested/reviewed the patch then his entry should be Reviewed-by/Acked-by or Tested-by. Hi Ingo, Arnaldo, I think it would be fair to say the former, that is: "he co-authored the patch and you finished it". Thanks, John Thanks, Ingo ___ linux-arm-kernel mailing list linux-arm-ker...@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
On 13/03/2018 15:08, Ingo Molnar wrote: * John Garry wrote: On 13/03/2018 14:26, Ingo Molnar wrote: * Arnaldo Carvalho de Melo wrote: From: John Garry Add JSON for ARMv8 IMPLEMENTATION DEFINED recommended events. The JSON is copied from ARMv8 architecture reference manual, available here: https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf Signed-off-by: Shaokun Zhang Originally-from: Shaokun Zhang Cc: Alexander Shishkin Cc: Andi Kleen Cc: Ganapatrao Kulkarni Cc: Jiri Olsa Cc: Namhyung Kim Cc: Peter Zijlstra Cc: Shaokun Zhang Cc: Will Deacon Cc: William Cohen Cc: linux-arm-ker...@lists.infradead.org Cc: linux...@huawei.com Link: http://lkml.kernel.org/r/1520506716-197429-9-git-send-email-john.ga...@huawei.com Signed-off-by: John Garry Signed-off-by: Arnaldo Carvalho de Melo That's not a valid SOB chain, author != first-Signed-off-by. Right, so my SOB can go first. Let me know how to help remedy. Well, it depends on what role Shaokun Zhang had in the creation of the patch: if he co-authored the patch and you finished it then you can add him as: Originally-from: Shaokun Zhang or if he tested/reviewed the patch then his entry should be Reviewed-by/Acked-by or Tested-by. Hi Ingo, Arnaldo, I think it would be fair to say the former, that is: "he co-authored the patch and you finished it". Thanks, John Thanks, Ingo ___ linux-arm-kernel mailing list linux-arm-ker...@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
Em Tue, Mar 13, 2018 at 04:08:38PM +0100, Ingo Molnar escreveu: > > * John Garrywrote: > > > On 13/03/2018 14:26, Ingo Molnar wrote: > > > > > > * Arnaldo Carvalho de Melo wrote: > > > > > > > From: John Garry > > > > > > > > Add JSON for ARMv8 IMPLEMENTATION DEFINED recommended events. > > > > > > > > The JSON is copied from ARMv8 architecture reference manual, available > > > > here: > > > > > > > > https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf > > > > > > > > Signed-off-by: Shaokun Zhang > > > > Cc: Alexander Shishkin > > > > Cc: Andi Kleen > > > > Cc: Ganapatrao Kulkarni > > > > Cc: Jiri Olsa > > > > Cc: Namhyung Kim > > > > Cc: Peter Zijlstra > > > > Cc: Shaokun Zhang > > > > Cc: Will Deacon > > > > Cc: William Cohen > > > > Cc: linux-arm-ker...@lists.infradead.org > > > > Cc: linux...@huawei.com > > > > Link: > > > > http://lkml.kernel.org/r/1520506716-197429-9-git-send-email-john.ga...@huawei.com > > > > Signed-off-by: John Garry > > > > Signed-off-by: Arnaldo Carvalho de Melo > > > > > > That's not a valid SOB chain, author != first-Signed-off-by. > > > > > > > Right, so my SOB can go first. > > > > Let me know how to help remedy. > > Well, it depends on what role Shaokun Zhang had in the creation of the patch: > if > he co-authored the patch and you finished it then you can add him as: > > Originally-from: Shaokun Zhang > > or if he tested/reviewed the patch then his entry should be > Reviewed-by/Acked-by > or Tested-by. yeah, please clarify what his role was and I'll do the necessary changes, in addition to adding more code to my pre-commit scripts, something long overdue... - Arnaldo
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
Em Tue, Mar 13, 2018 at 04:08:38PM +0100, Ingo Molnar escreveu: > > * John Garry wrote: > > > On 13/03/2018 14:26, Ingo Molnar wrote: > > > > > > * Arnaldo Carvalho de Melo wrote: > > > > > > > From: John Garry > > > > > > > > Add JSON for ARMv8 IMPLEMENTATION DEFINED recommended events. > > > > > > > > The JSON is copied from ARMv8 architecture reference manual, available > > > > here: > > > > > > > > https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf > > > > > > > > Signed-off-by: Shaokun Zhang > > > > Cc: Alexander Shishkin > > > > Cc: Andi Kleen > > > > Cc: Ganapatrao Kulkarni > > > > Cc: Jiri Olsa > > > > Cc: Namhyung Kim > > > > Cc: Peter Zijlstra > > > > Cc: Shaokun Zhang > > > > Cc: Will Deacon > > > > Cc: William Cohen > > > > Cc: linux-arm-ker...@lists.infradead.org > > > > Cc: linux...@huawei.com > > > > Link: > > > > http://lkml.kernel.org/r/1520506716-197429-9-git-send-email-john.ga...@huawei.com > > > > Signed-off-by: John Garry > > > > Signed-off-by: Arnaldo Carvalho de Melo > > > > > > That's not a valid SOB chain, author != first-Signed-off-by. > > > > > > > Right, so my SOB can go first. > > > > Let me know how to help remedy. > > Well, it depends on what role Shaokun Zhang had in the creation of the patch: > if > he co-authored the patch and you finished it then you can add him as: > > Originally-from: Shaokun Zhang > > or if he tested/reviewed the patch then his entry should be > Reviewed-by/Acked-by > or Tested-by. yeah, please clarify what his role was and I'll do the necessary changes, in addition to adding more code to my pre-commit scripts, something long overdue... - Arnaldo
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
Em Tue, Mar 13, 2018 at 03:26:18PM +0100, Ingo Molnar escreveu: > > * Arnaldo Carvalho de Melowrote: > > > From: John Garry > > > > Add JSON for ARMv8 IMPLEMENTATION DEFINED recommended events. > > > > The JSON is copied from ARMv8 architecture reference manual, available > > here: > > > > https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf > > > > Signed-off-by: Shaokun Zhang > > Cc: Alexander Shishkin > > Cc: Andi Kleen > > Cc: Ganapatrao Kulkarni > > Cc: Jiri Olsa > > Cc: Namhyung Kim > > Cc: Peter Zijlstra > > Cc: Shaokun Zhang > > Cc: Will Deacon > > Cc: William Cohen > > Cc: linux-arm-ker...@lists.infradead.org > > Cc: linux...@huawei.com > > Link: > > http://lkml.kernel.org/r/1520506716-197429-9-git-send-email-john.ga...@huawei.com > > Signed-off-by: John Garry > > Signed-off-by: Arnaldo Carvalho de Melo > > That's not a valid SOB chain, author != first-Signed-off-by. Ok, I'll fix that. - Arnaldo
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
Em Tue, Mar 13, 2018 at 03:26:18PM +0100, Ingo Molnar escreveu: > > * Arnaldo Carvalho de Melo wrote: > > > From: John Garry > > > > Add JSON for ARMv8 IMPLEMENTATION DEFINED recommended events. > > > > The JSON is copied from ARMv8 architecture reference manual, available > > here: > > > > https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf > > > > Signed-off-by: Shaokun Zhang > > Cc: Alexander Shishkin > > Cc: Andi Kleen > > Cc: Ganapatrao Kulkarni > > Cc: Jiri Olsa > > Cc: Namhyung Kim > > Cc: Peter Zijlstra > > Cc: Shaokun Zhang > > Cc: Will Deacon > > Cc: William Cohen > > Cc: linux-arm-ker...@lists.infradead.org > > Cc: linux...@huawei.com > > Link: > > http://lkml.kernel.org/r/1520506716-197429-9-git-send-email-john.ga...@huawei.com > > Signed-off-by: John Garry > > Signed-off-by: Arnaldo Carvalho de Melo > > That's not a valid SOB chain, author != first-Signed-off-by. Ok, I'll fix that. - Arnaldo
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
* John Garrywrote: > On 13/03/2018 14:26, Ingo Molnar wrote: > > > > * Arnaldo Carvalho de Melo wrote: > > > > > From: John Garry > > > > > > Add JSON for ARMv8 IMPLEMENTATION DEFINED recommended events. > > > > > > The JSON is copied from ARMv8 architecture reference manual, available > > > here: > > > > > > https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf > > > > > > Signed-off-by: Shaokun Zhang > > > Cc: Alexander Shishkin > > > Cc: Andi Kleen > > > Cc: Ganapatrao Kulkarni > > > Cc: Jiri Olsa > > > Cc: Namhyung Kim > > > Cc: Peter Zijlstra > > > Cc: Shaokun Zhang > > > Cc: Will Deacon > > > Cc: William Cohen > > > Cc: linux-arm-ker...@lists.infradead.org > > > Cc: linux...@huawei.com > > > Link: > > > http://lkml.kernel.org/r/1520506716-197429-9-git-send-email-john.ga...@huawei.com > > > Signed-off-by: John Garry > > > Signed-off-by: Arnaldo Carvalho de Melo > > > > That's not a valid SOB chain, author != first-Signed-off-by. > > > > Right, so my SOB can go first. > > Let me know how to help remedy. Well, it depends on what role Shaokun Zhang had in the creation of the patch: if he co-authored the patch and you finished it then you can add him as: Originally-from: Shaokun Zhang or if he tested/reviewed the patch then his entry should be Reviewed-by/Acked-by or Tested-by. Thanks, Ingo
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
* John Garry wrote: > On 13/03/2018 14:26, Ingo Molnar wrote: > > > > * Arnaldo Carvalho de Melo wrote: > > > > > From: John Garry > > > > > > Add JSON for ARMv8 IMPLEMENTATION DEFINED recommended events. > > > > > > The JSON is copied from ARMv8 architecture reference manual, available > > > here: > > > > > > https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf > > > > > > Signed-off-by: Shaokun Zhang > > > Cc: Alexander Shishkin > > > Cc: Andi Kleen > > > Cc: Ganapatrao Kulkarni > > > Cc: Jiri Olsa > > > Cc: Namhyung Kim > > > Cc: Peter Zijlstra > > > Cc: Shaokun Zhang > > > Cc: Will Deacon > > > Cc: William Cohen > > > Cc: linux-arm-ker...@lists.infradead.org > > > Cc: linux...@huawei.com > > > Link: > > > http://lkml.kernel.org/r/1520506716-197429-9-git-send-email-john.ga...@huawei.com > > > Signed-off-by: John Garry > > > Signed-off-by: Arnaldo Carvalho de Melo > > > > That's not a valid SOB chain, author != first-Signed-off-by. > > > > Right, so my SOB can go first. > > Let me know how to help remedy. Well, it depends on what role Shaokun Zhang had in the creation of the patch: if he co-authored the patch and you finished it then you can add him as: Originally-from: Shaokun Zhang or if he tested/reviewed the patch then his entry should be Reviewed-by/Acked-by or Tested-by. Thanks, Ingo
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
On 13/03/2018 14:26, Ingo Molnar wrote: * Arnaldo Carvalho de Melowrote: From: John Garry Add JSON for ARMv8 IMPLEMENTATION DEFINED recommended events. The JSON is copied from ARMv8 architecture reference manual, available here: https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf Signed-off-by: Shaokun Zhang Cc: Alexander Shishkin Cc: Andi Kleen Cc: Ganapatrao Kulkarni Cc: Jiri Olsa Cc: Namhyung Kim Cc: Peter Zijlstra Cc: Shaokun Zhang Cc: Will Deacon Cc: William Cohen Cc: linux-arm-ker...@lists.infradead.org Cc: linux...@huawei.com Link: http://lkml.kernel.org/r/1520506716-197429-9-git-send-email-john.ga...@huawei.com Signed-off-by: John Garry Signed-off-by: Arnaldo Carvalho de Melo That's not a valid SOB chain, author != first-Signed-off-by. Right, so my SOB can go first. Let me know how to help remedy. Thanks, John Thanks, Ingo .
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
On 13/03/2018 14:26, Ingo Molnar wrote: * Arnaldo Carvalho de Melo wrote: From: John Garry Add JSON for ARMv8 IMPLEMENTATION DEFINED recommended events. The JSON is copied from ARMv8 architecture reference manual, available here: https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf Signed-off-by: Shaokun Zhang Cc: Alexander Shishkin Cc: Andi Kleen Cc: Ganapatrao Kulkarni Cc: Jiri Olsa Cc: Namhyung Kim Cc: Peter Zijlstra Cc: Shaokun Zhang Cc: Will Deacon Cc: William Cohen Cc: linux-arm-ker...@lists.infradead.org Cc: linux...@huawei.com Link: http://lkml.kernel.org/r/1520506716-197429-9-git-send-email-john.ga...@huawei.com Signed-off-by: John Garry Signed-off-by: Arnaldo Carvalho de Melo That's not a valid SOB chain, author != first-Signed-off-by. Right, so my SOB can go first. Let me know how to help remedy. Thanks, John Thanks, Ingo .
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
* Arnaldo Carvalho de Melowrote: > From: John Garry > > Add JSON for ARMv8 IMPLEMENTATION DEFINED recommended events. > > The JSON is copied from ARMv8 architecture reference manual, available > here: > > https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf > > Signed-off-by: Shaokun Zhang > Cc: Alexander Shishkin > Cc: Andi Kleen > Cc: Ganapatrao Kulkarni > Cc: Jiri Olsa > Cc: Namhyung Kim > Cc: Peter Zijlstra > Cc: Shaokun Zhang > Cc: Will Deacon > Cc: William Cohen > Cc: linux-arm-ker...@lists.infradead.org > Cc: linux...@huawei.com > Link: > http://lkml.kernel.org/r/1520506716-197429-9-git-send-email-john.ga...@huawei.com > Signed-off-by: John Garry > Signed-off-by: Arnaldo Carvalho de Melo That's not a valid SOB chain, author != first-Signed-off-by. Thanks, Ingo
Re: [PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
* Arnaldo Carvalho de Melo wrote: > From: John Garry > > Add JSON for ARMv8 IMPLEMENTATION DEFINED recommended events. > > The JSON is copied from ARMv8 architecture reference manual, available > here: > > https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf > > Signed-off-by: Shaokun Zhang > Cc: Alexander Shishkin > Cc: Andi Kleen > Cc: Ganapatrao Kulkarni > Cc: Jiri Olsa > Cc: Namhyung Kim > Cc: Peter Zijlstra > Cc: Shaokun Zhang > Cc: Will Deacon > Cc: William Cohen > Cc: linux-arm-ker...@lists.infradead.org > Cc: linux...@huawei.com > Link: > http://lkml.kernel.org/r/1520506716-197429-9-git-send-email-john.ga...@huawei.com > Signed-off-by: John Garry > Signed-off-by: Arnaldo Carvalho de Melo That's not a valid SOB chain, author != first-Signed-off-by. Thanks, Ingo
[PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
From: John GarryAdd JSON for ARMv8 IMPLEMENTATION DEFINED recommended events. The JSON is copied from ARMv8 architecture reference manual, available here: https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf Signed-off-by: Shaokun Zhang Cc: Alexander Shishkin Cc: Andi Kleen Cc: Ganapatrao Kulkarni Cc: Jiri Olsa Cc: Namhyung Kim Cc: Peter Zijlstra Cc: Shaokun Zhang Cc: Will Deacon Cc: William Cohen Cc: linux-arm-ker...@lists.infradead.org Cc: linux...@huawei.com Link: http://lkml.kernel.org/r/1520506716-197429-9-git-send-email-john.ga...@huawei.com Signed-off-by: John Garry Signed-off-by: Arnaldo Carvalho de Melo --- .../pmu-events/arch/arm64/armv8-recommended.json | 452 + 1 file changed, 452 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/armv8-recommended.json diff --git a/tools/perf/pmu-events/arch/arm64/armv8-recommended.json b/tools/perf/pmu-events/arch/arm64/armv8-recommended.json new file mode 100644 index ..6328828c018c --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/armv8-recommended.json @@ -0,0 +1,452 @@ +[ +{ +"PublicDescription": "Attributable Level 1 data cache access, read", +"EventCode": "0x40", +"EventName": "L1D_CACHE_RD", +"BriefDescription": "L1D cache access, read" +}, +{ +"PublicDescription": "Attributable Level 1 data cache access, write", +"EventCode": "0x41", +"EventName": "L1D_CACHE_WR", +"BriefDescription": "L1D cache access, write" +}, +{ +"PublicDescription": "Attributable Level 1 data cache refill, read", +"EventCode": "0x42", +"EventName": "L1D_CACHE_REFILL_RD", +"BriefDescription": "L1D cache refill, read" +}, +{ +"PublicDescription": "Attributable Level 1 data cache refill, write", +"EventCode": "0x43", +"EventName": "L1D_CACHE_REFILL_WR", +"BriefDescription": "L1D cache refill, write" +}, +{ +"PublicDescription": "Attributable Level 1 data cache refill, inner", +"EventCode": "0x44", +"EventName": "L1D_CACHE_REFILL_INNER", +"BriefDescription": "L1D cache refill, inner" +}, +{ +"PublicDescription": "Attributable Level 1 data cache refill, outer", +"EventCode": "0x45", +"EventName": "L1D_CACHE_REFILL_OUTER", +"BriefDescription": "L1D cache refill, outer" +}, +{ +"PublicDescription": "Attributable Level 1 data cache Write-Back, victim", +"EventCode": "0x46", +"EventName": "L1D_CACHE_WB_VICTIM", +"BriefDescription": "L1D cache Write-Back, victim" +}, +{ +"PublicDescription": "Level 1 data cache Write-Back, cleaning and coherency", +"EventCode": "0x47", +"EventName": "L1D_CACHE_WB_CLEAN", +"BriefDescription": "L1D cache Write-Back, cleaning and coherency" +}, +{ +"PublicDescription": "Attributable Level 1 data cache invalidate", +"EventCode": "0x48", +"EventName": "L1D_CACHE_INVAL", +"BriefDescription": "L1D cache invalidate" +}, +{ +"PublicDescription": "Attributable Level 1 data TLB refill, read", +"EventCode": "0x4C", +"EventName": "L1D_TLB_REFILL_RD", +"BriefDescription": "L1D tlb refill, read" +}, +{ +"PublicDescription": "Attributable Level 1 data TLB refill, write", +"EventCode": "0x4D", +"EventName": "L1D_TLB_REFILL_WR", +"BriefDescription": "L1D tlb refill, write" +}, +{ +"PublicDescription": "Attributable Level 1 data or unified TLB access, read", +"EventCode": "0x4E", +"EventName": "L1D_TLB_RD", +"BriefDescription": "L1D tlb access, read" +}, +{ +"PublicDescription": "Attributable Level 1 data or unified TLB access, write", +"EventCode": "0x4F", +"EventName": "L1D_TLB_WR", +"BriefDescription": "L1D tlb access, write" +}, +{ +"PublicDescription": "Attributable Level 2 data cache access, read", +"EventCode": "0x50", +"EventName": "L2D_CACHE_RD", +"BriefDescription": "L2D cache access, read" +}, +{ +"PublicDescription": "Attributable Level 2 data cache access, write", +"EventCode": "0x51", +"EventName": "L2D_CACHE_WR", +"BriefDescription": "L2D cache access, write" +}, +{ +"PublicDescription": "Attributable Level 2 data cache refill, read", +"EventCode": "0x52", +"EventName": "L2D_CACHE_REFILL_RD", +"BriefDescription": "L2D cache refill,
[PATCH 18/31] perf vendor events arm64: Add armv8-recommended.json
From: John Garry Add JSON for ARMv8 IMPLEMENTATION DEFINED recommended events. The JSON is copied from ARMv8 architecture reference manual, available here: https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf Signed-off-by: Shaokun Zhang Cc: Alexander Shishkin Cc: Andi Kleen Cc: Ganapatrao Kulkarni Cc: Jiri Olsa Cc: Namhyung Kim Cc: Peter Zijlstra Cc: Shaokun Zhang Cc: Will Deacon Cc: William Cohen Cc: linux-arm-ker...@lists.infradead.org Cc: linux...@huawei.com Link: http://lkml.kernel.org/r/1520506716-197429-9-git-send-email-john.ga...@huawei.com Signed-off-by: John Garry Signed-off-by: Arnaldo Carvalho de Melo --- .../pmu-events/arch/arm64/armv8-recommended.json | 452 + 1 file changed, 452 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/armv8-recommended.json diff --git a/tools/perf/pmu-events/arch/arm64/armv8-recommended.json b/tools/perf/pmu-events/arch/arm64/armv8-recommended.json new file mode 100644 index ..6328828c018c --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/armv8-recommended.json @@ -0,0 +1,452 @@ +[ +{ +"PublicDescription": "Attributable Level 1 data cache access, read", +"EventCode": "0x40", +"EventName": "L1D_CACHE_RD", +"BriefDescription": "L1D cache access, read" +}, +{ +"PublicDescription": "Attributable Level 1 data cache access, write", +"EventCode": "0x41", +"EventName": "L1D_CACHE_WR", +"BriefDescription": "L1D cache access, write" +}, +{ +"PublicDescription": "Attributable Level 1 data cache refill, read", +"EventCode": "0x42", +"EventName": "L1D_CACHE_REFILL_RD", +"BriefDescription": "L1D cache refill, read" +}, +{ +"PublicDescription": "Attributable Level 1 data cache refill, write", +"EventCode": "0x43", +"EventName": "L1D_CACHE_REFILL_WR", +"BriefDescription": "L1D cache refill, write" +}, +{ +"PublicDescription": "Attributable Level 1 data cache refill, inner", +"EventCode": "0x44", +"EventName": "L1D_CACHE_REFILL_INNER", +"BriefDescription": "L1D cache refill, inner" +}, +{ +"PublicDescription": "Attributable Level 1 data cache refill, outer", +"EventCode": "0x45", +"EventName": "L1D_CACHE_REFILL_OUTER", +"BriefDescription": "L1D cache refill, outer" +}, +{ +"PublicDescription": "Attributable Level 1 data cache Write-Back, victim", +"EventCode": "0x46", +"EventName": "L1D_CACHE_WB_VICTIM", +"BriefDescription": "L1D cache Write-Back, victim" +}, +{ +"PublicDescription": "Level 1 data cache Write-Back, cleaning and coherency", +"EventCode": "0x47", +"EventName": "L1D_CACHE_WB_CLEAN", +"BriefDescription": "L1D cache Write-Back, cleaning and coherency" +}, +{ +"PublicDescription": "Attributable Level 1 data cache invalidate", +"EventCode": "0x48", +"EventName": "L1D_CACHE_INVAL", +"BriefDescription": "L1D cache invalidate" +}, +{ +"PublicDescription": "Attributable Level 1 data TLB refill, read", +"EventCode": "0x4C", +"EventName": "L1D_TLB_REFILL_RD", +"BriefDescription": "L1D tlb refill, read" +}, +{ +"PublicDescription": "Attributable Level 1 data TLB refill, write", +"EventCode": "0x4D", +"EventName": "L1D_TLB_REFILL_WR", +"BriefDescription": "L1D tlb refill, write" +}, +{ +"PublicDescription": "Attributable Level 1 data or unified TLB access, read", +"EventCode": "0x4E", +"EventName": "L1D_TLB_RD", +"BriefDescription": "L1D tlb access, read" +}, +{ +"PublicDescription": "Attributable Level 1 data or unified TLB access, write", +"EventCode": "0x4F", +"EventName": "L1D_TLB_WR", +"BriefDescription": "L1D tlb access, write" +}, +{ +"PublicDescription": "Attributable Level 2 data cache access, read", +"EventCode": "0x50", +"EventName": "L2D_CACHE_RD", +"BriefDescription": "L2D cache access, read" +}, +{ +"PublicDescription": "Attributable Level 2 data cache access, write", +"EventCode": "0x51", +"EventName": "L2D_CACHE_WR", +"BriefDescription": "L2D cache access, write" +}, +{ +"PublicDescription": "Attributable Level 2 data cache refill, read", +"EventCode": "0x52", +"EventName": "L2D_CACHE_REFILL_RD", +"BriefDescription": "L2D cache refill, read" +}, +{ +"PublicDescription": "Attributable Level 2 data cache refill, write", +"EventCode": "0x53", +"EventName": "L2D_CACHE_REFILL_WR", +"BriefDescription": "L2D cache refill, write" +}, +{ +"PublicDescription": "Attributable Level 2 data cache